arswitch_phy.c revision 268564
1/*- 2 * Copyright (c) 2011-2012 Stefan Bethke. 3 * Copyright (c) 2012 Adrian Chadd. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD: head/sys/dev/etherswitch/arswitch/arswitch_phy.c 268564 2014-07-12 06:23:42Z rpaulo $ 28 */ 29 30#include <sys/param.h> 31#include <sys/bus.h> 32#include <sys/errno.h> 33#include <sys/kernel.h> 34#include <sys/lock.h> 35#include <sys/module.h> 36#include <sys/mutex.h> 37#include <sys/socket.h> 38#include <sys/sockio.h> 39#include <sys/sysctl.h> 40#include <sys/systm.h> 41 42#include <net/if.h> 43#include <net/if_media.h> 44 45#include <machine/bus.h> 46#include <dev/iicbus/iic.h> 47#include <dev/iicbus/iiconf.h> 48#include <dev/iicbus/iicbus.h> 49#include <dev/mii/mii.h> 50#include <dev/mii/miivar.h> 51#include <dev/etherswitch/mdio.h> 52 53#include <dev/etherswitch/etherswitch.h> 54 55#include <dev/etherswitch/arswitch/arswitchreg.h> 56#include <dev/etherswitch/arswitch/arswitchvar.h> 57 58#include <dev/etherswitch/arswitch/arswitch_reg.h> 59#include <dev/etherswitch/arswitch/arswitch_phy.h> 60 61#include "mdio_if.h" 62#include "miibus_if.h" 63#include "etherswitch_if.h" 64 65#if defined(DEBUG) 66static SYSCTL_NODE(_debug, OID_AUTO, arswitch, CTLFLAG_RD, 0, "arswitch"); 67#endif 68 69/* 70 * access PHYs integrated into the switch chip through the switch's MDIO 71 * control register. 72 */ 73int 74arswitch_readphy(device_t dev, int phy, int reg) 75{ 76 struct arswitch_softc *sc; 77 uint32_t data = 0, ctrl; 78 int err, timeout; 79 uint32_t a; 80 81 sc = device_get_softc(dev); 82 ARSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED); 83 84 if (phy < 0 || phy >= 32) 85 return (ENXIO); 86 if (reg < 0 || reg >= 32) 87 return (ENXIO); 88 89 if (AR8X16_IS_SWITCH(sc, AR8327)) 90 a = AR8327_REG_MDIO_CTRL; 91 else 92 a = AR8X16_REG_MDIO_CTRL; 93 94 ARSWITCH_LOCK(sc); 95 err = arswitch_writereg_msb(dev, a, 96 AR8X16_MDIO_CTRL_BUSY | AR8X16_MDIO_CTRL_MASTER_EN | 97 AR8X16_MDIO_CTRL_CMD_READ | 98 (phy << AR8X16_MDIO_CTRL_PHY_ADDR_SHIFT) | 99 (reg << AR8X16_MDIO_CTRL_REG_ADDR_SHIFT)); 100 DEVERR(dev, err, "arswitch_readphy()=%d: phy=%d.%02x\n", phy, reg); 101 if (err != 0) 102 goto fail; 103 for (timeout = 100; timeout--; ) { 104 ctrl = arswitch_readreg_msb(dev, a); 105 if ((ctrl & AR8X16_MDIO_CTRL_BUSY) == 0) 106 break; 107 } 108 if (timeout < 0) 109 goto fail; 110 data = arswitch_readreg_lsb(dev, a) & 111 AR8X16_MDIO_CTRL_DATA_MASK; 112 ARSWITCH_UNLOCK(sc); 113 return (data); 114 115fail: 116 ARSWITCH_UNLOCK(sc); 117 return (-1); 118} 119 120int 121arswitch_writephy(device_t dev, int phy, int reg, int data) 122{ 123 struct arswitch_softc *sc; 124 uint32_t ctrl; 125 int err, timeout; 126 uint32_t a; 127 128 sc = device_get_softc(dev); 129 ARSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED); 130 131 if (reg < 0 || reg >= 32) 132 return (ENXIO); 133 134 if (AR8X16_IS_SWITCH(sc, AR8327)) 135 a = AR8327_REG_MDIO_CTRL; 136 else 137 a = AR8X16_REG_MDIO_CTRL; 138 139 ARSWITCH_LOCK(sc); 140 err = arswitch_writereg(dev, a, 141 AR8X16_MDIO_CTRL_BUSY | 142 AR8X16_MDIO_CTRL_MASTER_EN | 143 AR8X16_MDIO_CTRL_CMD_WRITE | 144 (phy << AR8X16_MDIO_CTRL_PHY_ADDR_SHIFT) | 145 (reg << AR8X16_MDIO_CTRL_REG_ADDR_SHIFT) | 146 (data & AR8X16_MDIO_CTRL_DATA_MASK)); 147 if (err != 0) 148 goto out; 149 for (timeout = 100; timeout--; ) { 150 ctrl = arswitch_readreg(dev, a); 151 if ((ctrl & AR8X16_MDIO_CTRL_BUSY) == 0) 152 break; 153 } 154 if (timeout < 0) 155 err = EIO; 156out: 157 DEVERR(dev, err, "arswitch_writephy()=%d: phy=%d.%02x\n", phy, reg); 158 ARSWITCH_UNLOCK(sc); 159 return (err); 160} 161