ena.c revision 343397 
1/*-
2 * BSD LICENSE
3 *
4 * Copyright (c) 2015-2017 Amazon.com, Inc. or its affiliates.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 *
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
21 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
22 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
23 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
24 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
28 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 */
30#include <sys/cdefs.h>
31__FBSDID("$FreeBSD: stable/11/sys/dev/ena/ena.c 343397 2019-01-24 09:53:41Z mw $");
32
33#include <sys/param.h>
34#include <sys/systm.h>
35#include <sys/bus.h>
36#include <sys/endian.h>
37#include <sys/kernel.h>
38#include <sys/kthread.h>
39#include <sys/malloc.h>
40#include <sys/mbuf.h>
41#include <sys/module.h>
42#include <sys/rman.h>
43#include <sys/smp.h>
44#include <sys/socket.h>
45#include <sys/sockio.h>
46#include <sys/sysctl.h>
47#include <sys/taskqueue.h>
48#include <sys/time.h>
49#include <sys/eventhandler.h>
50
51#include <machine/bus.h>
52#include <machine/resource.h>
53#include <machine/in_cksum.h>
54
55#include <net/bpf.h>
56#include <net/ethernet.h>
57#include <net/if.h>
58#include <net/if_var.h>
59#include <net/if_arp.h>
60#include <net/if_dl.h>
61#include <net/if_media.h>
62#include <net/rss_config.h>
63#include <net/if_types.h>
64#include <net/if_vlan_var.h>
65
66#include <netinet/in_rss.h>
67#include <netinet/in_systm.h>
68#include <netinet/in.h>
69#include <netinet/if_ether.h>
70#include <netinet/ip.h>
71#include <netinet/ip6.h>
72#include <netinet/tcp.h>
73#include <netinet/udp.h>
74
75#include <dev/pci/pcivar.h>
76#include <dev/pci/pcireg.h>
77
78#include "ena.h"
79#include "ena_sysctl.h"
80
81/*********************************************************
82 *  Function prototypes
83 *********************************************************/
84static int	ena_probe(device_t);
85static void	ena_intr_msix_mgmnt(void *);
86static int	ena_allocate_pci_resources(struct ena_adapter*);
87static void	ena_free_pci_resources(struct ena_adapter *);
88static int	ena_change_mtu(if_t, int);
89static inline void ena_alloc_counters(counter_u64_t *, int);
90static inline void ena_free_counters(counter_u64_t *, int);
91static inline void ena_reset_counters(counter_u64_t *, int);
92static void	ena_init_io_rings_common(struct ena_adapter *,
93    struct ena_ring *, uint16_t);
94static void	ena_init_io_rings(struct ena_adapter *);
95static void	ena_free_io_ring_resources(struct ena_adapter *, unsigned int);
96static void	ena_free_all_io_rings_resources(struct ena_adapter *);
97static int	ena_setup_tx_dma_tag(struct ena_adapter *);
98static int	ena_free_tx_dma_tag(struct ena_adapter *);
99static int	ena_setup_rx_dma_tag(struct ena_adapter *);
100static int	ena_free_rx_dma_tag(struct ena_adapter *);
101static int	ena_setup_tx_resources(struct ena_adapter *, int);
102static void	ena_free_tx_resources(struct ena_adapter *, int);
103static int	ena_setup_all_tx_resources(struct ena_adapter *);
104static void	ena_free_all_tx_resources(struct ena_adapter *);
105static inline int validate_rx_req_id(struct ena_ring *, uint16_t);
106static int	ena_setup_rx_resources(struct ena_adapter *, unsigned int);
107static void	ena_free_rx_resources(struct ena_adapter *, unsigned int);
108static int	ena_setup_all_rx_resources(struct ena_adapter *);
109static void	ena_free_all_rx_resources(struct ena_adapter *);
110static inline int ena_alloc_rx_mbuf(struct ena_adapter *, struct ena_ring *,
111    struct ena_rx_buffer *);
112static void	ena_free_rx_mbuf(struct ena_adapter *, struct ena_ring *,
113    struct ena_rx_buffer *);
114static int	ena_refill_rx_bufs(struct ena_ring *, uint32_t);
115static void	ena_free_rx_bufs(struct ena_adapter *, unsigned int);
116static void	ena_refill_all_rx_bufs(struct ena_adapter *);
117static void	ena_free_all_rx_bufs(struct ena_adapter *);
118static void	ena_free_tx_bufs(struct ena_adapter *, unsigned int);
119static void	ena_free_all_tx_bufs(struct ena_adapter *);
120static void	ena_destroy_all_tx_queues(struct ena_adapter *);
121static void	ena_destroy_all_rx_queues(struct ena_adapter *);
122static void	ena_destroy_all_io_queues(struct ena_adapter *);
123static int	ena_create_io_queues(struct ena_adapter *);
124static int	ena_tx_cleanup(struct ena_ring *);
125static void	ena_deferred_rx_cleanup(void *, int);
126static int	ena_rx_cleanup(struct ena_ring *);
127static inline int validate_tx_req_id(struct ena_ring *, uint16_t);
128static void	ena_rx_hash_mbuf(struct ena_ring *, struct ena_com_rx_ctx *,
129    struct mbuf *);
130static struct mbuf* ena_rx_mbuf(struct ena_ring *, struct ena_com_rx_buf_info *,
131    struct ena_com_rx_ctx *, uint16_t *);
132static inline void ena_rx_checksum(struct ena_ring *, struct ena_com_rx_ctx *,
133    struct mbuf *);
134static void	ena_handle_msix(void *);
135static int	ena_enable_msix(struct ena_adapter *);
136static void	ena_setup_mgmnt_intr(struct ena_adapter *);
137static void	ena_setup_io_intr(struct ena_adapter *);
138static int	ena_request_mgmnt_irq(struct ena_adapter *);
139static int	ena_request_io_irq(struct ena_adapter *);
140static void	ena_free_mgmnt_irq(struct ena_adapter *);
141static void	ena_free_io_irq(struct ena_adapter *);
142static void	ena_free_irqs(struct ena_adapter*);
143static void	ena_disable_msix(struct ena_adapter *);
144static void	ena_unmask_all_io_irqs(struct ena_adapter *);
145static int	ena_rss_configure(struct ena_adapter *);
146static int	ena_up_complete(struct ena_adapter *);
147static int	ena_up(struct ena_adapter *);
148static void	ena_down(struct ena_adapter *);
149static uint64_t	ena_get_counter(if_t, ift_counter);
150static int	ena_media_change(if_t);
151static void	ena_media_status(if_t, struct ifmediareq *);
152static void	ena_init(void *);
153static int	ena_ioctl(if_t, u_long, caddr_t);
154static int	ena_get_dev_offloads(struct ena_com_dev_get_features_ctx *);
155static void	ena_update_host_info(struct ena_admin_host_info *, if_t);
156static void	ena_update_hwassist(struct ena_adapter *);
157static int	ena_setup_ifnet(device_t, struct ena_adapter *,
158    struct ena_com_dev_get_features_ctx *);
159static void	ena_tx_csum(struct ena_com_tx_ctx *, struct mbuf *);
160static int	ena_check_and_collapse_mbuf(struct ena_ring *tx_ring,
161    struct mbuf **mbuf);
162static int	ena_xmit_mbuf(struct ena_ring *, struct mbuf **);
163static void	ena_start_xmit(struct ena_ring *);
164static int	ena_mq_start(if_t, struct mbuf *);
165static void	ena_deferred_mq_start(void *, int);
166static void	ena_qflush(if_t);
167static int	ena_calc_io_queue_num(struct ena_adapter *,
168    struct ena_com_dev_get_features_ctx *);
169static int	ena_calc_queue_size(struct ena_adapter *, uint16_t *,
170    uint16_t *, struct ena_com_dev_get_features_ctx *);
171static int	ena_rss_init_default(struct ena_adapter *);
172static void	ena_rss_init_default_deferred(void *);
173static void	ena_config_host_info(struct ena_com_dev *);
174static int	ena_attach(device_t);
175static int	ena_detach(device_t);
176static int	ena_device_init(struct ena_adapter *, device_t,
177    struct ena_com_dev_get_features_ctx *, int *);
178static int	ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *,
179    int);
180static void ena_update_on_link_change(void *, struct ena_admin_aenq_entry *);
181static void	unimplemented_aenq_handler(void *,
182    struct ena_admin_aenq_entry *);
183static void	ena_timer_service(void *);
184
185static char ena_version[] = DEVICE_NAME DRV_MODULE_NAME " v" DRV_MODULE_VERSION;
186
187static SYSCTL_NODE(_hw, OID_AUTO, ena, CTLFLAG_RD, 0, "ENA driver parameters");
188
189/*
190 * Tuneable number of buffers in the buf-ring (drbr)
191 */
192static int ena_buf_ring_size = 4096;
193SYSCTL_INT(_hw_ena, OID_AUTO, buf_ring_size, CTLFLAG_RWTUN,
194    &ena_buf_ring_size, 0, "Size of the bufring");
195
196static ena_vendor_info_t ena_vendor_info_array[] = {
197    { PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_PF, 0},
198    { PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_LLQ_PF, 0},
199    { PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_VF, 0},
200    { PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_LLQ_VF, 0},
201    /* Last entry */
202    { 0, 0, 0 }
203};
204
205/*
206 * Contains pointers to event handlers, e.g. link state chage.
207 */
208static struct ena_aenq_handlers aenq_handlers;
209
210void
211ena_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nseg, int error)
212{
213	if (error != 0)
214		return;
215	*(bus_addr_t *) arg = segs[0].ds_addr;
216}
217
218int
219ena_dma_alloc(device_t dmadev, bus_size_t size,
220    ena_mem_handle_t *dma , int mapflags)
221{
222	struct ena_adapter* adapter = device_get_softc(dmadev);
223	uint32_t maxsize;
224	uint64_t dma_space_addr;
225	int error;
226
227	maxsize = ((size - 1) / PAGE_SIZE + 1) * PAGE_SIZE;
228
229	dma_space_addr = ENA_DMA_BIT_MASK(adapter->dma_width);
230	if (dma_space_addr == 0)
231		dma_space_addr = BUS_SPACE_MAXADDR;
232
233	error = bus_dma_tag_create(bus_get_dma_tag(dmadev), /* parent */
234	    8, 0,	      /* alignment, bounds 		*/
235	    dma_space_addr,   /* lowaddr of exclusion window	*/
236	    BUS_SPACE_MAXADDR,/* highaddr of exclusion window	*/
237	    NULL, NULL,	      /* filter, filterarg 		*/
238	    maxsize,	      /* maxsize 			*/
239	    1,		      /* nsegments 			*/
240	    maxsize,	      /* maxsegsize 			*/
241	    BUS_DMA_ALLOCNOW, /* flags 				*/
242	    NULL,	      /* lockfunc 			*/
243	    NULL,	      /* lockarg 			*/
244	    &dma->tag);
245	if (error != 0) {
246		device_printf(dmadev, "%s: bus_dma_tag_create failed: %d\n",
247		    __func__, error);
248		goto fail_tag;
249	}
250
251	error = bus_dmamem_alloc(dma->tag, (void**) &dma->vaddr,
252	    BUS_DMA_COHERENT | BUS_DMA_ZERO, &dma->map);
253	if (error != 0) {
254		device_printf(dmadev, "%s: bus_dmamem_alloc(%ju) failed: %d\n",
255		    __func__, (uintmax_t)size, error);
256		goto fail_map_create;
257	}
258
259	dma->paddr = 0;
260	error = bus_dmamap_load(dma->tag, dma->map, dma->vaddr,
261	    size, ena_dmamap_callback, &dma->paddr, mapflags);
262	if ((error != 0) || (dma->paddr == 0)) {
263		device_printf(dmadev, "%s: bus_dmamap_load failed: %d\n",
264		    __func__, error);
265		goto fail_map_load;
266	}
267
268	return (0);
269
270fail_map_load:
271	bus_dmamem_free(dma->tag, dma->vaddr, dma->map);
272fail_map_create:
273	bus_dma_tag_destroy(dma->tag);
274fail_tag:
275	dma->tag = NULL;
276
277	return (error);
278}
279
280static int
281ena_allocate_pci_resources(struct ena_adapter* adapter)
282{
283	device_t pdev = adapter->pdev;
284	int rid;
285
286	rid = PCIR_BAR(ENA_REG_BAR);
287	adapter->memory = NULL;
288	adapter->registers = bus_alloc_resource_any(pdev, SYS_RES_MEMORY,
289	    &rid, RF_ACTIVE);
290	if (adapter->registers == NULL) {
291		device_printf(pdev, "Unable to allocate bus resource: "
292		    "registers\n");
293		return (ENXIO);
294	}
295
296	return (0);
297}
298
299static void
300ena_free_pci_resources(struct ena_adapter *adapter)
301{
302	device_t pdev = adapter->pdev;
303
304	if (adapter->memory != NULL) {
305		bus_release_resource(pdev, SYS_RES_MEMORY,
306		    PCIR_BAR(ENA_MEM_BAR), adapter->memory);
307	}
308
309	if (adapter->registers != NULL) {
310		bus_release_resource(pdev, SYS_RES_MEMORY,
311		    PCIR_BAR(ENA_REG_BAR), adapter->registers);
312	}
313}
314
315static int
316ena_probe(device_t dev)
317{
318	ena_vendor_info_t *ent;
319	char		adapter_name[60];
320	uint16_t	pci_vendor_id = 0;
321	uint16_t	pci_device_id = 0;
322
323	pci_vendor_id = pci_get_vendor(dev);
324	pci_device_id = pci_get_device(dev);
325
326	ent = ena_vendor_info_array;
327	while (ent->vendor_id != 0) {
328		if ((pci_vendor_id == ent->vendor_id) &&
329		    (pci_device_id == ent->device_id)) {
330			ena_trace(ENA_DBG, "vendor=%x device=%x ",
331			    pci_vendor_id, pci_device_id);
332
333			sprintf(adapter_name, DEVICE_DESC);
334			device_set_desc_copy(dev, adapter_name);
335			return (BUS_PROBE_DEFAULT);
336		}
337
338		ent++;
339
340	}
341
342	return (ENXIO);
343}
344
345static int
346ena_change_mtu(if_t ifp, int new_mtu)
347{
348	struct ena_adapter *adapter = if_getsoftc(ifp);
349	struct ena_com_dev_get_features_ctx get_feat_ctx;
350	int rc, old_mtu, max_frame;
351
352	rc = ena_com_get_dev_attr_feat(adapter->ena_dev, &get_feat_ctx);
353	if (rc != 0) {
354		device_printf(adapter->pdev,
355		    "Cannot get attribute for ena device\n");
356		return (ENXIO);
357	}
358
359	/* Save old MTU in case of fail */
360	old_mtu = if_getmtu(ifp);
361
362	/* Change MTU and calculate max frame */
363	if_setmtu(ifp, new_mtu);
364	max_frame = ETHER_MAX_FRAME(ifp, ETHERTYPE_VLAN, 1);
365
366	if ((new_mtu < ENA_MIN_FRAME_LEN) ||
367	    (new_mtu > get_feat_ctx.dev_attr.max_mtu) ||
368	    (max_frame > ENA_MAX_FRAME_LEN)) {
369		device_printf(adapter->pdev, "Invalid MTU setting. "
370		    "new_mtu: %d\n", new_mtu);
371		goto error;
372	}
373
374	rc = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu);
375	if (rc != 0)
376		goto error;
377
378	return (0);
379error:
380	if_setmtu(ifp, old_mtu);
381	return (EINVAL);
382}
383
384static inline void
385ena_alloc_counters(counter_u64_t *begin, int size)
386{
387	counter_u64_t *end = (counter_u64_t *)((char *)begin + size);
388
389	for (; begin < end; ++begin)
390		*begin = counter_u64_alloc(M_WAITOK);
391}
392
393static inline void
394ena_free_counters(counter_u64_t *begin, int size)
395{
396	counter_u64_t *end = (counter_u64_t *)((char *)begin + size);
397
398	for (; begin < end; ++begin)
399		counter_u64_free(*begin);
400}
401
402static inline void
403ena_reset_counters(counter_u64_t *begin, int size)
404{
405	counter_u64_t *end = (counter_u64_t *)((char *)begin + size);
406
407	for (; begin < end; ++begin)
408		counter_u64_zero(*begin);
409}
410
411static void
412ena_init_io_rings_common(struct ena_adapter *adapter, struct ena_ring *ring,
413    uint16_t qid)
414{
415
416	ring->qid = qid;
417	ring->adapter = adapter;
418	ring->ena_dev = adapter->ena_dev;
419}
420
421static void
422ena_init_io_rings(struct ena_adapter *adapter)
423{
424	struct ena_com_dev *ena_dev;
425	struct ena_ring *txr, *rxr;
426	struct ena_que *que;
427	int i;
428
429	ena_dev = adapter->ena_dev;
430
431	for (i = 0; i < adapter->num_queues; i++) {
432		txr = &adapter->tx_ring[i];
433		rxr = &adapter->rx_ring[i];
434
435		/* TX/RX common ring state */
436		ena_init_io_rings_common(adapter, txr, i);
437		ena_init_io_rings_common(adapter, rxr, i);
438
439		/* TX specific ring state */
440		txr->ring_size = adapter->tx_ring_size;
441		txr->tx_max_header_size = ena_dev->tx_max_header_size;
442		txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type;
443		txr->smoothed_interval =
444		    ena_com_get_nonadaptive_moderation_interval_tx(ena_dev);
445
446		/* Allocate a buf ring */
447		txr->br = buf_ring_alloc(ena_buf_ring_size, M_DEVBUF,
448		    M_WAITOK, &txr->ring_mtx);
449
450		/* Alloc TX statistics. */
451		ena_alloc_counters((counter_u64_t *)&txr->tx_stats,
452		    sizeof(txr->tx_stats));
453
454		/* RX specific ring state */
455		rxr->ring_size = adapter->rx_ring_size;
456		rxr->rx_small_copy_len = adapter->small_copy_len;
457		rxr->smoothed_interval =
458		    ena_com_get_nonadaptive_moderation_interval_rx(ena_dev);
459
460		/* Alloc RX statistics. */
461		ena_alloc_counters((counter_u64_t *)&rxr->rx_stats,
462		    sizeof(rxr->rx_stats));
463
464		/* Initialize locks */
465		snprintf(txr->mtx_name, nitems(txr->mtx_name), "%s:tx(%d)",
466		    device_get_nameunit(adapter->pdev), i);
467		snprintf(rxr->mtx_name, nitems(rxr->mtx_name), "%s:rx(%d)",
468		    device_get_nameunit(adapter->pdev), i);
469
470		mtx_init(&txr->ring_mtx, txr->mtx_name, NULL, MTX_DEF);
471		mtx_init(&rxr->ring_mtx, rxr->mtx_name, NULL, MTX_DEF);
472
473		que = &adapter->que[i];
474		que->adapter = adapter;
475		que->id = i;
476		que->tx_ring = txr;
477		que->rx_ring = rxr;
478
479		txr->que = que;
480		rxr->que = que;
481
482		rxr->empty_rx_queue = 0;
483	}
484}
485
486static void
487ena_free_io_ring_resources(struct ena_adapter *adapter, unsigned int qid)
488{
489	struct ena_ring *txr = &adapter->tx_ring[qid];
490	struct ena_ring *rxr = &adapter->rx_ring[qid];
491
492	ena_free_counters((counter_u64_t *)&txr->tx_stats,
493	    sizeof(txr->tx_stats));
494	ena_free_counters((counter_u64_t *)&rxr->rx_stats,
495	    sizeof(rxr->rx_stats));
496
497	ENA_RING_MTX_LOCK(txr);
498	drbr_free(txr->br, M_DEVBUF);
499	ENA_RING_MTX_UNLOCK(txr);
500
501	mtx_destroy(&txr->ring_mtx);
502	mtx_destroy(&rxr->ring_mtx);
503}
504
505static void
506ena_free_all_io_rings_resources(struct ena_adapter *adapter)
507{
508	int i;
509
510	for (i = 0; i < adapter->num_queues; i++)
511		ena_free_io_ring_resources(adapter, i);
512
513}
514
515static int
516ena_setup_tx_dma_tag(struct ena_adapter *adapter)
517{
518	int ret;
519
520	/* Create DMA tag for Tx buffers */
521	ret = bus_dma_tag_create(bus_get_dma_tag(adapter->pdev),
522	    1, 0,				  /* alignment, bounds 	     */
523	    ENA_DMA_BIT_MASK(adapter->dma_width), /* lowaddr of excl window  */
524	    BUS_SPACE_MAXADDR, 			  /* highaddr of excl window */
525	    NULL, NULL,				  /* filter, filterarg 	     */
526	    ENA_TSO_MAXSIZE,			  /* maxsize 		     */
527	    adapter->max_tx_sgl_size - 1,	  /* nsegments 		     */
528	    ENA_TSO_MAXSIZE,			  /* maxsegsize 	     */
529	    0,					  /* flags 		     */
530	    NULL,				  /* lockfunc 		     */
531	    NULL,				  /* lockfuncarg 	     */
532	    &adapter->tx_buf_tag);
533
534	if (ret != 0)
535		device_printf(adapter->pdev, "Unable to create Tx DMA tag\n");
536
537	return (ret);
538}
539
540static int
541ena_free_tx_dma_tag(struct ena_adapter *adapter)
542{
543	int ret;
544
545	ret = bus_dma_tag_destroy(adapter->tx_buf_tag);
546
547	if (ret == 0)
548		adapter->tx_buf_tag = NULL;
549
550	return (ret);
551}
552
553static int
554ena_setup_rx_dma_tag(struct ena_adapter *adapter)
555{
556	int ret;
557
558	/* Create DMA tag for Rx buffers*/
559	ret = bus_dma_tag_create(bus_get_dma_tag(adapter->pdev), /* parent   */
560	    1, 0,				  /* alignment, bounds 	     */
561	    ENA_DMA_BIT_MASK(adapter->dma_width), /* lowaddr of excl window  */
562	    BUS_SPACE_MAXADDR, 			  /* highaddr of excl window */
563	    NULL, NULL,				  /* filter, filterarg 	     */
564	    MJUM16BYTES,			  /* maxsize 		     */
565	    1,					  /* nsegments 		     */
566	    MJUM16BYTES,			  /* maxsegsize 	     */
567	    0,					  /* flags 		     */
568	    NULL,				  /* lockfunc 		     */
569	    NULL,				  /* lockarg 		     */
570	    &adapter->rx_buf_tag);
571
572	if (ret != 0)
573		device_printf(adapter->pdev, "Unable to create Rx DMA tag\n");
574
575	return (ret);
576}
577
578static int
579ena_free_rx_dma_tag(struct ena_adapter *adapter)
580{
581	int ret;
582
583	ret = bus_dma_tag_destroy(adapter->rx_buf_tag);
584
585	if (ret == 0)
586		adapter->rx_buf_tag = NULL;
587
588	return (ret);
589}
590
591/**
592 * ena_setup_tx_resources - allocate Tx resources (Descriptors)
593 * @adapter: network interface device structure
594 * @qid: queue index
595 *
596 * Returns 0 on success, otherwise on failure.
597 **/
598static int
599ena_setup_tx_resources(struct ena_adapter *adapter, int qid)
600{
601	struct ena_que *que = &adapter->que[qid];
602	struct ena_ring *tx_ring = que->tx_ring;
603	int size, i, err;
604#ifdef	RSS
605	cpuset_t cpu_mask;
606#endif
607
608	size = sizeof(struct ena_tx_buffer) * tx_ring->ring_size;
609
610	tx_ring->tx_buffer_info = malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO);
611	if (tx_ring->tx_buffer_info == NULL)
612		return (ENOMEM);
613
614	size = sizeof(uint16_t) * tx_ring->ring_size;
615	tx_ring->free_tx_ids = malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO);
616	if (tx_ring->free_tx_ids == NULL)
617		goto err_buf_info_free;
618
619	/* Req id stack for TX OOO completions */
620	for (i = 0; i < tx_ring->ring_size; i++)
621		tx_ring->free_tx_ids[i] = i;
622
623	/* Reset TX statistics. */
624	ena_reset_counters((counter_u64_t *)&tx_ring->tx_stats,
625	    sizeof(tx_ring->tx_stats));
626
627	tx_ring->next_to_use = 0;
628	tx_ring->next_to_clean = 0;
629
630	/* Make sure that drbr is empty */
631	ENA_RING_MTX_LOCK(tx_ring);
632	drbr_flush(adapter->ifp, tx_ring->br);
633	ENA_RING_MTX_UNLOCK(tx_ring);
634
635	/* ... and create the buffer DMA maps */
636	for (i = 0; i < tx_ring->ring_size; i++) {
637		err = bus_dmamap_create(adapter->tx_buf_tag, 0,
638		    &tx_ring->tx_buffer_info[i].map);
639		if (err != 0) {
640			device_printf(adapter->pdev,
641			    "Unable to create Tx DMA map for buffer %d\n", i);
642			goto err_buf_info_unmap;
643		}
644	}
645
646	/* Allocate taskqueues */
647	TASK_INIT(&tx_ring->enqueue_task, 0, ena_deferred_mq_start, tx_ring);
648	tx_ring->enqueue_tq = taskqueue_create_fast("ena_tx_enque", M_NOWAIT,
649	    taskqueue_thread_enqueue, &tx_ring->enqueue_tq);
650	if (tx_ring->enqueue_tq == NULL) {
651		device_printf(adapter->pdev,
652		    "Unable to create taskqueue for enqueue task\n");
653		i = tx_ring->ring_size;
654		goto err_buf_info_unmap;
655	}
656
657	/* RSS set cpu for thread */
658#ifdef RSS
659	CPU_SETOF(que->cpu, &cpu_mask);
660	taskqueue_start_threads_cpuset(&tx_ring->enqueue_tq, 1, PI_NET,
661	    &cpu_mask, "%s tx_ring enq (bucket %d)",
662	    device_get_nameunit(adapter->pdev), que->cpu);
663#else /* RSS */
664	taskqueue_start_threads(&tx_ring->enqueue_tq, 1, PI_NET,
665	    "%s txeq %d", device_get_nameunit(adapter->pdev), que->cpu);
666#endif /* RSS */
667
668	return (0);
669
670err_buf_info_unmap:
671	while (i--) {
672		bus_dmamap_destroy(adapter->tx_buf_tag,
673		    tx_ring->tx_buffer_info[i].map);
674	}
675	free(tx_ring->free_tx_ids, M_DEVBUF);
676	tx_ring->free_tx_ids = NULL;
677err_buf_info_free:
678	free(tx_ring->tx_buffer_info, M_DEVBUF);
679	tx_ring->tx_buffer_info = NULL;
680
681	return (ENOMEM);
682}
683
684/**
685 * ena_free_tx_resources - Free Tx Resources per Queue
686 * @adapter: network interface device structure
687 * @qid: queue index
688 *
689 * Free all transmit software resources
690 **/
691static void
692ena_free_tx_resources(struct ena_adapter *adapter, int qid)
693{
694	struct ena_ring *tx_ring = &adapter->tx_ring[qid];
695
696	while (taskqueue_cancel(tx_ring->enqueue_tq, &tx_ring->enqueue_task,
697	    NULL))
698		taskqueue_drain(tx_ring->enqueue_tq, &tx_ring->enqueue_task);
699
700	taskqueue_free(tx_ring->enqueue_tq);
701
702	ENA_RING_MTX_LOCK(tx_ring);
703	/* Flush buffer ring, */
704	drbr_flush(adapter->ifp, tx_ring->br);
705
706	/* Free buffer DMA maps, */
707	for (int i = 0; i < tx_ring->ring_size; i++) {
708		m_freem(tx_ring->tx_buffer_info[i].mbuf);
709		tx_ring->tx_buffer_info[i].mbuf = NULL;
710		bus_dmamap_unload(adapter->tx_buf_tag,
711		    tx_ring->tx_buffer_info[i].map);
712		bus_dmamap_destroy(adapter->tx_buf_tag,
713		    tx_ring->tx_buffer_info[i].map);
714	}
715	ENA_RING_MTX_UNLOCK(tx_ring);
716
717	/* And free allocated memory. */
718	free(tx_ring->tx_buffer_info, M_DEVBUF);
719	tx_ring->tx_buffer_info = NULL;
720
721	free(tx_ring->free_tx_ids, M_DEVBUF);
722	tx_ring->free_tx_ids = NULL;
723}
724
725/**
726 * ena_setup_all_tx_resources - allocate all queues Tx resources
727 * @adapter: network interface device structure
728 *
729 * Returns 0 on success, otherwise on failure.
730 **/
731static int
732ena_setup_all_tx_resources(struct ena_adapter *adapter)
733{
734	int i, rc;
735
736	for (i = 0; i < adapter->num_queues; i++) {
737		rc = ena_setup_tx_resources(adapter, i);
738		if (rc != 0) {
739			device_printf(adapter->pdev,
740			    "Allocation for Tx Queue %u failed\n", i);
741			goto err_setup_tx;
742		}
743	}
744
745	return (0);
746
747err_setup_tx:
748	/* Rewind the index freeing the rings as we go */
749	while (i--)
750		ena_free_tx_resources(adapter, i);
751	return (rc);
752}
753
754/**
755 * ena_free_all_tx_resources - Free Tx Resources for All Queues
756 * @adapter: network interface device structure
757 *
758 * Free all transmit software resources
759 **/
760static void
761ena_free_all_tx_resources(struct ena_adapter *adapter)
762{
763	int i;
764
765	for (i = 0; i < adapter->num_queues; i++)
766		ena_free_tx_resources(adapter, i);
767}
768
769static inline int
770validate_rx_req_id(struct ena_ring *rx_ring, uint16_t req_id)
771{
772	if (likely(req_id < rx_ring->ring_size))
773		return (0);
774
775	device_printf(rx_ring->adapter->pdev, "Invalid rx req_id: %hu\n",
776	    req_id);
777	counter_u64_add(rx_ring->rx_stats.bad_req_id, 1);
778
779	/* Trigger device reset */
780	rx_ring->adapter->reset_reason = ENA_REGS_RESET_INV_RX_REQ_ID;
781	rx_ring->adapter->trigger_reset = true;
782
783	return (EFAULT);
784}
785
786/**
787 * ena_setup_rx_resources - allocate Rx resources (Descriptors)
788 * @adapter: network interface device structure
789 * @qid: queue index
790 *
791 * Returns 0 on success, otherwise on failure.
792 **/
793static int
794ena_setup_rx_resources(struct ena_adapter *adapter, unsigned int qid)
795{
796	struct ena_que *que = &adapter->que[qid];
797	struct ena_ring *rx_ring = que->rx_ring;
798	int size, err, i;
799#ifdef	RSS
800	cpuset_t cpu_mask;
801#endif
802
803	size = sizeof(struct ena_rx_buffer) * rx_ring->ring_size;
804
805	/*
806	 * Alloc extra element so in rx path
807	 * we can always prefetch rx_info + 1
808	 */
809	size += sizeof(struct ena_rx_buffer);
810
811	rx_ring->rx_buffer_info = malloc(size, M_DEVBUF, M_WAITOK | M_ZERO);
812
813	size = sizeof(uint16_t) * rx_ring->ring_size;
814	rx_ring->free_rx_ids = malloc(size, M_DEVBUF, M_WAITOK);
815
816	for (i = 0; i < rx_ring->ring_size; i++)
817		rx_ring->free_rx_ids[i] = i;
818
819	/* Reset RX statistics. */
820	ena_reset_counters((counter_u64_t *)&rx_ring->rx_stats,
821	    sizeof(rx_ring->rx_stats));
822
823	rx_ring->next_to_clean = 0;
824	rx_ring->next_to_use = 0;
825
826	/* ... and create the buffer DMA maps */
827	for (i = 0; i < rx_ring->ring_size; i++) {
828		err = bus_dmamap_create(adapter->rx_buf_tag, 0,
829		    &(rx_ring->rx_buffer_info[i].map));
830		if (err != 0) {
831			device_printf(adapter->pdev,
832			    "Unable to create Rx DMA map for buffer %d\n", i);
833			goto err_buf_info_unmap;
834		}
835	}
836
837	/* Create LRO for the ring */
838	if ((adapter->ifp->if_capenable & IFCAP_LRO) != 0) {
839		int err = tcp_lro_init(&rx_ring->lro);
840		if (err != 0) {
841			device_printf(adapter->pdev,
842			    "LRO[%d] Initialization failed!\n", qid);
843		} else {
844			ena_trace(ENA_INFO,
845			    "RX Soft LRO[%d] Initialized\n", qid);
846			rx_ring->lro.ifp = adapter->ifp;
847		}
848	}
849
850	/* Allocate taskqueues */
851	TASK_INIT(&rx_ring->cmpl_task, 0, ena_deferred_rx_cleanup, rx_ring);
852	rx_ring->cmpl_tq = taskqueue_create_fast("ena RX completion", M_WAITOK,
853	    taskqueue_thread_enqueue, &rx_ring->cmpl_tq);
854
855	/* RSS set cpu for thread */
856#ifdef RSS
857	CPU_SETOF(que->cpu, &cpu_mask);
858	taskqueue_start_threads_cpuset(&rx_ring->cmpl_tq, 1, PI_NET, &cpu_mask,
859	    "%s rx_ring cmpl (bucket %d)",
860	    device_get_nameunit(adapter->pdev), que->cpu);
861#else
862	taskqueue_start_threads(&rx_ring->cmpl_tq, 1, PI_NET,
863	    "%s rx_ring cmpl %d", device_get_nameunit(adapter->pdev), que->cpu);
864#endif
865
866	return (0);
867
868err_buf_info_unmap:
869	while (i--) {
870		bus_dmamap_destroy(adapter->rx_buf_tag,
871		    rx_ring->rx_buffer_info[i].map);
872	}
873
874	free(rx_ring->free_rx_ids, M_DEVBUF);
875	rx_ring->free_rx_ids = NULL;
876	free(rx_ring->rx_buffer_info, M_DEVBUF);
877	rx_ring->rx_buffer_info = NULL;
878	ena_trace(ENA_ALERT, "RX resource allocation fail");
879	return (ENOMEM);
880}
881
882/**
883 * ena_free_rx_resources - Free Rx Resources
884 * @adapter: network interface device structure
885 * @qid: queue index
886 *
887 * Free all receive software resources
888 **/
889static void
890ena_free_rx_resources(struct ena_adapter *adapter, unsigned int qid)
891{
892	struct ena_ring *rx_ring = &adapter->rx_ring[qid];
893
894	ena_trace(ENA_INFO, "%s qid %d\n", __func__, qid);
895
896	while (taskqueue_cancel(rx_ring->cmpl_tq, &rx_ring->cmpl_task, NULL) != 0)
897		taskqueue_drain(rx_ring->cmpl_tq, &rx_ring->cmpl_task);
898
899	taskqueue_free(rx_ring->cmpl_tq);
900
901	/* Free buffer DMA maps, */
902	for (int i = 0; i < rx_ring->ring_size; i++) {
903		m_freem(rx_ring->rx_buffer_info[i].mbuf);
904		rx_ring->rx_buffer_info[i].mbuf = NULL;
905		bus_dmamap_unload(adapter->rx_buf_tag,
906		    rx_ring->rx_buffer_info[i].map);
907		bus_dmamap_destroy(adapter->rx_buf_tag,
908		    rx_ring->rx_buffer_info[i].map);
909	}
910
911	/* free LRO resources, */
912	tcp_lro_free(&rx_ring->lro);
913
914	/* free allocated memory */
915	free(rx_ring->rx_buffer_info, M_DEVBUF);
916	rx_ring->rx_buffer_info = NULL;
917
918	free(rx_ring->free_rx_ids, M_DEVBUF);
919	rx_ring->free_rx_ids = NULL;
920}
921
922/**
923 * ena_setup_all_rx_resources - allocate all queues Rx resources
924 * @adapter: network interface device structure
925 *
926 * Returns 0 on success, otherwise on failure.
927 **/
928static int
929ena_setup_all_rx_resources(struct ena_adapter *adapter)
930{
931	int i, rc = 0;
932
933	for (i = 0; i < adapter->num_queues; i++) {
934		rc = ena_setup_rx_resources(adapter, i);
935		if (rc != 0) {
936			device_printf(adapter->pdev,
937			    "Allocation for Rx Queue %u failed\n", i);
938			goto err_setup_rx;
939		}
940	}
941	return (0);
942
943err_setup_rx:
944	/* rewind the index freeing the rings as we go */
945	while (i--)
946		ena_free_rx_resources(adapter, i);
947	return (rc);
948}
949
950/**
951 * ena_free_all_rx_resources - Free Rx resources for all queues
952 * @adapter: network interface device structure
953 *
954 * Free all receive software resources
955 **/
956static void
957ena_free_all_rx_resources(struct ena_adapter *adapter)
958{
959	int i;
960
961	for (i = 0; i < adapter->num_queues; i++)
962		ena_free_rx_resources(adapter, i);
963}
964
965static inline int
966ena_alloc_rx_mbuf(struct ena_adapter *adapter,
967    struct ena_ring *rx_ring, struct ena_rx_buffer *rx_info)
968{
969	struct ena_com_buf *ena_buf;
970	bus_dma_segment_t segs[1];
971	int nsegs, error;
972
973	/* if previous allocated frag is not used */
974	if (rx_info->mbuf != NULL)
975		return (0);
976
977	/* Get mbuf using UMA allocator */
978	rx_info->mbuf = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, MJUM16BYTES);
979
980	if (rx_info->mbuf == NULL) {
981		counter_u64_add(rx_ring->rx_stats.mbuf_alloc_fail, 1);
982		return (ENOMEM);
983	}
984	/* Set mbuf length*/
985	rx_info->mbuf->m_pkthdr.len = rx_info->mbuf->m_len = MJUM16BYTES;
986
987	/* Map packets for DMA */
988	ena_trace(ENA_DBG | ENA_RSC | ENA_RXPTH,
989	    "Using tag %p for buffers' DMA mapping, mbuf %p len: %d",
990	    adapter->rx_buf_tag,rx_info->mbuf, rx_info->mbuf->m_len);
991	error = bus_dmamap_load_mbuf_sg(adapter->rx_buf_tag, rx_info->map,
992	    rx_info->mbuf, segs, &nsegs, BUS_DMA_NOWAIT);
993	if ((error != 0) || (nsegs != 1)) {
994		device_printf(adapter->pdev, "failed to map mbuf, error: %d, "
995		    "nsegs: %d\n", error, nsegs);
996		counter_u64_add(rx_ring->rx_stats.dma_mapping_err, 1);
997		goto exit;
998
999	}
1000
1001	bus_dmamap_sync(adapter->rx_buf_tag, rx_info->map, BUS_DMASYNC_PREREAD);
1002
1003	ena_buf = &rx_info->ena_buf;
1004	ena_buf->paddr = segs[0].ds_addr;
1005	ena_buf->len = MJUM16BYTES;
1006
1007	ena_trace(ENA_DBG | ENA_RSC | ENA_RXPTH,
1008	    "ALLOC RX BUF: mbuf %p, rx_info %p, len %d, paddr %#jx\n",
1009	    rx_info->mbuf, rx_info,ena_buf->len, (uintmax_t)ena_buf->paddr);
1010
1011	return (0);
1012
1013exit:
1014	m_freem(rx_info->mbuf);
1015	rx_info->mbuf = NULL;
1016	return (EFAULT);
1017}
1018
1019static void
1020ena_free_rx_mbuf(struct ena_adapter *adapter, struct ena_ring *rx_ring,
1021    struct ena_rx_buffer *rx_info)
1022{
1023
1024	if (rx_info->mbuf == NULL)
1025		return;
1026
1027	bus_dmamap_unload(adapter->rx_buf_tag, rx_info->map);
1028	m_freem(rx_info->mbuf);
1029	rx_info->mbuf = NULL;
1030}
1031
1032/**
1033 * ena_refill_rx_bufs - Refills ring with descriptors
1034 * @rx_ring: the ring which we want to feed with free descriptors
1035 * @num: number of descriptors to refill
1036 * Refills the ring with newly allocated DMA-mapped mbufs for receiving
1037 **/
1038static int
1039ena_refill_rx_bufs(struct ena_ring *rx_ring, uint32_t num)
1040{
1041	struct ena_adapter *adapter = rx_ring->adapter;
1042	uint16_t next_to_use, req_id;
1043	uint32_t i;
1044	int rc;
1045
1046	ena_trace(ENA_DBG | ENA_RXPTH | ENA_RSC, "refill qid: %d",
1047	    rx_ring->qid);
1048
1049	next_to_use = rx_ring->next_to_use;
1050
1051	for (i = 0; i < num; i++) {
1052		struct ena_rx_buffer *rx_info;
1053
1054		ena_trace(ENA_DBG | ENA_RXPTH | ENA_RSC,
1055		    "RX buffer - next to use: %d", next_to_use);
1056
1057		req_id = rx_ring->free_rx_ids[next_to_use];
1058		rc = validate_rx_req_id(rx_ring, req_id);
1059		if (unlikely(rc != 0))
1060			break;
1061
1062		rx_info = &rx_ring->rx_buffer_info[req_id];
1063
1064		rc = ena_alloc_rx_mbuf(adapter, rx_ring, rx_info);
1065		if (rc < 0) {
1066			device_printf(adapter->pdev,
1067			    "failed to alloc buffer for rx queue\n");
1068			break;
1069		}
1070		rc = ena_com_add_single_rx_desc(rx_ring->ena_com_io_sq,
1071		    &rx_info->ena_buf, req_id);
1072		if (unlikely(rc != 0)) {
1073			device_printf(adapter->pdev,
1074			    "failed to add buffer for rx queue %d\n",
1075			    rx_ring->qid);
1076			break;
1077		}
1078		next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use,
1079		    rx_ring->ring_size);
1080	}
1081
1082	if (i < num) {
1083		counter_u64_add(rx_ring->rx_stats.refil_partial, 1);
1084		device_printf(adapter->pdev,
1085		    "refilled rx queue %d with %d pages only\n",
1086		    rx_ring->qid, i);
1087	}
1088
1089	if (i != 0) {
1090		wmb();
1091		ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq);
1092	}
1093	rx_ring->next_to_use = next_to_use;
1094	return (i);
1095}
1096
1097static void
1098ena_free_rx_bufs(struct ena_adapter *adapter, unsigned int qid)
1099{
1100	struct ena_ring *rx_ring = &adapter->rx_ring[qid];
1101	unsigned int i;
1102
1103	for (i = 0; i < rx_ring->ring_size; i++) {
1104		struct ena_rx_buffer *rx_info = &rx_ring->rx_buffer_info[i];
1105
1106		if (rx_info->mbuf != NULL)
1107			ena_free_rx_mbuf(adapter, rx_ring, rx_info);
1108	}
1109}
1110
1111/**
1112 * ena_refill_all_rx_bufs - allocate all queues Rx buffers
1113 * @adapter: network interface device structure
1114 *
1115 */
1116static void
1117ena_refill_all_rx_bufs(struct ena_adapter *adapter)
1118{
1119	struct ena_ring *rx_ring;
1120	int i, rc, bufs_num;
1121
1122	for (i = 0; i < adapter->num_queues; i++) {
1123		rx_ring = &adapter->rx_ring[i];
1124		bufs_num = rx_ring->ring_size - 1;
1125		rc = ena_refill_rx_bufs(rx_ring, bufs_num);
1126
1127		if (unlikely(rc != bufs_num))
1128			device_printf(adapter->pdev,
1129			    "refilling Queue %d failed. allocated %d buffers"
1130			    " from: %d\n", i, rc, bufs_num);
1131	}
1132}
1133
1134static void
1135ena_free_all_rx_bufs(struct ena_adapter *adapter)
1136{
1137	int i;
1138
1139	for (i = 0; i < adapter->num_queues; i++)
1140		ena_free_rx_bufs(adapter, i);
1141}
1142
1143/**
1144 * ena_free_tx_bufs - Free Tx Buffers per Queue
1145 * @adapter: network interface device structure
1146 * @qid: queue index
1147 **/
1148static void
1149ena_free_tx_bufs(struct ena_adapter *adapter, unsigned int qid)
1150{
1151	struct ena_ring *tx_ring = &adapter->tx_ring[qid];
1152
1153	ENA_RING_MTX_LOCK(tx_ring);
1154	for (int i = 0; i < tx_ring->ring_size; i++) {
1155		struct ena_tx_buffer *tx_info = &tx_ring->tx_buffer_info[i];
1156
1157		if (tx_info->mbuf == NULL)
1158			continue;
1159
1160		ena_trace(ENA_DBG | ENA_TXPTH | ENA_RSC,
1161		    "free uncompleted Tx mbufs qid[%d] idx: 0x%x", qid, i);
1162
1163		bus_dmamap_unload(adapter->tx_buf_tag, tx_info->map);
1164		m_free(tx_info->mbuf);
1165		tx_info->mbuf = NULL;
1166	}
1167	ENA_RING_MTX_UNLOCK(tx_ring);
1168}
1169
1170static void
1171ena_free_all_tx_bufs(struct ena_adapter *adapter)
1172{
1173
1174	for (int i = 0; i < adapter->num_queues; i++)
1175		ena_free_tx_bufs(adapter, i);
1176}
1177
1178static void
1179ena_destroy_all_tx_queues(struct ena_adapter *adapter)
1180{
1181	uint16_t ena_qid;
1182	int i;
1183
1184	for (i = 0; i < adapter->num_queues; i++) {
1185		ena_qid = ENA_IO_TXQ_IDX(i);
1186		ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
1187	}
1188}
1189
1190static void
1191ena_destroy_all_rx_queues(struct ena_adapter *adapter)
1192{
1193	uint16_t ena_qid;
1194	int i;
1195
1196	for (i = 0; i < adapter->num_queues; i++) {
1197		ena_qid = ENA_IO_RXQ_IDX(i);
1198		ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
1199	}
1200}
1201
1202static void
1203ena_destroy_all_io_queues(struct ena_adapter *adapter)
1204{
1205	ena_destroy_all_tx_queues(adapter);
1206	ena_destroy_all_rx_queues(adapter);
1207}
1208
1209static inline int
1210validate_tx_req_id(struct ena_ring *tx_ring, uint16_t req_id)
1211{
1212	struct ena_tx_buffer *tx_info = NULL;
1213
1214	if (likely(req_id < tx_ring->ring_size)) {
1215		tx_info = &tx_ring->tx_buffer_info[req_id];
1216		if (tx_info->mbuf != NULL)
1217			return (0);
1218	}
1219
1220	counter_u64_add(tx_ring->tx_stats.bad_req_id, 1);
1221
1222	return (EFAULT);
1223}
1224
1225static int
1226ena_create_io_queues(struct ena_adapter *adapter)
1227{
1228	struct ena_com_dev *ena_dev = adapter->ena_dev;
1229	struct ena_com_create_io_ctx ctx;
1230	struct ena_ring *ring;
1231	uint16_t ena_qid;
1232	uint32_t msix_vector;
1233	int rc, i;
1234
1235	/* Create TX queues */
1236	for (i = 0; i < adapter->num_queues; i++) {
1237		msix_vector = ENA_IO_IRQ_IDX(i);
1238		ena_qid = ENA_IO_TXQ_IDX(i);
1239		ctx.mem_queue_type = ena_dev->tx_mem_queue_type;
1240		ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX;
1241		ctx.queue_size = adapter->tx_ring_size;
1242		ctx.msix_vector = msix_vector;
1243		ctx.qid = ena_qid;
1244		rc = ena_com_create_io_queue(ena_dev, &ctx);
1245		if (rc != 0) {
1246			device_printf(adapter->pdev,
1247			    "Failed to create io TX queue #%d rc: %d\n", i, rc);
1248			goto err_tx;
1249		}
1250		ring = &adapter->tx_ring[i];
1251		rc = ena_com_get_io_handlers(ena_dev, ena_qid,
1252		    &ring->ena_com_io_sq,
1253		    &ring->ena_com_io_cq);
1254		if (rc != 0) {
1255			device_printf(adapter->pdev,
1256			    "Failed to get TX queue handlers. TX queue num"
1257			    " %d rc: %d\n", i, rc);
1258			ena_com_destroy_io_queue(ena_dev, ena_qid);
1259			goto err_tx;
1260		}
1261	}
1262
1263	/* Create RX queues */
1264	for (i = 0; i < adapter->num_queues; i++) {
1265		msix_vector = ENA_IO_IRQ_IDX(i);
1266		ena_qid = ENA_IO_RXQ_IDX(i);
1267		ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
1268		ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX;
1269		ctx.queue_size = adapter->rx_ring_size;
1270		ctx.msix_vector = msix_vector;
1271		ctx.qid = ena_qid;
1272		rc = ena_com_create_io_queue(ena_dev, &ctx);
1273		if (rc != 0) {
1274			device_printf(adapter->pdev,
1275			    "Failed to create io RX queue[%d] rc: %d\n", i, rc);
1276			goto err_rx;
1277		}
1278
1279		ring = &adapter->rx_ring[i];
1280		rc = ena_com_get_io_handlers(ena_dev, ena_qid,
1281		    &ring->ena_com_io_sq,
1282		    &ring->ena_com_io_cq);
1283		if (rc != 0) {
1284			device_printf(adapter->pdev,
1285			    "Failed to get RX queue handlers. RX queue num"
1286			    " %d rc: %d\n", i, rc);
1287			ena_com_destroy_io_queue(ena_dev, ena_qid);
1288			goto err_rx;
1289		}
1290	}
1291
1292	return (0);
1293
1294err_rx:
1295	while (i--)
1296		ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i));
1297	i = adapter->num_queues;
1298err_tx:
1299	while (i--)
1300		ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i));
1301
1302	return (ENXIO);
1303}
1304
1305/**
1306 * ena_tx_cleanup - clear sent packets and corresponding descriptors
1307 * @tx_ring: ring for which we want to clean packets
1308 *
1309 * Once packets are sent, we ask the device in a loop for no longer used
1310 * descriptors. We find the related mbuf chain in a map (index in an array)
1311 * and free it, then update ring state.
1312 * This is performed in "endless" loop, updating ring pointers every
1313 * TX_COMMIT. The first check of free descriptor is performed before the actual
1314 * loop, then repeated at the loop end.
1315 **/
1316static int
1317ena_tx_cleanup(struct ena_ring *tx_ring)
1318{
1319	struct ena_adapter *adapter;
1320	struct ena_com_io_cq* io_cq;
1321	uint16_t next_to_clean;
1322	uint16_t req_id;
1323	uint16_t ena_qid;
1324	unsigned int total_done = 0;
1325	int rc;
1326	int commit = TX_COMMIT;
1327	int budget = TX_BUDGET;
1328	int work_done;
1329
1330	adapter = tx_ring->que->adapter;
1331	ena_qid = ENA_IO_TXQ_IDX(tx_ring->que->id);
1332	io_cq = &adapter->ena_dev->io_cq_queues[ena_qid];
1333	next_to_clean = tx_ring->next_to_clean;
1334
1335	do {
1336		struct ena_tx_buffer *tx_info;
1337		struct mbuf *mbuf;
1338
1339		rc = ena_com_tx_comp_req_id_get(io_cq, &req_id);
1340		if (rc != 0)
1341			break;
1342
1343		rc = validate_tx_req_id(tx_ring, req_id);
1344		if (rc != 0)
1345			break;
1346
1347		tx_info = &tx_ring->tx_buffer_info[req_id];
1348
1349		mbuf = tx_info->mbuf;
1350
1351		tx_info->mbuf = NULL;
1352		bintime_clear(&tx_info->timestamp);
1353
1354		if (tx_info->num_of_bufs != 0) {
1355			/* Map is no longer required */
1356			bus_dmamap_unload(adapter->tx_buf_tag, tx_info->map);
1357		}
1358
1359		m_freem(mbuf);
1360
1361		total_done += tx_info->tx_descs;
1362
1363		tx_ring->free_tx_ids[next_to_clean] = req_id;
1364		next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean,
1365		    tx_ring->ring_size);
1366
1367		if (--commit == 0) {
1368			commit = TX_COMMIT;
1369			/* update ring state every TX_COMMIT descriptor */
1370			tx_ring->next_to_clean = next_to_clean;
1371			ena_com_comp_ack(
1372			    &adapter->ena_dev->io_sq_queues[ena_qid],
1373			    total_done);
1374			ena_com_update_dev_comp_head(io_cq);
1375			total_done = 0;
1376		}
1377	} while (--budget);
1378
1379	work_done = TX_BUDGET - budget;
1380
1381	/* If there is still something to commit update ring state */
1382	if (commit != TX_COMMIT) {
1383		tx_ring->next_to_clean = next_to_clean;
1384		ena_com_comp_ack(&adapter->ena_dev->io_sq_queues[ena_qid],
1385		    total_done);
1386		ena_com_update_dev_comp_head(io_cq);
1387	}
1388
1389	taskqueue_enqueue(tx_ring->enqueue_tq, &tx_ring->enqueue_task);
1390
1391	return (work_done);
1392}
1393
1394static void
1395ena_rx_hash_mbuf(struct ena_ring *rx_ring, struct ena_com_rx_ctx *ena_rx_ctx,
1396    struct mbuf *mbuf)
1397{
1398	struct ena_adapter *adapter = rx_ring->adapter;
1399
1400	if (adapter->rss_support) {
1401		mbuf->m_pkthdr.flowid = ena_rx_ctx->hash;
1402
1403		if (ena_rx_ctx->frag &&
1404		    (ena_rx_ctx->l3_proto != ENA_ETH_IO_L4_PROTO_UNKNOWN)) {
1405			M_HASHTYPE_SET(mbuf, M_HASHTYPE_OPAQUE_HASH);
1406			return;
1407		}
1408
1409		switch (ena_rx_ctx->l3_proto) {
1410		case ENA_ETH_IO_L3_PROTO_IPV4:
1411			switch (ena_rx_ctx->l4_proto) {
1412			case ENA_ETH_IO_L4_PROTO_TCP:
1413				M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_TCP_IPV4);
1414				break;
1415			case ENA_ETH_IO_L4_PROTO_UDP:
1416				M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_UDP_IPV4);
1417				break;
1418			default:
1419				M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_IPV4);
1420			}
1421			break;
1422		case ENA_ETH_IO_L3_PROTO_IPV6:
1423			switch (ena_rx_ctx->l4_proto) {
1424			case ENA_ETH_IO_L4_PROTO_TCP:
1425				M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_TCP_IPV6);
1426				break;
1427			case ENA_ETH_IO_L4_PROTO_UDP:
1428				M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_UDP_IPV6);
1429				break;
1430			default:
1431				M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_IPV6);
1432			}
1433			break;
1434		case ENA_ETH_IO_L3_PROTO_UNKNOWN:
1435			M_HASHTYPE_SET(mbuf, M_HASHTYPE_NONE);
1436			break;
1437		default:
1438			M_HASHTYPE_SET(mbuf, M_HASHTYPE_OPAQUE_HASH);
1439		}
1440	} else {
1441		mbuf->m_pkthdr.flowid = rx_ring->qid;
1442		M_HASHTYPE_SET(mbuf, M_HASHTYPE_NONE);
1443	}
1444}
1445
1446/**
1447 * ena_rx_mbuf - assemble mbuf from descriptors
1448 * @rx_ring: ring for which we want to clean packets
1449 * @ena_bufs: buffer info
1450 * @ena_rx_ctx: metadata for this packet(s)
1451 * @next_to_clean: ring pointer, will be updated only upon success
1452 *
1453 **/
1454static struct mbuf*
1455ena_rx_mbuf(struct ena_ring *rx_ring, struct ena_com_rx_buf_info *ena_bufs,
1456    struct ena_com_rx_ctx *ena_rx_ctx, uint16_t *next_to_clean)
1457{
1458	struct mbuf *mbuf;
1459	struct ena_rx_buffer *rx_info;
1460	struct ena_adapter *adapter;
1461	unsigned int descs = ena_rx_ctx->descs;
1462	uint16_t ntc, len, req_id, buf = 0;
1463
1464	ntc = *next_to_clean;
1465	adapter = rx_ring->adapter;
1466	rx_info = &rx_ring->rx_buffer_info[ntc];
1467
1468	if (unlikely(rx_info->mbuf == NULL)) {
1469		device_printf(adapter->pdev, "NULL mbuf in rx_info");
1470		return (NULL);
1471	}
1472
1473	len = ena_bufs[buf].len;
1474	req_id = ena_bufs[buf].req_id;
1475	rx_info = &rx_ring->rx_buffer_info[req_id];
1476
1477	ena_trace(ENA_DBG | ENA_RXPTH, "rx_info %p, mbuf %p, paddr %jx",
1478	    rx_info, rx_info->mbuf, (uintmax_t)rx_info->ena_buf.paddr);
1479
1480	mbuf = rx_info->mbuf;
1481	mbuf->m_flags |= M_PKTHDR;
1482	mbuf->m_pkthdr.len = len;
1483	mbuf->m_len = len;
1484	mbuf->m_pkthdr.rcvif = rx_ring->que->adapter->ifp;
1485
1486	/* Fill mbuf with hash key and it's interpretation for optimization */
1487	ena_rx_hash_mbuf(rx_ring, ena_rx_ctx, mbuf);
1488
1489	ena_trace(ENA_DBG | ENA_RXPTH, "rx mbuf 0x%p, flags=0x%x, len: %d",
1490	    mbuf, mbuf->m_flags, mbuf->m_pkthdr.len);
1491
1492	/* DMA address is not needed anymore, unmap it */
1493	bus_dmamap_unload(rx_ring->adapter->rx_buf_tag, rx_info->map);
1494
1495	rx_info->mbuf = NULL;
1496	rx_ring->free_rx_ids[ntc] = req_id;
1497	ntc = ENA_RX_RING_IDX_NEXT(ntc, rx_ring->ring_size);
1498
1499	/*
1500	 * While we have more than 1 descriptors for one rcvd packet, append
1501	 * other mbufs to the main one
1502	 */
1503	while (--descs) {
1504		++buf;
1505		len = ena_bufs[buf].len;
1506		req_id = ena_bufs[buf].req_id;
1507		rx_info = &rx_ring->rx_buffer_info[req_id];
1508
1509		if (unlikely(rx_info->mbuf == NULL)) {
1510			device_printf(adapter->pdev, "NULL mbuf in rx_info");
1511			/*
1512			 * If one of the required mbufs was not allocated yet,
1513			 * we can break there.
1514			 * All earlier used descriptors will be reallocated
1515			 * later and not used mbufs can be reused.
1516			 * The next_to_clean pointer will not be updated in case
1517			 * of an error, so caller should advance it manually
1518			 * in error handling routine to keep it up to date
1519			 * with hw ring.
1520			 */
1521			m_freem(mbuf);
1522			return (NULL);
1523		}
1524
1525		if (m_append(mbuf, len, rx_info->mbuf->m_data) == 0) {
1526			counter_u64_add(rx_ring->rx_stats.mbuf_alloc_fail, 1);
1527			ena_trace(ENA_WARNING, "Failed to append Rx mbuf %p",
1528			    mbuf);
1529		}
1530		/* Free already appended mbuf, it won't be useful anymore */
1531		bus_dmamap_unload(rx_ring->adapter->rx_buf_tag, rx_info->map);
1532		m_freem(rx_info->mbuf);
1533		rx_info->mbuf = NULL;
1534
1535		rx_ring->free_rx_ids[ntc] = req_id;
1536		ntc = ENA_RX_RING_IDX_NEXT(ntc, rx_ring->ring_size);
1537	}
1538
1539	*next_to_clean = ntc;
1540
1541	return (mbuf);
1542}
1543
1544/**
1545 * ena_rx_checksum - indicate in mbuf if hw indicated a good cksum
1546 **/
1547static inline void
1548ena_rx_checksum(struct ena_ring *rx_ring, struct ena_com_rx_ctx *ena_rx_ctx,
1549    struct mbuf *mbuf)
1550{
1551
1552	/* if IP and error */
1553	if ((ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) &&
1554	    ena_rx_ctx->l3_csum_err) {
1555		/* ipv4 checksum error */
1556		mbuf->m_pkthdr.csum_flags = 0;
1557		counter_u64_add(rx_ring->rx_stats.bad_csum, 1);
1558		return;
1559	}
1560
1561	/* if TCP/UDP */
1562	if ((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) ||
1563	    (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP)) {
1564		if (ena_rx_ctx->l4_csum_err) {
1565			/* TCP/UDP checksum error */
1566			mbuf->m_pkthdr.csum_flags = 0;
1567			counter_u64_add(rx_ring->rx_stats.bad_csum, 1);
1568		} else {
1569			mbuf->m_pkthdr.csum_flags = CSUM_IP_CHECKED;
1570			mbuf->m_pkthdr.csum_flags |= CSUM_IP_VALID;
1571		}
1572	}
1573}
1574
1575static void
1576ena_deferred_rx_cleanup(void *arg, int pending)
1577{
1578	struct ena_ring *rx_ring = arg;
1579	int budget = CLEAN_BUDGET;
1580
1581	ENA_RING_MTX_LOCK(rx_ring);
1582	/*
1583	 * If deferred task was executed, perform cleanup of all awaiting
1584	 * descs (or until given budget is depleted to avoid infinite loop).
1585	 */
1586	while (budget--) {
1587		if (ena_rx_cleanup(rx_ring) == 0)
1588			break;
1589	}
1590	ENA_RING_MTX_UNLOCK(rx_ring);
1591}
1592
1593/**
1594 * ena_rx_cleanup - handle rx irq
1595 * @arg: ring for which irq is being handled
1596 **/
1597static int
1598ena_rx_cleanup(struct ena_ring *rx_ring)
1599{
1600	struct ena_adapter *adapter;
1601	struct mbuf *mbuf;
1602	struct ena_com_rx_ctx ena_rx_ctx;
1603	struct ena_com_io_cq* io_cq;
1604	struct ena_com_io_sq* io_sq;
1605	if_t ifp;
1606	uint16_t ena_qid;
1607	uint16_t next_to_clean;
1608	uint32_t refill_required;
1609	uint32_t refill_threshold;
1610	uint32_t do_if_input = 0;
1611	unsigned int qid;
1612	int rc, i;
1613	int budget = RX_BUDGET;
1614
1615	adapter = rx_ring->que->adapter;
1616	ifp = adapter->ifp;
1617	qid = rx_ring->que->id;
1618	ena_qid = ENA_IO_RXQ_IDX(qid);
1619	io_cq = &adapter->ena_dev->io_cq_queues[ena_qid];
1620	io_sq = &adapter->ena_dev->io_sq_queues[ena_qid];
1621	next_to_clean = rx_ring->next_to_clean;
1622
1623	do {
1624		ena_rx_ctx.ena_bufs = rx_ring->ena_bufs;
1625		ena_rx_ctx.max_bufs = adapter->max_rx_sgl_size;
1626		ena_rx_ctx.descs = 0;
1627		rc = ena_com_rx_pkt(io_cq, io_sq, &ena_rx_ctx);
1628
1629		if (unlikely(rc != 0))
1630			goto error;
1631
1632		if (unlikely(ena_rx_ctx.descs == 0))
1633			break;
1634
1635		/* Receive mbuf from the ring */
1636		mbuf = ena_rx_mbuf(rx_ring, rx_ring->ena_bufs,
1637		    &ena_rx_ctx, &next_to_clean);
1638
1639		/* Exit if we failed to retrieve a buffer */
1640		if (unlikely(mbuf == NULL)) {
1641			for (i = 0; i < ena_rx_ctx.descs; ++i) {
1642				rx_ring->free_rx_ids[next_to_clean] =
1643				    rx_ring->ena_bufs[i].req_id;
1644				next_to_clean =
1645				    ENA_RX_RING_IDX_NEXT(next_to_clean,
1646				    rx_ring->ring_size);
1647
1648			}
1649			break;
1650		}
1651		ena_trace(ENA_DBG | ENA_RXPTH, "Rx: %d bytes",
1652		    mbuf->m_pkthdr.len);
1653
1654		if (((ifp->if_capenable & IFCAP_RXCSUM) != 0) ||
1655		    ((ifp->if_capenable & IFCAP_RXCSUM_IPV6) != 0)) {
1656			ena_rx_checksum(rx_ring, &ena_rx_ctx, mbuf);
1657		}
1658
1659		counter_enter();
1660		counter_u64_add_protected(rx_ring->rx_stats.bytes,
1661		    mbuf->m_pkthdr.len);
1662		counter_u64_add_protected(adapter->hw_stats.rx_bytes,
1663		    mbuf->m_pkthdr.len);
1664		counter_exit();
1665		/*
1666		 * LRO is only for IP/TCP packets and TCP checksum of the packet
1667		 * should be computed by hardware.
1668		 */
1669		do_if_input = 1;
1670		if (((ifp->if_capenable & IFCAP_LRO) != 0)  &&
1671		    ((mbuf->m_pkthdr.csum_flags & CSUM_IP_VALID) != 0) &&
1672		    (ena_rx_ctx.l4_proto == ENA_ETH_IO_L4_PROTO_TCP)) {
1673			/*
1674			 * Send to the stack if:
1675			 *  - LRO not enabled, or
1676			 *  - no LRO resources, or
1677			 *  - lro enqueue fails
1678			 */
1679			if ((rx_ring->lro.lro_cnt != 0) &&
1680			    (tcp_lro_rx(&rx_ring->lro, mbuf, 0) == 0))
1681					do_if_input = 0;
1682		}
1683		if (do_if_input != 0) {
1684			ena_trace(ENA_DBG | ENA_RXPTH,
1685			    "calling if_input() with mbuf %p", mbuf);
1686			(*ifp->if_input)(ifp, mbuf);
1687		}
1688
1689		counter_enter();
1690		counter_u64_add_protected(rx_ring->rx_stats.cnt, 1);
1691		counter_u64_add_protected(adapter->hw_stats.rx_packets, 1);
1692		counter_exit();
1693	} while (--budget);
1694
1695	rx_ring->next_to_clean = next_to_clean;
1696
1697	refill_required = ena_com_free_desc(io_sq);
1698	refill_threshold = rx_ring->ring_size / ENA_RX_REFILL_THRESH_DEVIDER;
1699
1700	if (refill_required > refill_threshold) {
1701		ena_com_update_dev_comp_head(rx_ring->ena_com_io_cq);
1702		ena_refill_rx_bufs(rx_ring, refill_required);
1703	}
1704
1705	tcp_lro_flush_all(&rx_ring->lro);
1706
1707	return (RX_BUDGET - budget);
1708
1709error:
1710	counter_u64_add(rx_ring->rx_stats.bad_desc_num, 1);
1711	return (RX_BUDGET - budget);
1712}
1713
1714/*********************************************************************
1715 *
1716 *  MSIX & Interrupt Service routine
1717 *
1718 **********************************************************************/
1719
1720/**
1721 * ena_handle_msix - MSIX Interrupt Handler for admin/async queue
1722 * @arg: interrupt number
1723 **/
1724static void
1725ena_intr_msix_mgmnt(void *arg)
1726{
1727	struct ena_adapter *adapter = (struct ena_adapter *)arg;
1728
1729	ena_com_admin_q_comp_intr_handler(adapter->ena_dev);
1730	if (likely(adapter->running))
1731		ena_com_aenq_intr_handler(adapter->ena_dev, arg);
1732}
1733
1734/**
1735 * ena_handle_msix - MSIX Interrupt Handler for Tx/Rx
1736 * @arg: interrupt number
1737 **/
1738static void
1739ena_handle_msix(void *arg)
1740{
1741	struct ena_que	*que = arg;
1742	struct ena_adapter *adapter = que->adapter;
1743	if_t ifp = adapter->ifp;
1744	struct ena_ring *tx_ring;
1745	struct ena_ring *rx_ring;
1746	struct ena_com_io_cq* io_cq;
1747	struct ena_eth_io_intr_reg intr_reg;
1748	int qid, ena_qid;
1749	int txc, rxc, i;
1750
1751	if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) == 0)
1752		return;
1753
1754	ena_trace(ENA_DBG, "MSI-X TX/RX routine");
1755
1756	tx_ring = que->tx_ring;
1757	rx_ring = que->rx_ring;
1758	qid = que->id;
1759	ena_qid = ENA_IO_TXQ_IDX(qid);
1760	io_cq = &adapter->ena_dev->io_cq_queues[ena_qid];
1761
1762	for (i = 0; i < CLEAN_BUDGET; ++i) {
1763		/*
1764		 * If lock cannot be acquired, then deferred cleanup task was
1765		 * being executed and rx ring is being cleaned up in
1766		 * another thread.
1767		 */
1768		if (ENA_RING_MTX_TRYLOCK(rx_ring) != 0) {
1769			rxc = ena_rx_cleanup(rx_ring);
1770			ENA_RING_MTX_UNLOCK(rx_ring);
1771		} else {
1772			rxc = 0;
1773		}
1774
1775		/* Protection from calling ena_tx_cleanup from ena_start_xmit */
1776		ENA_RING_MTX_LOCK(tx_ring);
1777		txc = ena_tx_cleanup(tx_ring);
1778		ENA_RING_MTX_UNLOCK(tx_ring);
1779
1780		if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) == 0)
1781			return;
1782
1783		if ((txc != TX_BUDGET) && (rxc != RX_BUDGET))
1784		       break;
1785	}
1786
1787	/* Signal that work is done and unmask interrupt */
1788	ena_com_update_intr_reg(&intr_reg,
1789	    RX_IRQ_INTERVAL,
1790	    TX_IRQ_INTERVAL,
1791	    true);
1792	ena_com_unmask_intr(io_cq, &intr_reg);
1793}
1794
1795static int
1796ena_enable_msix(struct ena_adapter *adapter)
1797{
1798	device_t dev = adapter->pdev;
1799	int i, msix_vecs, rc = 0;
1800
1801	/* Reserved the max msix vectors we might need */
1802	msix_vecs = ENA_MAX_MSIX_VEC(adapter->num_queues);
1803
1804	adapter->msix_entries = malloc(msix_vecs * sizeof(struct msix_entry),
1805	    M_DEVBUF, M_WAITOK | M_ZERO);
1806
1807	device_printf(dev, "Allocated msix_entries, vectors (cnt: %d)\n",
1808	    msix_vecs);
1809
1810	for (i = 0; i < msix_vecs; i++) {
1811		adapter->msix_entries[i].entry = i;
1812		/* Vectors must start from 1 */
1813		adapter->msix_entries[i].vector = i + 1;
1814	}
1815
1816	rc = pci_alloc_msix(dev, &msix_vecs);
1817	if (rc != 0) {
1818		device_printf(dev,
1819		    "Failed to enable MSIX, vectors %d rc %d\n", msix_vecs, rc);
1820
1821		rc = ENOSPC;
1822		goto err_msix_free;
1823	}
1824
1825	adapter->msix_vecs = msix_vecs;
1826	adapter->msix_enabled = true;
1827
1828	return (0);
1829
1830err_msix_free:
1831	free(adapter->msix_entries, M_DEVBUF);
1832	adapter->msix_entries = NULL;
1833
1834	return (rc);
1835}
1836
1837static void
1838ena_setup_mgmnt_intr(struct ena_adapter *adapter)
1839{
1840
1841	snprintf(adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].name,
1842	    ENA_IRQNAME_SIZE, "ena-mgmnt@pci:%s",
1843	    device_get_nameunit(adapter->pdev));
1844	/*
1845	 * Handler is NULL on purpose, it will be set
1846	 * when mgmnt interrupt is acquired
1847	 */
1848	adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].handler = NULL;
1849	adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter;
1850	adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].vector =
1851	    adapter->msix_entries[ENA_MGMNT_IRQ_IDX].vector;
1852}
1853
1854static void
1855ena_setup_io_intr(struct ena_adapter *adapter)
1856{
1857	static int last_bind_cpu = -1;
1858	int irq_idx;
1859	ena_trace(ENA_DBG, "enter");
1860
1861	for (int i = 0; i < adapter->num_queues; i++) {
1862		irq_idx = ENA_IO_IRQ_IDX(i);
1863
1864		snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE,
1865		    "%s-TxRx-%d", device_get_nameunit(adapter->pdev), i);
1866		adapter->irq_tbl[irq_idx].handler = ena_handle_msix;
1867		adapter->irq_tbl[irq_idx].data = &adapter->que[i];
1868		adapter->irq_tbl[irq_idx].vector =
1869		    adapter->msix_entries[irq_idx].vector;
1870		ena_trace(ENA_INFO | ENA_IOQ, "ena_setup_io_intr vector: %d\n",
1871		    adapter->msix_entries[irq_idx].vector);
1872#ifdef	RSS
1873		adapter->que[i].cpu = adapter->irq_tbl[irq_idx].cpu =
1874		    rss_getcpu(i % rss_getnumbuckets());
1875#else
1876		/*
1877		 * We still want to bind rings to the corresponding cpu
1878		 * using something similar to the RSS round-robin technique.
1879		 */
1880		if (last_bind_cpu < 0)
1881			last_bind_cpu = CPU_FIRST();
1882		adapter->que[i].cpu = adapter->irq_tbl[irq_idx].cpu =
1883		    last_bind_cpu;
1884		last_bind_cpu = CPU_NEXT(last_bind_cpu);
1885#endif
1886	}
1887}
1888
1889static int
1890ena_request_mgmnt_irq(struct ena_adapter *adapter)
1891{
1892	struct ena_irq *irq;
1893	unsigned long flags;
1894	int rc, rcc;
1895
1896	flags = RF_ACTIVE | RF_SHAREABLE;
1897
1898	irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
1899	irq->res = bus_alloc_resource_any(adapter->pdev, SYS_RES_IRQ,
1900	    &irq->vector, flags);
1901
1902	if (irq->res == NULL) {
1903		device_printf(adapter->pdev, "could not allocate "
1904		    "irq vector: %d\n", irq->vector);
1905		return (ENXIO);
1906	}
1907
1908	rc = bus_activate_resource(adapter->pdev, SYS_RES_IRQ,
1909	    irq->vector, irq->res);
1910	if (rc != 0) {
1911		device_printf(adapter->pdev, "could not activate "
1912		    "irq vector: %d\n", irq->vector);
1913		goto err_res_free;
1914	}
1915
1916	rc = bus_setup_intr(adapter->pdev, irq->res,
1917	    INTR_TYPE_NET | INTR_MPSAFE, NULL, ena_intr_msix_mgmnt,
1918	    irq->data, &irq->cookie);
1919	if (rc != 0) {
1920		device_printf(adapter->pdev, "failed to register "
1921		    "interrupt handler for irq %ju: %d\n",
1922		    rman_get_start(irq->res), rc);
1923		goto err_res_free;
1924	}
1925	irq->requested = true;
1926
1927	return (rc);
1928
1929err_res_free:
1930	device_printf(adapter->pdev, "releasing resource for irq %d\n",
1931	    irq->vector);
1932	rcc = bus_release_resource(adapter->pdev, SYS_RES_IRQ,
1933	    irq->vector, irq->res);
1934	if (rcc != 0)
1935		device_printf(adapter->pdev, "dev has no parent while "
1936		    "releasing res for irq: %d\n", irq->vector);
1937	irq->res = NULL;
1938
1939	return (rc);
1940}
1941
1942static int
1943ena_request_io_irq(struct ena_adapter *adapter)
1944{
1945	struct ena_irq *irq;
1946	unsigned long flags = 0;
1947	int rc = 0, i, rcc;
1948
1949	if (adapter->msix_enabled == 0) {
1950		device_printf(adapter->pdev, "failed to request irq\n");
1951		return (EINVAL);
1952	} else {
1953		flags = RF_ACTIVE | RF_SHAREABLE;
1954	}
1955
1956	for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) {
1957		irq = &adapter->irq_tbl[i];
1958
1959		if (irq->requested)
1960			continue;
1961
1962		irq->res = bus_alloc_resource_any(adapter->pdev, SYS_RES_IRQ,
1963		    &irq->vector, flags);
1964		if (irq->res == NULL) {
1965			device_printf(adapter->pdev, "could not allocate "
1966			    "irq vector: %d\n", irq->vector);
1967			goto err;
1968		}
1969
1970		rc = bus_setup_intr(adapter->pdev, irq->res,
1971		    INTR_TYPE_NET | INTR_MPSAFE, NULL,
1972		    irq->handler, irq->data, &irq->cookie);
1973		 if (rc != 0) {
1974			device_printf(adapter->pdev, "failed to register "
1975			    "interrupt handler for irq %ju: %d\n",
1976			    rman_get_start(irq->res), rc);
1977			goto err;
1978		}
1979		irq->requested = true;
1980
1981#ifdef	RSS
1982		device_printf(adapter->pdev, "queue %d - RSS bucket %d\n",
1983		    i - ENA_IO_IRQ_FIRST_IDX, irq->cpu);
1984#else
1985		device_printf(adapter->pdev, "queue %d - cpu %d\n",
1986		    i - ENA_IO_IRQ_FIRST_IDX, irq->cpu);
1987#endif
1988	}
1989
1990	return (rc);
1991
1992err:
1993
1994	for (; i >= ENA_IO_IRQ_FIRST_IDX; i--) {
1995		irq = &adapter->irq_tbl[i];
1996		rcc = 0;
1997
1998		/* Once we entered err: section and irq->requested is true we
1999		   free both intr and resources */
2000		if (irq->requested)
2001			rcc = bus_teardown_intr(adapter->pdev, irq->res, irq->cookie);
2002		if (rcc != 0)
2003			device_printf(adapter->pdev, "could not release"
2004			    " irq: %d, error: %d\n", irq->vector, rcc);
2005
2006		/* If we entred err: section without irq->requested set we know
2007		   it was bus_alloc_resource_any() that needs cleanup, provided
2008		   res is not NULL. In case res is NULL no work in needed in
2009		   this iteration */
2010		rcc = 0;
2011		if (irq->res != NULL) {
2012			rcc = bus_release_resource(adapter->pdev, SYS_RES_IRQ,
2013			    irq->vector, irq->res);
2014		}
2015		if (rcc != 0)
2016			device_printf(adapter->pdev, "dev has no parent while "
2017			    "releasing res for irq: %d\n", irq->vector);
2018		irq->requested = false;
2019		irq->res = NULL;
2020	}
2021
2022	return (rc);
2023}
2024
2025static void
2026ena_free_mgmnt_irq(struct ena_adapter *adapter)
2027{
2028	struct ena_irq *irq;
2029	int rc;
2030
2031	irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
2032	if (irq->requested) {
2033		ena_trace(ENA_INFO | ENA_ADMQ, "tear down irq: %d\n",
2034		    irq->vector);
2035		rc = bus_teardown_intr(adapter->pdev, irq->res, irq->cookie);
2036		if (rc != 0)
2037			device_printf(adapter->pdev, "failed to tear "
2038			    "down irq: %d\n", irq->vector);
2039		irq->requested = 0;
2040	}
2041
2042	if (irq->res != NULL) {
2043		ena_trace(ENA_INFO | ENA_ADMQ, "release resource irq: %d\n",
2044		    irq->vector);
2045		rc = bus_release_resource(adapter->pdev, SYS_RES_IRQ,
2046		    irq->vector, irq->res);
2047		irq->res = NULL;
2048		if (rc != 0)
2049			device_printf(adapter->pdev, "dev has no parent while "
2050			    "releasing res for irq: %d\n", irq->vector);
2051	}
2052}
2053
2054static void
2055ena_free_io_irq(struct ena_adapter *adapter)
2056{
2057	struct ena_irq *irq;
2058	int rc;
2059
2060	for (int i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) {
2061		irq = &adapter->irq_tbl[i];
2062		if (irq->requested) {
2063			ena_trace(ENA_INFO | ENA_IOQ, "tear down irq: %d\n",
2064			    irq->vector);
2065			rc = bus_teardown_intr(adapter->pdev, irq->res,
2066			    irq->cookie);
2067			if (rc != 0) {
2068				device_printf(adapter->pdev, "failed to tear "
2069				    "down irq: %d\n", irq->vector);
2070			}
2071			irq->requested = 0;
2072		}
2073
2074		if (irq->res != NULL) {
2075			ena_trace(ENA_INFO | ENA_IOQ, "release resource irq: %d\n",
2076			    irq->vector);
2077			rc = bus_release_resource(adapter->pdev, SYS_RES_IRQ,
2078			    irq->vector, irq->res);
2079			irq->res = NULL;
2080			if (rc != 0) {
2081				device_printf(adapter->pdev, "dev has no parent"
2082				    " while releasing res for irq: %d\n",
2083				    irq->vector);
2084			}
2085		}
2086	}
2087}
2088
2089static void
2090ena_free_irqs(struct ena_adapter* adapter)
2091{
2092
2093	ena_free_io_irq(adapter);
2094	ena_free_mgmnt_irq(adapter);
2095	ena_disable_msix(adapter);
2096}
2097
2098static void
2099ena_disable_msix(struct ena_adapter *adapter)
2100{
2101
2102	pci_release_msi(adapter->pdev);
2103
2104	adapter->msix_vecs = 0;
2105	free(adapter->msix_entries, M_DEVBUF);
2106	adapter->msix_entries = NULL;
2107}
2108
2109static void
2110ena_unmask_all_io_irqs(struct ena_adapter *adapter)
2111{
2112	struct ena_com_io_cq* io_cq;
2113	struct ena_eth_io_intr_reg intr_reg;
2114	uint16_t ena_qid;
2115	int i;
2116
2117	/* Unmask interrupts for all queues */
2118	for (i = 0; i < adapter->num_queues; i++) {
2119		ena_qid = ENA_IO_TXQ_IDX(i);
2120		io_cq = &adapter->ena_dev->io_cq_queues[ena_qid];
2121		ena_com_update_intr_reg(&intr_reg, 0, 0, true);
2122		ena_com_unmask_intr(io_cq, &intr_reg);
2123	}
2124}
2125
2126/* Configure the Rx forwarding */
2127static int
2128ena_rss_configure(struct ena_adapter *adapter)
2129{
2130	struct ena_com_dev *ena_dev = adapter->ena_dev;
2131	int rc;
2132
2133	/* Set indirect table */
2134	rc = ena_com_indirect_table_set(ena_dev);
2135	if (unlikely((rc != 0) && (rc != EOPNOTSUPP)))
2136		return (rc);
2137
2138	/* Configure hash function (if supported) */
2139	rc = ena_com_set_hash_function(ena_dev);
2140	if (unlikely((rc != 0) && (rc != EOPNOTSUPP)))
2141		return (rc);
2142
2143	/* Configure hash inputs (if supported) */
2144	rc = ena_com_set_hash_ctrl(ena_dev);
2145	if (unlikely((rc != 0) && (rc != EOPNOTSUPP)))
2146		return (rc);
2147
2148	return (0);
2149}
2150
2151static int
2152ena_up_complete(struct ena_adapter *adapter)
2153{
2154	int rc;
2155
2156	if (adapter->rss_support) {
2157		rc = ena_rss_configure(adapter);
2158		if (rc != 0)
2159			return (rc);
2160	}
2161
2162	rc = ena_change_mtu(adapter->ifp, adapter->ifp->if_mtu);
2163	if (rc != 0)
2164		return (rc);
2165
2166	ena_refill_all_rx_bufs(adapter);
2167	ena_reset_counters((counter_u64_t *)&adapter->hw_stats,
2168	    sizeof(adapter->hw_stats));
2169
2170	return (0);
2171}
2172
2173static int
2174ena_up(struct ena_adapter *adapter)
2175{
2176	int rc = 0;
2177
2178	if (device_is_attached(adapter->pdev) == 0) {
2179		device_printf(adapter->pdev, "device is not attached!\n");
2180		return (ENXIO);
2181	}
2182
2183	if (!adapter->running == false) {
2184		device_printf(adapter->pdev, "device is not running!\n");
2185		return (ENXIO);
2186	}
2187
2188	if (!adapter->up) {
2189		device_printf(adapter->pdev, "device is going UP\n");
2190
2191		/* setup interrupts for IO queues */
2192		ena_setup_io_intr(adapter);
2193		rc = ena_request_io_irq(adapter);
2194		if (rc != 0) {
2195			ena_trace(ENA_ALERT, "err_req_irq");
2196			goto err_req_irq;
2197		}
2198
2199		/* allocate transmit descriptors */
2200		rc = ena_setup_all_tx_resources(adapter);
2201		if (rc != 0) {
2202			ena_trace(ENA_ALERT, "err_setup_tx");
2203			goto err_setup_tx;
2204		}
2205
2206		/* allocate receive descriptors */
2207		rc = ena_setup_all_rx_resources(adapter);
2208		if (rc != 0) {
2209			ena_trace(ENA_ALERT, "err_setup_rx");
2210			goto err_setup_rx;
2211		}
2212
2213		/* create IO queues for Rx & Tx */
2214		rc = ena_create_io_queues(adapter);
2215		if (rc != 0) {
2216			ena_trace(ENA_ALERT,
2217			    "create IO queues failed");
2218			goto err_io_que;
2219		}
2220
2221		if (adapter->link_status)
2222			if_link_state_change(adapter->ifp, LINK_STATE_UP);
2223
2224		rc = ena_up_complete(adapter);
2225		if (rc != 0)
2226			goto err_up_complete;
2227
2228		counter_u64_add(adapter->dev_stats.interface_up, 1);
2229
2230		ena_update_hwassist(adapter);
2231
2232		if_setdrvflagbits(adapter->ifp, IFF_DRV_RUNNING,
2233		    IFF_DRV_OACTIVE);
2234
2235		callout_reset_sbt(&adapter->timer_service, SBT_1S, SBT_1S,
2236		    ena_timer_service, (void *)adapter, 0);
2237
2238		adapter->up = true;
2239
2240		ena_unmask_all_io_irqs(adapter);
2241	}
2242
2243	return (0);
2244
2245err_up_complete:
2246	ena_destroy_all_io_queues(adapter);
2247err_io_que:
2248	ena_free_all_rx_resources(adapter);
2249err_setup_rx:
2250	ena_free_all_tx_resources(adapter);
2251err_setup_tx:
2252	ena_free_io_irq(adapter);
2253err_req_irq:
2254	return (rc);
2255}
2256
2257static uint64_t
2258ena_get_counter(if_t ifp, ift_counter cnt)
2259{
2260	struct ena_adapter *adapter;
2261	struct ena_hw_stats *stats;
2262
2263	adapter = if_getsoftc(ifp);
2264	stats = &adapter->hw_stats;
2265
2266	switch (cnt) {
2267	case IFCOUNTER_IPACKETS:
2268		return (counter_u64_fetch(stats->rx_packets));
2269	case IFCOUNTER_OPACKETS:
2270		return (counter_u64_fetch(stats->tx_packets));
2271	case IFCOUNTER_IBYTES:
2272		return (counter_u64_fetch(stats->rx_bytes));
2273	case IFCOUNTER_OBYTES:
2274		return (counter_u64_fetch(stats->tx_bytes));
2275	case IFCOUNTER_IQDROPS:
2276		return (counter_u64_fetch(stats->rx_drops));
2277	default:
2278		return (if_get_counter_default(ifp, cnt));
2279	}
2280}
2281
2282static int
2283ena_media_change(if_t ifp)
2284{
2285	/* Media Change is not supported by firmware */
2286	return (0);
2287}
2288
2289static void
2290ena_media_status(if_t ifp, struct ifmediareq *ifmr)
2291{
2292	struct ena_adapter *adapter = if_getsoftc(ifp);
2293	ena_trace(ENA_DBG, "enter");
2294
2295	ENA_DEV_LOCK;
2296
2297	ifmr->ifm_status = IFM_AVALID;
2298	ifmr->ifm_active = IFM_ETHER;
2299
2300	if (!adapter->link_status) {
2301		ENA_DEV_UNLOCK;
2302		ena_trace(ENA_WARNING, "link_status = false");
2303		return;
2304	}
2305
2306	ifmr->ifm_status |= IFM_ACTIVE;
2307	ifmr->ifm_active |= IFM_10G_T | IFM_FDX;
2308
2309	ENA_DEV_UNLOCK;
2310}
2311
2312static void
2313ena_init(void *arg)
2314{
2315	struct ena_adapter *adapter = (struct ena_adapter *)arg;
2316
2317	if (!adapter->up) {
2318		sx_xlock(&adapter->ioctl_sx);
2319		ena_up(adapter);
2320		sx_unlock(&adapter->ioctl_sx);
2321	}
2322}
2323
2324static int
2325ena_ioctl(if_t ifp, u_long command, caddr_t data)
2326{
2327	struct ena_adapter *adapter;
2328	struct ifreq *ifr;
2329	int rc;
2330
2331	adapter = ifp->if_softc;
2332	ifr = (struct ifreq *)data;
2333
2334	/*
2335	 * Acquiring lock to prevent from running up and down routines parallel.
2336	 */
2337	rc = 0;
2338	switch (command) {
2339	case SIOCSIFMTU:
2340		if (ifp->if_mtu == ifr->ifr_mtu)
2341			break;
2342		sx_xlock(&adapter->ioctl_sx);
2343		ena_down(adapter);
2344
2345		ena_change_mtu(ifp, ifr->ifr_mtu);
2346
2347		rc = ena_up(adapter);
2348		sx_unlock(&adapter->ioctl_sx);
2349		break;
2350
2351	case SIOCSIFFLAGS:
2352		if ((ifp->if_flags & IFF_UP) != 0) {
2353			if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) != 0) {
2354				if ((ifp->if_flags & (IFF_PROMISC |
2355				    IFF_ALLMULTI)) != 0) {
2356					device_printf(adapter->pdev,
2357					    "ioctl promisc/allmulti\n");
2358				}
2359			} else {
2360				sx_xlock(&adapter->ioctl_sx);
2361				rc = ena_up(adapter);
2362				sx_unlock(&adapter->ioctl_sx);
2363			}
2364		} else {
2365			if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) != 0) {
2366				sx_xlock(&adapter->ioctl_sx);
2367				ena_down(adapter);
2368				sx_unlock(&adapter->ioctl_sx);
2369			}
2370		}
2371		break;
2372
2373	case SIOCADDMULTI:
2374	case SIOCDELMULTI:
2375		break;
2376
2377	case SIOCSIFMEDIA:
2378	case SIOCGIFMEDIA:
2379		rc = ifmedia_ioctl(ifp, ifr, &adapter->media, command);
2380		break;
2381
2382	case SIOCSIFCAP:
2383		{
2384			int reinit = 0;
2385
2386			if (ifr->ifr_reqcap != ifp->if_capenable) {
2387				ifp->if_capenable = ifr->ifr_reqcap;
2388				reinit = 1;
2389			}
2390
2391			if ((reinit != 0) &&
2392			    ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) != 0)) {
2393				sx_xlock(&adapter->ioctl_sx);
2394				ena_down(adapter);
2395				rc = ena_up(adapter);
2396				sx_unlock(&adapter->ioctl_sx);
2397			}
2398		}
2399
2400		break;
2401	default:
2402		rc = ether_ioctl(ifp, command, data);
2403		break;
2404	}
2405
2406	return (rc);
2407}
2408
2409static int
2410ena_get_dev_offloads(struct ena_com_dev_get_features_ctx *feat)
2411{
2412	int caps = 0;
2413
2414	if ((feat->offload.tx &
2415	    (ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_FULL_MASK |
2416	    ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK |
2417		ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L3_CSUM_IPV4_MASK)) != 0)
2418		caps |= IFCAP_TXCSUM;
2419
2420	if ((feat->offload.tx &
2421	    (ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_FULL_MASK |
2422	    ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK)) != 0)
2423		caps |= IFCAP_TXCSUM_IPV6;
2424
2425	if ((feat->offload.tx &
2426	    ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK) != 0)
2427		caps |= IFCAP_TSO4;
2428
2429	if ((feat->offload.tx &
2430	    ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK) != 0)
2431		caps |= IFCAP_TSO6;
2432
2433	if ((feat->offload.rx_supported &
2434	    (ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK |
2435	    ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L3_CSUM_IPV4_MASK)) != 0)
2436		caps |= IFCAP_RXCSUM;
2437
2438	if ((feat->offload.rx_supported &
2439	    ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK) != 0)
2440		caps |= IFCAP_RXCSUM_IPV6;
2441
2442	caps |= IFCAP_LRO | IFCAP_JUMBO_MTU;
2443
2444	return (caps);
2445}
2446
2447static void
2448ena_update_host_info(struct ena_admin_host_info *host_info, if_t ifp)
2449{
2450
2451	host_info->supported_network_features[0] =
2452	    (uint32_t)if_getcapabilities(ifp);
2453}
2454
2455static void
2456ena_update_hwassist(struct ena_adapter *adapter)
2457{
2458	if_t ifp = adapter->ifp;
2459	uint32_t feat = adapter->tx_offload_cap;
2460	int cap = if_getcapenable(ifp);
2461	int flags = 0;
2462
2463	if_clearhwassist(ifp);
2464
2465	if ((cap & IFCAP_TXCSUM) != 0) {
2466		if ((feat &
2467		    ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L3_CSUM_IPV4_MASK) != 0)
2468			flags |= CSUM_IP;
2469		if ((feat &
2470		    (ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_FULL_MASK |
2471		    ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK)) != 0)
2472			flags |= CSUM_IP_UDP | CSUM_IP_TCP;
2473	}
2474
2475	if ((cap & IFCAP_TXCSUM_IPV6) != 0)
2476		flags |= CSUM_IP6_UDP | CSUM_IP6_TCP;
2477
2478	if ((cap & IFCAP_TSO4) != 0)
2479		flags |= CSUM_IP_TSO;
2480
2481	if ((cap & IFCAP_TSO6) != 0)
2482		flags |= CSUM_IP6_TSO;
2483
2484	if_sethwassistbits(ifp, flags, 0);
2485}
2486
2487static int
2488ena_setup_ifnet(device_t pdev, struct ena_adapter *adapter,
2489    struct ena_com_dev_get_features_ctx *feat)
2490{
2491	if_t ifp;
2492	int caps = 0;
2493
2494	ena_trace(ENA_DBG, "enter");
2495
2496	ifp = adapter->ifp = if_gethandle(IFT_ETHER);
2497	if (ifp == NULL) {
2498		device_printf(pdev, "can not allocate ifnet structure\n");
2499		return (ENXIO);
2500	}
2501	if_initname(ifp, device_get_name(pdev), device_get_unit(pdev));
2502	if_setdev(ifp, pdev);
2503	if_setsoftc(ifp, adapter);
2504
2505	if_setflags(ifp, IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST);
2506	if_setinitfn(ifp, ena_init);
2507	if_settransmitfn(ifp, ena_mq_start);
2508	if_setqflushfn(ifp, ena_qflush);
2509	if_setioctlfn(ifp, ena_ioctl);
2510	if_setgetcounterfn(ifp, ena_get_counter);
2511
2512	if_setsendqlen(ifp, adapter->tx_ring_size);
2513	if_setsendqready(ifp);
2514	if_setmtu(ifp, ETHERMTU);
2515	if_setbaudrate(ifp, 0);
2516	/* Zeroize capabilities... */
2517	if_setcapabilities(ifp, 0);
2518	if_setcapenable(ifp, 0);
2519	/* check hardware support */
2520	caps = ena_get_dev_offloads(feat);
2521	/* ... and set them */
2522	if_setcapabilitiesbit(ifp, caps, 0);
2523
2524	/* TSO parameters */
2525	ifp->if_hw_tsomax = ENA_TSO_MAXSIZE -
2526	    (ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN);
2527	ifp->if_hw_tsomaxsegcount = adapter->max_tx_sgl_size - 1;
2528	ifp->if_hw_tsomaxsegsize = ENA_TSO_MAXSIZE;
2529
2530	if_setifheaderlen(ifp, sizeof(struct ether_vlan_header));
2531	if_setcapenable(ifp, if_getcapabilities(ifp));
2532
2533	/*
2534	 * Specify the media types supported by this adapter and register
2535	 * callbacks to update media and link information
2536	 */
2537	ifmedia_init(&adapter->media, IFM_IMASK,
2538	    ena_media_change, ena_media_status);
2539	ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL);
2540	ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
2541
2542	ether_ifattach(ifp, adapter->mac_addr);
2543
2544	return (0);
2545}
2546
2547static void
2548ena_down(struct ena_adapter *adapter)
2549{
2550	int rc;
2551
2552	if (adapter->up) {
2553		device_printf(adapter->pdev, "device is going DOWN\n");
2554
2555		callout_drain(&adapter->timer_service);
2556
2557		adapter->up = false;
2558		if_setdrvflagbits(adapter->ifp, IFF_DRV_OACTIVE,
2559		    IFF_DRV_RUNNING);
2560
2561		ena_free_io_irq(adapter);
2562
2563		if (adapter->trigger_reset) {
2564			rc = ena_com_dev_reset(adapter->ena_dev,
2565			    adapter->reset_reason);
2566			if (rc != 0)
2567				device_printf(adapter->pdev,
2568				    "Device reset failed\n");
2569		}
2570
2571		ena_destroy_all_io_queues(adapter);
2572
2573		ena_free_all_tx_bufs(adapter);
2574		ena_free_all_rx_bufs(adapter);
2575		ena_free_all_tx_resources(adapter);
2576		ena_free_all_rx_resources(adapter);
2577
2578		counter_u64_add(adapter->dev_stats.interface_down, 1);
2579	}
2580}
2581
2582static void
2583ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx, struct mbuf *mbuf)
2584{
2585	struct ena_com_tx_meta *ena_meta;
2586	struct ether_vlan_header *eh;
2587	u32 mss;
2588	bool offload;
2589	uint16_t etype;
2590	int ehdrlen;
2591	struct ip *ip;
2592	int iphlen;
2593	struct tcphdr *th;
2594
2595	offload = false;
2596	ena_meta = &ena_tx_ctx->ena_meta;
2597	mss = mbuf->m_pkthdr.tso_segsz;
2598
2599	if (mss != 0)
2600		offload = true;
2601
2602	if ((mbuf->m_pkthdr.csum_flags & CSUM_TSO) != 0)
2603		offload = true;
2604
2605	if ((mbuf->m_pkthdr.csum_flags & CSUM_OFFLOAD) != 0)
2606		offload = true;
2607
2608	if (!offload) {
2609		ena_tx_ctx->meta_valid = 0;
2610		return;
2611	}
2612
2613	/* Determine where frame payload starts. */
2614	eh = mtod(mbuf, struct ether_vlan_header *);
2615	if (eh->evl_encap_proto == htons(ETHERTYPE_VLAN)) {
2616		etype = ntohs(eh->evl_proto);
2617		ehdrlen = ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN;
2618	} else {
2619		etype = ntohs(eh->evl_encap_proto);
2620		ehdrlen = ETHER_HDR_LEN;
2621	}
2622
2623	ip = (struct ip *)(mbuf->m_data + ehdrlen);
2624	iphlen = ip->ip_hl << 2;
2625	th = (struct tcphdr *)((caddr_t)ip + iphlen);
2626
2627	if ((mbuf->m_pkthdr.csum_flags & CSUM_IP) != 0) {
2628		ena_tx_ctx->l3_csum_enable = 1;
2629	}
2630	if ((mbuf->m_pkthdr.csum_flags & CSUM_TSO) != 0) {
2631		ena_tx_ctx->tso_enable = 1;
2632		ena_meta->l4_hdr_len = (th->th_off);
2633	}
2634
2635	switch (etype) {
2636	case ETHERTYPE_IP:
2637		ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV4;
2638		if (ip->ip_off == 0)
2639			ena_tx_ctx->df = 1;
2640		break;
2641	case ETHERTYPE_IPV6:
2642		ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV6;
2643
2644	default:
2645		break;
2646	}
2647
2648	if (ip->ip_p == IPPROTO_TCP) {
2649		ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_TCP;
2650		if ((mbuf->m_pkthdr.csum_flags &
2651		    (CSUM_IP_TCP | CSUM_IP6_TCP)) != 0)
2652			ena_tx_ctx->l4_csum_enable = 1;
2653		else
2654			ena_tx_ctx->l4_csum_enable = 0;
2655	} else if (ip->ip_p == IPPROTO_UDP) {
2656		ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UDP;
2657		if ((mbuf->m_pkthdr.csum_flags &
2658		    (CSUM_IP_UDP | CSUM_IP6_UDP)) != 0)
2659			ena_tx_ctx->l4_csum_enable = 1;
2660		else
2661			ena_tx_ctx->l4_csum_enable = 0;
2662	} else {
2663		ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UNKNOWN;
2664		ena_tx_ctx->l4_csum_enable = 0;
2665	}
2666
2667	ena_meta->mss = mss;
2668	ena_meta->l3_hdr_len = iphlen;
2669	ena_meta->l3_hdr_offset = ehdrlen;
2670	ena_tx_ctx->meta_valid = 1;
2671}
2672
2673static int
2674ena_check_and_collapse_mbuf(struct ena_ring *tx_ring, struct mbuf **mbuf)
2675{
2676	struct ena_adapter *adapter;
2677	struct mbuf *collapsed_mbuf;
2678	int num_frags;
2679
2680	adapter = tx_ring->adapter;
2681	num_frags = ena_mbuf_count(*mbuf);
2682
2683	/* One segment must be reserved for configuration descriptor. */
2684	if (num_frags < adapter->max_tx_sgl_size)
2685		return (0);
2686	counter_u64_add(tx_ring->tx_stats.collapse, 1);
2687
2688	collapsed_mbuf = m_collapse(*mbuf, M_NOWAIT,
2689	    adapter->max_tx_sgl_size - 1);
2690	if (collapsed_mbuf == NULL) {
2691		counter_u64_add(tx_ring->tx_stats.collapse_err, 1);
2692		return (ENOMEM);
2693	}
2694
2695	/* If mbuf was collapsed succesfully, original mbuf is released. */
2696	*mbuf = collapsed_mbuf;
2697
2698	return (0);
2699}
2700
2701static int
2702ena_xmit_mbuf(struct ena_ring *tx_ring, struct mbuf **mbuf)
2703{
2704	struct ena_adapter *adapter;
2705	struct ena_tx_buffer *tx_info;
2706	struct ena_com_tx_ctx ena_tx_ctx;
2707	struct ena_com_dev *ena_dev;
2708	struct ena_com_buf *ena_buf;
2709	struct ena_com_io_sq* io_sq;
2710	bus_dma_segment_t segs[ENA_BUS_DMA_SEGS];
2711	void *push_hdr;
2712	uint16_t next_to_use;
2713	uint16_t req_id;
2714	uint16_t push_len;
2715	uint16_t ena_qid;
2716	uint32_t len, nsegs, header_len;
2717	int i, rc;
2718	int nb_hw_desc;
2719
2720	ena_qid = ENA_IO_TXQ_IDX(tx_ring->que->id);
2721	adapter = tx_ring->que->adapter;
2722	ena_dev = adapter->ena_dev;
2723	io_sq = &adapter->ena_dev->io_sq_queues[ena_qid];
2724
2725	rc = ena_check_and_collapse_mbuf(tx_ring, mbuf);
2726	if (rc != 0) {
2727		ena_trace(ENA_WARNING,
2728		    "Failed to collapse mbuf! err: %d", rc);
2729		return (rc);
2730	}
2731
2732	next_to_use = tx_ring->next_to_use;
2733	req_id = tx_ring->free_tx_ids[next_to_use];
2734	tx_info = &tx_ring->tx_buffer_info[req_id];
2735
2736	tx_info->mbuf = *mbuf;
2737	tx_info->num_of_bufs = 0;
2738
2739	ena_buf = tx_info->bufs;
2740	len = (*mbuf)->m_len;
2741
2742	ena_trace(ENA_DBG | ENA_TXPTH, "Tx: %d bytes", (*mbuf)->m_pkthdr.len);
2743
2744	push_len = 0;
2745	header_len = min_t(uint32_t, len, tx_ring->tx_max_header_size);
2746	push_hdr = NULL;
2747
2748	rc = bus_dmamap_load_mbuf_sg(adapter->tx_buf_tag, tx_info->map,
2749	    *mbuf, segs, &nsegs, BUS_DMA_NOWAIT);
2750
2751	if ((rc != 0) || (nsegs == 0)) {
2752		ena_trace(ENA_WARNING,
2753		    "dmamap load failed! err: %d nsegs: %d", rc, nsegs);
2754		counter_u64_add(tx_ring->tx_stats.dma_mapping_err, 1);
2755		tx_info->mbuf = NULL;
2756		if (rc == ENOMEM)
2757			return (ENA_COM_NO_MEM);
2758		else
2759			return (ENA_COM_INVAL);
2760	}
2761
2762	for (i = 0; i < nsegs; i++) {
2763		ena_buf->len = segs[i].ds_len;
2764		ena_buf->paddr = segs[i].ds_addr;
2765		ena_buf++;
2766	}
2767	tx_info->num_of_bufs = nsegs;
2768
2769	memset(&ena_tx_ctx, 0x0, sizeof(struct ena_com_tx_ctx));
2770	ena_tx_ctx.ena_bufs = tx_info->bufs;
2771	ena_tx_ctx.push_header = push_hdr;
2772	ena_tx_ctx.num_bufs = tx_info->num_of_bufs;
2773	ena_tx_ctx.req_id = req_id;
2774	ena_tx_ctx.header_len = header_len;
2775
2776	/* Set flags and meta data */
2777	ena_tx_csum(&ena_tx_ctx, *mbuf);
2778	/* Prepare the packet's descriptors and send them to device */
2779	rc = ena_com_prepare_tx(io_sq, &ena_tx_ctx, &nb_hw_desc);
2780	if (rc != 0) {
2781		ena_trace(ENA_WARNING, "failed to prepare tx bufs\n");
2782		counter_enter();
2783		counter_u64_add_protected(tx_ring->tx_stats.queue_stop, 1);
2784		counter_u64_add_protected(tx_ring->tx_stats.prepare_ctx_err, 1);
2785		counter_exit();
2786		goto dma_error;
2787	}
2788
2789	counter_enter();
2790	counter_u64_add_protected(tx_ring->tx_stats.cnt, 1);
2791	counter_u64_add_protected(tx_ring->tx_stats.bytes,
2792	    (*mbuf)->m_pkthdr.len);
2793
2794	counter_u64_add_protected(adapter->hw_stats.tx_packets, 1);
2795	counter_u64_add_protected(adapter->hw_stats.tx_bytes,
2796	    (*mbuf)->m_pkthdr.len);
2797	counter_exit();
2798
2799	tx_info->tx_descs = nb_hw_desc;
2800	getbinuptime(&tx_info->timestamp);
2801	tx_info->print_once = true;
2802
2803	tx_ring->next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use,
2804	    tx_ring->ring_size);
2805
2806	bus_dmamap_sync(adapter->tx_buf_tag, tx_info->map,
2807	    BUS_DMASYNC_PREWRITE);
2808
2809	return (0);
2810
2811dma_error:
2812	tx_info->mbuf = NULL;
2813	bus_dmamap_unload(adapter->tx_buf_tag, tx_info->map);
2814
2815	return (rc);
2816}
2817
2818static void
2819ena_start_xmit(struct ena_ring *tx_ring)
2820{
2821	struct mbuf *mbuf;
2822	struct ena_adapter *adapter = tx_ring->adapter;
2823	struct ena_com_io_sq* io_sq;
2824	int ena_qid;
2825	int acum_pkts = 0;
2826	int ret = 0;
2827
2828	if ((if_getdrvflags(adapter->ifp) & IFF_DRV_RUNNING) == 0)
2829		return;
2830
2831	if (!adapter->link_status)
2832		return;
2833
2834	ena_qid = ENA_IO_TXQ_IDX(tx_ring->que->id);
2835	io_sq = &adapter->ena_dev->io_sq_queues[ena_qid];
2836
2837	while ((mbuf = drbr_peek(adapter->ifp, tx_ring->br)) != NULL) {
2838		ena_trace(ENA_DBG | ENA_TXPTH, "\ndequeued mbuf %p with flags %#x and"
2839		    " header csum flags %#jx",
2840		    mbuf, mbuf->m_flags, mbuf->m_pkthdr.csum_flags);
2841
2842		if (!ena_com_sq_have_enough_space(io_sq,
2843		    ENA_TX_CLEANUP_THRESHOLD))
2844			ena_tx_cleanup(tx_ring);
2845
2846		if ((ret = ena_xmit_mbuf(tx_ring, &mbuf)) != 0) {
2847			if (ret == ENA_COM_NO_MEM) {
2848				drbr_putback(adapter->ifp, tx_ring->br, mbuf);
2849			} else if (ret == ENA_COM_NO_SPACE) {
2850				drbr_putback(adapter->ifp, tx_ring->br, mbuf);
2851			} else {
2852				m_freem(mbuf);
2853				drbr_advance(adapter->ifp, tx_ring->br);
2854			}
2855
2856			break;
2857		}
2858
2859		drbr_advance(adapter->ifp, tx_ring->br);
2860
2861		if ((if_getdrvflags(adapter->ifp) & IFF_DRV_RUNNING) == 0)
2862			return;
2863
2864		acum_pkts++;
2865
2866		BPF_MTAP(adapter->ifp, mbuf);
2867
2868		if (acum_pkts == DB_THRESHOLD) {
2869			acum_pkts = 0;
2870			wmb();
2871			/* Trigger the dma engine */
2872			ena_com_write_sq_doorbell(io_sq);
2873			counter_u64_add(tx_ring->tx_stats.doorbells, 1);
2874		}
2875
2876	}
2877
2878	if (acum_pkts != 0) {
2879		wmb();
2880		/* Trigger the dma engine */
2881		ena_com_write_sq_doorbell(io_sq);
2882		counter_u64_add(tx_ring->tx_stats.doorbells, 1);
2883	}
2884
2885	if (!ena_com_sq_have_enough_space(io_sq, ENA_TX_CLEANUP_THRESHOLD))
2886		ena_tx_cleanup(tx_ring);
2887}
2888
2889static void
2890ena_deferred_mq_start(void *arg, int pending)
2891{
2892	struct ena_ring *tx_ring = (struct ena_ring *)arg;
2893	struct ifnet *ifp = tx_ring->adapter->ifp;
2894
2895	while (!drbr_empty(ifp, tx_ring->br) &&
2896	    (if_getdrvflags(ifp) & IFF_DRV_RUNNING) != 0) {
2897		ENA_RING_MTX_LOCK(tx_ring);
2898		ena_start_xmit(tx_ring);
2899		ENA_RING_MTX_UNLOCK(tx_ring);
2900	}
2901}
2902
2903static int
2904ena_mq_start(if_t ifp, struct mbuf *m)
2905{
2906	struct ena_adapter *adapter = ifp->if_softc;
2907	struct ena_ring *tx_ring;
2908	int ret, is_drbr_empty;
2909	uint32_t i;
2910
2911	if ((if_getdrvflags(adapter->ifp) & IFF_DRV_RUNNING) == 0)
2912		return (ENODEV);
2913
2914	/* Which queue to use */
2915	/*
2916	 * If everything is setup correctly, it should be the
2917	 * same bucket that the current CPU we're on is.
2918	 * It should improve performance.
2919	 */
2920	if (M_HASHTYPE_GET(m) != M_HASHTYPE_NONE) {
2921#ifdef	RSS
2922		if (rss_hash2bucket(m->m_pkthdr.flowid,
2923		    M_HASHTYPE_GET(m), &i) == 0) {
2924			i = i % adapter->num_queues;
2925
2926		} else
2927#endif
2928		{
2929			i = m->m_pkthdr.flowid % adapter->num_queues;
2930		}
2931	} else {
2932		i = curcpu % adapter->num_queues;
2933	}
2934	tx_ring = &adapter->tx_ring[i];
2935
2936	/* Check if drbr is empty before putting packet */
2937	is_drbr_empty = drbr_empty(ifp, tx_ring->br);
2938	ret = drbr_enqueue(ifp, tx_ring->br, m);
2939	if (ret != 0) {
2940		taskqueue_enqueue(tx_ring->enqueue_tq, &tx_ring->enqueue_task);
2941		return (ret);
2942	}
2943
2944	if ((is_drbr_empty != 0) && (ENA_RING_MTX_TRYLOCK(tx_ring) != 0)) {
2945		ena_start_xmit(tx_ring);
2946		ENA_RING_MTX_UNLOCK(tx_ring);
2947	} else {
2948		taskqueue_enqueue(tx_ring->enqueue_tq, &tx_ring->enqueue_task);
2949	}
2950
2951	return (0);
2952}
2953
2954static void
2955ena_qflush(if_t ifp)
2956{
2957	struct ena_adapter *adapter = ifp->if_softc;
2958	struct ena_ring *tx_ring = adapter->tx_ring;
2959	int i;
2960
2961	for(i = 0; i < adapter->num_queues; ++i, ++tx_ring)
2962		if (!drbr_empty(ifp, tx_ring->br)) {
2963			ENA_RING_MTX_LOCK(tx_ring);
2964			drbr_flush(ifp, tx_ring->br);
2965			ENA_RING_MTX_UNLOCK(tx_ring);
2966		}
2967
2968	if_qflush(ifp);
2969}
2970
2971static int
2972ena_calc_io_queue_num(struct ena_adapter *adapter,
2973    struct ena_com_dev_get_features_ctx *get_feat_ctx)
2974{
2975	int io_sq_num, io_cq_num, io_queue_num;
2976
2977	io_sq_num = get_feat_ctx->max_queues.max_sq_num;
2978	io_cq_num = get_feat_ctx->max_queues.max_sq_num;
2979
2980	io_queue_num = min_t(int, mp_ncpus, ENA_MAX_NUM_IO_QUEUES);
2981	io_queue_num = min_t(int, io_queue_num, io_sq_num);
2982	io_queue_num = min_t(int, io_queue_num, io_cq_num);
2983	/* 1 IRQ for for mgmnt and 1 IRQ for each TX/RX pair */
2984	io_queue_num = min_t(int, io_queue_num,
2985	    pci_msix_count(adapter->pdev) - 1);
2986#ifdef	RSS
2987	io_queue_num = min_t(int, io_queue_num, rss_getnumbuckets());
2988#endif
2989
2990	return (io_queue_num);
2991}
2992
2993static int
2994ena_calc_queue_size(struct ena_adapter *adapter, uint16_t *max_tx_sgl_size,
2995    uint16_t *max_rx_sgl_size, struct ena_com_dev_get_features_ctx *feat)
2996{
2997	uint32_t queue_size = ENA_DEFAULT_RING_SIZE;
2998	uint32_t v;
2999	uint32_t q;
3000
3001	queue_size = min_t(uint32_t, queue_size,
3002	    feat->max_queues.max_cq_depth);
3003	queue_size = min_t(uint32_t, queue_size,
3004	    feat->max_queues.max_sq_depth);
3005
3006	/* round down to the nearest power of 2 */
3007	v = queue_size;
3008	while (v != 0) {
3009		if (powerof2(queue_size) != 0)
3010			break;
3011		v /= 2;
3012		q = rounddown2(queue_size, v);
3013		if (q != 0) {
3014			queue_size = q;
3015			break;
3016		}
3017	}
3018
3019	if (unlikely(queue_size == 0)) {
3020		device_printf(adapter->pdev, "Invalid queue size\n");
3021		return (ENA_COM_FAULT);
3022	}
3023
3024	*max_tx_sgl_size = min_t(uint16_t, ENA_PKT_MAX_BUFS,
3025	    feat->max_queues.max_packet_tx_descs);
3026	*max_rx_sgl_size = min_t(uint16_t, ENA_PKT_MAX_BUFS,
3027	    feat->max_queues.max_packet_rx_descs);
3028
3029	return (queue_size);
3030}
3031
3032static int
3033ena_rss_init_default(struct ena_adapter *adapter)
3034{
3035	struct ena_com_dev *ena_dev = adapter->ena_dev;
3036	device_t dev = adapter->pdev;
3037	int qid, rc, i;
3038
3039	rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE);
3040	if (unlikely(rc != 0)) {
3041		device_printf(dev, "Cannot init RSS\n");
3042		return (rc);
3043	}
3044
3045	for (i = 0; i < ENA_RX_RSS_TABLE_SIZE; i++) {
3046#ifdef	RSS
3047		qid = rss_get_indirection_to_bucket(i);
3048		qid = qid % adapter->num_queues;
3049#else
3050		qid = i % adapter->num_queues;
3051#endif
3052		rc = ena_com_indirect_table_fill_entry(ena_dev, i,
3053		    ENA_IO_RXQ_IDX(qid));
3054		if (unlikely((rc != 0) && (rc != EOPNOTSUPP))) {
3055			device_printf(dev, "Cannot fill indirect table\n");
3056			goto err_rss_destroy;
3057		}
3058	}
3059
3060	rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_CRC32, NULL,
3061	    ENA_HASH_KEY_SIZE, 0xFFFFFFFF);
3062	if (unlikely((rc != 0) && (rc != EOPNOTSUPP))) {
3063		device_printf(dev, "Cannot fill hash function\n");
3064		goto err_rss_destroy;
3065	}
3066
3067	rc = ena_com_set_default_hash_ctrl(ena_dev);
3068	if (unlikely((rc != 0) && (rc != EOPNOTSUPP))) {
3069		device_printf(dev, "Cannot fill hash control\n");
3070		goto err_rss_destroy;
3071	}
3072
3073	return (0);
3074
3075err_rss_destroy:
3076	ena_com_rss_destroy(ena_dev);
3077	return (rc);
3078}
3079
3080static void
3081ena_rss_init_default_deferred(void *arg)
3082{
3083	struct ena_adapter *adapter;
3084	devclass_t dc;
3085	int max;
3086	int rc;
3087
3088	dc = devclass_find("ena");
3089	if (dc == NULL) {
3090		ena_trace(ENA_DBG, "No devclass ena\n");
3091		return;
3092	}
3093
3094	max = devclass_get_maxunit(dc);
3095	while (max-- >= 0) {
3096		adapter = devclass_get_softc(dc, max);
3097		if (adapter != NULL) {
3098			rc = ena_rss_init_default(adapter);
3099			adapter->rss_support = true;
3100			if (rc != 0) {
3101				device_printf(adapter->pdev,
3102				    "WARNING: RSS was not properly initialized,"
3103				    " it will affect bandwidth\n");
3104				adapter->rss_support = false;
3105			}
3106		}
3107	}
3108}
3109SYSINIT(ena_rss_init, SI_SUB_KICK_SCHEDULER, SI_ORDER_SECOND, ena_rss_init_default_deferred, NULL);
3110
3111static void
3112ena_config_host_info(struct ena_com_dev *ena_dev)
3113{
3114	struct ena_admin_host_info *host_info;
3115	int rc;
3116
3117	/* Allocate only the host info */
3118	rc = ena_com_allocate_host_info(ena_dev);
3119	if (rc != 0) {
3120		ena_trace(ENA_ALERT, "Cannot allocate host info\n");
3121		return;
3122	}
3123
3124	host_info = ena_dev->host_attr.host_info;
3125
3126	host_info->os_type = ENA_ADMIN_OS_FREEBSD;
3127	host_info->kernel_ver = osreldate;
3128
3129	sprintf(host_info->kernel_ver_str, "%d", osreldate);
3130	host_info->os_dist = 0;
3131	strncpy(host_info->os_dist_str, osrelease,
3132	    sizeof(host_info->os_dist_str) - 1);
3133
3134	host_info->driver_version =
3135		(DRV_MODULE_VER_MAJOR) |
3136		(DRV_MODULE_VER_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) |
3137		(DRV_MODULE_VER_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT);
3138
3139	rc = ena_com_set_host_attributes(ena_dev);
3140	if (rc != 0) {
3141		if (rc == EOPNOTSUPP)
3142			ena_trace(ENA_WARNING, "Cannot set host attributes\n");
3143		else
3144			ena_trace(ENA_ALERT, "Cannot set host attributes\n");
3145
3146		goto err;
3147	}
3148
3149	return;
3150
3151err:
3152	ena_com_delete_host_info(ena_dev);
3153}
3154
3155static int
3156ena_device_init(struct ena_adapter *adapter, device_t pdev,
3157    struct ena_com_dev_get_features_ctx *get_feat_ctx, int *wd_active)
3158{
3159	struct ena_com_dev* ena_dev = adapter->ena_dev;
3160	bool readless_supported;
3161	uint32_t aenq_groups;
3162	int dma_width;
3163	int rc;
3164
3165	rc = ena_com_mmio_reg_read_request_init(ena_dev);
3166	if (rc != 0) {
3167		device_printf(pdev, "failed to init mmio read less\n");
3168		return (rc);
3169	}
3170
3171	/*
3172	 * The PCIe configuration space revision id indicate if mmio reg
3173	 * read is disabled
3174	 */
3175	readless_supported = !(pci_get_revid(pdev) & ENA_MMIO_DISABLE_REG_READ);
3176	ena_com_set_mmio_read_mode(ena_dev, readless_supported);
3177
3178	rc = ena_com_dev_reset(ena_dev, ENA_REGS_RESET_NORMAL);
3179	if (rc != 0) {
3180		device_printf(pdev, "Can not reset device\n");
3181		goto err_mmio_read_less;
3182	}
3183
3184	rc = ena_com_validate_version(ena_dev);
3185	if (rc != 0) {
3186		device_printf(pdev, "device version is too low\n");
3187		goto err_mmio_read_less;
3188	}
3189
3190	dma_width = ena_com_get_dma_width(ena_dev);
3191	if (dma_width < 0) {
3192		device_printf(pdev, "Invalid dma width value %d", dma_width);
3193		rc = dma_width;
3194		goto err_mmio_read_less;
3195	}
3196	adapter->dma_width = dma_width;
3197
3198	/* ENA admin level init */
3199	rc = ena_com_admin_init(ena_dev, &aenq_handlers, true);
3200	if (rc != 0) {
3201		device_printf(pdev,
3202		    "Can not initialize ena admin queue with device\n");
3203		goto err_mmio_read_less;
3204	}
3205
3206	/*
3207	 * To enable the msix interrupts the driver needs to know the number
3208	 * of queues. So the driver uses polling mode to retrieve this
3209	 * information
3210	 */
3211	ena_com_set_admin_polling_mode(ena_dev, true);
3212
3213	ena_config_host_info(ena_dev);
3214
3215	/* Get Device Attributes */
3216	rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx);
3217	if (rc != 0) {
3218		device_printf(pdev,
3219		    "Cannot get attribute for ena device rc: %d\n", rc);
3220		goto err_admin_init;
3221	}
3222
3223	aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) |
3224	    BIT(ENA_ADMIN_FATAL_ERROR) |
3225	    BIT(ENA_ADMIN_WARNING) |
3226	    BIT(ENA_ADMIN_NOTIFICATION) |
3227	    BIT(ENA_ADMIN_KEEP_ALIVE);
3228
3229	aenq_groups &= get_feat_ctx->aenq.supported_groups;
3230	rc = ena_com_set_aenq_config(ena_dev, aenq_groups);
3231	if (rc != 0) {
3232		device_printf(pdev, "Cannot configure aenq groups rc: %d\n", rc);
3233		goto err_admin_init;
3234	}
3235
3236	*wd_active = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE));
3237
3238	return (0);
3239
3240err_admin_init:
3241	ena_com_delete_host_info(ena_dev);
3242	ena_com_admin_destroy(ena_dev);
3243err_mmio_read_less:
3244	ena_com_mmio_reg_read_request_destroy(ena_dev);
3245
3246	return (rc);
3247}
3248
3249static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter,
3250    int io_vectors)
3251{
3252	struct ena_com_dev *ena_dev = adapter->ena_dev;
3253	int rc;
3254
3255	rc = ena_enable_msix(adapter);
3256	if (rc != 0) {
3257		device_printf(adapter->pdev, "Error with MSI-X enablement\n");
3258		return (rc);
3259	}
3260
3261	ena_setup_mgmnt_intr(adapter);
3262
3263	rc = ena_request_mgmnt_irq(adapter);
3264	if (rc != 0) {
3265		device_printf(adapter->pdev, "Cannot setup mgmnt queue intr\n");
3266		goto err_disable_msix;
3267	}
3268
3269	ena_com_set_admin_polling_mode(ena_dev, false);
3270
3271	ena_com_admin_aenq_enable(ena_dev);
3272
3273	return (0);
3274
3275err_disable_msix:
3276	ena_disable_msix(adapter);
3277
3278	return (rc);
3279}
3280
3281/* Function called on ENA_ADMIN_KEEP_ALIVE event */
3282static void ena_keep_alive_wd(void *adapter_data,
3283    struct ena_admin_aenq_entry *aenq_e)
3284{
3285	struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
3286	struct ena_admin_aenq_keep_alive_desc *desc;
3287	sbintime_t stime;
3288	uint64_t rx_drops;
3289
3290	desc = (struct ena_admin_aenq_keep_alive_desc *)aenq_e;
3291
3292	rx_drops = ((uint64_t)desc->rx_drops_high << 32) | desc->rx_drops_low;
3293	counter_u64_zero(adapter->hw_stats.rx_drops);
3294	counter_u64_add(adapter->hw_stats.rx_drops, rx_drops);
3295
3296	stime = getsbinuptime();
3297	atomic_store_rel_64(&adapter->keep_alive_timestamp, stime);
3298}
3299
3300/* Check for keep alive expiration */
3301static void check_for_missing_keep_alive(struct ena_adapter *adapter)
3302{
3303	sbintime_t timestamp, time;
3304
3305	if (adapter->wd_active == 0)
3306		return;
3307
3308	if (adapter->keep_alive_timeout == 0)
3309		return;
3310
3311	timestamp = atomic_load_acq_64(&adapter->keep_alive_timestamp);
3312	time = getsbinuptime() - timestamp;
3313	if (unlikely(time > adapter->keep_alive_timeout)) {
3314		device_printf(adapter->pdev,
3315		    "Keep alive watchdog timeout.\n");
3316		counter_u64_add(adapter->dev_stats.wd_expired, 1);
3317		adapter->reset_reason = ENA_REGS_RESET_KEEP_ALIVE_TO;
3318		adapter->trigger_reset = true;
3319	}
3320}
3321
3322/* Check if admin queue is enabled */
3323static void check_for_admin_com_state(struct ena_adapter *adapter)
3324{
3325	if (unlikely(ena_com_get_admin_running_state(adapter->ena_dev) ==
3326	    false)) {
3327		device_printf(adapter->pdev,
3328		    "ENA admin queue is not in running state!\n");
3329		counter_u64_add(adapter->dev_stats.admin_q_pause, 1);
3330		adapter->reset_reason = ENA_REGS_RESET_ADMIN_TO;
3331		adapter->trigger_reset = true;
3332	}
3333}
3334
3335static int
3336check_missing_comp_in_queue(struct ena_adapter *adapter,
3337    struct ena_ring *tx_ring)
3338{
3339	struct bintime curtime, time;
3340	struct ena_tx_buffer *tx_buf;
3341	uint32_t missed_tx = 0;
3342	int i;
3343
3344	getbinuptime(&curtime);
3345
3346	for (i = 0; i < tx_ring->ring_size; i++) {
3347		tx_buf = &tx_ring->tx_buffer_info[i];
3348
3349		if (bintime_isset(&tx_buf->timestamp) == 0)
3350			continue;
3351
3352		time = curtime;
3353		bintime_sub(&time, &tx_buf->timestamp);
3354
3355		/* Check again if packet is still waiting */
3356		if (unlikely(bttosbt(time) > adapter->missing_tx_timeout)) {
3357
3358			if (!tx_buf->print_once)
3359				ena_trace(ENA_WARNING, "Found a Tx that wasn't "
3360				    "completed on time, qid %d, index %d.\n",
3361				    tx_ring->qid, i);
3362
3363			tx_buf->print_once = true;
3364			missed_tx++;
3365
3366			if (unlikely(missed_tx >
3367			    adapter->missing_tx_threshold)) {
3368				device_printf(adapter->pdev,
3369					      "The number of lost tx completion "
3370					      "is above the threshold (%d > %d). "
3371					      "Reset the device\n",
3372					      missed_tx,
3373					      adapter->missing_tx_threshold);
3374				adapter->reset_reason =
3375				    ENA_REGS_RESET_MISS_TX_CMPL;
3376				adapter->trigger_reset = true;
3377				return (EIO);
3378			}
3379		}
3380	}
3381
3382	return (0);
3383}
3384
3385/*
3386 * Check for TX which were not completed on time.
3387 * Timeout is defined by "missing_tx_timeout".
3388 * Reset will be performed if number of incompleted
3389 * transactions exceeds "missing_tx_threshold".
3390 */
3391static void
3392check_for_missing_tx_completions(struct ena_adapter *adapter)
3393{
3394	struct ena_ring *tx_ring;
3395	int i, budget, rc;
3396
3397	/* Make sure the driver doesn't turn the device in other process */
3398	rmb();
3399
3400	if (!adapter->up)
3401		return;
3402
3403	if (adapter->trigger_reset)
3404		return;
3405
3406	if (adapter->missing_tx_timeout == 0)
3407		return;
3408
3409	budget = adapter->missing_tx_max_queues;
3410
3411	for (i = adapter->next_monitored_tx_qid; i < adapter->num_queues; i++) {
3412		tx_ring = &adapter->tx_ring[i];
3413
3414		rc = check_missing_comp_in_queue(adapter, tx_ring);
3415		if (unlikely(rc != 0))
3416			return;
3417
3418		budget--;
3419		if (budget == 0) {
3420			i++;
3421			break;
3422		}
3423	}
3424
3425	adapter->next_monitored_tx_qid = i % adapter->num_queues;
3426}
3427
3428/* trigger deferred rx cleanup after 2 consecutive detections */
3429#define EMPTY_RX_REFILL 2
3430/* For the rare case where the device runs out of Rx descriptors and the
3431 * msix handler failed to refill new Rx descriptors (due to a lack of memory
3432 * for example).
3433 * This case will lead to a deadlock:
3434 * The device won't send interrupts since all the new Rx packets will be dropped
3435 * The msix handler won't allocate new Rx descriptors so the device won't be
3436 * able to send new packets.
3437 *
3438 * When such a situation is detected - execute rx cleanup task in another thread
3439 */
3440static void
3441check_for_empty_rx_ring(struct ena_adapter *adapter)
3442{
3443	struct ena_ring *rx_ring;
3444	int i, refill_required;
3445
3446	if (!adapter->up)
3447		return;
3448
3449	if (adapter->trigger_reset)
3450		return;
3451
3452	for (i = 0; i < adapter->num_queues; i++) {
3453		rx_ring = &adapter->rx_ring[i];
3454
3455		refill_required = ena_com_free_desc(rx_ring->ena_com_io_sq);
3456		if (unlikely(refill_required == (rx_ring->ring_size - 1))) {
3457			rx_ring->empty_rx_queue++;
3458
3459			if (rx_ring->empty_rx_queue >= EMPTY_RX_REFILL)	{
3460				counter_u64_add(rx_ring->rx_stats.empty_rx_ring,
3461				    1);
3462
3463				device_printf(adapter->pdev,
3464				    "trigger refill for ring %d\n", i);
3465
3466				taskqueue_enqueue(rx_ring->cmpl_tq,
3467				    &rx_ring->cmpl_task);
3468				rx_ring->empty_rx_queue = 0;
3469			}
3470		} else {
3471			rx_ring->empty_rx_queue = 0;
3472		}
3473	}
3474}
3475
3476static void
3477ena_timer_service(void *data)
3478{
3479	struct ena_adapter *adapter = (struct ena_adapter *)data;
3480	struct ena_admin_host_info *host_info =
3481	    adapter->ena_dev->host_attr.host_info;
3482
3483	check_for_missing_keep_alive(adapter);
3484
3485	check_for_admin_com_state(adapter);
3486
3487	check_for_missing_tx_completions(adapter);
3488
3489	check_for_empty_rx_ring(adapter);
3490
3491	if (host_info != NULL)
3492		ena_update_host_info(host_info, adapter->ifp);
3493
3494	if (unlikely(adapter->trigger_reset)) {
3495		device_printf(adapter->pdev, "Trigger reset is on\n");
3496		taskqueue_enqueue(adapter->reset_tq, &adapter->reset_task);
3497		return;
3498	}
3499
3500	/*
3501	 * Schedule another timeout one second from now.
3502	 */
3503	callout_schedule_sbt(&adapter->timer_service, SBT_1S, SBT_1S, 0);
3504}
3505
3506static void
3507ena_reset_task(void *arg, int pending)
3508{
3509	struct ena_com_dev_get_features_ctx get_feat_ctx;
3510	struct ena_adapter *adapter = (struct ena_adapter *)arg;
3511	struct ena_com_dev *ena_dev = adapter->ena_dev;
3512	bool dev_up;
3513	int rc;
3514
3515	if (unlikely(!adapter->trigger_reset)) {
3516		device_printf(adapter->pdev,
3517		    "device reset scheduled but trigger_reset is off\n");
3518		return;
3519	}
3520
3521	sx_xlock(&adapter->ioctl_sx);
3522
3523	callout_drain(&adapter->timer_service);
3524
3525	dev_up = adapter->up;
3526
3527	ena_com_set_admin_running_state(ena_dev, false);
3528	ena_down(adapter);
3529	ena_free_mgmnt_irq(adapter);
3530	ena_disable_msix(adapter);
3531	ena_com_abort_admin_commands(ena_dev);
3532	ena_com_wait_for_abort_completion(ena_dev);
3533	ena_com_admin_destroy(ena_dev);
3534	ena_com_mmio_reg_read_request_destroy(ena_dev);
3535
3536	adapter->reset_reason = ENA_REGS_RESET_NORMAL;
3537	adapter->trigger_reset = false;
3538
3539	/* Finished destroy part. Restart the device */
3540	rc = ena_device_init(adapter, adapter->pdev, &get_feat_ctx,
3541	    &adapter->wd_active);
3542	if (rc != 0) {
3543		device_printf(adapter->pdev,
3544		    "ENA device init failed! (err: %d)\n", rc);
3545		goto err_dev_free;
3546	}
3547
3548	rc = ena_enable_msix_and_set_admin_interrupts(adapter,
3549	    adapter->num_queues);
3550	if (rc != 0) {
3551		device_printf(adapter->pdev, "Enable MSI-X failed\n");
3552		goto err_com_free;
3553	}
3554
3555	/* If the interface was up before the reset bring it up */
3556	if (dev_up) {
3557		rc = ena_up(adapter);
3558		if (rc != 0) {
3559			device_printf(adapter->pdev,
3560			    "Failed to create I/O queues\n");
3561			goto err_msix_free;
3562		}
3563	}
3564
3565	callout_reset_sbt(&adapter->timer_service, SBT_1S, SBT_1S,
3566	    ena_timer_service, (void *)adapter, 0);
3567
3568	sx_unlock(&adapter->ioctl_sx);
3569
3570	return;
3571
3572err_msix_free:
3573	ena_free_mgmnt_irq(adapter);
3574	ena_disable_msix(adapter);
3575err_com_free:
3576	ena_com_admin_destroy(ena_dev);
3577err_dev_free:
3578	device_printf(adapter->pdev, "ENA reset failed!\n");
3579	adapter->running = false;
3580	sx_unlock(&adapter->ioctl_sx);
3581}
3582
3583/**
3584 * ena_attach - Device Initialization Routine
3585 * @pdev: device information struct
3586 *
3587 * Returns 0 on success, otherwise on failure.
3588 *
3589 * ena_attach initializes an adapter identified by a device structure.
3590 * The OS initialization, configuring of the adapter private structure,
3591 * and a hardware reset occur.
3592 **/
3593static int
3594ena_attach(device_t pdev)
3595{
3596	struct ena_com_dev_get_features_ctx get_feat_ctx;
3597	static int version_printed;
3598	struct ena_adapter *adapter;
3599	struct ena_com_dev *ena_dev = NULL;
3600	uint16_t tx_sgl_size = 0;
3601	uint16_t rx_sgl_size = 0;
3602	int io_queue_num;
3603	int queue_size;
3604	int rc;
3605	adapter = device_get_softc(pdev);
3606	adapter->pdev = pdev;
3607
3608	mtx_init(&adapter->global_mtx, "ENA global mtx", NULL, MTX_DEF);
3609	sx_init(&adapter->ioctl_sx, "ENA ioctl sx");
3610
3611	/* Set up the timer service */
3612	callout_init_mtx(&adapter->timer_service, &adapter->global_mtx, 0);
3613	adapter->keep_alive_timeout = DEFAULT_KEEP_ALIVE_TO;
3614	adapter->missing_tx_timeout = DEFAULT_TX_CMP_TO;
3615	adapter->missing_tx_max_queues = DEFAULT_TX_MONITORED_QUEUES;
3616	adapter->missing_tx_threshold = DEFAULT_TX_CMP_THRESHOLD;
3617
3618	if (version_printed++ == 0)
3619		device_printf(pdev, "%s\n", ena_version);
3620
3621	rc = ena_allocate_pci_resources(adapter);
3622	if (rc != 0) {
3623		device_printf(pdev, "PCI resource allocation failed!\n");
3624		ena_free_pci_resources(adapter);
3625		return (rc);
3626	}
3627
3628	/* Allocate memory for ena_dev structure */
3629	ena_dev = malloc(sizeof(struct ena_com_dev), M_DEVBUF,
3630	    M_WAITOK | M_ZERO);
3631
3632	adapter->ena_dev = ena_dev;
3633	ena_dev->dmadev = pdev;
3634	ena_dev->bus = malloc(sizeof(struct ena_bus), M_DEVBUF,
3635	    M_WAITOK | M_ZERO);
3636
3637	/* Store register resources */
3638	((struct ena_bus*)(ena_dev->bus))->reg_bar_t =
3639	    rman_get_bustag(adapter->registers);
3640	((struct ena_bus*)(ena_dev->bus))->reg_bar_h =
3641	    rman_get_bushandle(adapter->registers);
3642
3643	if (((struct ena_bus*)(ena_dev->bus))->reg_bar_h == 0) {
3644		device_printf(pdev, "failed to pmap registers bar\n");
3645		rc = ENXIO;
3646		goto err_bus_free;
3647	}
3648
3649	ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3650
3651	/* Device initialization */
3652	rc = ena_device_init(adapter, pdev, &get_feat_ctx, &adapter->wd_active);
3653	if (rc != 0) {
3654		device_printf(pdev, "ENA device init failed! (err: %d)\n", rc);
3655		rc = ENXIO;
3656		goto err_bus_free;
3657	}
3658
3659	adapter->keep_alive_timestamp = getsbinuptime();
3660
3661	adapter->tx_offload_cap = get_feat_ctx.offload.tx;
3662
3663	/* Set for sure that interface is not up */
3664	adapter->up = false;
3665
3666	memcpy(adapter->mac_addr, get_feat_ctx.dev_attr.mac_addr,
3667	    ETHER_ADDR_LEN);
3668
3669	adapter->small_copy_len =
3670	    ENA_DEFAULT_SMALL_PACKET_LEN;
3671
3672	/* calculate IO queue number to create */
3673	io_queue_num = ena_calc_io_queue_num(adapter, &get_feat_ctx);
3674
3675	ENA_ASSERT(io_queue_num > 0, "Invalid queue number: %d\n",
3676	    io_queue_num);
3677	adapter->num_queues = io_queue_num;
3678
3679	/* calculatre ring sizes */
3680	queue_size = ena_calc_queue_size(adapter,&tx_sgl_size,
3681	    &rx_sgl_size, &get_feat_ctx);
3682	if ((queue_size <= 0) || (io_queue_num <= 0)) {
3683		rc = ENA_COM_FAULT;
3684		goto err_com_free;
3685	}
3686
3687	adapter->reset_reason = ENA_REGS_RESET_NORMAL;
3688
3689	adapter->tx_ring_size = queue_size;
3690	adapter->rx_ring_size = queue_size;
3691
3692	adapter->max_tx_sgl_size = tx_sgl_size;
3693	adapter->max_rx_sgl_size = rx_sgl_size;
3694
3695	/* set up dma tags for rx and tx buffers */
3696	rc = ena_setup_tx_dma_tag(adapter);
3697	if (rc != 0)
3698		goto err_com_free;
3699
3700	rc = ena_setup_rx_dma_tag(adapter);
3701	if (rc != 0)
3702		goto err_tx_tag_free;
3703
3704	/* initialize rings basic information */
3705	device_printf(pdev, "initalize %d io queues\n", io_queue_num);
3706	ena_init_io_rings(adapter);
3707
3708	/* setup network interface */
3709	rc = ena_setup_ifnet(pdev, adapter, &get_feat_ctx);
3710	if (rc != 0) {
3711		device_printf(pdev,"Error with network interface setup\n");
3712		goto err_io_free;
3713	}
3714
3715	rc = ena_enable_msix_and_set_admin_interrupts(adapter, io_queue_num);
3716	if (rc != 0) {
3717		device_printf(pdev,
3718		    "Failed to enable and set the admin interrupts\n");
3719		goto err_ifp_free;
3720	}
3721
3722	/* Initialize reset task queue */
3723	TASK_INIT(&adapter->reset_task, 0, ena_reset_task, adapter);
3724	adapter->reset_tq = taskqueue_create("ena_reset_enqueue",
3725	    M_WAITOK | M_ZERO, taskqueue_thread_enqueue, &adapter->reset_tq);
3726	taskqueue_start_threads(&adapter->reset_tq, 1, PI_NET,
3727	    "%s rstq", device_get_nameunit(adapter->pdev));
3728
3729	/* Initialize statistics */
3730	ena_alloc_counters((counter_u64_t *)&adapter->dev_stats,
3731	    sizeof(struct ena_stats_dev));
3732	ena_alloc_counters((counter_u64_t *)&adapter->hw_stats,
3733	    sizeof(struct ena_hw_stats));
3734	ena_sysctl_add_nodes(adapter);
3735
3736	/* Tell the stack that the interface is not active */
3737	if_setdrvflagbits(adapter->ifp, IFF_DRV_OACTIVE, IFF_DRV_RUNNING);
3738
3739	adapter->running = true;
3740	return (0);
3741
3742err_ifp_free:
3743	if_detach(adapter->ifp);
3744	if_free(adapter->ifp);
3745err_io_free:
3746	ena_free_all_io_rings_resources(adapter);
3747	ena_free_rx_dma_tag(adapter);
3748err_tx_tag_free:
3749	ena_free_tx_dma_tag(adapter);
3750err_com_free:
3751	ena_com_admin_destroy(ena_dev);
3752	ena_com_delete_host_info(ena_dev);
3753	ena_com_mmio_reg_read_request_destroy(ena_dev);
3754err_bus_free:
3755	free(ena_dev->bus, M_DEVBUF);
3756	free(ena_dev, M_DEVBUF);
3757	ena_free_pci_resources(adapter);
3758
3759	return (rc);
3760}
3761
3762/**
3763 * ena_detach - Device Removal Routine
3764 * @pdev: device information struct
3765 *
3766 * ena_detach is called by the device subsystem to alert the driver
3767 * that it should release a PCI device.
3768 **/
3769static int
3770ena_detach(device_t pdev)
3771{
3772	struct ena_adapter *adapter = device_get_softc(pdev);
3773	struct ena_com_dev *ena_dev = adapter->ena_dev;
3774	int rc;
3775
3776	/* Make sure VLANS are not using driver */
3777	if (adapter->ifp->if_vlantrunk != NULL) {
3778		device_printf(adapter->pdev ,"VLAN is in use, detach first\n");
3779		return (EBUSY);
3780	}
3781
3782	/* Free reset task and callout */
3783	callout_drain(&adapter->timer_service);
3784	while (taskqueue_cancel(adapter->reset_tq, &adapter->reset_task, NULL))
3785		taskqueue_drain(adapter->reset_tq, &adapter->reset_task);
3786	taskqueue_free(adapter->reset_tq);
3787
3788	sx_xlock(&adapter->ioctl_sx);
3789	ena_down(adapter);
3790	sx_unlock(&adapter->ioctl_sx);
3791
3792	if (adapter->ifp != NULL) {
3793		ether_ifdetach(adapter->ifp);
3794		if_free(adapter->ifp);
3795	}
3796
3797	ena_free_all_io_rings_resources(adapter);
3798
3799	ena_free_counters((counter_u64_t *)&adapter->hw_stats,
3800	    sizeof(struct ena_hw_stats));
3801	ena_free_counters((counter_u64_t *)&adapter->dev_stats,
3802	    sizeof(struct ena_stats_dev));
3803
3804	if (adapter->rss_support)
3805		ena_com_rss_destroy(ena_dev);
3806
3807	rc = ena_free_rx_dma_tag(adapter);
3808	if (rc != 0)
3809		device_printf(adapter->pdev,
3810		    "Unmapped RX DMA tag associations\n");
3811
3812	rc = ena_free_tx_dma_tag(adapter);
3813	if (rc != 0)
3814		device_printf(adapter->pdev,
3815		    "Unmapped TX DMA tag associations\n");
3816
3817	/* Reset the device only if the device is running. */
3818	if (adapter->running)
3819		ena_com_dev_reset(ena_dev, adapter->reset_reason);
3820
3821	ena_com_delete_host_info(ena_dev);
3822
3823	ena_free_irqs(adapter);
3824
3825	ena_com_abort_admin_commands(ena_dev);
3826
3827	ena_com_wait_for_abort_completion(ena_dev);
3828
3829	ena_com_admin_destroy(ena_dev);
3830
3831	ena_com_mmio_reg_read_request_destroy(ena_dev);
3832
3833	ena_free_pci_resources(adapter);
3834
3835	mtx_destroy(&adapter->global_mtx);
3836	sx_destroy(&adapter->ioctl_sx);
3837
3838	if (ena_dev->bus != NULL)
3839		free(ena_dev->bus, M_DEVBUF);
3840
3841	if (ena_dev != NULL)
3842		free(ena_dev, M_DEVBUF);
3843
3844	return (bus_generic_detach(pdev));
3845}
3846
3847/******************************************************************************
3848 ******************************** AENQ Handlers *******************************
3849 *****************************************************************************/
3850/**
3851 * ena_update_on_link_change:
3852 * Notify the network interface about the change in link status
3853 **/
3854static void
3855ena_update_on_link_change(void *adapter_data,
3856    struct ena_admin_aenq_entry *aenq_e)
3857{
3858	struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
3859	struct ena_admin_aenq_link_change_desc *aenq_desc;
3860	int status;
3861	if_t ifp;
3862
3863	aenq_desc = (struct ena_admin_aenq_link_change_desc *)aenq_e;
3864	ifp = adapter->ifp;
3865	status = aenq_desc->flags &
3866	    ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK;
3867
3868	if (status != 0) {
3869		device_printf(adapter->pdev, "link is UP\n");
3870		if_link_state_change(ifp, LINK_STATE_UP);
3871	} else if (status == 0) {
3872		device_printf(adapter->pdev, "link is DOWN\n");
3873		if_link_state_change(ifp, LINK_STATE_DOWN);
3874	} else {
3875		device_printf(adapter->pdev, "invalid value recvd\n");
3876		BUG();
3877	}
3878
3879	adapter->link_status = status;
3880}
3881
3882/**
3883 * This handler will called for unknown event group or unimplemented handlers
3884 **/
3885static void
3886unimplemented_aenq_handler(void *data,
3887    struct ena_admin_aenq_entry *aenq_e)
3888{
3889	return;
3890}
3891
3892static struct ena_aenq_handlers aenq_handlers = {
3893    .handlers = {
3894	    [ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change,
3895	    [ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd,
3896    },
3897    .unimplemented_handler = unimplemented_aenq_handler
3898};
3899
3900/*********************************************************************
3901 *  FreeBSD Device Interface Entry Points
3902 *********************************************************************/
3903
3904static device_method_t ena_methods[] = {
3905    /* Device interface */
3906    DEVMETHOD(device_probe, ena_probe),
3907    DEVMETHOD(device_attach, ena_attach),
3908    DEVMETHOD(device_detach, ena_detach),
3909    DEVMETHOD_END
3910};
3911
3912static driver_t ena_driver = {
3913    "ena", ena_methods, sizeof(struct ena_adapter),
3914};
3915
3916devclass_t ena_devclass;
3917DRIVER_MODULE(ena, pci, ena_driver, ena_devclass, 0, 0);
3918MODULE_DEPEND(ena, pci, 1, 1, 1);
3919MODULE_DEPEND(ena, ether, 1, 1, 1);
3920
3921/*********************************************************************/
3922