ena.c revision 320731
1/*- 2 * BSD LICENSE 3 * 4 * Copyright (c) 2015-2017 Amazon.com, Inc. or its affiliates. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 19 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 20 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 21 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 22 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 23 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 24 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 28 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 */ 30#include <sys/cdefs.h> 31__FBSDID("$FreeBSD: stable/11/sys/dev/ena/ena.c 320731 2017-07-06 11:45:13Z zbb $"); 32 33#include <sys/param.h> 34#include <sys/systm.h> 35#include <sys/bus.h> 36#include <sys/endian.h> 37#include <sys/kernel.h> 38#include <sys/kthread.h> 39#include <sys/malloc.h> 40#include <sys/mbuf.h> 41#include <sys/module.h> 42#include <sys/rman.h> 43#include <sys/smp.h> 44#include <sys/socket.h> 45#include <sys/sockio.h> 46#include <sys/sysctl.h> 47#include <sys/taskqueue.h> 48#include <sys/time.h> 49#include <sys/eventhandler.h> 50 51#include <machine/bus.h> 52#include <machine/resource.h> 53#include <machine/in_cksum.h> 54 55#include <net/bpf.h> 56#include <net/ethernet.h> 57#include <net/if.h> 58#include <net/if_var.h> 59#include <net/if_arp.h> 60#include <net/if_dl.h> 61#include <net/if_media.h> 62#include <net/rss_config.h> 63#include <net/if_types.h> 64#include <net/if_vlan_var.h> 65 66#include <netinet/in_rss.h> 67#include <netinet/in_systm.h> 68#include <netinet/in.h> 69#include <netinet/if_ether.h> 70#include <netinet/ip.h> 71#include <netinet/ip6.h> 72#include <netinet/tcp.h> 73#include <netinet/udp.h> 74 75#include <dev/pci/pcivar.h> 76#include <dev/pci/pcireg.h> 77 78#include "ena.h" 79#include "ena_sysctl.h" 80 81/********************************************************* 82 * Function prototypes 83 *********************************************************/ 84static int ena_probe(device_t); 85static void ena_intr_msix_mgmnt(void *); 86static int ena_allocate_pci_resources(struct ena_adapter*); 87static void ena_free_pci_resources(struct ena_adapter *); 88static int ena_change_mtu(if_t, int); 89static inline void ena_alloc_counters(counter_u64_t *, int); 90static inline void ena_free_counters(counter_u64_t *, int); 91static inline void ena_reset_counters(counter_u64_t *, int); 92static void ena_init_io_rings_common(struct ena_adapter *, 93 struct ena_ring *, uint16_t); 94static int ena_init_io_rings(struct ena_adapter *); 95static void ena_free_io_ring_resources(struct ena_adapter *, unsigned int); 96static void ena_free_all_io_rings_resources(struct ena_adapter *); 97static int ena_setup_tx_dma_tag(struct ena_adapter *); 98static int ena_free_tx_dma_tag(struct ena_adapter *); 99static int ena_setup_rx_dma_tag(struct ena_adapter *); 100static int ena_free_rx_dma_tag(struct ena_adapter *); 101static int ena_setup_tx_resources(struct ena_adapter *, int); 102static void ena_free_tx_resources(struct ena_adapter *, int); 103static int ena_setup_all_tx_resources(struct ena_adapter *); 104static void ena_free_all_tx_resources(struct ena_adapter *); 105static int ena_setup_rx_resources(struct ena_adapter *, unsigned int); 106static void ena_free_rx_resources(struct ena_adapter *, unsigned int); 107static int ena_setup_all_rx_resources(struct ena_adapter *); 108static void ena_free_all_rx_resources(struct ena_adapter *); 109static inline int ena_alloc_rx_mbuf(struct ena_adapter *, struct ena_ring *, 110 struct ena_rx_buffer *); 111static void ena_free_rx_mbuf(struct ena_adapter *, struct ena_ring *, 112 struct ena_rx_buffer *); 113static int ena_refill_rx_bufs(struct ena_ring *, uint32_t); 114static void ena_free_rx_bufs(struct ena_adapter *, unsigned int); 115static void ena_refill_all_rx_bufs(struct ena_adapter *); 116static void ena_free_all_rx_bufs(struct ena_adapter *); 117static void ena_free_tx_bufs(struct ena_adapter *, unsigned int); 118static void ena_free_all_tx_bufs(struct ena_adapter *); 119static void ena_destroy_all_tx_queues(struct ena_adapter *); 120static void ena_destroy_all_rx_queues(struct ena_adapter *); 121static void ena_destroy_all_io_queues(struct ena_adapter *); 122static int ena_create_io_queues(struct ena_adapter *); 123static int ena_tx_cleanup(struct ena_ring *); 124static int ena_rx_cleanup(struct ena_ring *); 125static int validate_tx_req_id(struct ena_ring *, uint16_t); 126static void ena_rx_hash_mbuf(struct ena_ring *, struct ena_com_rx_ctx *, 127 struct mbuf *); 128static struct mbuf* ena_rx_mbuf(struct ena_ring *, struct ena_com_rx_buf_info *, 129 struct ena_com_rx_ctx *, uint16_t *); 130static inline void ena_rx_checksum(struct ena_ring *, struct ena_com_rx_ctx *, 131 struct mbuf *); 132static void ena_handle_msix(void *); 133static int ena_enable_msix(struct ena_adapter *); 134static void ena_setup_mgmnt_intr(struct ena_adapter *); 135static void ena_setup_io_intr(struct ena_adapter *); 136static int ena_request_mgmnt_irq(struct ena_adapter *); 137static int ena_request_io_irq(struct ena_adapter *); 138static void ena_free_mgmnt_irq(struct ena_adapter *); 139static void ena_free_io_irq(struct ena_adapter *); 140static void ena_free_irqs(struct ena_adapter*); 141static void ena_disable_msix(struct ena_adapter *); 142static void ena_unmask_all_io_irqs(struct ena_adapter *); 143static int ena_rss_configure(struct ena_adapter *); 144static int ena_up_complete(struct ena_adapter *); 145static int ena_up(struct ena_adapter *); 146static void ena_down(struct ena_adapter *); 147static uint64_t ena_get_counter(if_t, ift_counter); 148static int ena_media_change(if_t); 149static void ena_media_status(if_t, struct ifmediareq *); 150static void ena_init(void *); 151static int ena_ioctl(if_t, u_long, caddr_t); 152static int ena_get_dev_offloads(struct ena_com_dev_get_features_ctx *); 153static void ena_update_host_info(struct ena_admin_host_info *, if_t); 154static void ena_update_hwassist(struct ena_adapter *); 155static int ena_setup_ifnet(device_t, struct ena_adapter *, 156 struct ena_com_dev_get_features_ctx *); 157static void ena_tx_csum(struct ena_com_tx_ctx *, struct mbuf *); 158static int ena_check_and_collapse_mbuf(struct ena_ring *tx_ring, 159 struct mbuf **mbuf); 160static int ena_xmit_mbuf(struct ena_ring *, struct mbuf **); 161static void ena_start_xmit(struct ena_ring *); 162static int ena_mq_start(if_t, struct mbuf *); 163static void ena_deferred_mq_start(void *, int); 164static void ena_qflush(if_t); 165static int ena_calc_io_queue_num(struct ena_adapter *, 166 struct ena_com_dev_get_features_ctx *); 167static int ena_calc_queue_size(struct ena_adapter *, uint16_t *, 168 uint16_t *, struct ena_com_dev_get_features_ctx *); 169static int ena_rss_init_default(struct ena_adapter *); 170static void ena_rss_init_default_deferred(void *); 171static void ena_config_host_info(struct ena_com_dev *); 172static int ena_attach(device_t); 173static int ena_detach(device_t); 174static int ena_device_init(struct ena_adapter *, device_t, 175 struct ena_com_dev_get_features_ctx *, int *); 176static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *, 177 int); 178static void ena_update_on_link_change(void *, struct ena_admin_aenq_entry *); 179static void unimplemented_aenq_handler(void *, 180 struct ena_admin_aenq_entry *); 181static void ena_timer_service(void *); 182 183static char ena_version[] = DEVICE_NAME DRV_MODULE_NAME " v" DRV_MODULE_VERSION; 184 185static SYSCTL_NODE(_hw, OID_AUTO, ena, CTLFLAG_RD, 0, "ENA driver parameters"); 186 187/* 188 * Tuneable number of buffers in the buf-ring (drbr) 189 */ 190static int ena_buf_ring_size = 4096; 191SYSCTL_INT(_hw_ena, OID_AUTO, buf_ring_size, CTLFLAG_RWTUN, 192 &ena_buf_ring_size, 0, "Size of the bufring"); 193 194 195static ena_vendor_info_t ena_vendor_info_array[] = { 196 { PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_PF, 0}, 197 { PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_LLQ_PF, 0}, 198 { PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_VF, 0}, 199 { PCI_VENDOR_ID_AMAZON, PCI_DEV_ID_ENA_LLQ_VF, 0}, 200 /* Last entry */ 201 { 0, 0, 0 } 202}; 203 204/* 205 * Contains pointers to event handlers, e.g. link state chage. 206 */ 207static struct ena_aenq_handlers aenq_handlers; 208 209void 210ena_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nseg, int error) 211{ 212 if (error) 213 return; 214 *(bus_addr_t *) arg = segs[0].ds_addr; 215 return; 216} 217 218int 219ena_dma_alloc(device_t dmadev, bus_size_t size, 220 ena_mem_handle_t *dma , int mapflags) 221{ 222 struct ena_adapter* adapter = device_get_softc(dmadev); 223 uint32_t maxsize = ((size - 1)/PAGE_SIZE + 1) * PAGE_SIZE; 224 uint64_t dma_space_addr = ENA_DMA_BIT_MASK(adapter->dma_width); 225 int error; 226 227 if (dma_space_addr == 0) 228 dma_space_addr = BUS_SPACE_MAXADDR; 229 error = bus_dma_tag_create(bus_get_dma_tag(dmadev), /* parent */ 230 8, 0, /* alignment, bounds */ 231 dma_space_addr, /* lowaddr of exclusion window */ 232 BUS_SPACE_MAXADDR,/* highaddr of exclusion window */ 233 NULL, NULL, /* filter, filterarg */ 234 maxsize, /* maxsize */ 235 1, /* nsegments */ 236 maxsize, /* maxsegsize */ 237 BUS_DMA_ALLOCNOW, /* flags */ 238 NULL, /* lockfunc */ 239 NULL, /* lockarg */ 240 &dma->tag); 241 if (error) { 242 device_printf(dmadev, 243 "%s: bus_dma_tag_create failed: %d\n", 244 __func__, error); 245 goto fail_tag; 246 } 247 248 error = bus_dmamem_alloc(dma->tag, (void**) &dma->vaddr, 249 BUS_DMA_COHERENT | BUS_DMA_ZERO, &dma->map); 250 if (error) { 251 device_printf(dmadev, 252 "%s: bus_dmamem_alloc(%ju) failed: %d\n", 253 __func__, (uintmax_t)size, error); 254 goto fail_map_create; 255 } 256 257 dma->paddr = 0; 258 error = bus_dmamap_load(dma->tag, dma->map, dma->vaddr, 259 size, ena_dmamap_callback, &dma->paddr, mapflags); 260 if (error || dma->paddr == 0) { 261 device_printf(dmadev, 262 "%s: bus_dmamap_load failed: %d\n", 263 __func__, error); 264 goto fail_map_load; 265 } 266 267 return (0); 268 269fail_map_load: 270 bus_dmamap_unload(dma->tag, dma->map); 271fail_map_create: 272 bus_dmamem_free(dma->tag, dma->vaddr, dma->map); 273 bus_dma_tag_destroy(dma->tag); 274fail_tag: 275 dma->tag = NULL; 276 277 return (error); 278} 279 280static int 281ena_allocate_pci_resources(struct ena_adapter* adapter) 282{ 283 device_t pdev = adapter->pdev; 284 int rid; 285 286 rid = PCIR_BAR(ENA_REG_BAR); 287 adapter->memory = NULL; 288 adapter->registers = bus_alloc_resource_any(pdev, SYS_RES_MEMORY, 289 &rid, RF_ACTIVE); 290 if (adapter->registers == NULL) { 291 device_printf(pdev, "Unable to allocate bus resource: " 292 "registers\n"); 293 return (ENXIO); 294 } 295 296 return (0); 297} 298 299static void 300ena_free_pci_resources(struct ena_adapter *adapter) 301{ 302 device_t pdev = adapter->pdev; 303 304 if (adapter->memory != NULL) { 305 bus_release_resource(pdev, SYS_RES_MEMORY, 306 PCIR_BAR(ENA_MEM_BAR), adapter->memory); 307 } 308 309 if (adapter->registers != NULL) { 310 bus_release_resource(pdev, SYS_RES_MEMORY, 311 PCIR_BAR(ENA_REG_BAR), adapter->registers); 312 } 313 314 return; 315} 316 317static int 318ena_probe(device_t dev) 319{ 320 ena_vendor_info_t *ent; 321 char adapter_name[60]; 322 uint16_t pci_vendor_id = 0; 323 uint16_t pci_device_id = 0; 324 325 pci_vendor_id = pci_get_vendor(dev); 326 pci_device_id = pci_get_device(dev); 327 328 ent = ena_vendor_info_array; 329 while (ent->vendor_id != 0) { 330 if ((pci_vendor_id == ent->vendor_id) && 331 (pci_device_id == ent->device_id)) { 332 ena_trace(ENA_DBG, "vendor=%x device=%x ", 333 pci_vendor_id, pci_device_id); 334 335 sprintf(adapter_name, DEVICE_DESC); 336 device_set_desc_copy(dev, adapter_name); 337 return (BUS_PROBE_DEFAULT); 338 } 339 340 ent++; 341 342 } 343 344 return (ENXIO); 345} 346 347static int 348ena_change_mtu(if_t ifp, int new_mtu) 349{ 350 struct ena_adapter *adapter = if_getsoftc(ifp); 351 struct ena_com_dev_get_features_ctx get_feat_ctx; 352 int rc, old_mtu, max_frame; 353 354 rc = ena_com_get_dev_attr_feat(adapter->ena_dev, &get_feat_ctx); 355 if (rc) { 356 device_printf(adapter->pdev, 357 "Cannot get attribute for ena device\n"); 358 return (ENXIO); 359 } 360 361 /* Save old MTU in case of fail */ 362 old_mtu = if_getmtu(ifp); 363 364 /* Change MTU and calculate max frame */ 365 if_setmtu(ifp, new_mtu); 366 max_frame = ETHER_MAX_FRAME(ifp, ETHERTYPE_VLAN, 1); 367 368 if ((new_mtu < ENA_MIN_FRAME_LEN) || 369 (new_mtu > get_feat_ctx.dev_attr.max_mtu) || 370 (max_frame > ENA_MAX_FRAME_LEN)) { 371 device_printf(adapter->pdev, "Invalid MTU setting. " 372 "new_mtu: %d\n", new_mtu); 373 goto error; 374 } 375 376 rc = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu); 377 if (rc != 0) 378 goto error; 379 380 return (0); 381error: 382 if_setmtu(ifp, old_mtu); 383 return (EINVAL); 384} 385 386static inline void 387ena_alloc_counters(counter_u64_t *begin, int size) 388{ 389 counter_u64_t *end = (counter_u64_t *)((char *)begin + size); 390 391 for (; begin < end; ++begin) 392 *begin = counter_u64_alloc(M_WAITOK); 393} 394 395static inline void 396ena_free_counters(counter_u64_t *begin, int size) 397{ 398 counter_u64_t *end = (counter_u64_t *)((char *)begin + size); 399 400 for (; begin < end; ++begin) 401 counter_u64_free(*begin); 402} 403 404static inline void 405ena_reset_counters(counter_u64_t *begin, int size) 406{ 407 counter_u64_t *end = (counter_u64_t *)((char *)begin + size); 408 409 for (; begin < end; ++begin) 410 counter_u64_zero(*begin); 411} 412 413static void 414ena_init_io_rings_common(struct ena_adapter *adapter, struct ena_ring *ring, 415 uint16_t qid) 416{ 417 418 ring->qid = qid; 419 ring->adapter = adapter; 420 ring->ena_dev = adapter->ena_dev; 421} 422 423static int 424ena_init_io_rings(struct ena_adapter *adapter) 425{ 426 struct ena_com_dev *ena_dev; 427 struct ena_ring *txr, *rxr; 428 struct ena_que *que; 429 int i; 430 int rc; 431 432 ena_dev = adapter->ena_dev; 433 434 for (i = 0; i < adapter->num_queues; i++) { 435 txr = &adapter->tx_ring[i]; 436 rxr = &adapter->rx_ring[i]; 437 438 /* TX/RX common ring state */ 439 ena_init_io_rings_common(adapter, txr, i); 440 ena_init_io_rings_common(adapter, rxr, i); 441 442 /* TX specific ring state */ 443 txr->ring_size = adapter->tx_ring_size; 444 txr->tx_max_header_size = ena_dev->tx_max_header_size; 445 txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type; 446 txr->smoothed_interval = 447 ena_com_get_nonadaptive_moderation_interval_tx(ena_dev); 448 449 /* Allocate a buf ring */ 450 txr->br = buf_ring_alloc(ena_buf_ring_size, M_DEVBUF, 451 M_WAITOK, &txr->ring_mtx); 452 if (txr->br == NULL) { 453 device_printf(adapter->pdev, 454 "Error while setting up bufring\n"); 455 rc = ENOMEM; 456 goto err_bufr_free; 457 } 458 459 /* Alloc TX statistics. */ 460 ena_alloc_counters((counter_u64_t *)&txr->tx_stats, 461 sizeof(txr->tx_stats)); 462 463 /* RX specific ring state */ 464 rxr->ring_size = adapter->rx_ring_size; 465 rxr->rx_small_copy_len = adapter->small_copy_len; 466 rxr->smoothed_interval = 467 ena_com_get_nonadaptive_moderation_interval_rx(ena_dev); 468 469 /* Alloc RX statistics. */ 470 ena_alloc_counters((counter_u64_t *)&rxr->rx_stats, 471 sizeof(rxr->rx_stats)); 472 473 /* Initialize locks */ 474 snprintf(txr->mtx_name, nitems(txr->mtx_name), "%s:tx(%d)", 475 device_get_nameunit(adapter->pdev), i); 476 snprintf(rxr->mtx_name, nitems(rxr->mtx_name), "%s:rx(%d)", 477 device_get_nameunit(adapter->pdev), i); 478 479 mtx_init(&txr->ring_mtx, txr->mtx_name, NULL, MTX_DEF); 480 481 que = &adapter->que[i]; 482 que->adapter = adapter; 483 que->id = i; 484 que->tx_ring = txr; 485 que->rx_ring = rxr; 486 487 txr->que = que; 488 rxr->que = que; 489 } 490 491 return 0; 492 493err_bufr_free: 494 while (i--) 495 ena_free_io_ring_resources(adapter, i); 496 497 return (rc); 498} 499 500static void 501ena_free_io_ring_resources(struct ena_adapter *adapter, unsigned int qid) 502{ 503 struct ena_ring *txr = &adapter->tx_ring[qid]; 504 struct ena_ring *rxr = &adapter->rx_ring[qid]; 505 506 ena_free_counters((counter_u64_t *)&txr->tx_stats, 507 sizeof(txr->tx_stats)); 508 ena_free_counters((counter_u64_t *)&rxr->rx_stats, 509 sizeof(rxr->rx_stats)); 510 511 mtx_destroy(&txr->ring_mtx); 512 513 drbr_free(txr->br, M_DEVBUF); 514 515} 516 517static void 518ena_free_all_io_rings_resources(struct ena_adapter *adapter) 519{ 520 int i; 521 522 for (i = 0; i < adapter->num_queues; i++) 523 ena_free_io_ring_resources(adapter, i); 524 525} 526 527static int 528ena_setup_tx_dma_tag(struct ena_adapter *adapter) 529{ 530 int ret; 531 532 /* Create DMA tag for Tx buffers */ 533 ret = bus_dma_tag_create(bus_get_dma_tag(adapter->pdev), 534 1, 0, /* alignment, bounds */ 535 ENA_DMA_BIT_MASK(adapter->dma_width), /* lowaddr of excl window */ 536 BUS_SPACE_MAXADDR, /* highaddr of excl window */ 537 NULL, NULL, /* filter, filterarg */ 538 ENA_TSO_MAXSIZE, /* maxsize */ 539 adapter->max_tx_sgl_size - 1, /* nsegments */ 540 ENA_TSO_MAXSIZE, /* maxsegsize */ 541 0, /* flags */ 542 NULL, /* lockfunc */ 543 NULL, /* lockfuncarg */ 544 &adapter->tx_buf_tag); 545 546 if (ret != 0) 547 device_printf(adapter->pdev, "Unable to create Tx DMA tag\n"); 548 549 return (ret); 550} 551 552static int 553ena_free_tx_dma_tag(struct ena_adapter *adapter) 554{ 555 int ret; 556 557 ret = bus_dma_tag_destroy(adapter->tx_buf_tag); 558 559 if (ret == 0) 560 adapter->tx_buf_tag = NULL; 561 562 return (ret); 563} 564 565static int 566ena_setup_rx_dma_tag(struct ena_adapter *adapter) 567{ 568 int ret; 569 570 /* Create DMA tag for Rx buffers*/ 571 ret = bus_dma_tag_create(bus_get_dma_tag(adapter->pdev), /* parent */ 572 1, 0, /* alignment, bounds */ 573 ENA_DMA_BIT_MASK(adapter->dma_width), /* lowaddr of excl window */ 574 BUS_SPACE_MAXADDR, /* highaddr of excl window */ 575 NULL, NULL, /* filter, filterarg */ 576 MJUM16BYTES, /* maxsize */ 577 1, /* nsegments */ 578 MJUM16BYTES, /* maxsegsize */ 579 0, /* flags */ 580 NULL, /* lockfunc */ 581 NULL, /* lockarg */ 582 &adapter->rx_buf_tag); 583 584 if (ret != 0) 585 device_printf(adapter->pdev, "Unable to create Rx DMA tag\n"); 586 587 return (ret); 588} 589 590static int 591ena_free_rx_dma_tag(struct ena_adapter *adapter) 592{ 593 int ret; 594 595 ret = bus_dma_tag_destroy(adapter->rx_buf_tag); 596 597 if (ret == 0) 598 adapter->rx_buf_tag = NULL; 599 600 return (ret); 601} 602 603 604/** 605 * ena_setup_tx_resources - allocate Tx resources (Descriptors) 606 * @adapter: network interface device structure 607 * @qid: queue index 608 * 609 * Returns 0 on success, otherwise on failure. 610 **/ 611static int 612ena_setup_tx_resources(struct ena_adapter *adapter, int qid) 613{ 614 struct ena_que *que = &adapter->que[qid]; 615 struct ena_ring *tx_ring = que->tx_ring; 616 int size, i, err; 617#ifdef RSS 618 cpuset_t cpu_mask; 619#endif 620 621 size = sizeof(struct ena_tx_buffer) * tx_ring->ring_size; 622 623 tx_ring->tx_buffer_info = malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO); 624 if (!tx_ring->tx_buffer_info) 625 goto err_tx_buffer_info; 626 627 size = sizeof(uint16_t) * tx_ring->ring_size; 628 tx_ring->free_tx_ids = malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO); 629 if (!tx_ring->free_tx_ids) 630 goto err_tx_reqs; 631 632 /* Req id stack for TX OOO completions */ 633 for (i = 0; i < tx_ring->ring_size; i++) 634 tx_ring->free_tx_ids[i] = i; 635 636 /* Reset TX statistics. */ 637 ena_reset_counters((counter_u64_t *)&tx_ring->tx_stats, 638 sizeof(tx_ring->tx_stats)); 639 640 tx_ring->next_to_use = 0; 641 tx_ring->next_to_clean = 0; 642 643 /* Make sure that drbr is empty */ 644 ENA_RING_MTX_LOCK(tx_ring); 645 drbr_flush(adapter->ifp, tx_ring->br); 646 ENA_RING_MTX_UNLOCK(tx_ring); 647 648 /* ... and create the buffer DMA maps */ 649 for (i = 0; i < tx_ring->ring_size; i++) { 650 err = bus_dmamap_create(adapter->tx_buf_tag, 0, 651 &tx_ring->tx_buffer_info[i].map); 652 if (err != 0) { 653 device_printf(adapter->pdev, 654 "Unable to create Tx DMA map for buffer %d\n", i); 655 goto err_tx_map; 656 } 657 } 658 659 /* Allocate taskqueues */ 660 TASK_INIT(&tx_ring->enqueue_task, 0, ena_deferred_mq_start, tx_ring); 661 tx_ring->enqueue_tq = taskqueue_create_fast("ena_tx_enque", M_NOWAIT, 662 taskqueue_thread_enqueue, &tx_ring->enqueue_tq); 663 if (tx_ring->enqueue_tq == NULL) { 664 device_printf(adapter->pdev, 665 "Unable to create taskqueue for enqueue task\n"); 666 i = tx_ring->ring_size; 667 goto err_tx_map; 668 } 669 670 /* RSS set cpu for thread */ 671#ifdef RSS 672 CPU_SETOF(que->cpu, &cpu_mask); 673 taskqueue_start_threads_cpuset(&tx_ring->enqueue_tq, 1, PI_NET, 674 &cpu_mask, "%s tx_ring enq (bucket %d)", 675 device_get_nameunit(adapter->pdev), que->cpu); 676#else /* RSS */ 677 taskqueue_start_threads(&tx_ring->enqueue_tq, 1, PI_NET, 678 "%s txeq %d", device_get_nameunit(adapter->pdev), que->cpu); 679#endif /* RSS */ 680 681 return (0); 682 683err_tx_map: 684 while (i--) { 685 bus_dmamap_destroy(adapter->tx_buf_tag, 686 tx_ring->tx_buffer_info[i].map); 687 } 688 ENA_MEM_FREE(adapter->ena_dev->dmadev, tx_ring->free_tx_ids); 689err_tx_reqs: 690 ENA_MEM_FREE(adapter->ena_dev->dmadev, tx_ring->tx_buffer_info); 691err_tx_buffer_info: 692 return (ENOMEM); 693} 694 695/** 696 * ena_free_tx_resources - Free Tx Resources per Queue 697 * @adapter: network interface device structure 698 * @qid: queue index 699 * 700 * Free all transmit software resources 701 **/ 702static void 703ena_free_tx_resources(struct ena_adapter *adapter, int qid) 704{ 705 struct ena_ring *tx_ring = &adapter->tx_ring[qid]; 706 707 while (taskqueue_cancel(tx_ring->enqueue_tq, &tx_ring->enqueue_task, 708 NULL)) 709 taskqueue_drain(tx_ring->enqueue_tq, &tx_ring->enqueue_task); 710 711 taskqueue_free(tx_ring->enqueue_tq); 712 713 ENA_RING_MTX_LOCK(tx_ring); 714 /* Flush buffer ring, */ 715 drbr_flush(adapter->ifp, tx_ring->br); 716 717 /* Free buffer DMA maps, */ 718 for (int i = 0; i < tx_ring->ring_size; i++) { 719 m_freem(tx_ring->tx_buffer_info[i].mbuf); 720 tx_ring->tx_buffer_info[i].mbuf = NULL; 721 bus_dmamap_unload(adapter->tx_buf_tag, 722 tx_ring->tx_buffer_info[i].map); 723 bus_dmamap_destroy(adapter->tx_buf_tag, 724 tx_ring->tx_buffer_info[i].map); 725 } 726 ENA_RING_MTX_UNLOCK(tx_ring); 727 728 /* And free allocated memory. */ 729 ENA_MEM_FREE(adapter->ena_dev->dmadev, tx_ring->tx_buffer_info); 730 tx_ring->tx_buffer_info = NULL; 731 732 ENA_MEM_FREE(adapter->ena_dev->dmadev, tx_ring->free_tx_ids); 733 tx_ring->free_tx_ids = NULL; 734} 735 736/** 737 * ena_setup_all_tx_resources - allocate all queues Tx resources 738 * @adapter: network interface device structure 739 * 740 * Returns 0 on success, otherwise on failure. 741 **/ 742static int 743ena_setup_all_tx_resources(struct ena_adapter *adapter) 744{ 745 int i, rc; 746 747 for (i = 0; i < adapter->num_queues; i++) { 748 rc = ena_setup_tx_resources(adapter, i); 749 if (!rc) 750 continue; 751 752 device_printf(adapter->pdev, 753 "Allocation for Tx Queue %u failed\n", i); 754 goto err_setup_tx; 755 } 756 757 return (0); 758 759err_setup_tx: 760 /* Rewind the index freeing the rings as we go */ 761 while (i--) 762 ena_free_tx_resources(adapter, i); 763 return (rc); 764} 765 766/** 767 * ena_free_all_tx_resources - Free Tx Resources for All Queues 768 * @adapter: network interface device structure 769 * 770 * Free all transmit software resources 771 **/ 772static void 773ena_free_all_tx_resources(struct ena_adapter *adapter) 774{ 775 int i; 776 777 for (i = 0; i < adapter->num_queues; i++) 778 ena_free_tx_resources(adapter, i); 779 780 return; 781} 782 783/** 784 * ena_setup_rx_resources - allocate Rx resources (Descriptors) 785 * @adapter: network interface device structure 786 * @qid: queue index 787 * 788 * Returns 0 on success, otherwise on failure. 789 **/ 790static int 791ena_setup_rx_resources(struct ena_adapter *adapter, unsigned int qid) 792{ 793 struct ena_que *que = &adapter->que[qid]; 794 struct ena_ring *rx_ring = que->rx_ring; 795 int size, err, i; 796#ifdef RSS 797 cpuset_t cpu_mask; 798#endif 799 800 size = sizeof(struct ena_rx_buffer) * rx_ring->ring_size; 801 802 /* 803 * Alloc extra element so in rx path 804 * we can always prefetch rx_info + 1 805 */ 806 size += sizeof(struct ena_rx_buffer); 807 808 rx_ring->rx_buffer_info = ENA_MEM_ALLOC(adapter->ena_dev->dmadev, size); 809 if (!rx_ring->rx_buffer_info) 810 return (ENOMEM); 811 812 /* Reset RX statistics. */ 813 ena_reset_counters((counter_u64_t *)&rx_ring->rx_stats, 814 sizeof(rx_ring->rx_stats)); 815 816 rx_ring->next_to_clean = 0; 817 rx_ring->next_to_use = 0; 818 819 /* ... and create the buffer DMA maps */ 820 for (i = 0; i < rx_ring->ring_size; i++) { 821 err = bus_dmamap_create(adapter->rx_buf_tag, 0, 822 &(rx_ring->rx_buffer_info[i].map)); 823 if (err != 0) { 824 device_printf(adapter->pdev, 825 "Unable to create Rx DMA map for buffer %d\n", i); 826 goto err_rx_dma; 827 } 828 } 829 830 /* Create LRO for the ring */ 831 if (adapter->ifp->if_capenable & IFCAP_LRO) { 832 int err = tcp_lro_init(&rx_ring->lro); 833 if (err) { 834 device_printf(adapter->pdev, 835 "LRO[%d] Initialization failed!\n", qid); 836 } else { 837 ena_trace(ENA_INFO, 838 "RX Soft LRO[%d] Initialized\n", qid); 839 rx_ring->lro.ifp = adapter->ifp; 840 } 841 } 842 843 return (0); 844 845err_rx_dma: 846 while (i--) { 847 bus_dmamap_destroy(adapter->rx_buf_tag, 848 rx_ring->rx_buffer_info[i].map); 849 } 850 851 ENA_MEM_FREE(adapter->ena_dev->dmadev, rx_ring->rx_buffer_info); 852 rx_ring->rx_buffer_info = NULL; 853 ena_trace(ENA_ALERT, "RX resource allocation fail"); 854 return (ENOMEM); 855} 856 857/** 858 * ena_free_rx_resources - Free Rx Resources 859 * @adapter: network interface device structure 860 * @qid: queue index 861 * 862 * Free all receive software resources 863 **/ 864static void 865ena_free_rx_resources(struct ena_adapter *adapter, unsigned int qid) 866{ 867 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 868 869 ena_trace(ENA_INFO, "%s qid %d\n", __func__, qid); 870 871 /* Free buffer DMA maps, */ 872 for (int i = 0; i < rx_ring->ring_size; i++) { 873 m_freem(rx_ring->rx_buffer_info[i].mbuf); 874 rx_ring->rx_buffer_info[i].mbuf = NULL; 875 bus_dmamap_unload(adapter->rx_buf_tag, 876 rx_ring->rx_buffer_info[i].map); 877 bus_dmamap_destroy(adapter->rx_buf_tag, 878 rx_ring->rx_buffer_info[i].map); 879 } 880 881 /* free LRO resources, */ 882 tcp_lro_free(&rx_ring->lro); 883 884 /* free allocated memory */ 885 ENA_MEM_FREE(adapter->ena_dev->dmadev, rx_ring->rx_buffer_info); 886 rx_ring->rx_buffer_info = NULL; 887 888 return; 889} 890 891/** 892 * ena_setup_all_rx_resources - allocate all queues Rx resources 893 * @adapter: network interface device structure 894 * 895 * Returns 0 on success, otherwise on failure. 896 **/ 897static int 898ena_setup_all_rx_resources(struct ena_adapter *adapter) 899{ 900 int i, rc = 0; 901 902 for (i = 0; i < adapter->num_queues; i++) { 903 rc = ena_setup_rx_resources(adapter, i); 904 if (!rc) 905 continue; 906 907 device_printf(adapter->pdev, 908 "Allocation for Rx Queue %u failed\n", i); 909 goto err_setup_rx; 910 } 911 return (0); 912 913err_setup_rx: 914 /* rewind the index freeing the rings as we go */ 915 while (i--) 916 ena_free_rx_resources(adapter, i); 917 return (rc); 918} 919 920/** 921 * ena_free_all_rx_resources - Free Rx resources for all queues 922 * @adapter: network interface device structure 923 * 924 * Free all receive software resources 925 **/ 926static void 927ena_free_all_rx_resources(struct ena_adapter *adapter) 928{ 929 int i; 930 931 for (i = 0; i < adapter->num_queues; i++) 932 ena_free_rx_resources(adapter, i); 933 934 return; 935} 936 937static inline int 938ena_alloc_rx_mbuf(struct ena_adapter *adapter, 939 struct ena_ring *rx_ring, struct ena_rx_buffer *rx_info) 940{ 941 struct ena_com_buf *ena_buf; 942 bus_dma_segment_t segs[1]; 943 int nsegs, error; 944 945 /* if previous allocated frag is not used */ 946 if (rx_info->mbuf != NULL) 947 return (0); 948 949 /* Get mbuf using UMA allocator */ 950 rx_info->mbuf = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, MJUM16BYTES); 951 952 if (!rx_info->mbuf) { 953 counter_u64_add(rx_ring->rx_stats.mbuf_alloc_fail, 1); 954 return (ENOMEM); 955 } 956 /* Set mbuf length*/ 957 rx_info->mbuf->m_pkthdr.len = rx_info->mbuf->m_len = MJUM16BYTES; 958 959 /* Map packets for DMA */ 960 ena_trace(ENA_DBG | ENA_RSC | ENA_RXPTH, 961 "Using tag %p for buffers' DMA mapping, mbuf %p len: %d", 962 adapter->rx_buf_tag,rx_info->mbuf, rx_info->mbuf->m_len); 963 error = bus_dmamap_load_mbuf_sg(adapter->rx_buf_tag, rx_info->map, 964 rx_info->mbuf, segs, &nsegs, BUS_DMA_NOWAIT); 965 if (error || (nsegs != 1)) { 966 device_printf(adapter->pdev, "failed to map mbuf, error: %d, " 967 "nsegs: %d\n", error, nsegs); 968 counter_u64_add(rx_ring->rx_stats.dma_mapping_err, 1); 969 goto exit; 970 971 } 972 973 bus_dmamap_sync(adapter->rx_buf_tag, rx_info->map, BUS_DMASYNC_PREREAD); 974 975 ena_buf = &rx_info->ena_buf; 976 ena_buf->paddr = segs[0].ds_addr; 977 ena_buf->len = MJUM16BYTES; 978 979 ena_trace(ENA_DBG | ENA_RSC | ENA_RXPTH, 980 "ALLOC RX BUF: mbuf %p, rx_info %p, len %d, paddr %#jx\n", 981 rx_info->mbuf, rx_info,ena_buf->len, (uintmax_t)ena_buf->paddr); 982 983 return (0); 984 985exit: 986 m_freem(rx_info->mbuf); 987 rx_info->mbuf = NULL; 988 return (EFAULT); 989} 990 991static void 992ena_free_rx_mbuf(struct ena_adapter *adapter, struct ena_ring *rx_ring, 993 struct ena_rx_buffer *rx_info) 994{ 995 996 if (!rx_info->mbuf) 997 return; 998 999 bus_dmamap_unload(adapter->rx_buf_tag, rx_info->map); 1000 m_freem(rx_info->mbuf); 1001 rx_info->mbuf = NULL; 1002 1003 return; 1004} 1005 1006 1007/** 1008 * ena_refill_rx_bufs - Refills ring with descriptors 1009 * @rx_ring: the ring which we want to feed with free descriptors 1010 * @num: number of descriptors to refill 1011 * Refills the ring with newly allocated DMA-mapped mbufs for receiving 1012 **/ 1013static int 1014ena_refill_rx_bufs(struct ena_ring *rx_ring, uint32_t num) 1015{ 1016 struct ena_adapter *adapter = rx_ring->adapter; 1017 uint16_t next_to_use; 1018 uint32_t i; 1019 int rc; 1020 1021 ena_trace(ENA_DBG | ENA_RXPTH | ENA_RSC, "refill qid: %d", 1022 rx_ring->qid); 1023 1024 next_to_use = rx_ring->next_to_use; 1025 1026 for (i = 0; i < num; i++) { 1027 ena_trace(ENA_DBG | ENA_RXPTH | ENA_RSC, 1028 "RX buffer - next to use: %d", next_to_use); 1029 1030 struct ena_rx_buffer *rx_info = 1031 &rx_ring->rx_buffer_info[next_to_use]; 1032 1033 rc = ena_alloc_rx_mbuf(adapter, rx_ring, rx_info); 1034 if (rc < 0) { 1035 device_printf(adapter->pdev, 1036 "failed to alloc buffer for rx queue\n"); 1037 break; 1038 } 1039 rc = ena_com_add_single_rx_desc(rx_ring->ena_com_io_sq, 1040 &rx_info->ena_buf, next_to_use); 1041 if (unlikely(rc)) { 1042 device_printf(adapter->pdev, 1043 "failed to add buffer for rx queue %d\n", 1044 rx_ring->qid); 1045 break; 1046 } 1047 next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use, 1048 rx_ring->ring_size); 1049 } 1050 1051 if (i < num) { 1052 counter_u64_add(rx_ring->rx_stats.refil_partial, 1); 1053 device_printf(adapter->pdev, 1054 "refilled rx queue %d with %d pages only\n", 1055 rx_ring->qid, i); 1056 } 1057 1058 if (i != 0) { 1059 wmb(); 1060 ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq); 1061 } 1062 rx_ring->next_to_use = next_to_use; 1063 return (i); 1064} 1065 1066static void 1067ena_free_rx_bufs(struct ena_adapter *adapter, unsigned int qid) 1068{ 1069 struct ena_ring *rx_ring = &adapter->rx_ring[qid]; 1070 unsigned int i; 1071 1072 for (i = 0; i < rx_ring->ring_size; i++) { 1073 struct ena_rx_buffer *rx_info = &rx_ring->rx_buffer_info[i]; 1074 1075 if (rx_info->mbuf) 1076 ena_free_rx_mbuf(adapter, rx_ring, rx_info); 1077 } 1078 1079 return; 1080} 1081 1082/** 1083 * ena_refill_all_rx_bufs - allocate all queues Rx buffers 1084 * @adapter: network interface device structure 1085 * 1086 */ 1087static void 1088ena_refill_all_rx_bufs(struct ena_adapter *adapter) 1089{ 1090 struct ena_ring *rx_ring; 1091 int i, rc, bufs_num; 1092 1093 for (i = 0; i < adapter->num_queues; i++) { 1094 rx_ring = &adapter->rx_ring[i]; 1095 bufs_num = rx_ring->ring_size - 1; 1096 rc = ena_refill_rx_bufs(rx_ring, bufs_num); 1097 1098 if (unlikely(rc != bufs_num)) 1099 device_printf(adapter->pdev, 1100 "refilling Queue %d failed. allocated %d buffers" 1101 " from: %d\n", i, rc, bufs_num); 1102 } 1103} 1104 1105static void 1106ena_free_all_rx_bufs(struct ena_adapter *adapter) 1107{ 1108 int i; 1109 1110 for (i = 0; i < adapter->num_queues; i++) 1111 ena_free_rx_bufs(adapter, i); 1112 return; 1113} 1114 1115/** 1116 * ena_free_tx_bufs - Free Tx Buffers per Queue 1117 * @adapter: network interface device structure 1118 * @qid: queue index 1119 **/ 1120static void 1121ena_free_tx_bufs(struct ena_adapter *adapter, unsigned int qid) 1122{ 1123 struct ena_ring *tx_ring = &adapter->tx_ring[qid]; 1124 1125 ENA_RING_MTX_LOCK(tx_ring); 1126 for (int i = 0; i < tx_ring->ring_size; i++) { 1127 struct ena_tx_buffer *tx_info = &tx_ring->tx_buffer_info[i]; 1128 1129 if (tx_info->mbuf == NULL) 1130 continue; 1131 1132 ena_trace(ENA_DBG | ENA_TXPTH | ENA_RSC, 1133 "free uncompleted Tx mbufs qid[%d] idx: 0x%x", qid, i); 1134 1135 bus_dmamap_unload(adapter->tx_buf_tag, tx_info->map); 1136 m_free(tx_info->mbuf); 1137 tx_info->mbuf = NULL; 1138 } 1139 ENA_RING_MTX_UNLOCK(tx_ring); 1140 1141 return; 1142} 1143 1144static void 1145ena_free_all_tx_bufs(struct ena_adapter *adapter) 1146{ 1147 1148 for (int i = 0; i < adapter->num_queues; i++) 1149 ena_free_tx_bufs(adapter, i); 1150 1151 return; 1152} 1153 1154static void 1155ena_destroy_all_tx_queues(struct ena_adapter *adapter) 1156{ 1157 uint16_t ena_qid; 1158 int i; 1159 1160 for (i = 0; i < adapter->num_queues; i++) { 1161 ena_qid = ENA_IO_TXQ_IDX(i); 1162 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid); 1163 } 1164} 1165 1166static void 1167ena_destroy_all_rx_queues(struct ena_adapter *adapter) 1168{ 1169 uint16_t ena_qid; 1170 int i; 1171 1172 for (i = 0; i < adapter->num_queues; i++) { 1173 ena_qid = ENA_IO_RXQ_IDX(i); 1174 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid); 1175 } 1176} 1177 1178static void 1179ena_destroy_all_io_queues(struct ena_adapter *adapter) 1180{ 1181 ena_destroy_all_tx_queues(adapter); 1182 ena_destroy_all_rx_queues(adapter); 1183} 1184 1185static int 1186validate_tx_req_id(struct ena_ring *tx_ring, uint16_t req_id) 1187{ 1188 struct ena_tx_buffer *tx_info = NULL; 1189 1190 if (likely(req_id < tx_ring->ring_size)) { 1191 tx_info = &tx_ring->tx_buffer_info[req_id]; 1192 if (tx_info->mbuf) 1193 return 0; 1194 } 1195 1196 counter_u64_add(tx_ring->tx_stats.bad_req_id, 1); 1197 1198 return (EFAULT); 1199} 1200 1201static int 1202ena_create_io_queues(struct ena_adapter *adapter) 1203{ 1204 struct ena_com_dev *ena_dev = adapter->ena_dev; 1205 struct ena_com_create_io_ctx ctx; 1206 struct ena_ring *ring; 1207 uint16_t ena_qid; 1208 uint32_t msix_vector; 1209 int rc, i; 1210 1211 /* Create TX queues */ 1212 for (i = 0; i < adapter->num_queues; i++) { 1213 msix_vector = ENA_IO_IRQ_IDX(i); 1214 ena_qid = ENA_IO_TXQ_IDX(i); 1215 ctx.mem_queue_type = ena_dev->tx_mem_queue_type; 1216 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX; 1217 ctx.queue_size = adapter->tx_ring_size; 1218 ctx.msix_vector = msix_vector; 1219 ctx.qid = ena_qid; 1220 rc = ena_com_create_io_queue(ena_dev, &ctx); 1221 if (rc) { 1222 device_printf(adapter->pdev, 1223 "Failed to create io TX queue #%d rc: %d\n", i, rc); 1224 goto err_tx; 1225 } 1226 ring = &adapter->tx_ring[i]; 1227 rc = ena_com_get_io_handlers(ena_dev, ena_qid, 1228 &ring->ena_com_io_sq, 1229 &ring->ena_com_io_cq); 1230 if (rc) { 1231 device_printf(adapter->pdev, 1232 "Failed to get TX queue handlers. TX queue num" 1233 " %d rc: %d\n", i, rc); 1234 ena_com_destroy_io_queue(ena_dev, ena_qid); 1235 goto err_tx; 1236 } 1237 } 1238 1239 /* Create RX queues */ 1240 for (i = 0; i < adapter->num_queues; i++) { 1241 msix_vector = ENA_IO_IRQ_IDX(i); 1242 ena_qid = ENA_IO_RXQ_IDX(i); 1243 ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 1244 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX; 1245 ctx.queue_size = adapter->rx_ring_size; 1246 ctx.msix_vector = msix_vector; 1247 ctx.qid = ena_qid; 1248 rc = ena_com_create_io_queue(ena_dev, &ctx); 1249 if (rc) { 1250 device_printf(adapter->pdev, 1251 "Failed to create io RX queue[%d] rc: %d\n", i, rc); 1252 goto err_rx; 1253 } 1254 1255 ring = &adapter->rx_ring[i]; 1256 rc = ena_com_get_io_handlers(ena_dev, ena_qid, 1257 &ring->ena_com_io_sq, 1258 &ring->ena_com_io_cq); 1259 if (rc) { 1260 device_printf(adapter->pdev, 1261 "Failed to get RX queue handlers. RX queue num" 1262 " %d rc: %d\n", i, rc); 1263 ena_com_destroy_io_queue(ena_dev, ena_qid); 1264 goto err_rx; 1265 } 1266 } 1267 1268 return (0); 1269 1270err_rx: 1271 while (i--) 1272 ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i)); 1273 i = adapter->num_queues; 1274err_tx: 1275 while (i--) 1276 ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i)); 1277 1278 return (ENXIO); 1279} 1280 1281/** 1282 * ena_tx_cleanup - clear sent packets and corresponding descriptors 1283 * @tx_ring: ring for which we want to clean packets 1284 * 1285 * Once packets are sent, we ask the device in a loop for no longer used 1286 * descriptors. We find the related mbuf chain in a map (index in an array) 1287 * and free it, then update ring state. 1288 * This is performed in "endless" loop, updating ring pointers every 1289 * TX_COMMIT. The first check of free descriptor is performed before the actual 1290 * loop, then repeated at the loop end. 1291 **/ 1292static int 1293ena_tx_cleanup(struct ena_ring *tx_ring) 1294{ 1295 struct ena_adapter *adapter; 1296 struct ena_com_io_cq* io_cq; 1297 uint16_t next_to_clean; 1298 uint16_t req_id; 1299 uint16_t ena_qid; 1300 unsigned int total_done = 0; 1301 int rc; 1302 int commit = TX_COMMIT; 1303 int budget = TX_BUDGET; 1304 int work_done; 1305 1306 adapter = tx_ring->que->adapter; 1307 ena_qid = ENA_IO_TXQ_IDX(tx_ring->que->id); 1308 io_cq = &adapter->ena_dev->io_cq_queues[ena_qid]; 1309 next_to_clean = tx_ring->next_to_clean; 1310 1311 do { 1312 struct ena_tx_buffer *tx_info; 1313 struct mbuf *mbuf; 1314 1315 rc = ena_com_tx_comp_req_id_get(io_cq, &req_id); 1316 if (rc != 0) 1317 break; 1318 1319 rc = validate_tx_req_id(tx_ring, req_id); 1320 if (rc) 1321 break; 1322 1323 tx_info = &tx_ring->tx_buffer_info[req_id]; 1324 1325 mbuf = tx_info->mbuf; 1326 1327 tx_info->mbuf = NULL; 1328 bintime_clear(&tx_info->timestamp); 1329 1330 if (tx_info->num_of_bufs != 0) { 1331 /* Map is no longer required */ 1332 bus_dmamap_unload(adapter->tx_buf_tag, tx_info->map); 1333 } 1334 1335 m_freem(mbuf); 1336 1337 total_done += tx_info->tx_descs; 1338 1339 tx_ring->free_tx_ids[next_to_clean] = req_id; 1340 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean, 1341 tx_ring->ring_size); 1342 1343 if (--commit == 0) { 1344 commit = TX_COMMIT; 1345 /* update ring state every TX_COMMIT descriptor */ 1346 tx_ring->next_to_clean = next_to_clean; 1347 ena_com_comp_ack(&adapter->ena_dev->io_sq_queues[ena_qid], total_done); 1348 ena_com_update_dev_comp_head(io_cq); 1349 total_done = 0; 1350 } 1351 } while (--budget); 1352 1353 work_done = TX_BUDGET - budget; 1354 1355 /* If there is still something to commit update ring state */ 1356 if (commit != TX_COMMIT) { 1357 tx_ring->next_to_clean = next_to_clean; 1358 ena_com_comp_ack(&adapter->ena_dev->io_sq_queues[ena_qid], total_done); 1359 ena_com_update_dev_comp_head(io_cq); 1360 } 1361 1362 taskqueue_enqueue(tx_ring->enqueue_tq, &tx_ring->enqueue_task); 1363 1364 return (work_done); 1365} 1366 1367static void 1368ena_rx_hash_mbuf(struct ena_ring *rx_ring, struct ena_com_rx_ctx *ena_rx_ctx, 1369 struct mbuf *mbuf) 1370{ 1371 struct ena_adapter *adapter = rx_ring->adapter; 1372 1373 if (adapter->rss_support) { 1374 mbuf->m_pkthdr.flowid = ena_rx_ctx->hash; 1375 1376 if (ena_rx_ctx->frag && 1377 ena_rx_ctx->l3_proto != ENA_ETH_IO_L4_PROTO_UNKNOWN) { 1378 M_HASHTYPE_SET(mbuf, M_HASHTYPE_OPAQUE_HASH); 1379 return; 1380 } 1381 1382 switch (ena_rx_ctx->l3_proto) { 1383 case ENA_ETH_IO_L3_PROTO_IPV4: 1384 switch (ena_rx_ctx->l4_proto) { 1385 case ENA_ETH_IO_L4_PROTO_TCP: 1386 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_TCP_IPV4); 1387 break; 1388 case ENA_ETH_IO_L4_PROTO_UDP: 1389 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_UDP_IPV4); 1390 break; 1391 default: 1392 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_IPV4); 1393 } 1394 break; 1395 case ENA_ETH_IO_L3_PROTO_IPV6: 1396 switch (ena_rx_ctx->l4_proto) { 1397 case ENA_ETH_IO_L4_PROTO_TCP: 1398 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_TCP_IPV6); 1399 break; 1400 case ENA_ETH_IO_L4_PROTO_UDP: 1401 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_UDP_IPV6); 1402 break; 1403 default: 1404 M_HASHTYPE_SET(mbuf, M_HASHTYPE_RSS_IPV6); 1405 } 1406 break; 1407 case ENA_ETH_IO_L3_PROTO_UNKNOWN: 1408 M_HASHTYPE_SET(mbuf, M_HASHTYPE_NONE); 1409 break; 1410 default: 1411 M_HASHTYPE_SET(mbuf, M_HASHTYPE_OPAQUE_HASH); 1412 } 1413 } else { 1414 mbuf->m_pkthdr.flowid = rx_ring->qid; 1415 M_HASHTYPE_SET(mbuf, M_HASHTYPE_NONE); 1416 } 1417} 1418 1419/** 1420 * ena_rx_mbuf - assemble mbuf from descriptors 1421 * @rx_ring: ring for which we want to clean packets 1422 * @ena_bufs: buffer info 1423 * @ena_rx_ctx: metadata for this packet(s) 1424 * @next_to_clean: ring pointer 1425 * 1426 **/ 1427static struct mbuf* 1428ena_rx_mbuf(struct ena_ring *rx_ring, struct ena_com_rx_buf_info *ena_bufs, 1429 struct ena_com_rx_ctx *ena_rx_ctx, uint16_t *next_to_clean) 1430{ 1431 struct mbuf *mbuf; 1432 struct ena_rx_buffer *rx_info; 1433 struct ena_adapter *adapter; 1434 unsigned int len, buf = 0; 1435 unsigned int descs = ena_rx_ctx->descs; 1436 1437 adapter = rx_ring->adapter; 1438 rx_info = &rx_ring->rx_buffer_info[*next_to_clean]; 1439 1440 ENA_ASSERT(rx_info->mbuf, "Invalid alloc frag buffer\n"); 1441 1442 len = ena_bufs[0].len; 1443 ena_trace(ENA_DBG | ENA_RXPTH, "rx_info %p, mbuf %p, paddr %jx", 1444 rx_info, rx_info->mbuf, (uintmax_t)rx_info->ena_buf.paddr); 1445 1446 mbuf = rx_info->mbuf; 1447 mbuf->m_flags |= M_PKTHDR; 1448 mbuf->m_pkthdr.len = len; 1449 mbuf->m_len = len; 1450 mbuf->m_pkthdr.rcvif = rx_ring->que->adapter->ifp; 1451 1452 /* Fill mbuf with hash key and it's interpretation for optimization */ 1453 ena_rx_hash_mbuf(rx_ring, ena_rx_ctx, mbuf); 1454 1455 ena_trace(ENA_DBG | ENA_RXPTH, "rx mbuf 0x%p, flags=0x%x, len: %d", 1456 mbuf, mbuf->m_flags, mbuf->m_pkthdr.len); 1457 1458 /* DMA address is not needed anymore, unmap it */ 1459 bus_dmamap_unload(rx_ring->adapter->rx_buf_tag, rx_info->map); 1460 1461 rx_info->mbuf = NULL; 1462 *next_to_clean = ENA_RX_RING_IDX_NEXT(*next_to_clean, 1463 rx_ring->ring_size); 1464 1465 /* 1466 * While we have more than 1 descriptors for one rcvd packet, append 1467 * other mbufs to the main one 1468 */ 1469 while (--descs) { 1470 rx_info = &rx_ring->rx_buffer_info[*next_to_clean]; 1471 len = ena_bufs[++buf].len; 1472 1473 if (!m_append(mbuf, len, rx_info->mbuf->m_data)) { 1474 counter_u64_add(rx_ring->rx_stats.mbuf_alloc_fail, 1); 1475 ena_trace(ENA_WARNING, "Failed to append Rx mbuf %p", 1476 mbuf); 1477 } 1478 /* Free already appended mbuf, it won't be useful anymore */ 1479 bus_dmamap_unload(rx_ring->adapter->rx_buf_tag, rx_info->map); 1480 m_freem(rx_info->mbuf); 1481 rx_info->mbuf = NULL; 1482 1483 *next_to_clean = ENA_RX_RING_IDX_NEXT(*next_to_clean, 1484 rx_ring->ring_size); 1485 } 1486 1487 return (mbuf); 1488} 1489 1490/** 1491 * ena_rx_checksum - indicate in mbuf if hw indicated a good cksum 1492 **/ 1493static inline void 1494ena_rx_checksum(struct ena_ring *rx_ring, struct ena_com_rx_ctx *ena_rx_ctx, 1495 struct mbuf *mbuf) 1496{ 1497 1498 /* if IP and error */ 1499 if ((ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) && 1500 (ena_rx_ctx->l3_csum_err)) { 1501 /* ipv4 checksum error */ 1502 mbuf->m_pkthdr.csum_flags = 0; 1503 counter_u64_add(rx_ring->rx_stats.bad_csum, 1); 1504 return; 1505 } 1506 1507 /* if TCP/UDP */ 1508 if ((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) || 1509 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP)) { 1510 if (ena_rx_ctx->l4_csum_err) { 1511 /* TCP/UDP checksum error */ 1512 mbuf->m_pkthdr.csum_flags = 0; 1513 counter_u64_add(rx_ring->rx_stats.bad_csum, 1); 1514 } else { 1515 mbuf->m_pkthdr.csum_flags = CSUM_IP_CHECKED; 1516 mbuf->m_pkthdr.csum_flags |= CSUM_IP_VALID; 1517 } 1518 } 1519 1520 return; 1521} 1522 1523/** 1524 * ena_rx_cleanup - handle rx irq 1525 * @arg: ring for which irq is being handled 1526 **/ 1527static int 1528ena_rx_cleanup(struct ena_ring *rx_ring) 1529{ 1530 struct ena_adapter *adapter; 1531 struct mbuf *mbuf; 1532 struct ena_com_rx_ctx ena_rx_ctx; 1533 struct ena_com_io_cq* io_cq; 1534 struct ena_com_io_sq* io_sq; 1535 /* struct ena_eth_io_intr_reg intr_reg; */ 1536 if_t ifp; 1537 uint16_t ena_qid; 1538 uint16_t next_to_clean; 1539 uint32_t refill_required; 1540 uint32_t refill_threshold; 1541 uint32_t do_if_input = 0; 1542 unsigned int qid; 1543 int rc; 1544 int budget = RX_BUDGET; 1545 1546 adapter = rx_ring->que->adapter; 1547 ifp = adapter->ifp; 1548 qid = rx_ring->que->id; 1549 ena_qid = ENA_IO_RXQ_IDX(qid); 1550 io_cq = &adapter->ena_dev->io_cq_queues[ena_qid]; 1551 io_sq = &adapter->ena_dev->io_sq_queues[ena_qid]; 1552 next_to_clean = rx_ring->next_to_clean; 1553 1554 do { 1555 ena_rx_ctx.ena_bufs = rx_ring->ena_bufs; 1556 ena_rx_ctx.max_bufs = adapter->max_rx_sgl_size; 1557 ena_rx_ctx.descs = 0; 1558 rc = ena_com_rx_pkt(io_cq, io_sq, &ena_rx_ctx); 1559 1560 if (unlikely(rc)) 1561 goto error; 1562 1563 if (unlikely(ena_rx_ctx.descs == 0)) 1564 break; 1565 1566 /* Receive mbuf from the ring */ 1567 mbuf = ena_rx_mbuf(rx_ring, rx_ring->ena_bufs, 1568 &ena_rx_ctx, &next_to_clean); 1569 1570 /* Exit if we failed to retrieve a buffer */ 1571 if (unlikely(!mbuf)) { 1572 next_to_clean = ENA_RX_RING_IDX_ADD(next_to_clean, 1573 ena_rx_ctx.descs, rx_ring->ring_size); 1574 break; 1575 } 1576 ena_trace(ENA_DBG | ENA_RXPTH, "Rx: %d bytes", 1577 mbuf->m_pkthdr.len); 1578 1579 if ((ifp->if_capenable & IFCAP_RXCSUM) || 1580 (ifp->if_capenable & IFCAP_RXCSUM_IPV6)) { 1581 ena_rx_checksum(rx_ring, &ena_rx_ctx, mbuf); 1582 } 1583 1584 counter_u64_add(rx_ring->rx_stats.bytes, mbuf->m_pkthdr.len); 1585 /* 1586 * LRO is only for IP/TCP packets and TCP checksum of the packet 1587 * should be computed by hardware. 1588 */ 1589 do_if_input = 1; 1590 if ((ifp->if_capenable & IFCAP_LRO) && 1591 (mbuf->m_pkthdr.csum_flags & CSUM_IP_VALID) && 1592 ena_rx_ctx.l4_proto == ENA_ETH_IO_L4_PROTO_TCP) { 1593 /* 1594 * Send to the stack if: 1595 * - LRO not enabled, or 1596 * - no LRO resources, or 1597 * - lro enqueue fails 1598 */ 1599 if (rx_ring->lro.lro_cnt != 0 && 1600 tcp_lro_rx(&rx_ring->lro, mbuf, 0) == 0) 1601 do_if_input = 0; 1602 } 1603 if (do_if_input) { 1604 ena_trace(ENA_DBG | ENA_RXPTH, "calling if_input() with mbuf %p", 1605 mbuf); 1606 (*ifp->if_input)(ifp, mbuf); 1607 } 1608 1609 counter_u64_add(rx_ring->rx_stats.cnt, 1); 1610 } while (--budget); 1611 1612 rx_ring->next_to_clean = next_to_clean; 1613 1614 refill_required = ena_com_sq_empty_space(io_sq); 1615 refill_threshold = rx_ring->ring_size / ENA_RX_REFILL_THRESH_DEVIDER; 1616 1617 if (refill_required > refill_threshold) { 1618 ena_com_update_dev_comp_head(rx_ring->ena_com_io_cq); 1619 ena_refill_rx_bufs(rx_ring, refill_required); 1620 } 1621 1622 tcp_lro_flush_all(&rx_ring->lro); 1623 1624 return (RX_BUDGET - budget); 1625 1626error: 1627 counter_u64_add(rx_ring->rx_stats.bad_desc_num, 1); 1628 return (RX_BUDGET - budget); 1629} 1630 1631/********************************************************************* 1632 * 1633 * MSIX & Interrupt Service routine 1634 * 1635 **********************************************************************/ 1636 1637/** 1638 * ena_handle_msix - MSIX Interrupt Handler for admin/async queue 1639 * @arg: interrupt number 1640 **/ 1641static void 1642ena_intr_msix_mgmnt(void *arg) 1643{ 1644 struct ena_adapter *adapter = (struct ena_adapter *)arg; 1645 1646 ena_com_admin_q_comp_intr_handler(adapter->ena_dev); 1647 if (likely(adapter->running)) 1648 ena_com_aenq_intr_handler(adapter->ena_dev, arg); 1649} 1650 1651/** 1652 * ena_handle_msix - MSIX Interrupt Handler for Tx/Rx 1653 * @arg: interrupt number 1654 **/ 1655static void 1656ena_handle_msix(void *arg) 1657{ 1658 struct ena_que *que = arg; 1659 struct ena_adapter *adapter = que->adapter; 1660 if_t ifp = adapter->ifp; 1661 struct ena_ring *tx_ring; 1662 struct ena_ring *rx_ring; 1663 struct ena_com_io_cq* io_cq; 1664 struct ena_eth_io_intr_reg intr_reg; 1665 int qid, ena_qid; 1666 int txc, rxc, i; 1667 1668 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1669 return; 1670 1671 ena_trace(ENA_DBG, "MSI-X TX/RX routine"); 1672 1673 tx_ring = que->tx_ring; 1674 rx_ring = que->rx_ring; 1675 qid = que->id; 1676 ena_qid = ENA_IO_TXQ_IDX(qid); 1677 io_cq = &adapter->ena_dev->io_cq_queues[ena_qid]; 1678 1679 for (i = 0; i < CLEAN_BUDGET; ++i) { 1680 rxc = ena_rx_cleanup(rx_ring); 1681 1682 /* Protection from calling ena_tx_cleanup from ena_start_xmit */ 1683 ENA_RING_MTX_LOCK(tx_ring); 1684 txc = ena_tx_cleanup(tx_ring); 1685 ENA_RING_MTX_UNLOCK(tx_ring); 1686 1687 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1688 return; 1689 1690 if (txc != TX_BUDGET && rxc != RX_BUDGET) 1691 break; 1692 } 1693 1694 /* Signal that work is done and unmask interrupt */ 1695 ena_com_update_intr_reg(&intr_reg, 1696 RX_IRQ_INTERVAL, 1697 TX_IRQ_INTERVAL, 1698 true); 1699 ena_com_unmask_intr(io_cq, &intr_reg); 1700} 1701 1702static int 1703ena_enable_msix(struct ena_adapter *adapter) 1704{ 1705 device_t dev = adapter->pdev; 1706 int i, msix_vecs, rc = 0; 1707 1708 /* Reserved the max msix vectors we might need */ 1709 msix_vecs = ENA_MAX_MSIX_VEC(adapter->num_queues); 1710 1711 adapter->msix_entries = ENA_MEM_ALLOC(adapter->ena_dev->dmadev, 1712 msix_vecs * sizeof(struct msix_entry)); 1713 if (!adapter->msix_entries) { 1714 device_printf(dev, 1715 "Failed to allocate msix_entries, vectors %d\n", msix_vecs); 1716 rc = ENOMEM; 1717 goto error; 1718 } 1719 device_printf(dev, "Allocated msix_entries, vectors (cnt: %d)\n", 1720 msix_vecs); 1721 1722 for (i = 0; i < msix_vecs; i++) { 1723 adapter->msix_entries[i].entry = i; 1724 /* Vectors must start from 1 */ 1725 adapter->msix_entries[i].vector = i + 1; 1726 } 1727 1728 rc = pci_alloc_msix(dev, &msix_vecs); 1729 if (rc != 0) { 1730 device_printf(dev, 1731 "Failed to enable MSIX, vectors %d rc %d\n", msix_vecs, rc); 1732 ENA_MEM_FREE(adapter->ena_dev->dmadev, adapter->msix_entries); 1733 adapter->msix_entries = NULL; 1734 rc = ENOSPC; 1735 goto error; 1736 } 1737 1738 adapter->msix_vecs = msix_vecs; 1739 adapter->msix_enabled = true; 1740 1741error: 1742 return (rc); 1743} 1744 1745static void 1746ena_setup_mgmnt_intr(struct ena_adapter *adapter) 1747{ 1748 1749 snprintf(adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].name, 1750 ENA_IRQNAME_SIZE, "ena-mgmnt@pci:%s", 1751 device_get_nameunit(adapter->pdev)); 1752 /* 1753 * Handler is NULL on purpose, it will be set 1754 * when mgmnt interrupt is acquired 1755 */ 1756 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].handler = NULL; 1757 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter; 1758 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].vector = 1759 adapter->msix_entries[ENA_MGMNT_IRQ_IDX].vector; 1760 1761 return; 1762} 1763 1764static void 1765ena_setup_io_intr(struct ena_adapter *adapter) 1766{ 1767 static int last_bind_cpu = -1; 1768 int irq_idx; 1769 ena_trace(ENA_DBG, "enter"); 1770 1771 for (int i = 0; i < adapter->num_queues; i++) { 1772 irq_idx = ENA_IO_IRQ_IDX(i); 1773 1774 snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE, 1775 "%s-TxRx-%d", device_get_nameunit(adapter->pdev), i); 1776 adapter->irq_tbl[irq_idx].handler = ena_handle_msix; 1777 adapter->irq_tbl[irq_idx].data = &adapter->que[i]; 1778 adapter->irq_tbl[irq_idx].vector = 1779 adapter->msix_entries[irq_idx].vector; 1780 ena_trace(ENA_INFO | ENA_IOQ, "ena_setup_io_intr vector: %d\n", 1781 adapter->msix_entries[irq_idx].vector); 1782#ifdef RSS 1783 adapter->que[i].cpu = adapter->irq_tbl[irq_idx].cpu = 1784 rss_getcpu(i % rss_getnumbuckets()); 1785#else 1786 /* 1787 * We still want to bind rings to the corresponding cpu 1788 * using something similar to the RSS round-robin technique. 1789 */ 1790 if (last_bind_cpu < 0) 1791 last_bind_cpu = CPU_FIRST(); 1792 adapter->que[i].cpu = adapter->irq_tbl[irq_idx].cpu = 1793 last_bind_cpu; 1794 last_bind_cpu = CPU_NEXT(last_bind_cpu); 1795#endif 1796 } 1797 1798 return; 1799} 1800 1801static int 1802ena_request_mgmnt_irq(struct ena_adapter *adapter) 1803{ 1804 struct ena_irq *irq; 1805 unsigned long flags; 1806 int rc, rcc; 1807 1808 flags = RF_ACTIVE | RF_SHAREABLE; 1809 1810 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX]; 1811 irq->res = bus_alloc_resource_any(adapter->pdev, SYS_RES_IRQ, 1812 &irq->vector, flags); 1813 1814 if (irq->res == NULL) { 1815 device_printf(adapter->pdev, "could not allocate " 1816 "irq vector: %d\n", irq->vector); 1817 rc = ENXIO; 1818 goto exit_res; 1819 } 1820 1821 if ((rc = bus_activate_resource(adapter->pdev, SYS_RES_IRQ, irq->vector, 1822 irq->res)) != 0) { 1823 device_printf(adapter->pdev, "could not activate " 1824 "irq vector: %d\n", irq->vector); 1825 goto exit_intr; 1826 } 1827 1828 if ((rc = bus_setup_intr(adapter->pdev, irq->res, 1829 INTR_TYPE_NET | INTR_MPSAFE, NULL, 1830 ena_intr_msix_mgmnt, irq->data, &irq->cookie)) != 0) { 1831 device_printf(adapter->pdev, "failed to register " 1832 "interrupt handler for irq %ju: %d\n", 1833 rman_get_start(irq->res), rc); 1834 goto exit_intr; 1835 } 1836 irq->requested = true; 1837 1838 return (rc); 1839 1840exit_intr: 1841 device_printf(adapter->pdev, "exit_intr: releasing resource" 1842 " for irq %d\n", irq->vector); 1843 rcc = bus_release_resource(adapter->pdev, SYS_RES_IRQ, 1844 irq->vector, irq->res); 1845 if (rcc) 1846 device_printf(adapter->pdev, "dev has no parent while " 1847 "releasing res for irq: %d\n", irq->vector); 1848 irq->res = NULL; 1849 1850exit_res: 1851 return (rc); 1852} 1853 1854static int 1855ena_request_io_irq(struct ena_adapter *adapter) 1856{ 1857 struct ena_irq *irq; 1858 unsigned long flags = 0; 1859 int rc = 0, i, rcc; 1860 1861 if (!adapter->msix_enabled) { 1862 device_printf(adapter->pdev, "failed to request irq\n"); 1863 return (EINVAL); 1864 } else { 1865 flags = RF_ACTIVE | RF_SHAREABLE; 1866 } 1867 1868 for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) { 1869 irq = &adapter->irq_tbl[i]; 1870 1871 if (irq->requested) 1872 continue; 1873 1874 irq->res = bus_alloc_resource_any(adapter->pdev, SYS_RES_IRQ, 1875 &irq->vector, flags); 1876 if (irq->res == NULL) { 1877 device_printf(adapter->pdev, "could not allocate " 1878 "irq vector: %d\n", irq->vector); 1879 goto err; 1880 } 1881 1882 if ((rc = bus_setup_intr(adapter->pdev, irq->res, 1883 INTR_TYPE_NET | INTR_MPSAFE, NULL, irq->handler, 1884 irq->data, &irq->cookie)) != 0) { 1885 device_printf(adapter->pdev, "failed to register " 1886 "interrupt handler for irq %ju: %d\n", 1887 rman_get_start(irq->res), rc); 1888 goto err; 1889 } 1890 irq->requested = true; 1891 1892#ifdef RSS 1893 device_printf(adapter->pdev, "queue %d - RSS bucket %d\n", 1894 i - ENA_IO_IRQ_FIRST_IDX, irq->cpu); 1895#else 1896 device_printf(adapter->pdev, "queue %d - cpu %d\n", 1897 i - ENA_IO_IRQ_FIRST_IDX, irq->cpu); 1898#endif 1899 } 1900 1901 return (rc); 1902 1903err: 1904 1905 for (; i >= ENA_IO_IRQ_FIRST_IDX; i--) { 1906 irq = &adapter->irq_tbl[i]; 1907 rcc = 0; 1908 1909 /* Once we entered err: section and irq->requested is true we 1910 free both intr and resources */ 1911 if (irq->requested == true) 1912 rcc = bus_teardown_intr(adapter->pdev, irq->res, irq->cookie); 1913 if (rcc) 1914 device_printf(adapter->pdev, "could not release" 1915 " irq: %d, error: %d\n", irq->vector, rcc); 1916 1917 /* If we entred err: section without irq->requested set we know 1918 it was bus_alloc_resource_any() that needs cleanup, provided 1919 res is not NULL. In case res is NULL no work in needed in 1920 this iteration */ 1921 rcc = 0; 1922 if (irq->res != NULL) { 1923 rcc = bus_release_resource(adapter->pdev, SYS_RES_IRQ, 1924 irq->vector, irq->res); 1925 } 1926 if (rcc) 1927 device_printf(adapter->pdev, "dev has no parent while " 1928 "releasing res for irq: %d\n", irq->vector); 1929 irq->requested = false; 1930 irq->res = NULL; 1931 } 1932 1933 return (rc); 1934} 1935 1936static void 1937ena_free_mgmnt_irq(struct ena_adapter *adapter) 1938{ 1939 struct ena_irq *irq; 1940 int rc; 1941 1942 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX]; 1943 if (irq->requested) { 1944 ena_trace(ENA_INFO | ENA_ADMQ, "tear down irq: %d\n", 1945 irq->vector); 1946 rc = bus_teardown_intr(adapter->pdev, irq->res, irq->cookie); 1947 if (rc) 1948 device_printf(adapter->pdev, "failed to tear " 1949 "down irq: %d\n", irq->vector); 1950 irq->requested = 0; 1951 } 1952 1953 if (irq->res != NULL) { 1954 ena_trace(ENA_INFO | ENA_ADMQ, "release resource irq: %d\n", 1955 irq->vector); 1956 rc = bus_release_resource(adapter->pdev, SYS_RES_IRQ, 1957 irq->vector, irq->res); 1958 irq->res = NULL; 1959 if (rc) 1960 device_printf(adapter->pdev, "dev has no parent while " 1961 "releasing res for irq: %d\n", irq->vector); 1962 } 1963 1964 return; 1965} 1966 1967static void 1968ena_free_io_irq(struct ena_adapter *adapter) 1969{ 1970 struct ena_irq *irq; 1971 int rc; 1972 1973 for (int i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) { 1974 irq = &adapter->irq_tbl[i]; 1975 if (irq->requested) { 1976 ena_trace(ENA_INFO | ENA_IOQ, "tear down irq: %d\n", 1977 irq->vector); 1978 rc = bus_teardown_intr(adapter->pdev, irq->res, 1979 irq->cookie); 1980 if (rc) { 1981 device_printf(adapter->pdev, "failed to tear " 1982 "down irq: %d\n", irq->vector); 1983 } 1984 irq->requested = 0; 1985 } 1986 1987 if (irq->res != NULL) { 1988 ena_trace(ENA_INFO | ENA_IOQ, "release resource irq: %d\n", 1989 irq->vector); 1990 rc = bus_release_resource(adapter->pdev, SYS_RES_IRQ, 1991 irq->vector, irq->res); 1992 irq->res = NULL; 1993 if (rc) { 1994 device_printf(adapter->pdev, "dev has no parent" 1995 " while releasing res for irq: %d\n", 1996 irq->vector); 1997 } 1998 } 1999 } 2000 2001 return; 2002} 2003 2004static void 2005ena_free_irqs(struct ena_adapter* adapter) 2006{ 2007 2008 ena_free_io_irq(adapter); 2009 ena_free_mgmnt_irq(adapter); 2010 ena_disable_msix(adapter); 2011} 2012 2013static void 2014ena_disable_msix(struct ena_adapter *adapter) 2015{ 2016 2017 pci_release_msi(adapter->pdev); 2018 2019 adapter->msix_vecs = 0; 2020 ENA_MEM_FREE(adapter->ena_dev->dmadev, adapter->msix_entries); 2021 adapter->msix_entries = NULL; 2022} 2023 2024static void 2025ena_unmask_all_io_irqs(struct ena_adapter *adapter) 2026{ 2027 struct ena_com_io_cq* io_cq; 2028 struct ena_eth_io_intr_reg intr_reg; 2029 uint16_t ena_qid; 2030 int i; 2031 2032 /* Unmask interrupts for all queues */ 2033 for (i = 0; i < adapter->num_queues; i++) { 2034 ena_qid = ENA_IO_TXQ_IDX(i); 2035 io_cq = &adapter->ena_dev->io_cq_queues[ena_qid]; 2036 ena_com_update_intr_reg(&intr_reg, 0, 0, true); 2037 ena_com_unmask_intr(io_cq, &intr_reg); 2038 } 2039} 2040 2041/* Configure the Rx forwarding */ 2042static int ena_rss_configure(struct ena_adapter *adapter) 2043{ 2044 struct ena_com_dev *ena_dev = adapter->ena_dev; 2045 int rc; 2046 2047 /* Set indirect table */ 2048 rc = ena_com_indirect_table_set(ena_dev); 2049 if (unlikely(rc && rc != EPERM)) 2050 return rc; 2051 2052 /* Configure hash function (if supported) */ 2053 rc = ena_com_set_hash_function(ena_dev); 2054 if (unlikely(rc && (rc != EPERM))) 2055 return rc; 2056 2057 /* Configure hash inputs (if supported) */ 2058 rc = ena_com_set_hash_ctrl(ena_dev); 2059 if (unlikely(rc && (rc != EPERM))) 2060 return rc; 2061 2062 return 0; 2063} 2064 2065static int 2066ena_up_complete(struct ena_adapter *adapter) 2067{ 2068 int rc; 2069 2070 if (adapter->rss_support) { 2071 rc = ena_rss_configure(adapter); 2072 if (rc) 2073 return (rc); 2074 } 2075 2076 ena_change_mtu(adapter->ifp, adapter->ifp->if_mtu); 2077 ena_refill_all_rx_bufs(adapter); 2078 2079 return (0); 2080} 2081 2082static int 2083ena_up(struct ena_adapter *adapter) 2084{ 2085 int rc = 0; 2086 2087 if (!device_is_attached(adapter->pdev)) { 2088 device_printf(adapter->pdev, "device is not attached!\n"); 2089 return (ENXIO); 2090 } 2091 2092 if (!adapter->running) { 2093 device_printf(adapter->pdev, "device is not running!\n"); 2094 return (ENXIO); 2095 } 2096 2097 if (!adapter->up) { 2098 device_printf(adapter->pdev, "device is going UP\n"); 2099 2100 /* setup interrupts for IO queues */ 2101 ena_setup_io_intr(adapter); 2102 rc = ena_request_io_irq(adapter); 2103 if (rc) { 2104 ena_trace(ENA_ALERT, "err_req_irq"); 2105 goto err_req_irq; 2106 } 2107 2108 /* allocate transmit descriptors */ 2109 rc = ena_setup_all_tx_resources(adapter); 2110 if (rc) { 2111 ena_trace(ENA_ALERT, "err_setup_tx"); 2112 goto err_setup_tx; 2113 } 2114 2115 /* allocate receive descriptors */ 2116 rc = ena_setup_all_rx_resources(adapter); 2117 if (rc) { 2118 ena_trace(ENA_ALERT, "err_setup_rx"); 2119 goto err_setup_rx; 2120 } 2121 2122 /* create IO queues for Rx & Tx */ 2123 rc = ena_create_io_queues(adapter); 2124 if (rc) { 2125 ena_trace(ENA_ALERT, 2126 "create IO queues failed"); 2127 goto err_io_que; 2128 } 2129 2130 if (adapter->link_status) 2131 if_link_state_change(adapter->ifp, LINK_STATE_UP); 2132 2133 rc = ena_up_complete(adapter); 2134 if (rc) 2135 goto err_up_complete; 2136 2137 counter_u64_add(adapter->dev_stats.interface_up, 1); 2138 2139 ena_update_hwassist(adapter); 2140 2141 if_setdrvflagbits(adapter->ifp, IFF_DRV_RUNNING, 2142 IFF_DRV_OACTIVE); 2143 2144 callout_reset_sbt(&adapter->timer_service, SBT_1S, SBT_1S, 2145 ena_timer_service, (void *)adapter, 0); 2146 2147 adapter->up = true; 2148 2149 ena_unmask_all_io_irqs(adapter); 2150 } 2151 2152 return (0); 2153 2154err_up_complete: 2155 ena_destroy_all_io_queues(adapter); 2156err_io_que: 2157 ena_free_all_rx_resources(adapter); 2158err_setup_rx: 2159 ena_free_all_tx_resources(adapter); 2160err_setup_tx: 2161 ena_free_io_irq(adapter); 2162err_req_irq: 2163 return (rc); 2164} 2165 2166int 2167ena_update_stats_counters(struct ena_adapter *adapter) 2168{ 2169 struct ena_admin_basic_stats ena_stats; 2170 struct ena_hw_stats *stats = &adapter->hw_stats; 2171 int rc = 0; 2172 2173 if (!adapter->up) 2174 return (rc); 2175 2176 rc = ena_com_get_dev_basic_stats(adapter->ena_dev, &ena_stats); 2177 if (rc) 2178 return (rc); 2179 2180 stats->tx_bytes = ((uint64_t)ena_stats.tx_bytes_high << 32) | 2181 ena_stats.tx_bytes_low; 2182 stats->rx_bytes = ((uint64_t)ena_stats.rx_bytes_high << 32) | 2183 ena_stats.rx_bytes_low; 2184 2185 stats->rx_packets = ((uint64_t)ena_stats.rx_pkts_high << 32) | 2186 ena_stats.rx_pkts_low; 2187 stats->tx_packets = ((uint64_t)ena_stats.tx_pkts_high << 32) | 2188 ena_stats.tx_pkts_low; 2189 2190 stats->rx_drops = ((uint64_t)ena_stats.rx_drops_high << 32) | 2191 ena_stats.rx_drops_low; 2192 2193 return (0); 2194} 2195 2196static uint64_t 2197ena_get_counter(if_t ifp, ift_counter cnt) 2198{ 2199 struct ena_adapter *adapter; 2200 struct ena_hw_stats *stats; 2201 int rc; 2202 2203 adapter = if_getsoftc(ifp); 2204 2205 /* 2206 * Update only when asking for first counter and interface is up. 2207 * Usually asks for all statistics in sequence. 2208 */ 2209 if (adapter->up) { 2210 if (cnt == 0) { 2211 rc = ena_update_stats_counters(adapter); 2212 if (rc) { 2213 ena_trace(ENA_WARNING, 2214 "Error updating stats counters, rc = %d", 2215 rc); 2216 } 2217 } 2218 } 2219 stats = &adapter->hw_stats; 2220 2221 switch (cnt) { 2222 case IFCOUNTER_IPACKETS: 2223 return (stats->rx_packets); 2224 case IFCOUNTER_OPACKETS: 2225 return (stats->tx_packets); 2226 case IFCOUNTER_IBYTES: 2227 return (stats->rx_bytes); 2228 case IFCOUNTER_OBYTES: 2229 return (stats->tx_bytes); 2230 case IFCOUNTER_IQDROPS: 2231 return (stats->rx_drops); 2232 default: 2233 return (if_get_counter_default(ifp, cnt)); 2234 } 2235} 2236 2237static int 2238ena_media_change(if_t ifp) 2239{ 2240 /* Media Change is not supported by firmware */ 2241 return (0); 2242} 2243 2244static void 2245ena_media_status(if_t ifp, struct ifmediareq *ifmr) 2246{ 2247 struct ena_adapter *adapter = if_getsoftc(ifp); 2248 ena_trace(ENA_DBG, "enter"); 2249 2250 ENA_DEV_LOCK; 2251 2252 ifmr->ifm_status = IFM_AVALID; 2253 ifmr->ifm_active = IFM_ETHER; 2254 2255 if (!adapter->link_status) { 2256 ENA_DEV_UNLOCK; 2257 ena_trace(ENA_WARNING, "link_status = false"); 2258 return; 2259 } 2260 2261 ifmr->ifm_status |= IFM_ACTIVE; 2262 ifmr->ifm_active |= IFM_10G_T | IFM_FDX; 2263 2264 ENA_DEV_UNLOCK; 2265 2266 return; 2267} 2268 2269static void 2270ena_init(void *arg) 2271{ 2272 struct ena_adapter *adapter = (struct ena_adapter *)arg; 2273 2274 if (adapter->up == false) { 2275 sx_xlock(&adapter->ioctl_sx); 2276 ena_up(adapter); 2277 sx_unlock(&adapter->ioctl_sx); 2278 } 2279 2280 return; 2281} 2282 2283static int 2284ena_ioctl(if_t ifp, u_long command, caddr_t data) 2285{ 2286 struct ena_adapter *adapter; 2287 struct ifreq *ifr; 2288 int rc; 2289 2290 adapter = ifp->if_softc; 2291 ifr = (struct ifreq *)data; 2292 2293 /* 2294 * Acquiring lock to prevent from running up and down routines parallel. 2295 */ 2296 rc = 0; 2297 switch (command) { 2298 case SIOCSIFMTU: 2299 sx_xlock(&adapter->ioctl_sx); 2300 ena_down(adapter); 2301 2302 ena_change_mtu(ifp, ifr->ifr_mtu); 2303 2304 rc = ena_up(adapter); 2305 sx_unlock(&adapter->ioctl_sx); 2306 break; 2307 2308 case SIOCSIFFLAGS: 2309 if (ifp->if_flags & IFF_UP) { 2310 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 2311 if (ifp->if_flags & (IFF_PROMISC | 2312 IFF_ALLMULTI)) { 2313 device_printf(adapter->pdev, 2314 "ioctl promisc/allmulti\n"); 2315 } 2316 } else { 2317 sx_xlock(&adapter->ioctl_sx); 2318 rc = ena_up(adapter); 2319 sx_unlock(&adapter->ioctl_sx); 2320 } 2321 } else { 2322 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 2323 sx_xlock(&adapter->ioctl_sx); 2324 ena_down(adapter); 2325 sx_unlock(&adapter->ioctl_sx); 2326 } 2327 } 2328 break; 2329 2330 case SIOCADDMULTI: 2331 case SIOCDELMULTI: 2332 break; 2333 2334 case SIOCSIFMEDIA: 2335 case SIOCGIFMEDIA: 2336 rc = ifmedia_ioctl(ifp, ifr, &adapter->media, command); 2337 break; 2338 2339 case SIOCSIFCAP: 2340 { 2341 int reinit = 0; 2342 2343 if (ifr->ifr_reqcap != ifp->if_capenable) { 2344 ifp->if_capenable = ifr->ifr_reqcap; 2345 reinit = 1; 2346 } 2347 2348 if (reinit && (ifp->if_drv_flags & IFF_DRV_RUNNING)) { 2349 sx_xlock(&adapter->ioctl_sx); 2350 ena_down(adapter); 2351 rc = ena_up(adapter); 2352 sx_unlock(&adapter->ioctl_sx); 2353 } 2354 } 2355 2356 break; 2357 default: 2358 rc = ether_ioctl(ifp, command, data); 2359 break; 2360 } 2361 2362 return (rc); 2363} 2364 2365static int 2366ena_get_dev_offloads(struct ena_com_dev_get_features_ctx *feat) 2367{ 2368 int caps = 0; 2369 2370 if (feat->offload.tx & 2371 (ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_FULL_MASK | 2372 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK | 2373 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L3_CSUM_IPV4_MASK)) 2374 caps |= IFCAP_TXCSUM; 2375 2376 if (feat->offload.tx & 2377 (ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_FULL_MASK | 2378 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK)) 2379 caps |= IFCAP_TXCSUM_IPV6; 2380 2381 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK) 2382 caps |= IFCAP_TSO4; 2383 2384 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK) 2385 caps |= IFCAP_TSO6; 2386 2387 if (feat->offload.rx_supported & 2388 (ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK | 2389 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L3_CSUM_IPV4_MASK)) 2390 caps |= IFCAP_RXCSUM; 2391 2392 if (feat->offload.rx_supported & 2393 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK) 2394 caps |= IFCAP_RXCSUM_IPV6; 2395 2396 caps |= IFCAP_LRO | IFCAP_JUMBO_MTU; 2397 2398 return (caps); 2399} 2400 2401static void 2402ena_update_host_info(struct ena_admin_host_info *host_info, if_t ifp) 2403{ 2404 2405 host_info->supported_network_features[0] = 2406 (uint32_t)if_getcapabilities(ifp); 2407} 2408 2409static void 2410ena_update_hwassist(struct ena_adapter *adapter) 2411{ 2412 if_t ifp = adapter->ifp; 2413 uint32_t feat = adapter->tx_offload_cap; 2414 int cap = if_getcapenable(ifp); 2415 int flags = 0; 2416 2417 if_clearhwassist(ifp); 2418 2419 if (cap & IFCAP_TXCSUM) { 2420 if (feat & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L3_CSUM_IPV4_MASK) 2421 flags |= CSUM_IP; 2422 if (feat & 2423 (ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_FULL_MASK | 2424 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK)) 2425 flags |= CSUM_IP_UDP | CSUM_IP_TCP; 2426 } 2427 2428 if (cap & IFCAP_TXCSUM_IPV6) 2429 flags |= CSUM_IP6_UDP | CSUM_IP6_TCP; 2430 2431 if (cap & IFCAP_TSO4) 2432 flags |= CSUM_IP_TSO; 2433 2434 if (cap & IFCAP_TSO6) 2435 flags |= CSUM_IP6_TSO; 2436 2437 if_sethwassistbits(ifp, flags, 0); 2438} 2439 2440static int 2441ena_setup_ifnet(device_t pdev, struct ena_adapter *adapter, 2442 struct ena_com_dev_get_features_ctx *feat) 2443{ 2444 if_t ifp; 2445 int caps = 0; 2446 2447 ena_trace(ENA_DBG, "enter"); 2448 2449 ifp = adapter->ifp = if_gethandle(IFT_ETHER); 2450 if (ifp == 0) { 2451 device_printf(pdev, "can not allocate ifnet structure\n"); 2452 return (ENXIO); 2453 } 2454 if_initname(ifp, device_get_name(pdev), device_get_unit(pdev)); 2455 if_setdev(ifp, pdev); 2456 if_setsoftc(ifp, adapter); 2457 2458 if_setflags(ifp, IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST); 2459 if_setinitfn(ifp, ena_init); 2460 if_settransmitfn(ifp, ena_mq_start); 2461 if_setqflushfn(ifp, ena_qflush); 2462 if_setioctlfn(ifp, ena_ioctl); 2463 if_setgetcounterfn(ifp, ena_get_counter); 2464 2465 if_setsendqlen(ifp, adapter->tx_ring_size); 2466 if_setsendqready(ifp); 2467 if_setmtu(ifp, ETHERMTU); 2468 if_setbaudrate(ifp, 0); 2469 /* Zeroize capabilities... */ 2470 if_setcapabilities(ifp, 0); 2471 if_setcapenable(ifp, 0); 2472 /* check hardware support */ 2473 caps = ena_get_dev_offloads(feat); 2474 /* ... and set them */ 2475 if_setcapabilitiesbit(ifp, caps, 0); 2476 2477 /* TSO parameters */ 2478 ifp->if_hw_tsomax = ENA_TSO_MAXSIZE - 2479 (ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN); 2480 ifp->if_hw_tsomaxsegcount = adapter->max_tx_sgl_size - 1; 2481 ifp->if_hw_tsomaxsegsize = ENA_TSO_MAXSIZE; 2482 2483 if_setifheaderlen(ifp, sizeof(struct ether_vlan_header)); 2484 if_setcapenable(ifp, if_getcapabilities(ifp)); 2485 2486 /* 2487 * Specify the media types supported by this adapter and register 2488 * callbacks to update media and link information 2489 */ 2490 ifmedia_init(&adapter->media, IFM_IMASK, 2491 ena_media_change, ena_media_status); 2492 ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL); 2493 ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO); 2494 2495 ether_ifattach(ifp, adapter->mac_addr); 2496 2497 return (0); 2498} 2499 2500static void 2501ena_down(struct ena_adapter *adapter) 2502{ 2503 2504 if (adapter->up) { 2505 device_printf(adapter->pdev, "device is going DOWN\n"); 2506 2507 callout_drain(&adapter->timer_service); 2508 2509 adapter->up = false; 2510 if_setdrvflagbits(adapter->ifp, IFF_DRV_OACTIVE, 2511 IFF_DRV_RUNNING); 2512 2513 ena_free_io_irq(adapter); 2514 2515 ena_destroy_all_io_queues(adapter); 2516 2517 ena_free_all_tx_bufs(adapter); 2518 ena_free_all_rx_bufs(adapter); 2519 ena_free_all_tx_resources(adapter); 2520 ena_free_all_rx_resources(adapter); 2521 2522 counter_u64_add(adapter->dev_stats.interface_down, 1); 2523 } 2524 2525 return; 2526} 2527 2528static void 2529ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx, struct mbuf *mbuf) 2530{ 2531 struct ena_com_tx_meta *ena_meta; 2532 struct ether_vlan_header *eh; 2533 u32 mss; 2534 bool offload; 2535 uint16_t etype; 2536 int ehdrlen; 2537 struct ip *ip; 2538 int iphlen; 2539 struct tcphdr *th; 2540 2541 offload = false; 2542 ena_meta = &ena_tx_ctx->ena_meta; 2543 mss = mbuf->m_pkthdr.tso_segsz; 2544 2545 if (mss != 0) 2546 offload = true; 2547 2548 if ((mbuf->m_pkthdr.csum_flags & CSUM_TSO) != 0) 2549 offload = true; 2550 2551 if ((mbuf->m_pkthdr.csum_flags & CSUM_OFFLOAD) != 0) 2552 offload = true; 2553 2554 if (offload == false) { 2555 ena_tx_ctx->meta_valid = 0; 2556 return; 2557 } 2558 2559 /* Determine where frame payload starts. */ 2560 eh = mtod(mbuf, struct ether_vlan_header *); 2561 if (eh->evl_encap_proto == htons(ETHERTYPE_VLAN)) { 2562 etype = ntohs(eh->evl_proto); 2563 ehdrlen = ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN; 2564 } else { 2565 etype = ntohs(eh->evl_encap_proto); 2566 ehdrlen = ETHER_HDR_LEN; 2567 } 2568 2569 ip = (struct ip *)(mbuf->m_data + ehdrlen); 2570 iphlen = ip->ip_hl << 2; 2571 th = (struct tcphdr *)((caddr_t)ip + iphlen); 2572 2573 if ((mbuf->m_pkthdr.csum_flags & CSUM_IP) != 0) { 2574 ena_tx_ctx->l3_csum_enable = 1; 2575 } 2576 if ((mbuf->m_pkthdr.csum_flags & CSUM_TSO) != 0) { 2577 ena_tx_ctx->tso_enable = 1; 2578 ena_meta->l4_hdr_len = (th->th_off); 2579 } 2580 2581 switch (etype) { 2582 case ETHERTYPE_IP: 2583 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV4; 2584 if (ip->ip_off == 0) 2585 ena_tx_ctx->df = 1; 2586 break; 2587 case ETHERTYPE_IPV6: 2588 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV6; 2589 2590 default: 2591 break; 2592 } 2593 2594 if (ip->ip_p == IPPROTO_TCP) { 2595 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_TCP; 2596 if (mbuf->m_pkthdr.csum_flags & (CSUM_IP_TCP | CSUM_IP6_TCP)) 2597 ena_tx_ctx->l4_csum_enable = 1; 2598 else 2599 ena_tx_ctx->l4_csum_enable = 0; 2600 } else if (ip->ip_p == IPPROTO_UDP) { 2601 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UDP; 2602 if (mbuf->m_pkthdr.csum_flags & (CSUM_IP_UDP | CSUM_IP6_UDP)) 2603 ena_tx_ctx->l4_csum_enable = 1; 2604 else 2605 ena_tx_ctx->l4_csum_enable = 0; 2606 } else { 2607 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UNKNOWN; 2608 ena_tx_ctx->l4_csum_enable = 0; 2609 } 2610 2611 ena_meta->mss = mss; 2612 ena_meta->l3_hdr_len = iphlen; 2613 ena_meta->l3_hdr_offset = ehdrlen; 2614 ena_tx_ctx->meta_valid = 1; 2615} 2616 2617static int 2618ena_check_and_collapse_mbuf(struct ena_ring *tx_ring, struct mbuf **mbuf) 2619{ 2620 struct ena_adapter *adapter; 2621 struct mbuf *collapsed_mbuf; 2622 int num_frags; 2623 2624 adapter = tx_ring->adapter; 2625 num_frags = ena_mbuf_count(*mbuf); 2626 2627 /* One segment must be reserved for configuration descriptor. */ 2628 if (num_frags < adapter->max_tx_sgl_size) 2629 return (0); 2630 counter_u64_add(tx_ring->tx_stats.collapse, 1); 2631 2632 collapsed_mbuf = m_collapse(*mbuf, M_NOWAIT, 2633 adapter->max_tx_sgl_size - 1); 2634 if (collapsed_mbuf == NULL) { 2635 counter_u64_add(tx_ring->tx_stats.collapse_err, 1); 2636 return (ENOMEM); 2637 } 2638 2639 /* If mbuf was collapsed succesfully, original mbuf is released. */ 2640 *mbuf = collapsed_mbuf; 2641 2642 return (0); 2643} 2644 2645static int 2646ena_xmit_mbuf(struct ena_ring *tx_ring, struct mbuf **mbuf) 2647{ 2648 struct ena_adapter *adapter; 2649 struct ena_tx_buffer *tx_info; 2650 struct ena_com_tx_ctx ena_tx_ctx; 2651 struct ena_com_dev *ena_dev; 2652 struct ena_com_buf *ena_buf; 2653 struct ena_com_io_sq* io_sq; 2654 bus_dma_segment_t segs[ENA_BUS_DMA_SEGS]; 2655 void *push_hdr; 2656 uint16_t next_to_use; 2657 uint16_t req_id; 2658 uint16_t push_len; 2659 uint16_t ena_qid; 2660 uint32_t len, nsegs, header_len; 2661 int i, rc; 2662 int nb_hw_desc; 2663 2664 ena_qid = ENA_IO_TXQ_IDX(tx_ring->que->id); 2665 adapter = tx_ring->que->adapter; 2666 ena_dev = adapter->ena_dev; 2667 io_sq = &adapter->ena_dev->io_sq_queues[ena_qid]; 2668 2669 ENA_ASSERT(*mbuf, "mbuf is NULL\n"); 2670 2671 rc = ena_check_and_collapse_mbuf(tx_ring, mbuf); 2672 if (rc) { 2673 ena_trace(ENA_WARNING, 2674 "Failed to collapse mbuf! err: %d", rc); 2675 return (rc); 2676 } 2677 2678 next_to_use = tx_ring->next_to_use; 2679 req_id = tx_ring->free_tx_ids[next_to_use]; 2680 tx_info = &tx_ring->tx_buffer_info[req_id]; 2681 2682 tx_info->mbuf = *mbuf; 2683 tx_info->num_of_bufs = 0; 2684 2685 ena_buf = tx_info->bufs; 2686 len = (*mbuf)->m_len; 2687 2688 ena_trace(ENA_DBG | ENA_TXPTH, "Tx: %d bytes", (*mbuf)->m_pkthdr.len); 2689 2690 push_len = 0; 2691 header_len = min_t(uint32_t, len, tx_ring->tx_max_header_size); 2692 push_hdr = NULL; 2693 2694 rc = bus_dmamap_load_mbuf_sg(adapter->tx_buf_tag, tx_info->map, 2695 *mbuf, segs, &nsegs, BUS_DMA_NOWAIT); 2696 2697 if (rc || (nsegs == 0)) { 2698 ena_trace(ENA_WARNING, 2699 "dmamap load failed! err: %d nsegs: %d", rc, nsegs); 2700 counter_u64_add(tx_ring->tx_stats.dma_mapping_err, 1); 2701 tx_info->mbuf = NULL; 2702 if (rc == ENOMEM) 2703 return (ENA_COM_NO_MEM); 2704 else 2705 return (ENA_COM_INVAL); 2706 } 2707 2708 for (i = 0; i < nsegs; i++) { 2709 ena_buf->len = segs[i].ds_len; 2710 ena_buf->paddr = segs[i].ds_addr; 2711 ena_buf++; 2712 } 2713 tx_info->num_of_bufs = nsegs; 2714 2715 memset(&ena_tx_ctx, 0x0, sizeof(struct ena_com_tx_ctx)); 2716 ena_tx_ctx.ena_bufs = tx_info->bufs; 2717 ena_tx_ctx.push_header = push_hdr; 2718 ena_tx_ctx.num_bufs = tx_info->num_of_bufs; 2719 ena_tx_ctx.req_id = req_id; 2720 ena_tx_ctx.header_len = header_len; 2721 2722 /* Set flags and meta data */ 2723 ena_tx_csum(&ena_tx_ctx, *mbuf); 2724 /* Prepare the packet's descriptors and send them to device */ 2725 rc = ena_com_prepare_tx(io_sq, &ena_tx_ctx, &nb_hw_desc); 2726 if (rc != 0) { 2727 ena_trace(ENA_WARNING, "failed to prepare tx bufs\n"); 2728 counter_enter(); 2729 counter_u64_add_protected(tx_ring->tx_stats.queue_stop, 1); 2730 counter_u64_add_protected(tx_ring->tx_stats.prepare_ctx_err, 1); 2731 counter_exit(); 2732 goto dma_error; 2733 } 2734 2735 counter_enter(); 2736 counter_u64_add_protected(tx_ring->tx_stats.cnt, 1); 2737 counter_u64_add_protected(tx_ring->tx_stats.bytes, (*mbuf)->m_pkthdr.len); 2738 counter_exit(); 2739 2740 tx_info->tx_descs = nb_hw_desc; 2741 getbinuptime(&tx_info->timestamp); 2742 tx_info->print_once = true; 2743 2744 tx_ring->next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use, 2745 tx_ring->ring_size); 2746 2747 bus_dmamap_sync(adapter->tx_buf_tag, tx_info->map, BUS_DMASYNC_PREWRITE); 2748 2749 return (0); 2750 2751dma_error: 2752 tx_info->mbuf = NULL; 2753 bus_dmamap_unload(adapter->tx_buf_tag, tx_info->map); 2754 2755 return (rc); 2756} 2757 2758static void 2759ena_start_xmit(struct ena_ring *tx_ring) 2760{ 2761 struct mbuf *mbuf; 2762 struct ena_adapter *adapter = tx_ring->adapter; 2763 struct ena_com_io_sq* io_sq; 2764 int ena_qid; 2765 int acum_pkts = 0; 2766 int ret = 0; 2767 2768 if ((adapter->ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 2769 return; 2770 2771 if (!adapter->link_status) 2772 return; 2773 2774 ena_qid = ENA_IO_TXQ_IDX(tx_ring->que->id); 2775 io_sq = &adapter->ena_dev->io_sq_queues[ena_qid]; 2776 2777 while ((mbuf = drbr_peek(adapter->ifp, tx_ring->br)) != NULL) { 2778 ena_trace(ENA_DBG | ENA_TXPTH, "\ndequeued mbuf %p with flags %#x and" 2779 " header csum flags %#jx", 2780 mbuf, mbuf->m_flags, mbuf->m_pkthdr.csum_flags); 2781 2782 if (ena_com_sq_empty_space(io_sq) < ENA_TX_CLEANUP_TRESHOLD) 2783 ena_tx_cleanup(tx_ring); 2784 2785 if ((ret = ena_xmit_mbuf(tx_ring, &mbuf)) != 0) { 2786 if (ret == ENA_COM_NO_MEM) { 2787 drbr_putback(adapter->ifp, tx_ring->br, mbuf); 2788 } else if (ret == ENA_COM_NO_SPACE) { 2789 drbr_putback(adapter->ifp, tx_ring->br, mbuf); 2790 } else { 2791 m_freem(mbuf); 2792 drbr_advance(adapter->ifp, tx_ring->br); 2793 } 2794 2795 break; 2796 } 2797 2798 drbr_advance(adapter->ifp, tx_ring->br); 2799 2800 if ((adapter->ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 2801 return; 2802 2803 acum_pkts++; 2804 2805 BPF_MTAP(adapter->ifp, mbuf); 2806 2807 if (acum_pkts == DB_THRESHOLD) { 2808 acum_pkts = 0; 2809 wmb(); 2810 /* Trigger the dma engine */ 2811 ena_com_write_sq_doorbell(io_sq); 2812 counter_u64_add(tx_ring->tx_stats.doorbells, 1); 2813 } 2814 2815 } 2816 2817 if (acum_pkts) { 2818 wmb(); 2819 /* Trigger the dma engine */ 2820 ena_com_write_sq_doorbell(io_sq); 2821 counter_u64_add(tx_ring->tx_stats.doorbells, 1); 2822 } 2823 2824 if (ena_com_sq_empty_space(io_sq) < ENA_TX_CLEANUP_TRESHOLD) 2825 ena_tx_cleanup(tx_ring); 2826} 2827 2828static void 2829ena_deferred_mq_start(void *arg, int pending) 2830{ 2831 struct ena_ring *tx_ring = (struct ena_ring *)arg; 2832 struct ifnet *ifp = tx_ring->adapter->ifp; 2833 2834 while (drbr_empty(ifp, tx_ring->br) == FALSE && 2835 (ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) { 2836 ENA_RING_MTX_LOCK(tx_ring); 2837 ena_start_xmit(tx_ring); 2838 ENA_RING_MTX_UNLOCK(tx_ring); 2839 } 2840} 2841 2842static int 2843ena_mq_start(if_t ifp, struct mbuf *m) 2844{ 2845 struct ena_adapter *adapter = ifp->if_softc; 2846 struct ena_ring *tx_ring; 2847 int ret, is_drbr_empty; 2848 uint32_t i; 2849 2850 if ((adapter->ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 2851 return (ENODEV); 2852 2853 /* Which queue to use */ 2854 /* 2855 * If everything is setup correctly, it should be the 2856 * same bucket that the current CPU we're on is. 2857 * It should improve performance. 2858 */ 2859 if (M_HASHTYPE_GET(m) != M_HASHTYPE_NONE) { 2860#ifdef RSS 2861 if (rss_hash2bucket(m->m_pkthdr.flowid, 2862 M_HASHTYPE_GET(m), &i) == 0) { 2863 i = i % adapter->num_queues; 2864 2865 } else 2866#endif 2867 { 2868 i = m->m_pkthdr.flowid % adapter->num_queues; 2869 } 2870 } else { 2871 i = curcpu % adapter->num_queues; 2872 } 2873 tx_ring = &adapter->tx_ring[i]; 2874 2875 /* Check if drbr is empty before putting packet */ 2876 is_drbr_empty = drbr_empty(ifp, tx_ring->br); 2877 ret = drbr_enqueue(ifp, tx_ring->br, m); 2878 if (ret) { 2879 taskqueue_enqueue(tx_ring->enqueue_tq, &tx_ring->enqueue_task); 2880 return (ret); 2881 } 2882 2883 if (is_drbr_empty && ENA_RING_MTX_TRYLOCK(tx_ring)) { 2884 ena_start_xmit(tx_ring); 2885 ENA_RING_MTX_UNLOCK(tx_ring); 2886 } else { 2887 taskqueue_enqueue(tx_ring->enqueue_tq, &tx_ring->enqueue_task); 2888 } 2889 2890 return (0); 2891} 2892 2893static void 2894ena_qflush(if_t ifp) 2895{ 2896 struct ena_adapter *adapter = ifp->if_softc; 2897 struct ena_ring *tx_ring = adapter->tx_ring; 2898 int i; 2899 2900 for(i = 0; i < adapter->num_queues; ++i, ++tx_ring) 2901 if (drbr_empty(ifp, tx_ring->br) == FALSE) { 2902 ENA_RING_MTX_LOCK(tx_ring); 2903 drbr_flush(ifp, tx_ring->br); 2904 ENA_RING_MTX_UNLOCK(tx_ring); 2905 } 2906 2907 if_qflush(ifp); 2908 2909 return; 2910} 2911 2912static int ena_calc_io_queue_num(struct ena_adapter *adapter, 2913 struct ena_com_dev_get_features_ctx *get_feat_ctx) 2914{ 2915 int io_sq_num, io_cq_num, io_queue_num; 2916 2917 io_sq_num = get_feat_ctx->max_queues.max_sq_num; 2918 io_cq_num = get_feat_ctx->max_queues.max_sq_num; 2919 2920 io_queue_num = min_t(int, mp_ncpus, ENA_MAX_NUM_IO_QUEUES); 2921 io_queue_num = min_t(int, io_queue_num, io_sq_num); 2922 io_queue_num = min_t(int, io_queue_num, io_cq_num); 2923 /* 1 IRQ for for mgmnt and 1 IRQ for each TX/RX pair */ 2924 io_queue_num = min_t(int, io_queue_num, 2925 pci_msix_count(adapter->pdev) - 1); 2926#ifdef RSS 2927 io_queue_num = min_t(int, io_queue_num, rss_getnumbuckets()); 2928#endif 2929 2930 return io_queue_num; 2931} 2932 2933static int ena_calc_queue_size(struct ena_adapter *adapter, 2934 uint16_t *max_tx_sgl_size, uint16_t *max_rx_sgl_size, 2935 struct ena_com_dev_get_features_ctx *feat) 2936{ 2937 uint32_t queue_size = ENA_DEFAULT_RING_SIZE; 2938 uint32_t v; 2939 uint32_t q; 2940 2941 queue_size = min_t(uint32_t, queue_size, 2942 feat->max_queues.max_cq_depth); 2943 queue_size = min_t(uint32_t, queue_size, 2944 feat->max_queues.max_sq_depth); 2945 2946 /* round down to the nearest power of 2 */ 2947 v = queue_size; 2948 while (v != 0) { 2949 if (powerof2(queue_size)) 2950 break; 2951 v /= 2; 2952 q = rounddown2(queue_size, v); 2953 if (q != 0) { 2954 queue_size = q; 2955 break; 2956 } 2957 } 2958 2959 if (unlikely(!queue_size)) { 2960 device_printf(adapter->pdev, "Invalid queue size\n"); 2961 return ENA_COM_FAULT; 2962 } 2963 2964 *max_tx_sgl_size = min_t(uint16_t, ENA_PKT_MAX_BUFS, 2965 feat->max_queues.max_packet_tx_descs); 2966 *max_rx_sgl_size = min_t(uint16_t, ENA_PKT_MAX_BUFS, 2967 feat->max_queues.max_packet_rx_descs); 2968 2969 return queue_size; 2970} 2971 2972static int ena_rss_init_default(struct ena_adapter *adapter) 2973{ 2974 struct ena_com_dev *ena_dev = adapter->ena_dev; 2975 device_t dev = adapter->pdev; 2976 int qid, rc, i; 2977 2978 rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE); 2979 if (unlikely(rc)) { 2980 device_printf(dev, "Cannot init RSS\n"); 2981 goto err_rss_init; 2982 } 2983 2984 for (i = 0; i < ENA_RX_RSS_TABLE_SIZE; i++) { 2985#ifdef RSS 2986 qid = rss_get_indirection_to_bucket(i); 2987 qid = qid % adapter->num_queues; 2988#else 2989 qid = i % adapter->num_queues; 2990#endif 2991 rc = ena_com_indirect_table_fill_entry(ena_dev, i, 2992 ENA_IO_RXQ_IDX(qid)); 2993 if (unlikely(rc && (rc != EPERM))) { 2994 device_printf(dev, "Cannot fill indirect table\n"); 2995 goto err_fill_indir; 2996 } 2997 } 2998 2999 rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_CRC32, NULL, 3000 ENA_HASH_KEY_SIZE, 0xFFFFFFFF); 3001 if (unlikely(rc && (rc != EPERM))) { 3002 device_printf(dev, "Cannot fill hash function\n"); 3003 goto err_fill_indir; 3004 } 3005 3006 rc = ena_com_set_default_hash_ctrl(ena_dev); 3007 if (unlikely(rc && (rc != EPERM))) { 3008 device_printf(dev, "Cannot fill hash control\n"); 3009 goto err_fill_indir; 3010 } 3011 3012 return (0); 3013 3014err_fill_indir: 3015 ena_com_rss_destroy(ena_dev); 3016err_rss_init: 3017 return (rc); 3018} 3019 3020static void 3021ena_rss_init_default_deferred(void *arg) 3022{ 3023 struct ena_adapter *adapter; 3024 devclass_t dc; 3025 int max; 3026 int rc; 3027 3028 dc = devclass_find("ena"); 3029 if (dc == NULL) { 3030 ena_trace(ENA_DBG, "No devclass ena\n"); 3031 return; 3032 } 3033 3034 max = devclass_get_maxunit(dc); 3035 while (max-- >= 0) { 3036 adapter = devclass_get_softc(dc, max); 3037 if (adapter != NULL) { 3038 rc = ena_rss_init_default(adapter); 3039 adapter->rss_support = true; 3040 if (rc) { 3041 device_printf(adapter->pdev, 3042 "WARNING: RSS was not properly initialized," 3043 " it will affect bandwith\n"); 3044 adapter->rss_support = false; 3045 } 3046 } 3047 } 3048} 3049SYSINIT(ena_rss_init, SI_SUB_KICK_SCHEDULER, SI_ORDER_SECOND, ena_rss_init_default_deferred, NULL); 3050 3051static void ena_config_host_info(struct ena_com_dev *ena_dev) 3052{ 3053 struct ena_admin_host_info *host_info; 3054 int rc; 3055 3056 /* Allocate only the host info */ 3057 rc = ena_com_allocate_host_info(ena_dev); 3058 if (rc) { 3059 ena_trace(ENA_ALERT, "Cannot allocate host info\n"); 3060 return; 3061 } 3062 3063 host_info = ena_dev->host_attr.host_info; 3064 3065 host_info->os_type = ENA_ADMIN_OS_FREEBSD; 3066 host_info->kernel_ver = osreldate; 3067 3068 sprintf(host_info->kernel_ver_str, "%d", osreldate); 3069 host_info->os_dist = 0; 3070 strncpy(host_info->os_dist_str, osrelease, 3071 sizeof(host_info->os_dist_str) - 1); 3072 3073 host_info->driver_version = 3074 (DRV_MODULE_VER_MAJOR) | 3075 (DRV_MODULE_VER_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) | 3076 (DRV_MODULE_VER_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT); 3077 3078 rc = ena_com_set_host_attributes(ena_dev); 3079 if (rc) { 3080 if (rc == EPERM) 3081 ena_trace(ENA_WARNING, "Cannot set host attributes\n"); 3082 else 3083 ena_trace(ENA_ALERT, "Cannot set host attributes\n"); 3084 3085 goto err; 3086 } 3087 3088 return; 3089 3090err: 3091 ena_com_delete_host_info(ena_dev); 3092} 3093 3094static int 3095ena_device_init(struct ena_adapter *adapter, device_t pdev, 3096 struct ena_com_dev_get_features_ctx *get_feat_ctx, int *wd_active) 3097{ 3098 struct ena_com_dev* ena_dev = adapter->ena_dev; 3099 bool readless_supported; 3100 uint32_t aenq_groups; 3101 int dma_width; 3102 int rc; 3103 3104 rc = ena_com_mmio_reg_read_request_init(ena_dev); 3105 if (rc) { 3106 device_printf(pdev, "failed to init mmio read less\n"); 3107 return rc; 3108 } 3109 3110 /* 3111 * The PCIe configuration space revision id indicate if mmio reg 3112 * read is disabled 3113 */ 3114 readless_supported = !(pci_get_revid(pdev) & ENA_MMIO_DISABLE_REG_READ); 3115 ena_com_set_mmio_read_mode(ena_dev, readless_supported); 3116 3117 rc = ena_com_dev_reset(ena_dev); 3118 if (rc) { 3119 device_printf(pdev, "Can not reset device\n"); 3120 goto err_mmio_read_less; 3121 } 3122 3123 rc = ena_com_validate_version(ena_dev); 3124 if (rc) { 3125 device_printf(pdev, "device version is too low\n"); 3126 goto err_mmio_read_less; 3127 } 3128 3129 dma_width = ena_com_get_dma_width(ena_dev); 3130 if (dma_width < 0) { 3131 device_printf(pdev, "Invalid dma width value %d", dma_width); 3132 rc = dma_width; 3133 goto err_mmio_read_less; 3134 } 3135 adapter->dma_width = dma_width; 3136 3137 /* ENA admin level init */ 3138 rc = ena_com_admin_init(ena_dev, &aenq_handlers, true); 3139 if (rc) { 3140 device_printf(pdev, 3141 "Can not initialize ena admin queue with device\n"); 3142 goto err_mmio_read_less; 3143 } 3144 3145 /* 3146 * To enable the msix interrupts the driver needs to know the number 3147 * of queues. So the driver uses polling mode to retrieve this 3148 * information 3149 */ 3150 ena_com_set_admin_polling_mode(ena_dev, true); 3151 3152 ena_config_host_info(ena_dev); 3153 3154 /* Get Device Attributes */ 3155 rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx); 3156 if (rc) { 3157 device_printf(pdev, 3158 "Cannot get attribute for ena device rc: %d\n", rc); 3159 goto err_admin_init; 3160 } 3161 3162 aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) | 3163 BIT(ENA_ADMIN_FATAL_ERROR) | 3164 BIT(ENA_ADMIN_WARNING) | 3165 BIT(ENA_ADMIN_NOTIFICATION) | 3166 BIT(ENA_ADMIN_KEEP_ALIVE); 3167 3168 aenq_groups &= get_feat_ctx->aenq.supported_groups; 3169 rc = ena_com_set_aenq_config(ena_dev, aenq_groups); 3170 if (rc) { 3171 device_printf(pdev, "Cannot configure aenq groups rc: %d\n", rc); 3172 goto err_admin_init; 3173 } 3174 3175 *wd_active = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE)); 3176 3177 return 0; 3178 3179err_admin_init: 3180 ena_com_delete_host_info(ena_dev); 3181 ena_com_admin_destroy(ena_dev); 3182err_mmio_read_less: 3183 ena_com_mmio_reg_read_request_destroy(ena_dev); 3184 3185 return rc; 3186} 3187 3188static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter, 3189 int io_vectors) 3190{ 3191 struct ena_com_dev *ena_dev = adapter->ena_dev; 3192 int rc; 3193 3194 rc = ena_enable_msix(adapter); 3195 if (rc) { 3196 device_printf(adapter->pdev, "Error with MSI-X enablement\n"); 3197 return rc; 3198 } 3199 3200 ena_setup_mgmnt_intr(adapter); 3201 3202 rc = ena_request_mgmnt_irq(adapter); 3203 if (rc) { 3204 device_printf(adapter->pdev, "Cannot setup mgmnt queue intr\n"); 3205 goto err_disable_msix; 3206 } 3207 3208 ena_com_set_admin_polling_mode(ena_dev, false); 3209 3210 ena_com_admin_aenq_enable(ena_dev); 3211 3212 return 0; 3213 3214err_disable_msix: 3215 ena_disable_msix(adapter); 3216 3217 return rc; 3218} 3219 3220/* Function called on ENA_ADMIN_KEEP_ALIVE event */ 3221static void ena_keep_alive_wd(void *adapter_data, 3222 struct ena_admin_aenq_entry *aenq_e) 3223{ 3224 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 3225 sbintime_t stime; 3226 3227 stime = getsbinuptime(); 3228 atomic_store_rel_64(&adapter->keep_alive_timestamp, stime); 3229} 3230 3231/* Check for keep alive expiration */ 3232static void check_for_missing_keep_alive(struct ena_adapter *adapter) 3233{ 3234 sbintime_t timestamp, time; 3235 3236 if (adapter->wd_active == 0) 3237 return; 3238 3239 if (adapter->keep_alive_timeout == 0) 3240 return; 3241 3242 timestamp = atomic_load_acq_64(&adapter->keep_alive_timestamp); 3243 time = getsbinuptime() - timestamp; 3244 if (unlikely(time > adapter->keep_alive_timeout)) { 3245 device_printf(adapter->pdev, 3246 "Keep alive watchdog timeout.\n"); 3247 counter_u64_add(adapter->dev_stats.wd_expired, 1); 3248 adapter->trigger_reset = true; 3249 } 3250} 3251 3252/* Check if admin queue is enabled */ 3253static void check_for_admin_com_state(struct ena_adapter *adapter) 3254{ 3255 if (unlikely(!ena_com_get_admin_running_state(adapter->ena_dev))) { 3256 device_printf(adapter->pdev, 3257 "ENA admin queue is not in running state!\n"); 3258 counter_u64_add(adapter->dev_stats.admin_q_pause, 1); 3259 adapter->trigger_reset = true; 3260 } 3261} 3262 3263/* 3264 * Check for TX which were not completed on time. 3265 * Timeout is defined by "missing_tx_timeout". 3266 * Reset will be performed if number of incompleted 3267 * transactions exceeds "missing_tx_threshold". 3268 */ 3269static void check_for_missing_tx_completions(struct ena_adapter *adapter) 3270{ 3271 struct ena_ring *tx_ring; 3272 struct ena_tx_buffer *tx_info; 3273 struct bintime curtime, time; 3274 int i, j, budget, missed_tx; 3275 3276 /* Make sure the driver doesn't turn the device in other process */ 3277 rmb(); 3278 3279 if (!adapter->up) 3280 return; 3281 3282 if (adapter->trigger_reset) 3283 return; 3284 3285 if (adapter->missing_tx_timeout == 0) 3286 return; 3287 3288 budget = adapter->missing_tx_max_queues; 3289 getbinuptime(&curtime); 3290 3291 for (i = adapter->next_monitored_tx_qid; i < adapter->num_queues; i++) { 3292 tx_ring = &adapter->tx_ring[i]; 3293 3294 missed_tx = 0; 3295 3296 for (j = 0; j < tx_ring->ring_size; j++) { 3297 tx_info = &tx_ring->tx_buffer_info[j]; 3298 3299 if (!bintime_isset(&tx_info->timestamp)) 3300 continue; 3301 3302 time = curtime; 3303 bintime_sub(&time, &tx_info->timestamp); 3304 3305 /* Check again if packet is still waiting */ 3306 if (bintime_isset(&tx_info->timestamp) && unlikely( 3307 bttosbt(time) > adapter->missing_tx_timeout)) { 3308 if (tx_info->print_once) 3309 device_printf(adapter->pdev, 3310 "Found a Tx that wasn't completed " 3311 "on time, qid %d, index %d.\n", 3312 tx_ring->qid, j); 3313 3314 tx_info->print_once = false; 3315 missed_tx++; 3316 3317 if (unlikely(missed_tx > 3318 adapter->missing_tx_threshold)) { 3319 device_printf(adapter->pdev, 3320 "The number of lost tx completion " 3321 "is above the threshold (%d > %d). " 3322 "Reset the device\n", missed_tx, 3323 adapter->missing_tx_threshold); 3324 adapter->trigger_reset = true; 3325 return; 3326 } 3327 } 3328 } 3329 3330 budget--; 3331 if (!budget) { 3332 i++; 3333 break; 3334 } 3335 } 3336 3337 adapter->next_monitored_tx_qid = i % adapter->num_queues; 3338} 3339 3340 3341static void 3342ena_timer_service(void *data) 3343{ 3344 struct ena_adapter *adapter = (struct ena_adapter *)data; 3345 struct ena_admin_host_info *host_info = 3346 adapter->ena_dev->host_attr.host_info; 3347 3348 check_for_missing_keep_alive(adapter); 3349 3350 check_for_admin_com_state(adapter); 3351 3352 check_for_missing_tx_completions(adapter); 3353 3354 if (host_info) 3355 ena_update_host_info(host_info, adapter->ifp); 3356 3357 if (unlikely(adapter->trigger_reset)) { 3358 device_printf(adapter->pdev, "Trigger reset is on\n"); 3359 taskqueue_enqueue(adapter->reset_tq, &adapter->reset_task); 3360 return; 3361 } 3362 3363 /* 3364 * Schedule another timeout one second from now. 3365 */ 3366 callout_schedule_sbt(&adapter->timer_service, SBT_1S, SBT_1S, 0); 3367} 3368 3369static void 3370ena_reset_task(void *arg, int pending) 3371{ 3372 struct ena_com_dev_get_features_ctx get_feat_ctx; 3373 struct ena_adapter *adapter = (struct ena_adapter *)arg; 3374 struct ena_com_dev *ena_dev = adapter->ena_dev; 3375 bool dev_up; 3376 int rc; 3377 3378 if (unlikely(!adapter->trigger_reset)) { 3379 device_printf(adapter->pdev, 3380 "device reset scheduled but trigger_reset is off\n"); 3381 return; 3382 } 3383 3384 sx_xlock(&adapter->ioctl_sx); 3385 3386 callout_drain(&adapter->timer_service); 3387 3388 dev_up = adapter->up; 3389 3390 ena_com_set_admin_running_state(ena_dev, false); 3391 ena_free_mgmnt_irq(adapter); 3392 ena_down(adapter); 3393 ena_com_dev_reset(ena_dev); 3394 ena_disable_msix(adapter); 3395 ena_com_abort_admin_commands(ena_dev); 3396 ena_com_wait_for_abort_completion(ena_dev); 3397 ena_com_admin_destroy(ena_dev); 3398 ena_com_mmio_reg_read_request_destroy(ena_dev); 3399 3400 adapter->trigger_reset = false; 3401 3402 /* Finished destroy part. Restart the device */ 3403 rc = ena_device_init(adapter, adapter->pdev, &get_feat_ctx, 3404 &adapter->wd_active); 3405 if (rc) { 3406 device_printf(adapter->pdev, 3407 "ENA device init failed! (err: %d)\n", rc); 3408 goto err_dev_free; 3409 } 3410 3411 rc = ena_enable_msix_and_set_admin_interrupts(adapter, 3412 adapter->num_queues); 3413 if (rc) { 3414 device_printf(adapter->pdev, "Enable MSI-X failed\n"); 3415 goto err_com_free; 3416 } 3417 3418 /* If the interface was up before the reset bring it up */ 3419 if (dev_up) { 3420 rc = ena_up(adapter); 3421 if (rc) { 3422 device_printf(adapter->pdev, 3423 "Failed to create I/O queues\n"); 3424 goto err_msix_free; 3425 } 3426 } 3427 3428 callout_reset_sbt(&adapter->timer_service, SBT_1S, SBT_1S, 3429 ena_timer_service, (void *)adapter, 0); 3430 3431 sx_unlock(&adapter->ioctl_sx); 3432 3433 return; 3434 3435err_msix_free: 3436 ena_com_dev_reset(ena_dev); 3437 ena_free_mgmnt_irq(adapter); 3438 ena_disable_msix(adapter); 3439err_com_free: 3440 ena_com_admin_destroy(ena_dev); 3441err_dev_free: 3442 device_printf(adapter->pdev, "ENA reset failed!\n"); 3443 adapter->running = false; 3444 sx_unlock(&adapter->ioctl_sx); 3445} 3446 3447/** 3448 * ena_attach - Device Initialization Routine 3449 * @pdev: device information struct 3450 * 3451 * Returns 0 on success, otherwise on failure. 3452 * 3453 * ena_attach initializes an adapter identified by a device structure. 3454 * The OS initialization, configuring of the adapter private structure, 3455 * and a hardware reset occur. 3456 **/ 3457static int 3458ena_attach(device_t pdev) 3459{ 3460 struct ena_com_dev_get_features_ctx get_feat_ctx; 3461 static int version_printed; 3462 struct ena_adapter *adapter; 3463 struct ena_com_dev *ena_dev = NULL; 3464 uint16_t tx_sgl_size = 0; 3465 uint16_t rx_sgl_size = 0; 3466 int io_queue_num; 3467 int queue_size; 3468 int rc; 3469 struct sysctl_ctx_list *ctx; 3470 struct sysctl_oid_list *children; 3471 3472 adapter = device_get_softc(pdev); 3473 adapter->pdev = pdev; 3474 ctx = device_get_sysctl_ctx(pdev); 3475 children = SYSCTL_CHILDREN(device_get_sysctl_tree(pdev)); 3476 3477 mtx_init(&adapter->global_mtx, "ENA global mtx", NULL, MTX_DEF); 3478 sx_init(&adapter->ioctl_sx, "ENA ioctl sx"); 3479 3480 /* Sysctl calls for Watchdog service */ 3481 SYSCTL_ADD_INT(ctx, children, OID_AUTO, "wd_active", 3482 CTLFLAG_RWTUN, &adapter->wd_active, 0, 3483 "Watchdog is active"); 3484 3485 SYSCTL_ADD_QUAD(ctx, children, OID_AUTO, "keep_alive_timeout", 3486 CTLFLAG_RWTUN, &adapter->keep_alive_timeout, 3487 "Timeout for Keep Alive messages"); 3488 3489 SYSCTL_ADD_QUAD(ctx, children, OID_AUTO, "missing_tx_timeout", 3490 CTLFLAG_RWTUN, &adapter->missing_tx_timeout, 3491 "Timeout for TX completion"); 3492 3493 SYSCTL_ADD_U32(ctx, children, OID_AUTO, "missing_tx_max_queues", 3494 CTLFLAG_RWTUN, &adapter->missing_tx_max_queues, 0, 3495 "Number of TX queues to check per run"); 3496 3497 SYSCTL_ADD_U32(ctx, children, OID_AUTO, "missing_tx_threshold", 3498 CTLFLAG_RWTUN, &adapter->missing_tx_threshold, 0, 3499 "Max number of timeouted packets"); 3500 3501 /* Set up the timer service */ 3502 callout_init_mtx(&adapter->timer_service, &adapter->global_mtx, 0); 3503 adapter->keep_alive_timeout = DEFAULT_KEEP_ALIVE_TO; 3504 adapter->missing_tx_timeout = DEFAULT_TX_CMP_TO; 3505 adapter->missing_tx_max_queues = DEFAULT_TX_MONITORED_QUEUES; 3506 adapter->missing_tx_threshold = DEFAULT_TX_CMP_THRESHOLD; 3507 3508 if (version_printed++ == 0) 3509 device_printf(pdev, "%s\n", ena_version); 3510 3511 rc = ena_allocate_pci_resources(adapter); 3512 if (rc) { 3513 device_printf(pdev, "PCI resource allocation failed!\n"); 3514 ena_free_pci_resources(adapter); 3515 goto err_pci_res; 3516 } 3517 3518 /* Allocate memory for ena_dev structure */ 3519 ena_dev = ENA_MEM_ALLOC(pdev, sizeof(struct ena_com_dev)); 3520 if (!ena_dev) { 3521 device_printf(pdev, "allocating ena_dev failed\n"); 3522 rc = ENOMEM; 3523 goto err_select_region; 3524 } 3525 3526 adapter->ena_dev = ena_dev; 3527 ena_dev->dmadev = pdev; 3528 ena_dev->bus = malloc(sizeof(struct ena_bus), M_DEVBUF, 3529 M_WAITOK | M_ZERO); 3530 3531 /* Store register resources */ 3532 ((struct ena_bus*)(ena_dev->bus))->reg_bar_t = 3533 rman_get_bustag(adapter->registers); 3534 ((struct ena_bus*)(ena_dev->bus))->reg_bar_h = 3535 rman_get_bushandle(adapter->registers); 3536 3537 if (((struct ena_bus*)(ena_dev->bus))->reg_bar_h == 0) { 3538 device_printf(pdev, "failed to pmap registers bar\n"); 3539 rc = ENXIO; 3540 goto err_dev_free; 3541 } 3542 3543 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; 3544 3545 /* Device initialization */ 3546 rc = ena_device_init(adapter, pdev, &get_feat_ctx, &adapter->wd_active); 3547 if (rc) { 3548 device_printf(pdev, "ENA device init failed! (err: %d)\n", rc); 3549 rc = ENXIO; 3550 goto err_bus_free; 3551 } 3552 3553 adapter->keep_alive_timestamp = getsbinuptime(); 3554 3555 adapter->tx_offload_cap = get_feat_ctx.offload.tx; 3556 3557 /* Set for sure that interface is not up */ 3558 adapter->up = false; 3559 3560 memcpy(adapter->mac_addr, get_feat_ctx.dev_attr.mac_addr, 3561 ETHER_ADDR_LEN); 3562 3563 adapter->small_copy_len = 3564 ENA_DEFAULT_SMALL_PACKET_LEN; 3565 3566 /* calculate IO queue number to create */ 3567 io_queue_num = ena_calc_io_queue_num(adapter, &get_feat_ctx); 3568 3569 ENA_ASSERT(io_queue_num > 0, "Invalid queue number: %d\n", 3570 io_queue_num); 3571 adapter->num_queues = io_queue_num; 3572 3573 /* calculatre ring sizes */ 3574 queue_size = ena_calc_queue_size(adapter,&tx_sgl_size, 3575 &rx_sgl_size, &get_feat_ctx); 3576 if ((queue_size <= 0) || (io_queue_num <= 0)) { 3577 rc = ENA_COM_FAULT; 3578 goto err_com_free; 3579 } 3580 3581 adapter->tx_ring_size = queue_size; 3582 adapter->rx_ring_size = queue_size; 3583 3584 adapter->max_tx_sgl_size = tx_sgl_size; 3585 adapter->max_rx_sgl_size = rx_sgl_size; 3586 3587 /* set up dma tags for rx and tx buffers */ 3588 rc = ena_setup_tx_dma_tag(adapter); 3589 if (rc) 3590 goto dma_tx_err; 3591 3592 rc = ena_setup_rx_dma_tag(adapter); 3593 if (rc) 3594 goto dma_rx_err; 3595 3596 /* initialize rings basic information */ 3597 device_printf(pdev, "initalize %d io queues\n", io_queue_num); 3598 rc = ena_init_io_rings(adapter); 3599 if (rc) { 3600 device_printf(pdev,"Error with initialization of IO rings\n"); 3601 goto err_io_init; 3602 } 3603 3604 /* setup network interface */ 3605 rc = ena_setup_ifnet(pdev, adapter, &get_feat_ctx); 3606 if (rc) { 3607 device_printf(pdev,"Error with network interface setup\n"); 3608 goto err_com_free; 3609 } 3610 3611 rc = ena_enable_msix_and_set_admin_interrupts(adapter, io_queue_num); 3612 if (rc) { 3613 device_printf(pdev, 3614 "Failed to enable and set the admin interrupts\n"); 3615 goto err_ifp_free; 3616 } 3617 3618 /* Initialize reset task queue */ 3619 TASK_INIT(&adapter->reset_task, 0, ena_reset_task, adapter); 3620 adapter->reset_tq = taskqueue_create("ena_reset_enqueue", 3621 M_WAITOK | M_ZERO, taskqueue_thread_enqueue, &adapter->reset_tq); 3622 if (adapter->reset_tq == NULL) { 3623 device_printf(adapter->pdev, 3624 "Unable to create reset task queue\n"); 3625 goto err_reset_tq; 3626 } 3627 taskqueue_start_threads(&adapter->reset_tq, 1, PI_NET, 3628 "%s rstq", device_get_nameunit(adapter->pdev)); 3629 3630 /* Initialize statistics */ 3631 ena_alloc_counters((counter_u64_t *)&adapter->dev_stats, 3632 sizeof(struct ena_stats_dev)); 3633 ena_update_stats_counters(adapter); 3634 ena_sysctl_add_nodes(adapter); 3635 3636 /* Tell the stack that the interface is not active */ 3637 if_setdrvflagbits(adapter->ifp, IFF_DRV_OACTIVE, IFF_DRV_RUNNING); 3638 3639 adapter->running = true; 3640 return (0); 3641 3642err_reset_tq: 3643 ena_free_mgmnt_irq(adapter); 3644 ena_disable_msix(adapter); 3645err_ifp_free: 3646 if_detach(adapter->ifp); 3647 if_free(adapter->ifp); 3648err_com_free: 3649 ena_free_all_io_rings_resources(adapter); 3650err_io_init: 3651 ena_free_rx_dma_tag(adapter); 3652dma_rx_err: 3653 ena_free_tx_dma_tag(adapter); 3654dma_tx_err: 3655 ena_com_admin_destroy(ena_dev); 3656 ena_com_delete_host_info(ena_dev); 3657err_bus_free: 3658 free(ena_dev->bus, M_DEVBUF); 3659err_dev_free: 3660 free(ena_dev, M_DEVBUF); 3661err_select_region: 3662 ena_free_pci_resources(adapter); 3663err_pci_res: 3664 return (rc); 3665} 3666 3667/** 3668 * ena_detach - Device Removal Routine 3669 * @pdev: device information struct 3670 * 3671 * ena_detach is called by the device subsystem to alert the driver 3672 * that it should release a PCI device. 3673 **/ 3674static int 3675ena_detach(device_t pdev) 3676{ 3677 struct ena_adapter *adapter = device_get_softc(pdev); 3678 struct ena_com_dev *ena_dev = adapter->ena_dev; 3679 int rc; 3680 3681 /* Make sure VLANS are not using driver */ 3682 if (adapter->ifp->if_vlantrunk != NULL) { 3683 device_printf(adapter->pdev ,"VLAN is in use, detach first\n"); 3684 return (EBUSY); 3685 } 3686 3687 /* Free reset task and callout */ 3688 callout_drain(&adapter->timer_service); 3689 while (taskqueue_cancel(adapter->reset_tq, &adapter->reset_task, NULL)) 3690 taskqueue_drain(adapter->reset_tq, &adapter->reset_task); 3691 taskqueue_free(adapter->reset_tq); 3692 3693 sx_xlock(&adapter->ioctl_sx); 3694 ena_down(adapter); 3695 sx_unlock(&adapter->ioctl_sx); 3696 3697 if (adapter->ifp != NULL) { 3698 ether_ifdetach(adapter->ifp); 3699 if_free(adapter->ifp); 3700 } 3701 3702 ena_free_all_io_rings_resources(adapter); 3703 3704 ena_free_counters((counter_u64_t *)&adapter->dev_stats, 3705 sizeof(struct ena_stats_dev)); 3706 3707 if (adapter->rss_support) 3708 ena_com_rss_destroy(ena_dev); 3709 3710 rc = ena_free_rx_dma_tag(adapter); 3711 if (rc) 3712 device_printf(adapter->pdev, 3713 "Unmapped RX DMA tag associations\n"); 3714 3715 rc = ena_free_tx_dma_tag(adapter); 3716 if (rc) 3717 device_printf(adapter->pdev, 3718 "Unmapped TX DMA tag associations\n"); 3719 3720 /* Reset the device only if the device is running. */ 3721 if (adapter->running) 3722 ena_com_dev_reset(ena_dev); 3723 3724 ena_com_delete_host_info(ena_dev); 3725 3726 ena_com_admin_destroy(ena_dev); 3727 3728 ena_free_irqs(adapter); 3729 3730 ena_com_mmio_reg_read_request_destroy(ena_dev); 3731 3732 ena_free_pci_resources(adapter); 3733 3734 mtx_destroy(&adapter->global_mtx); 3735 sx_destroy(&adapter->ioctl_sx); 3736 3737 if (ena_dev->bus != NULL) 3738 free(ena_dev->bus, M_DEVBUF); 3739 3740 if (ena_dev != NULL) 3741 free(ena_dev, M_DEVBUF); 3742 3743 return (bus_generic_detach(pdev)); 3744} 3745 3746/****************************************************************************** 3747 ******************************** AENQ Handlers ******************************* 3748 *****************************************************************************/ 3749/** 3750 * ena_update_on_link_change: 3751 * Notify the network interface about the change in link status 3752 **/ 3753static void 3754ena_update_on_link_change(void *adapter_data, 3755 struct ena_admin_aenq_entry *aenq_e) 3756{ 3757 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data; 3758 struct ena_admin_aenq_link_change_desc *aenq_desc; 3759 int status; 3760 if_t ifp; 3761 3762 aenq_desc = (struct ena_admin_aenq_link_change_desc *)aenq_e; 3763 ifp = adapter->ifp; 3764 status = aenq_desc->flags & 3765 ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK; 3766 3767 if (status != 0) { 3768 device_printf(adapter->pdev, "link is UP\n"); 3769 if_link_state_change(ifp, LINK_STATE_UP); 3770 } else if (status == 0) { 3771 device_printf(adapter->pdev, "link is DOWN\n"); 3772 if_link_state_change(ifp, LINK_STATE_DOWN); 3773 } else { 3774 device_printf(adapter->pdev, "invalid value recvd\n"); 3775 BUG(); 3776 } 3777 3778 adapter->link_status = status; 3779 3780 return; 3781} 3782 3783/** 3784 * This handler will called for unknown event group or unimplemented handlers 3785 **/ 3786static void 3787unimplemented_aenq_handler(void *data, 3788 struct ena_admin_aenq_entry *aenq_e) 3789{ 3790 return; 3791} 3792 3793static struct ena_aenq_handlers aenq_handlers = { 3794 .handlers = { 3795 [ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change, 3796 [ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd, 3797 }, 3798 .unimplemented_handler = unimplemented_aenq_handler 3799}; 3800 3801/********************************************************************* 3802 * FreeBSD Device Interface Entry Points 3803 *********************************************************************/ 3804 3805static device_method_t ena_methods[] = { 3806 /* Device interface */ 3807 DEVMETHOD(device_probe, ena_probe), 3808 DEVMETHOD(device_attach, ena_attach), 3809 DEVMETHOD(device_detach, ena_detach), 3810 DEVMETHOD_END 3811}; 3812 3813static driver_t ena_driver = { 3814 "ena", ena_methods, sizeof(struct ena_adapter), 3815}; 3816 3817devclass_t ena_devclass; 3818DRIVER_MODULE(ena, pci, ena_driver, ena_devclass, 0, 0); 3819MODULE_DEPEND(ena, pci, 1, 1, 1); 3820MODULE_DEPEND(ena, ether, 1, 1, 1); 3821 3822/*********************************************************************/ 3823