if_edvar.h revision 190794
1139749Simp/*-
250770Sdfr * Copyright (c) 1995, David Greenman
350770Sdfr * All rights reserved.
450770Sdfr *
550770Sdfr * Redistribution and use in source and binary forms, with or without
650770Sdfr * modification, are permitted provided that the following conditions
750770Sdfr * are met:
850770Sdfr * 1. Redistributions of source code must retain the above copyright
950770Sdfr *    notice unmodified, this list of conditions, and the following
1050770Sdfr *    disclaimer.
1150770Sdfr * 2. Redistributions in binary form must reproduce the above copyright
1250770Sdfr *    notice, this list of conditions and the following disclaimer in the
1350770Sdfr *    documentation and/or other materials provided with the distribution.
1450770Sdfr *
1550770Sdfr * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
1650770Sdfr * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
1750770Sdfr * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
1850770Sdfr * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
1950770Sdfr * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
2050770Sdfr * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
2150770Sdfr * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
2250770Sdfr * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
2350770Sdfr * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
2450770Sdfr * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
2550770Sdfr * SUCH DAMAGE.
2650770Sdfr *
2750959Speter * $FreeBSD: head/sys/dev/ed/if_edvar.h 190794 2009-04-07 05:41:38Z imp $
2850770Sdfr */
2950770Sdfr
3070355Simp#ifndef SYS_DEV_ED_IF_EDVAR_H
3170355Simp#define SYS_DEV_ED_IF_EDVAR_H
3250770Sdfr/*
3350770Sdfr * ed_softc: per line info and status
3450770Sdfr */
3550770Sdfrstruct ed_softc {
36147256Sbrooks	struct ifnet *ifp;
37149558Simp	struct ifmedia ifmedia; /* Media info */
38149558Simp	device_t dev;
39149558Simp	struct mtx sc_mtx;
4050770Sdfr
4150770Sdfr	char   *type_str;	/* pointer to type string */
4250770Sdfr	u_char  vendor;		/* interface vendor */
4350770Sdfr	u_char  type;		/* interface type code */
44141877Simp	u_char	chip_type;	/* the type of chip (one of ED_CHIP_TYPE_*) */
45141877Simp	u_char  isa16bit;	/* width of access to card 0=8 or 1=16 */
46141877Simp	u_char  mem_shared;	/* NIC memory is shared with host */
47141877Simp	u_char  xmit_busy;	/* transmitter is busy */
48147256Sbrooks	u_char  enaddr[6];
4950770Sdfr
5050770Sdfr	int	port_rid;	/* resource id for port range */
5150770Sdfr	int	port_used;	/* nonzero if ports used */
5250770Sdfr	struct resource* port_res; /* resource for port range */
53142202Simp	bus_space_tag_t port_bst;
54142202Simp	bus_space_handle_t port_bsh;
5550770Sdfr	int	mem_rid;	/* resource id for memory range */
5650770Sdfr	int	mem_used;	/* nonzero if memory used */
5750770Sdfr	struct resource* mem_res; /* resource for memory range */
58142202Simp	bus_space_tag_t mem_bst;
59142202Simp	bus_space_handle_t mem_bsh;
6050770Sdfr	int	irq_rid;	/* resource id for irq */
6150770Sdfr	struct resource* irq_res; /* resource for irq */
6250770Sdfr	void*	irq_handle;	/* handle for irq handler */
63149832Simp	int	modem_rid;	/* resource ID for modem part of device */
64150300Simp	int	(*sc_media_ioctl)(struct ed_softc *sc, struct ifreq *ifr,
65150300Simp	    u_long command);
66150300Simp	void	(*sc_mediachg)(struct ed_softc *);
6773374Simp	device_t miibus;	/* MII bus for cards with MII. */
6892739Salfred	void	(*mii_writebits)(struct ed_softc *, u_int, int);
6992739Salfred	u_int	(*mii_readbits)(struct ed_softc *, int);
70149558Simp	struct callout	      tick_ch;
71150300Simp        void	(*sc_tick)(void *);
72149558Simp	void (*readmem)(struct ed_softc *sc, bus_size_t src, uint8_t *dst,
73149558Simp	    uint16_t amount);
74154924Simp	u_short	(*sc_write_mbufs)(struct ed_softc *, struct mbuf *, bus_size_t);
7550770Sdfr
7664777Snyan	int	nic_offset;	/* NIC (DS8390) I/O bus address offset */
7764777Snyan	int	asic_offset;	/* ASIC I/O bus address offset */
7864630Stanimura
7950770Sdfr/*
8050770Sdfr * The following 'proto' variable is part of a work-around for 8013EBT asics
8150770Sdfr *	being write-only. It's sort of a prototype/shadow of the real thing.
8250770Sdfr */
8350770Sdfr	u_char  wd_laar_proto;
8450770Sdfr	u_char	cr_proto;
8550770Sdfr
8650770Sdfr/*
8750770Sdfr * HP PC LAN PLUS card support.
8850770Sdfr */
8950770Sdfr
9050770Sdfr	u_short	hpp_options;	/* flags controlling behaviour of the HP card */
9150770Sdfr	u_short hpp_id;		/* software revision and other fields */
9264777Snyan	caddr_t hpp_mem_start;	/* Memory-mapped IO register address */
9350770Sdfr
94149558Simp	bus_size_t mem_start; /* NIC memory start address */
95149558Simp	bus_size_t mem_end; /* NIC memory end address */
96140468Simp	uint32_t mem_size;	/* total NIC memory size */
97149558Simp	bus_size_t mem_ring; /* start of RX ring-buffer (in NIC mem) */
9850770Sdfr
9950770Sdfr	u_char  txb_cnt;	/* number of transmit buffers */
10050770Sdfr	u_char  txb_inuse;	/* number of TX buffers currently in-use */
10150770Sdfr
10250770Sdfr	u_char  txb_new;	/* pointer to where new buffer will be added */
10350770Sdfr	u_char  txb_next_tx;	/* pointer to next buffer ready to xmit */
10450770Sdfr	u_short txb_len[8];	/* buffered xmit buffer lengths */
10550770Sdfr	u_char  tx_page_start;	/* first page of TX buffer area */
10650770Sdfr	u_char  rec_page_start;	/* first page of RX ring-buffer */
10750770Sdfr	u_char  rec_page_stop;	/* last page of RX ring-buffer */
10850770Sdfr	u_char  next_packet;	/* pointer to next unread RX packet */
109159538Simp	u_int	tx_mem;		/* Total amount of RAM for tx */
110159538Simp	u_int	rx_mem;		/* Total amount of RAM for rx */
11150770Sdfr	struct	ifmib_iso_8802_3 mibdata; /* stuff for network mgmt */
11250770Sdfr};
11352247Smdodd
11464777Snyan#define	ed_nic_inb(sc, port) \
115142202Simp	bus_space_read_1(sc->port_bst, sc->port_bsh, (sc)->nic_offset + (port))
11664777Snyan
11764777Snyan#define	ed_nic_outb(sc, port, value) \
118142202Simp	bus_space_write_1(sc->port_bst, sc->port_bsh, \
119142202Simp	    (sc)->nic_offset + (port), (value))
12064777Snyan
12164777Snyan#define	ed_nic_inw(sc, port) \
122142202Simp	bus_space_read_2(sc->port_bst, sc->port_bsh, (sc)->nic_offset + (port))
12364777Snyan
12464777Snyan#define	ed_nic_outw(sc, port, value) \
125142202Simp	bus_space_write_2(sc->port_bst, sc->port_bsh, \
126142202Simp	    (sc)->nic_offset + (port), (value))
12764777Snyan
12864777Snyan#define	ed_nic_insb(sc, port, addr, count) \
129142202Simp	bus_space_read_multi_1(sc->port_bst,  sc->port_bsh, \
13064777Snyan		(sc)->nic_offset + (port), (addr), (count))
13164777Snyan
13264777Snyan#define	ed_nic_outsb(sc, port, addr, count) \
133142202Simp	bus_space_write_multi_1(sc->port_bst, sc->port_bsh, \
13464777Snyan		(sc)->nic_offset + (port), (addr), (count))
13564777Snyan
13664777Snyan#define	ed_nic_insw(sc, port, addr, count) \
137142202Simp	bus_space_read_multi_2(sc->port_bst, sc->port_bsh, \
138140468Simp		(sc)->nic_offset + (port), (uint16_t *)(addr), (count))
13964777Snyan
14064777Snyan#define	ed_nic_outsw(sc, port, addr, count) \
141142202Simp	bus_space_write_multi_2(sc->port_bst, sc->port_bsh, \
142140468Simp		(sc)->nic_offset + (port), (uint16_t *)(addr), (count))
14364777Snyan
14464777Snyan#define	ed_nic_insl(sc, port, addr, count) \
145142202Simp	bus_space_read_multi_4(sc->port_bst, sc->port_bsh, \
146140468Simp		(sc)->nic_offset + (port), (uint32_t *)(addr), (count))
14764777Snyan
14864777Snyan#define	ed_nic_outsl(sc, port, addr, count) \
149142202Simp	bus_space_write_multi_4(sc->port_bst, sc->port_bsh, \
150140468Simp		(sc)->nic_offset + (port), (uint32_t *)(addr), (count))
15164777Snyan
15264777Snyan#define	ed_asic_inb(sc, port) \
153142202Simp	bus_space_read_1(sc->port_bst, sc->port_bsh, \
154142202Simp	    (sc)->asic_offset + (port))
15564777Snyan
15664777Snyan#define	ed_asic_outb(sc, port, value) \
157142202Simp	bus_space_write_1(sc->port_bst, sc->port_bsh, \
158142202Simp	    (sc)->asic_offset + (port), (value))
15964777Snyan
16064777Snyan#define	ed_asic_inw(sc, port) \
161142202Simp	bus_space_read_2(sc->port_bst, sc->port_bsh, \
162142202Simp	    (sc)->asic_offset + (port))
16364777Snyan
16464777Snyan#define	ed_asic_outw(sc, port, value) \
165142202Simp	bus_space_write_2(sc->port_bst, sc->port_bsh, \
166142202Simp	    (sc)->asic_offset + (port), (value))
16764777Snyan
16864777Snyan#define	ed_asic_insb(sc, port, addr, count) \
169142202Simp	bus_space_read_multi_1(sc->port_bst, sc->port_bsh, \
17064777Snyan		(sc)->asic_offset + (port), (addr), (count))
17164777Snyan
17264777Snyan#define	ed_asic_outsb(sc, port, addr, count) \
173142202Simp	bus_space_write_multi_1(sc->port_bst, sc->port_bsh, \
17464777Snyan		(sc)->asic_offset + (port), (addr), (count))
17564777Snyan
17664777Snyan#define	ed_asic_insw(sc, port, addr, count) \
177142202Simp	bus_space_read_multi_2(sc->port_bst, sc->port_bsh, \
178140468Simp		(sc)->asic_offset + (port), (uint16_t *)(addr), (count))
17964777Snyan
18064777Snyan#define	ed_asic_outsw(sc, port, addr, count) \
181142202Simp	bus_space_write_multi_2(sc->port_bst, sc->port_bsh, \
182140468Simp		(sc)->asic_offset + (port), (uint16_t *)(addr), (count))
18364777Snyan
18464777Snyan#define	ed_asic_insl(sc, port, addr, count) \
185142202Simp	bus_space_read_multi_4(sc->port_bst, sc->port_bsh, \
186140468Simp		(sc)->asic_offset + (port), (uint32_t *)(addr), (count))
18764777Snyan
18864777Snyan#define	ed_asic_outsl(sc, port, addr, count) \
189142202Simp	bus_space_write_multi_4(sc->port_bst, sc->port_bsh, \
190140468Simp		(sc)->asic_offset + (port), (uint32_t *)(addr), (count))
19164777Snyan
192141493Simpvoid	ed_release_resources(device_t);
193141493Simpint	ed_alloc_port(device_t, int, int);
194141493Simpint	ed_alloc_memory(device_t, int, int);
195141493Simpint	ed_alloc_irq(device_t, int, int);
19652247Smdodd
197141493Simpint	ed_probe_generic8390(struct ed_softc *);
198141493Simpint	ed_probe_WD80x3(device_t, int, int);
199141495Simpint	ed_probe_WD80x3_generic(device_t, int, uint16_t *[]);
200150957Simpint	ed_probe_RTL80x9(device_t, int, int);
201142134Simp#ifdef ED_3C503
202141493Simpint	ed_probe_3Com(device_t, int, int);
203142134Simp#endif
204142134Simp#ifdef ED_SIC
205141493Simpint	ed_probe_SIC(device_t, int, int);
206142134Simp#endif
207149840Simpint	ed_probe_Novell_generic(device_t, int);
208141493Simpint	ed_probe_Novell(device_t, int, int);
209141931Simpvoid	ed_Novell_read_mac(struct ed_softc *);
210142134Simp#ifdef ED_HPP
211141493Simpint	ed_probe_HP_pclanp(device_t, int, int);
212142134Simp#endif
21364777Snyan
214141493Simpint	ed_attach(device_t);
215141494Simpint	ed_detach(device_t);
216141548Simpint	ed_clear_memory(device_t);
217141586Simpint	ed_isa_mem_ok(device_t, u_long, u_int); /* XXX isa specific */
218141493Simpvoid	ed_stop(struct ed_softc *);
219149558Simpvoid	ed_shmem_readmem16(struct ed_softc *, bus_size_t, uint8_t *, uint16_t);
220149558Simpvoid	ed_shmem_readmem8(struct ed_softc *, bus_size_t, uint8_t *, uint16_t);
221154924Simpu_short	ed_shmem_write_mbufs(struct ed_softc *, struct mbuf *, bus_size_t);
222149558Simpvoid	ed_pio_readmem(struct ed_softc *, bus_size_t, uint8_t *, uint16_t);
223141495Simpvoid	ed_pio_writemem(struct ed_softc *, uint8_t *, uint16_t, uint16_t);
224154924Simpu_short	ed_pio_write_mbufs(struct ed_softc *, struct mbuf *, bus_size_t);
22552247Smdodd
226141673Simpvoid	ed_disable_16bit_access(struct ed_softc *);
227141673Simpvoid	ed_enable_16bit_access(struct ed_softc *);
228141673Simp
229190794Simpvoid	ed_gen_ifmedia_init(struct ed_softc *);
230190794Simp
23152247Smdodddriver_intr_t	edintr;
23252247Smdodd
23370355Simpextern devclass_t ed_devclass;
234141931Simp
235141931Simp
236141931Simp/*
237141931Simp * Vendor types
238141931Simp */
239141931Simp#define ED_VENDOR_WD_SMC	0x00		/* Western Digital/SMC */
240141931Simp#define ED_VENDOR_3COM		0x01		/* 3Com */
241141931Simp#define ED_VENDOR_NOVELL	0x02		/* Novell */
242141931Simp#define ED_VENDOR_HP		0x03		/* Hewlett Packard */
243141931Simp#define ED_VENDOR_SIC		0x04		/* Allied-Telesis SIC */
244141931Simp
245141931Simp/*
246154891Simp * Configure time flags
247141931Simp */
248141931Simp/*
249141931Simp * this sets the default for enabling/disabling the transceiver
250141931Simp */
251141931Simp#define ED_FLAGS_DISABLE_TRANCEIVER	0x0001
252141931Simp
253141931Simp/*
254141931Simp * This forces the board to be used in 8/16bit mode even if it
255141931Simp *	autoconfigs differently
256141931Simp */
257141931Simp#define ED_FLAGS_FORCE_8BIT_MODE	0x0002
258141931Simp#define ED_FLAGS_FORCE_16BIT_MODE	0x0004
259141931Simp
260141931Simp/*
261141931Simp * This disables the use of double transmit buffers.
262141931Simp */
263141931Simp#define ED_FLAGS_NO_MULTI_BUFFERING	0x0008
264141931Simp
265141931Simp/*
266141931Simp * This forces all operations with the NIC memory to use Programmed
267141931Simp *	I/O (i.e. not via shared memory)
268141931Simp */
269141931Simp#define ED_FLAGS_FORCE_PIO		0x0010
270141931Simp
271141931Simp/*
272190483Simp * This forces a PC Card, and disables ISA memory range checks
273190483Simp */
274190483Simp#define ED_FLAGS_PCCARD			0x0020
275190483Simp
276190483Simp/*
277141931Simp * These are flags describing the chip type.
278141931Simp */
279141931Simp#define ED_FLAGS_TOSH_ETHER		0x10000
280141931Simp#define ED_FLAGS_GWETHER		0x20000
281141931Simp
282141931Simp#define ED_FLAGS_GETTYPE(flg)		((flg) & 0xff0000)
283141931Simp
284149558Simp#define ED_MUTEX(_sc)		(&(_sc)->sc_mtx)
285149558Simp#define ED_LOCK(_sc)		mtx_lock(ED_MUTEX(_sc))
286149558Simp#define	ED_UNLOCK(_sc)		mtx_unlock(ED_MUTEX(_sc))
287149558Simp#define ED_LOCK_INIT(_sc) \
288149558Simp	mtx_init(ED_MUTEX(_sc), device_get_nameunit(_sc->dev), \
289149558Simp	    MTX_NETWORK_LOCK, MTX_DEF)
290149558Simp#define ED_LOCK_DESTROY(_sc)	mtx_destroy(ED_MUTEX(_sc));
291149558Simp#define ED_ASSERT_LOCKED(_sc)	mtx_assert(ED_MUTEX(_sc), MA_OWNED);
292149558Simp#define ED_ASSERT_UNLOCKED(_sc)	mtx_assert(ED_MUTEX(_sc), MA_NOTOWNED);
293149558Simp
29470355Simp#endif /* SYS_DEV_ED_IF_EDVAR_H */
295