if_edvar.h revision 142134
1/*-
2 * Copyright (c) 1995, David Greenman
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice unmodified, this list of conditions, and the following
10 *    disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * $FreeBSD: head/sys/dev/ed/if_edvar.h 142134 2005-02-20 18:44:45Z imp $
28 */
29
30#ifndef SYS_DEV_ED_IF_EDVAR_H
31#define SYS_DEV_ED_IF_EDVAR_H
32/*
33 * ed_softc: per line info and status
34 */
35struct ed_softc {
36	struct arpcom arpcom;	/* ethernet common */
37
38	char   *type_str;	/* pointer to type string */
39	u_char  vendor;		/* interface vendor */
40	u_char  type;		/* interface type code */
41	u_char	chip_type;	/* the type of chip (one of ED_CHIP_TYPE_*) */
42	u_char	gone;		/* HW missing, presumed having a good time */
43	u_char  isa16bit;	/* width of access to card 0=8 or 1=16 */
44	u_char  mem_shared;	/* NIC memory is shared with host */
45	u_char  xmit_busy;	/* transmitter is busy */
46
47	int	port_rid;	/* resource id for port range */
48	int	port_used;	/* nonzero if ports used */
49	struct resource* port_res; /* resource for port range */
50	int	mem_rid;	/* resource id for memory range */
51	int	mem_used;	/* nonzero if memory used */
52	struct resource* mem_res; /* resource for memory range */
53	int	irq_rid;	/* resource id for irq */
54	struct resource* irq_res; /* resource for irq */
55	void*	irq_handle;	/* handle for irq handler */
56	device_t miibus;	/* MII bus for cards with MII. */
57	void	(*mii_writebits)(struct ed_softc *, u_int, int);
58	u_int	(*mii_readbits)(struct ed_softc *, int);
59	struct callout_handle tick_ch; /* Callout handle for ed_tick */
60
61	int	nic_offset;	/* NIC (DS8390) I/O bus address offset */
62	int	asic_offset;	/* ASIC I/O bus address offset */
63
64/*
65 * The following 'proto' variable is part of a work-around for 8013EBT asics
66 *	being write-only. It's sort of a prototype/shadow of the real thing.
67 */
68	u_char  wd_laar_proto;
69	u_char	cr_proto;
70
71/*
72 * HP PC LAN PLUS card support.
73 */
74
75	u_short	hpp_options;	/* flags controlling behaviour of the HP card */
76	u_short hpp_id;		/* software revision and other fields */
77	caddr_t hpp_mem_start;	/* Memory-mapped IO register address */
78
79	caddr_t mem_start;	/* NIC memory start address */
80	caddr_t mem_end;		/* NIC memory end address */
81	uint32_t mem_size;	/* total NIC memory size */
82	caddr_t mem_ring;	/* start of RX ring-buffer (in NIC mem) */
83
84	u_char  txb_cnt;	/* number of transmit buffers */
85	u_char  txb_inuse;	/* number of TX buffers currently in-use */
86
87	u_char  txb_new;	/* pointer to where new buffer will be added */
88	u_char  txb_next_tx;	/* pointer to next buffer ready to xmit */
89	u_short txb_len[8];	/* buffered xmit buffer lengths */
90	u_char  tx_page_start;	/* first page of TX buffer area */
91	u_char  rec_page_start;	/* first page of RX ring-buffer */
92	u_char  rec_page_stop;	/* last page of RX ring-buffer */
93	u_char  next_packet;	/* pointer to next unread RX packet */
94	struct	ifmib_iso_8802_3 mibdata; /* stuff for network mgmt */
95};
96
97#define	ed_nic_inb(sc, port) \
98	bus_space_read_1(rman_get_bustag((sc)->port_res), \
99		rman_get_bushandle((sc)->port_res), (sc)->nic_offset + (port))
100
101#define	ed_nic_outb(sc, port, value) \
102	bus_space_write_1(rman_get_bustag((sc)->port_res), \
103		rman_get_bushandle((sc)->port_res), (sc)->nic_offset + (port), \
104		(value))
105
106#define	ed_nic_inw(sc, port) \
107	bus_space_read_2(rman_get_bustag((sc)->port_res), \
108		rman_get_bushandle((sc)->port_res), (sc)->nic_offset + (port))
109
110#define	ed_nic_outw(sc, port, value) \
111	bus_space_write_2(rman_get_bustag((sc)->port_res), \
112		rman_get_bushandle((sc)->port_res), (sc)->nic_offset + (port), \
113		(value))
114
115#define	ed_nic_insb(sc, port, addr, count) \
116	bus_space_read_multi_1(rman_get_bustag((sc)->port_res), \
117		rman_get_bushandle((sc)->port_res), \
118		(sc)->nic_offset + (port), (addr), (count))
119
120#define	ed_nic_outsb(sc, port, addr, count) \
121	bus_space_write_multi_1(rman_get_bustag((sc)->port_res), \
122		rman_get_bushandle((sc)->port_res), \
123		(sc)->nic_offset + (port), (addr), (count))
124
125#define	ed_nic_insw(sc, port, addr, count) \
126	bus_space_read_multi_2(rman_get_bustag((sc)->port_res), \
127		rman_get_bushandle((sc)->port_res), \
128		(sc)->nic_offset + (port), (uint16_t *)(addr), (count))
129
130#define	ed_nic_outsw(sc, port, addr, count) \
131	bus_space_write_multi_2(rman_get_bustag((sc)->port_res), \
132		rman_get_bushandle((sc)->port_res), \
133		(sc)->nic_offset + (port), (uint16_t *)(addr), (count))
134
135#define	ed_nic_insl(sc, port, addr, count) \
136	bus_space_read_multi_4(rman_get_bustag((sc)->port_res), \
137		rman_get_bushandle((sc)->port_res), \
138		(sc)->nic_offset + (port), (uint32_t *)(addr), (count))
139
140#define	ed_nic_outsl(sc, port, addr, count) \
141	bus_space_write_multi_4(rman_get_bustag((sc)->port_res), \
142		rman_get_bushandle((sc)->port_res), \
143		(sc)->nic_offset + (port), (uint32_t *)(addr), (count))
144
145#define	ed_asic_inb(sc, port) \
146	bus_space_read_1(rman_get_bustag((sc)->port_res), \
147		rman_get_bushandle((sc)->port_res), (sc)->asic_offset + (port))
148
149#define	ed_asic_outb(sc, port, value) \
150	bus_space_write_1(rman_get_bustag((sc)->port_res), \
151		rman_get_bushandle((sc)->port_res), (sc)->asic_offset + (port), \
152		(value))
153
154#define	ed_asic_inw(sc, port) \
155	bus_space_read_2(rman_get_bustag((sc)->port_res), \
156		rman_get_bushandle((sc)->port_res), (sc)->asic_offset + (port))
157
158#define	ed_asic_outw(sc, port, value) \
159	bus_space_write_2(rman_get_bustag((sc)->port_res), \
160		rman_get_bushandle((sc)->port_res), (sc)->asic_offset + (port), \
161		(value))
162
163#define	ed_asic_insb(sc, port, addr, count) \
164	bus_space_read_multi_1(rman_get_bustag((sc)->port_res), \
165		rman_get_bushandle((sc)->port_res), \
166		(sc)->asic_offset + (port), (addr), (count))
167
168#define	ed_asic_outsb(sc, port, addr, count) \
169	bus_space_write_multi_1(rman_get_bustag((sc)->port_res), \
170		rman_get_bushandle((sc)->port_res), \
171		(sc)->asic_offset + (port), (addr), (count))
172
173#define	ed_asic_insw(sc, port, addr, count) \
174	bus_space_read_multi_2(rman_get_bustag((sc)->port_res), \
175		rman_get_bushandle((sc)->port_res), \
176		(sc)->asic_offset + (port), (uint16_t *)(addr), (count))
177
178#define	ed_asic_outsw(sc, port, addr, count) \
179	bus_space_write_multi_2(rman_get_bustag((sc)->port_res), \
180		rman_get_bushandle((sc)->port_res), \
181		(sc)->asic_offset + (port), (uint16_t *)(addr), (count))
182
183#define	ed_asic_insl(sc, port, addr, count) \
184	bus_space_read_multi_4(rman_get_bustag((sc)->port_res), \
185		rman_get_bushandle((sc)->port_res), \
186		(sc)->asic_offset + (port), (uint32_t *)(addr), (count))
187
188#define	ed_asic_outsl(sc, port, addr, count) \
189	bus_space_write_multi_4(rman_get_bustag((sc)->port_res), \
190		rman_get_bushandle((sc)->port_res), \
191		(sc)->asic_offset + (port), (uint32_t *)(addr), (count))
192
193void	ed_release_resources(device_t);
194int	ed_alloc_port(device_t, int, int);
195int	ed_alloc_memory(device_t, int, int);
196int	ed_alloc_irq(device_t, int, int);
197
198int	ed_probe_generic8390(struct ed_softc *);
199int	ed_probe_WD80x3(device_t, int, int);
200int	ed_probe_WD80x3_generic(device_t, int, uint16_t *[]);
201#ifdef ED_3C503
202int	ed_probe_3Com(device_t, int, int);
203#endif
204#ifdef ED_SIC
205int	ed_probe_SIC(device_t, int, int);
206#endif
207int	ed_probe_Novell(device_t, int, int);
208int	ed_probe_Novell_generic(device_t, int);
209void	ed_Novell_read_mac(struct ed_softc *);
210#ifdef ED_HPP
211int	ed_probe_HP_pclanp(device_t, int, int);
212#endif
213
214int	ed_attach(device_t);
215int	ed_detach(device_t);
216int	ed_clear_memory(device_t);
217int	ed_isa_mem_ok(device_t, u_long, u_int); /* XXX isa specific */
218void	ed_stop(struct ed_softc *);
219void	ed_pio_readmem(struct ed_softc *, long, uint8_t *, uint16_t);
220void	ed_pio_writemem(struct ed_softc *, uint8_t *, uint16_t, uint16_t);
221#ifndef ED_NO_MIIBUS
222int	ed_miibus_readreg(device_t, int, int);
223void	ed_miibus_writereg(device_t, int, int, int);
224int	ed_ifmedia_upd(struct ifnet *);
225void	ed_ifmedia_sts(struct ifnet *, struct ifmediareq *);
226void	ed_child_detached(device_t, device_t);
227#endif
228
229/* The following is unsatisfying XXX */
230#ifdef ED_HPP
231void	ed_hpp_set_physical_link(struct ed_softc *);
232void	ed_hpp_readmem(struct ed_softc *, long, uint8_t *, uint16_t);
233u_short	ed_hpp_write_mbufs(struct ed_softc *, struct mbuf *, int);
234#endif
235
236void	ed_disable_16bit_access(struct ed_softc *);
237void	ed_enable_16bit_access(struct ed_softc *);
238
239driver_intr_t	edintr;
240
241extern devclass_t ed_devclass;
242
243
244/*
245 * Vendor types
246 */
247#define ED_VENDOR_WD_SMC	0x00		/* Western Digital/SMC */
248#define ED_VENDOR_3COM		0x01		/* 3Com */
249#define ED_VENDOR_NOVELL	0x02		/* Novell */
250#define ED_VENDOR_HP		0x03		/* Hewlett Packard */
251#define ED_VENDOR_SIC		0x04		/* Allied-Telesis SIC */
252
253/*
254 * Compile-time config flags
255 */
256/*
257 * this sets the default for enabling/disabling the transceiver
258 */
259#define ED_FLAGS_DISABLE_TRANCEIVER	0x0001
260
261/*
262 * This forces the board to be used in 8/16bit mode even if it
263 *	autoconfigs differently
264 */
265#define ED_FLAGS_FORCE_8BIT_MODE	0x0002
266#define ED_FLAGS_FORCE_16BIT_MODE	0x0004
267
268/*
269 * This disables the use of double transmit buffers.
270 */
271#define ED_FLAGS_NO_MULTI_BUFFERING	0x0008
272
273/*
274 * This forces all operations with the NIC memory to use Programmed
275 *	I/O (i.e. not via shared memory)
276 */
277#define ED_FLAGS_FORCE_PIO		0x0010
278
279/*
280 * These are flags describing the chip type.
281 */
282#define ED_FLAGS_TOSH_ETHER		0x10000
283#define ED_FLAGS_GWETHER		0x20000
284#define ED_FLAGS_AX88190		0x30000
285#define ED_FLAGS_LINKSYS		0x80000
286
287#define ED_FLAGS_GETTYPE(flg)		((flg) & 0xff0000)
288
289#endif /* SYS_DEV_ED_IF_EDVAR_H */
290