if_em.h revision 122681
187189Spdeuskar/************************************************************************** 287189Spdeuskar 3112472SpdeuskarCopyright (c) 2001-2003, Intel Corporation 487189SpdeuskarAll rights reserved. 587189Spdeuskar 6103895SpdeuskarRedistribution and use in source and binary forms, with or without 7103895Spdeuskarmodification, are permitted provided that the following conditions are met: 887189Spdeuskar 9103895Spdeuskar 1. Redistributions of source code must retain the above copyright notice, 10103895Spdeuskar this list of conditions and the following disclaimer. 1187189Spdeuskar 12103895Spdeuskar 2. Redistributions in binary form must reproduce the above copyright 13103895Spdeuskar notice, this list of conditions and the following disclaimer in the 14103895Spdeuskar documentation and/or other materials provided with the distribution. 1587189Spdeuskar 1687189Spdeuskar 3. Neither the name of the Intel Corporation nor the names of its 17103895Spdeuskar contributors may be used to endorse or promote products derived from 18103895Spdeuskar this software without specific prior written permission. 1987189Spdeuskar 2087189SpdeuskarTHIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 2187189SpdeuskarAND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2287189SpdeuskarIMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23103895SpdeuskarARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24103895SpdeuskarLIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25103895SpdeuskarCONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26103895SpdeuskarSUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27103895SpdeuskarINTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28103895SpdeuskarCONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29103895SpdeuskarARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30103895SpdeuskarPOSSIBILITY OF SUCH DAMAGE. 3187189Spdeuskar 3287189Spdeuskar***************************************************************************/ 3387189Spdeuskar 3490628Spdeuskar/*$FreeBSD: head/sys/dev/em/if_em.h 122681 2003-11-14 18:02:25Z pdeuskar $*/ 3590628Spdeuskar 3687189Spdeuskar#ifndef _EM_H_DEFINED_ 3787189Spdeuskar#define _EM_H_DEFINED_ 3887189Spdeuskar 3987189Spdeuskar 4087189Spdeuskar#include <sys/param.h> 4187189Spdeuskar#include <sys/systm.h> 4287189Spdeuskar#include <sys/mbuf.h> 4387189Spdeuskar#include <sys/protosw.h> 4487189Spdeuskar#include <sys/socket.h> 4587189Spdeuskar#include <sys/malloc.h> 4687189Spdeuskar#include <sys/kernel.h> 4797785Spdeuskar#include <sys/sockio.h> 4887189Spdeuskar 4987189Spdeuskar#include <net/if.h> 5097785Spdeuskar#include <net/if_arp.h> 5197785Spdeuskar#include <net/ethernet.h> 5287189Spdeuskar#include <net/if_dl.h> 5387189Spdeuskar#include <net/if_media.h> 5497785Spdeuskar 5587189Spdeuskar#include <net/bpf.h> 5697785Spdeuskar#include <net/if_types.h> 5797785Spdeuskar#include <net/if_vlan_var.h> 5887189Spdeuskar 5987189Spdeuskar#include <netinet/in_systm.h> 6087189Spdeuskar#include <netinet/in.h> 6187189Spdeuskar#include <netinet/ip.h> 6287189Spdeuskar#include <netinet/tcp.h> 6387189Spdeuskar#include <netinet/udp.h> 6487189Spdeuskar 6587189Spdeuskar#include <sys/bus.h> 6687189Spdeuskar#include <machine/bus.h> 6787189Spdeuskar#include <sys/rman.h> 6887189Spdeuskar#include <machine/resource.h> 6987189Spdeuskar#include <vm/vm.h> 7087189Spdeuskar#include <vm/pmap.h> 7187189Spdeuskar#include <machine/clock.h> 72119277Simp#include <dev/pci/pcivar.h> 73119277Simp#include <dev/pci/pcireg.h> 74114554Spdeuskar#include <sys/endian.h> 75115878Spdeuskar#include <sys/proc.h> 76115878Spdeuskar#include <sys/sysctl.h> 7787189Spdeuskar#include "opt_bdg.h" 7887189Spdeuskar 7997785Spdeuskar#include <dev/em/if_em_hw.h> 8087189Spdeuskar 81108229Spdeuskar/* Tunables */ 82108229Spdeuskar 83108229Spdeuskar/* 84119509Spdeuskar * EM_MAX_TXD: Maximum number of Transmit Descriptors 85106649Spdeuskar * Valid Range: 80-256 for 82542 and 82543-based adapters 86115878Spdeuskar * 80-4096 for others 87106649Spdeuskar * Default Value: 256 88106649Spdeuskar * This value is the number of transmit descriptors allocated by the driver. 89106649Spdeuskar * Increasing this value allows the driver to queue more transmits. Each 90108229Spdeuskar * descriptor is 16 bytes. 91108229Spdeuskar */ 92106649Spdeuskar#define EM_MAX_TXD 256 93106649Spdeuskar 94106649Spdeuskar/* 95119509Spdeuskar * EM_MAX_RXD - Maximum number of receive Descriptors 96106649Spdeuskar * Valid Range: 80-256 for 82542 and 82543-based adapters 97115878Spdeuskar * 80-4096 for others 98108229Spdeuskar * Default Value: 256 99106649Spdeuskar * This value is the number of receive descriptors allocated by the driver. 100106649Spdeuskar * Increasing this value allows the driver to buffer more incoming packets. 101106649Spdeuskar * Each descriptor is 16 bytes. A receive buffer is also allocated for each 102106649Spdeuskar * descriptor. The maximum MTU size is 16110. 103108229Spdeuskar * 104106649Spdeuskar */ 105106649Spdeuskar#define EM_MAX_RXD 256 106106649Spdeuskar 107106649Spdeuskar/* 108119509Spdeuskar * EM_TIDV - Transmit Interrupt Delay Value 109106649Spdeuskar * Valid Range: 0-65535 (0=off) 110106649Spdeuskar * Default Value: 64 111106649Spdeuskar * This value delays the generation of transmit interrupts in units of 112106649Spdeuskar * 1.024 microseconds. Transmit interrupt reduction can improve CPU 113106649Spdeuskar * efficiency if properly tuned for specific network traffic. If the 114106649Spdeuskar * system is reporting dropped transmits, this value may be set too high 115106649Spdeuskar * causing the driver to run out of available transmit descriptors. 116106649Spdeuskar */ 117108229Spdeuskar#define EM_TIDV 64 118106649Spdeuskar 119106649Spdeuskar/* 120119509Spdeuskar * EM_TADV - Transmit Absolute Interrupt Delay Value (Not valid for 82542/82543/82544) 121108229Spdeuskar * Valid Range: 0-65535 (0=off) 122108229Spdeuskar * Default Value: 64 123108229Spdeuskar * This value, in units of 1.024 microseconds, limits the delay in which a 124119509Spdeuskar * transmit interrupt is generated. Useful only if EM_TIDV is non-zero, 125108229Spdeuskar * this value ensures that an interrupt is generated after the initial 126108229Spdeuskar * packet is sent on the wire within the set amount of time. Proper tuning, 127119509Spdeuskar * along with EM_TIDV, may improve traffic throughput in specific 128108229Spdeuskar * network conditions. 129108229Spdeuskar */ 130108229Spdeuskar#define EM_TADV 64 131108229Spdeuskar 132108229Spdeuskar/* 133119509Spdeuskar * EM_RDTR - Receive Interrupt Delay Timer (Packet Timer) 134106649Spdeuskar * Valid Range: 0-65535 (0=off) 135106649Spdeuskar * Default Value: 0 136106649Spdeuskar * This value delays the generation of receive interrupts in units of 1.024 137106649Spdeuskar * microseconds. Receive interrupt reduction can improve CPU efficiency if 138106649Spdeuskar * properly tuned for specific network traffic. Increasing this value adds 139106649Spdeuskar * extra latency to frame reception and can end up decreasing the throughput 140106649Spdeuskar * of TCP traffic. If the system is reporting dropped receives, this value 141106649Spdeuskar * may be set too high, causing the driver to run out of available receive 142106649Spdeuskar * descriptors. 143106649Spdeuskar * 144119509Spdeuskar * CAUTION: When setting EM_RDTR to a value other than 0, adapters 145108229Spdeuskar * may hang (stop transmitting) under certain network conditions. 146106649Spdeuskar * If this occurs a WATCHDOG message is logged in the system event log. 147106649Spdeuskar * In addition, the controller is automatically reset, restoring the 148106649Spdeuskar * network connection. To eliminate the potential for the hang 149119509Spdeuskar * ensure that EM_RDTR is set to 0. 150106649Spdeuskar */ 151108229Spdeuskar#define EM_RDTR 0 152106649Spdeuskar 153108229Spdeuskar/* 154119509Spdeuskar * Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544) 155108229Spdeuskar * Valid Range: 0-65535 (0=off) 156108229Spdeuskar * Default Value: 64 157108229Spdeuskar * This value, in units of 1.024 microseconds, limits the delay in which a 158119509Spdeuskar * receive interrupt is generated. Useful only if EM_RDTR is non-zero, 159108229Spdeuskar * this value ensures that an interrupt is generated after the initial 160108229Spdeuskar * packet is received within the set amount of time. Proper tuning, 161119509Spdeuskar * along with EM_RDTR, may improve traffic throughput in specific network 162108229Spdeuskar * conditions. 163108229Spdeuskar */ 164108229Spdeuskar#define EM_RADV 64 165106649Spdeuskar 166108229Spdeuskar 167106649Spdeuskar/* 168106649Spdeuskar * This parameter controls the maximum no of times the driver will loop 169106649Spdeuskar * in the isr. 170106649Spdeuskar * Minimum Value = 1 171106649Spdeuskar */ 172106649Spdeuskar#define EM_MAX_INTR 3 173106649Spdeuskar 174106649Spdeuskar/* 175106649Spdeuskar * Inform the stack about transmit checksum offload capabilities. 176106649Spdeuskar */ 17787189Spdeuskar#define EM_CHECKSUM_FEATURES (CSUM_TCP | CSUM_UDP) 178106649Spdeuskar 179106649Spdeuskar/* 180106649Spdeuskar * This parameter controls the duration of transmit watchdog timer. 181106649Spdeuskar */ 18287189Spdeuskar#define EM_TX_TIMEOUT 5 /* set to 5 seconds */ 18387189Spdeuskar 184106649Spdeuskar/* 185106649Spdeuskar * This parameter controls when the driver calls the routine to reclaim 186106649Spdeuskar * transmit descriptors. 187106649Spdeuskar */ 188106649Spdeuskar#define EM_TX_CLEANUP_THRESHOLD EM_MAX_TXD / 8 18987189Spdeuskar 190106649Spdeuskar/* 191106649Spdeuskar * This parameter controls whether or not autonegotation is enabled. 192106649Spdeuskar * 0 - Disable autonegotiation 193106649Spdeuskar * 1 - Enable autonegotiation 194106649Spdeuskar */ 195106649Spdeuskar#define DO_AUTO_NEG 1 196106649Spdeuskar 197106649Spdeuskar/* 198106649Spdeuskar * This parameter control whether or not the driver will wait for 199106649Spdeuskar * autonegotiation to complete. 200106649Spdeuskar * 1 - Wait for autonegotiation to complete 201106649Spdeuskar * 0 - Don't wait for autonegotiation to complete 202106649Spdeuskar */ 203115878Spdeuskar#define WAIT_FOR_AUTO_NEG_DEFAULT 0 204106649Spdeuskar 205119509Spdeuskar/* 206119509Spdeuskar * EM_MASTER_SLAVE is only defined to enable a workaround for a known compatibility issue 207119509Spdeuskar * with 82541/82547 devices and some switches. See the "Known Limitations" section of 208119509Spdeuskar * the README file for a complete description and a list of affected switches. 209119509Spdeuskar * 210119509Spdeuskar * 0 = Hardware default 211119509Spdeuskar * 1 = Master mode 212119509Spdeuskar * 2 = Slave mode 213119509Spdeuskar * 3 = Auto master/slave 214119509Spdeuskar */ 215119509Spdeuskar/* #define EM_MASTER_SLAVE 2 */ 216106649Spdeuskar 217106649Spdeuskar/* Tunables -- End */ 218106649Spdeuskar 219106649Spdeuskar#define AUTONEG_ADV_DEFAULT (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \ 220106649Spdeuskar ADVERTISE_100_HALF | ADVERTISE_100_FULL | \ 221106649Spdeuskar ADVERTISE_1000_FULL) 222108229Spdeuskar 22387189Spdeuskar#define EM_VENDOR_ID 0x8086 22487189Spdeuskar#define EM_MMBA 0x0010 /* Mem base address */ 22587189Spdeuskar#define EM_ROUNDUP(size, unit) (((size) + (unit) - 1) & ~((unit) - 1)) 226112472Spdeuskar 22787189Spdeuskar#define EM_JUMBO_PBA 0x00000028 22887189Spdeuskar#define EM_DEFAULT_PBA 0x00000030 229112472Spdeuskar#define EM_SMARTSPEED_DOWNSHIFT 3 230112472Spdeuskar#define EM_SMARTSPEED_MAX 15 23187189Spdeuskar 232112472Spdeuskar 23387189Spdeuskar#define MAX_NUM_MULTICAST_ADDRESSES 128 23487189Spdeuskar#define PCI_ANY_ID (~0U) 23587189Spdeuskar#define ETHER_ALIGN 2 236108229Spdeuskar 23787189Spdeuskar/* Defines for printing debug information */ 23887189Spdeuskar#define DEBUG_INIT 0 23987189Spdeuskar#define DEBUG_IOCTL 0 24087189Spdeuskar#define DEBUG_HW 0 24187189Spdeuskar 24287189Spdeuskar#define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 24387189Spdeuskar#define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 24487189Spdeuskar#define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 24587189Spdeuskar#define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 24687189Spdeuskar#define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 24787189Spdeuskar#define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 24887189Spdeuskar#define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 24987189Spdeuskar#define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 25087189Spdeuskar#define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 25187189Spdeuskar 25287189Spdeuskar 25387189Spdeuskar/* Supported RX Buffer Sizes */ 25487189Spdeuskar#define EM_RXBUFFER_2048 2048 25587189Spdeuskar#define EM_RXBUFFER_4096 4096 25687189Spdeuskar#define EM_RXBUFFER_8192 8192 25787189Spdeuskar#define EM_RXBUFFER_16384 16384 25887189Spdeuskar 259114554Spdeuskar#define EM_MAX_SCATTER 64 260114554Spdeuskar 26187189Spdeuskar/* ****************************************************************************** 26287189Spdeuskar * vendor_info_array 26387189Spdeuskar * 26487189Spdeuskar * This array contains the list of Subvendor/Subdevice IDs on which the driver 26587189Spdeuskar * should load. 26687189Spdeuskar * 26787189Spdeuskar * ******************************************************************************/ 268106649Spdeuskartypedef struct _em_vendor_info_t { 26997785Spdeuskar unsigned int vendor_id; 27097785Spdeuskar unsigned int device_id; 27197785Spdeuskar unsigned int subvendor_id; 27297785Spdeuskar unsigned int subdevice_id; 27397785Spdeuskar unsigned int index; 27487189Spdeuskar} em_vendor_info_t; 27587189Spdeuskar 27687189Spdeuskar 277108229Spdeuskarstruct em_buffer { 278114554Spdeuskar struct mbuf *m_head; 279114554Spdeuskar bus_dmamap_t map; /* bus_dma map for packet */ 28087189Spdeuskar}; 28187189Spdeuskar 282114554Spdeuskarstruct em_q { 283114554Spdeuskar bus_dmamap_t map; /* bus_dma map for packet */ 284114554Spdeuskar int nsegs; /* # of segments/descriptors */ 285114554Spdeuskar bus_dma_segment_t segs[EM_MAX_SCATTER]; 286114554Spdeuskar}; 28787189Spdeuskar 288114554Spdeuskar/* 289114554Spdeuskar * Bus dma allocation structure used by 290114554Spdeuskar * em_dma_malloc and em_dma_free. 291114554Spdeuskar */ 292114554Spdeuskarstruct em_dma_alloc { 293114567Spdeuskar bus_addr_t dma_paddr; 294114554Spdeuskar caddr_t dma_vaddr; 295114554Spdeuskar bus_dma_tag_t dma_tag; 296114554Spdeuskar bus_dmamap_t dma_map; 297114554Spdeuskar bus_dma_segment_t dma_seg; 298114554Spdeuskar bus_size_t dma_size; 299114554Spdeuskar int dma_nseg; 300114554Spdeuskar}; 301114554Spdeuskar 30287189Spdeuskartypedef enum _XSUM_CONTEXT_T { 30397785Spdeuskar OFFLOAD_NONE, 30497785Spdeuskar OFFLOAD_TCP_IP, 30597785Spdeuskar OFFLOAD_UDP_IP 30687189Spdeuskar} XSUM_CONTEXT_T; 30787189Spdeuskar 308118314Sjdpstruct adapter; 309118314Sjdpstruct em_int_delay_info { 310118314Sjdp struct adapter *adapter; /* Back-pointer to the adapter struct */ 311118314Sjdp int offset; /* Register offset to read/write */ 312118314Sjdp int value; /* Current value in usecs */ 313118314Sjdp}; 314118314Sjdp 315119509Spdeuskar/* For 82544 PCIX Workaround */ 316119509Spdeuskartypedef struct _ADDRESS_LENGTH_PAIR 317119509Spdeuskar{ 318119509Spdeuskar u_int64_t address; 319119509Spdeuskar u_int32_t length; 320119509Spdeuskar} ADDRESS_LENGTH_PAIR, *PADDRESS_LENGTH_PAIR; 321119509Spdeuskar 322119509Spdeuskartypedef struct _DESCRIPTOR_PAIR 323119509Spdeuskar{ 324119509Spdeuskar ADDRESS_LENGTH_PAIR descriptor[4]; 325119509Spdeuskar u_int32_t elements; 326119509Spdeuskar} DESC_ARRAY, *PDESC_ARRAY; 327119509Spdeuskar 32887189Spdeuskar/* Our adapter structure */ 32987189Spdeuskarstruct adapter { 33097785Spdeuskar struct arpcom interface_data; 33197785Spdeuskar struct adapter *next; 33297785Spdeuskar struct adapter *prev; 33397785Spdeuskar struct em_hw hw; 33487189Spdeuskar 33597785Spdeuskar /* FreeBSD operating-system-specific structures */ 33697785Spdeuskar struct em_osdep osdep; 33797785Spdeuskar struct device *dev; 33897785Spdeuskar struct resource *res_memory; 339100184Spdeuskar struct resource *res_ioport; 34097785Spdeuskar struct resource *res_interrupt; 34197785Spdeuskar void *int_handler_tag; 34297785Spdeuskar struct ifmedia media; 343120364Ssam struct callout timer; 344120364Ssam struct callout tx_fifo_timer; 345100184Spdeuskar int io_rid; 34697785Spdeuskar u_int8_t unit; 347120364Ssam struct mtx mtx; 34887189Spdeuskar 34997785Spdeuskar /* Info about the board itself */ 35097785Spdeuskar u_int32_t part_num; 35197785Spdeuskar u_int8_t link_active; 35297785Spdeuskar u_int16_t link_speed; 35397785Spdeuskar u_int16_t link_duplex; 354112472Spdeuskar u_int32_t smartspeed; 355118314Sjdp struct em_int_delay_info tx_int_delay; 356118314Sjdp struct em_int_delay_info tx_abs_int_delay; 357118314Sjdp struct em_int_delay_info rx_int_delay; 358118314Sjdp struct em_int_delay_info rx_abs_int_delay; 35987189Spdeuskar 36097785Spdeuskar XSUM_CONTEXT_T active_checksum_context; 36187189Spdeuskar 362108229Spdeuskar /* 363108229Spdeuskar * Transmit definitions 364108229Spdeuskar * 365108229Spdeuskar * We have an array of num_tx_desc descriptors (handled 366108229Spdeuskar * by the controller) paired with an array of tx_buffers 367108229Spdeuskar * (at tx_buffer_area). 368108229Spdeuskar * The index of the next available descriptor is next_avail_tx_desc. 369108229Spdeuskar * The number of remaining tx_desc is num_tx_desc_avail. 370108229Spdeuskar */ 371114554Spdeuskar struct em_dma_alloc txdma; /* bus_dma glue for tx desc */ 372108229Spdeuskar struct em_tx_desc *tx_desc_base; 373108229Spdeuskar u_int32_t next_avail_tx_desc; 374108229Spdeuskar u_int32_t oldest_used_tx_desc; 375108229Spdeuskar volatile u_int16_t num_tx_desc_avail; 376108229Spdeuskar u_int16_t num_tx_desc; 377108229Spdeuskar u_int32_t txd_cmd; 378108229Spdeuskar struct em_buffer *tx_buffer_area; 379114554Spdeuskar bus_dma_tag_t txtag; /* dma tag for tx */ 38087189Spdeuskar 381108229Spdeuskar /* 382108229Spdeuskar * Receive definitions 383108229Spdeuskar * 384108229Spdeuskar * we have an array of num_rx_desc rx_desc (handled by the 385108229Spdeuskar * controller), and paired with an array of rx_buffers 386108229Spdeuskar * (at rx_buffer_area). 387108229Spdeuskar * The next pair to check on receive is at offset next_rx_desc_to_check 388108229Spdeuskar */ 389114554Spdeuskar struct em_dma_alloc rxdma; /* bus_dma glue for rx desc */ 390108229Spdeuskar struct em_rx_desc *rx_desc_base; 391108229Spdeuskar u_int32_t next_rx_desc_to_check; 392108229Spdeuskar u_int16_t num_rx_desc; 393108229Spdeuskar u_int32_t rx_buffer_len; 394108229Spdeuskar struct em_buffer *rx_buffer_area; 395114554Spdeuskar bus_dma_tag_t rxtag; 39687189Spdeuskar 39797785Spdeuskar /* Jumbo frame */ 398112472Spdeuskar struct mbuf *fmp; 399112472Spdeuskar struct mbuf *lmp; 40087189Spdeuskar 401112472Spdeuskar u_int16_t tx_fifo_head; 40287189Spdeuskar 403115878Spdeuskar struct sysctl_ctx_list sysctl_ctx; 404115878Spdeuskar struct sysctl_oid *sysctl_tree; 405115878Spdeuskar 40697785Spdeuskar /* Misc stats maintained by the driver */ 40797785Spdeuskar unsigned long dropped_pkts; 40897785Spdeuskar unsigned long mbuf_alloc_failed; 40997785Spdeuskar unsigned long mbuf_cluster_failed; 410106649Spdeuskar unsigned long no_tx_desc_avail1; 411106649Spdeuskar unsigned long no_tx_desc_avail2; 412114554Spdeuskar unsigned long no_tx_map_avail; 413114554Spdeuskar unsigned long no_tx_dma_setup; 414112472Spdeuskar u_int64_t tx_fifo_reset; 415112472Spdeuskar u_int64_t tx_fifo_wrk; 416112472Spdeuskar 417119509Spdeuskar /* For 82544 PCIX Workaround */ 418119509Spdeuskar boolean_t pcix_82544; 419122681Spdeuskar boolean_t in_detach; 420119509Spdeuskar 42197785Spdeuskar#ifdef DBG_STATS 42297785Spdeuskar unsigned long no_pkts_avail; 42397785Spdeuskar unsigned long clean_tx_interrupts; 42493914Spdeuskar 42587189Spdeuskar#endif 42697785Spdeuskar struct em_hw_stats stats; 42787189Spdeuskar}; 42887189Spdeuskar 429120989Ssam#define EM_LOCK_INIT(_sc, _name) \ 430120989Ssam mtx_init(&(_sc)->mtx, _name, MTX_NETWORK_LOCK, MTX_DEF) 431120989Ssam#define EM_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->mtx) 432120989Ssam#define EM_LOCK(_sc) mtx_lock(&(_sc)->mtx) 433120989Ssam#define EM_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx) 434120989Ssam#define EM_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->mtx, MA_OWNED) 435120364Ssam 43687189Spdeuskar#endif /* _EM_H_DEFINED_ */ 437