if_em.h revision 115878
187189Spdeuskar/************************************************************************** 287189Spdeuskar 3112472SpdeuskarCopyright (c) 2001-2003, Intel Corporation 487189SpdeuskarAll rights reserved. 587189Spdeuskar 6103895SpdeuskarRedistribution and use in source and binary forms, with or without 7103895Spdeuskarmodification, are permitted provided that the following conditions are met: 887189Spdeuskar 9103895Spdeuskar 1. Redistributions of source code must retain the above copyright notice, 10103895Spdeuskar this list of conditions and the following disclaimer. 1187189Spdeuskar 12103895Spdeuskar 2. Redistributions in binary form must reproduce the above copyright 13103895Spdeuskar notice, this list of conditions and the following disclaimer in the 14103895Spdeuskar documentation and/or other materials provided with the distribution. 1587189Spdeuskar 1687189Spdeuskar 3. Neither the name of the Intel Corporation nor the names of its 17103895Spdeuskar contributors may be used to endorse or promote products derived from 18103895Spdeuskar this software without specific prior written permission. 1987189Spdeuskar 2087189SpdeuskarTHIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 2187189SpdeuskarAND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2287189SpdeuskarIMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23103895SpdeuskarARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24103895SpdeuskarLIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25103895SpdeuskarCONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26103895SpdeuskarSUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27103895SpdeuskarINTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28103895SpdeuskarCONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29103895SpdeuskarARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30103895SpdeuskarPOSSIBILITY OF SUCH DAMAGE. 3187189Spdeuskar 3287189Spdeuskar***************************************************************************/ 3387189Spdeuskar 3490628Spdeuskar/*$FreeBSD: head/sys/dev/em/if_em.h 115878 2003-06-05 17:51:38Z pdeuskar $*/ 3590628Spdeuskar 3687189Spdeuskar#ifndef _EM_H_DEFINED_ 3787189Spdeuskar#define _EM_H_DEFINED_ 3887189Spdeuskar 3987189Spdeuskar 4087189Spdeuskar#include <sys/param.h> 4187189Spdeuskar#include <sys/systm.h> 4287189Spdeuskar#include <sys/mbuf.h> 4387189Spdeuskar#include <sys/protosw.h> 4487189Spdeuskar#include <sys/socket.h> 4587189Spdeuskar#include <sys/malloc.h> 4687189Spdeuskar#include <sys/kernel.h> 4797785Spdeuskar#include <sys/sockio.h> 4887189Spdeuskar 4987189Spdeuskar#include <net/if.h> 5097785Spdeuskar#include <net/if_arp.h> 5197785Spdeuskar#include <net/ethernet.h> 5287189Spdeuskar#include <net/if_dl.h> 5387189Spdeuskar#include <net/if_media.h> 5497785Spdeuskar 5587189Spdeuskar#include <net/bpf.h> 5697785Spdeuskar#include <net/if_types.h> 5797785Spdeuskar#include <net/if_vlan_var.h> 5887189Spdeuskar 5987189Spdeuskar#include <netinet/in_systm.h> 6087189Spdeuskar#include <netinet/in.h> 6187189Spdeuskar#include <netinet/ip.h> 6287189Spdeuskar#include <netinet/tcp.h> 6387189Spdeuskar#include <netinet/udp.h> 6487189Spdeuskar 6587189Spdeuskar#include <sys/bus.h> 6687189Spdeuskar#include <machine/bus.h> 6787189Spdeuskar#include <sys/rman.h> 6887189Spdeuskar#include <machine/resource.h> 6987189Spdeuskar#include <vm/vm.h> 7087189Spdeuskar#include <vm/pmap.h> 7187189Spdeuskar#include <machine/clock.h> 7287189Spdeuskar#include <pci/pcivar.h> 7387189Spdeuskar#include <pci/pcireg.h> 74114554Spdeuskar#include <sys/endian.h> 75115878Spdeuskar#include <sys/proc.h> 76115878Spdeuskar#include <sys/sysctl.h> 7787189Spdeuskar#include "opt_bdg.h" 7887189Spdeuskar 7997785Spdeuskar#include <dev/em/if_em_hw.h> 8087189Spdeuskar 81108229Spdeuskar/* Tunables */ 82108229Spdeuskar 83108229Spdeuskar/* 84106649Spdeuskar * TxDescriptors 85106649Spdeuskar * Valid Range: 80-256 for 82542 and 82543-based adapters 86115878Spdeuskar * 80-4096 for others 87106649Spdeuskar * Default Value: 256 88106649Spdeuskar * This value is the number of transmit descriptors allocated by the driver. 89106649Spdeuskar * Increasing this value allows the driver to queue more transmits. Each 90108229Spdeuskar * descriptor is 16 bytes. 91108229Spdeuskar */ 92106649Spdeuskar#define EM_MAX_TXD 256 93106649Spdeuskar 94106649Spdeuskar/* 95106649Spdeuskar * RxDescriptors 96106649Spdeuskar * Valid Range: 80-256 for 82542 and 82543-based adapters 97115878Spdeuskar * 80-4096 for others 98108229Spdeuskar * Default Value: 256 99106649Spdeuskar * This value is the number of receive descriptors allocated by the driver. 100106649Spdeuskar * Increasing this value allows the driver to buffer more incoming packets. 101106649Spdeuskar * Each descriptor is 16 bytes. A receive buffer is also allocated for each 102106649Spdeuskar * descriptor. The maximum MTU size is 16110. 103108229Spdeuskar * 104106649Spdeuskar */ 105106649Spdeuskar#define EM_MAX_RXD 256 106106649Spdeuskar 107106649Spdeuskar/* 108106649Spdeuskar * TxIntDelay 109106649Spdeuskar * Valid Range: 0-65535 (0=off) 110106649Spdeuskar * Default Value: 64 111106649Spdeuskar * This value delays the generation of transmit interrupts in units of 112106649Spdeuskar * 1.024 microseconds. Transmit interrupt reduction can improve CPU 113106649Spdeuskar * efficiency if properly tuned for specific network traffic. If the 114106649Spdeuskar * system is reporting dropped transmits, this value may be set too high 115106649Spdeuskar * causing the driver to run out of available transmit descriptors. 116106649Spdeuskar */ 117108229Spdeuskar#define EM_TIDV 64 118106649Spdeuskar 119106649Spdeuskar/* 120115878Spdeuskar * TxAbsIntDelay (Not valid for 82542 and 82543) 121108229Spdeuskar * Valid Range: 0-65535 (0=off) 122108229Spdeuskar * Default Value: 64 123108229Spdeuskar * This value, in units of 1.024 microseconds, limits the delay in which a 124108229Spdeuskar * transmit interrupt is generated. Useful only if TxIntDelay is non-zero, 125108229Spdeuskar * this value ensures that an interrupt is generated after the initial 126108229Spdeuskar * packet is sent on the wire within the set amount of time. Proper tuning, 127108229Spdeuskar * along with TxIntDelay, may improve traffic throughput in specific 128108229Spdeuskar * network conditions. 129108229Spdeuskar */ 130108229Spdeuskar#define EM_TADV 64 131108229Spdeuskar 132108229Spdeuskar/* 133106649Spdeuskar * RxIntDelay 134106649Spdeuskar * Valid Range: 0-65535 (0=off) 135106649Spdeuskar * Default Value: 0 136106649Spdeuskar * This value delays the generation of receive interrupts in units of 1.024 137106649Spdeuskar * microseconds. Receive interrupt reduction can improve CPU efficiency if 138106649Spdeuskar * properly tuned for specific network traffic. Increasing this value adds 139106649Spdeuskar * extra latency to frame reception and can end up decreasing the throughput 140106649Spdeuskar * of TCP traffic. If the system is reporting dropped receives, this value 141106649Spdeuskar * may be set too high, causing the driver to run out of available receive 142106649Spdeuskar * descriptors. 143106649Spdeuskar * 144106649Spdeuskar * CAUTION: When setting RxIntDelay to a value other than 0, adapters 145108229Spdeuskar * may hang (stop transmitting) under certain network conditions. 146106649Spdeuskar * If this occurs a WATCHDOG message is logged in the system event log. 147106649Spdeuskar * In addition, the controller is automatically reset, restoring the 148106649Spdeuskar * network connection. To eliminate the potential for the hang 149106649Spdeuskar * ensure that RxIntDelay is set to 0. 150106649Spdeuskar */ 151108229Spdeuskar#define EM_RDTR 0 152106649Spdeuskar 153108229Spdeuskar/* 154115878Spdeuskar * RxAbsIntDelay (Not valid for 82542 and 82543) 155108229Spdeuskar * Valid Range: 0-65535 (0=off) 156108229Spdeuskar * Default Value: 64 157108229Spdeuskar * This value, in units of 1.024 microseconds, limits the delay in which a 158108229Spdeuskar * receive interrupt is generated. Useful only if RxIntDelay is non-zero, 159108229Spdeuskar * this value ensures that an interrupt is generated after the initial 160108229Spdeuskar * packet is received within the set amount of time. Proper tuning, 161108229Spdeuskar * along with RxIntDelay, may improve traffic throughput in specific network 162108229Spdeuskar * conditions. 163108229Spdeuskar */ 164108229Spdeuskar#define EM_RADV 64 165106649Spdeuskar 166108229Spdeuskar 167106649Spdeuskar/* 168106649Spdeuskar * This parameter controls the maximum no of times the driver will loop 169106649Spdeuskar * in the isr. 170106649Spdeuskar * Minimum Value = 1 171106649Spdeuskar */ 172106649Spdeuskar#define EM_MAX_INTR 3 173106649Spdeuskar 174106649Spdeuskar/* 175106649Spdeuskar * Inform the stack about transmit checksum offload capabilities. 176106649Spdeuskar */ 17787189Spdeuskar#define EM_CHECKSUM_FEATURES (CSUM_TCP | CSUM_UDP) 178106649Spdeuskar 179106649Spdeuskar/* 180106649Spdeuskar * This parameter controls the duration of transmit watchdog timer. 181106649Spdeuskar */ 18287189Spdeuskar#define EM_TX_TIMEOUT 5 /* set to 5 seconds */ 18387189Spdeuskar 184106649Spdeuskar/* 185106649Spdeuskar * This parameter controls when the driver calls the routine to reclaim 186106649Spdeuskar * transmit descriptors. 187106649Spdeuskar */ 188106649Spdeuskar#define EM_TX_CLEANUP_THRESHOLD EM_MAX_TXD / 8 18987189Spdeuskar 190106649Spdeuskar/* 191106649Spdeuskar * This parameter controls whether or not autonegotation is enabled. 192106649Spdeuskar * 0 - Disable autonegotiation 193106649Spdeuskar * 1 - Enable autonegotiation 194106649Spdeuskar */ 195106649Spdeuskar#define DO_AUTO_NEG 1 196106649Spdeuskar 197106649Spdeuskar/* 198106649Spdeuskar * This parameter control whether or not the driver will wait for 199106649Spdeuskar * autonegotiation to complete. 200106649Spdeuskar * 1 - Wait for autonegotiation to complete 201106649Spdeuskar * 0 - Don't wait for autonegotiation to complete 202106649Spdeuskar */ 203115878Spdeuskar#define WAIT_FOR_AUTO_NEG_DEFAULT 0 204106649Spdeuskar 205106649Spdeuskar 206106649Spdeuskar/* Tunables -- End */ 207106649Spdeuskar 208106649Spdeuskar#define AUTONEG_ADV_DEFAULT (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \ 209106649Spdeuskar ADVERTISE_100_HALF | ADVERTISE_100_FULL | \ 210106649Spdeuskar ADVERTISE_1000_FULL) 211108229Spdeuskar 21287189Spdeuskar#define EM_VENDOR_ID 0x8086 21387189Spdeuskar#define EM_MMBA 0x0010 /* Mem base address */ 21487189Spdeuskar#define EM_ROUNDUP(size, unit) (((size) + (unit) - 1) & ~((unit) - 1)) 215112472Spdeuskar 21687189Spdeuskar#define EM_JUMBO_PBA 0x00000028 21787189Spdeuskar#define EM_DEFAULT_PBA 0x00000030 218112472Spdeuskar#define EM_SMARTSPEED_DOWNSHIFT 3 219112472Spdeuskar#define EM_SMARTSPEED_MAX 15 22087189Spdeuskar 221112472Spdeuskar 22287189Spdeuskar#define MAX_NUM_MULTICAST_ADDRESSES 128 22387189Spdeuskar#define PCI_ANY_ID (~0U) 22487189Spdeuskar#define ETHER_ALIGN 2 225108229Spdeuskar 22687189Spdeuskar/* Defines for printing debug information */ 22787189Spdeuskar#define DEBUG_INIT 0 22887189Spdeuskar#define DEBUG_IOCTL 0 22987189Spdeuskar#define DEBUG_HW 0 23087189Spdeuskar 23187189Spdeuskar#define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 23287189Spdeuskar#define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 23387189Spdeuskar#define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 23487189Spdeuskar#define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 23587189Spdeuskar#define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 23687189Spdeuskar#define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 23787189Spdeuskar#define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 23887189Spdeuskar#define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 23987189Spdeuskar#define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 24087189Spdeuskar 24187189Spdeuskar 24287189Spdeuskar/* Supported RX Buffer Sizes */ 24387189Spdeuskar#define EM_RXBUFFER_2048 2048 24487189Spdeuskar#define EM_RXBUFFER_4096 4096 24587189Spdeuskar#define EM_RXBUFFER_8192 8192 24687189Spdeuskar#define EM_RXBUFFER_16384 16384 24787189Spdeuskar 248114554Spdeuskar#define EM_MAX_SCATTER 64 249114554Spdeuskar 25093914Spdeuskar#ifdef __alpha__ 25197785Spdeuskar #undef vtophys 25297785Spdeuskar #define vtophys(va) alpha_XXX_dmamap((vm_offset_t)(va)) 25393914Spdeuskar#endif /* __alpha__ */ 25487189Spdeuskar 25587189Spdeuskar/* ****************************************************************************** 25687189Spdeuskar * vendor_info_array 25787189Spdeuskar * 25887189Spdeuskar * This array contains the list of Subvendor/Subdevice IDs on which the driver 25987189Spdeuskar * should load. 26087189Spdeuskar * 26187189Spdeuskar * ******************************************************************************/ 262106649Spdeuskartypedef struct _em_vendor_info_t { 26397785Spdeuskar unsigned int vendor_id; 26497785Spdeuskar unsigned int device_id; 26597785Spdeuskar unsigned int subvendor_id; 26697785Spdeuskar unsigned int subdevice_id; 26797785Spdeuskar unsigned int index; 26887189Spdeuskar} em_vendor_info_t; 26987189Spdeuskar 27087189Spdeuskar 271108229Spdeuskarstruct em_buffer { 272114554Spdeuskar struct mbuf *m_head; 273114554Spdeuskar bus_dmamap_t map; /* bus_dma map for packet */ 27487189Spdeuskar}; 27587189Spdeuskar 276114554Spdeuskarstruct em_q { 277114554Spdeuskar bus_dmamap_t map; /* bus_dma map for packet */ 278114554Spdeuskar int nsegs; /* # of segments/descriptors */ 279114554Spdeuskar bus_dma_segment_t segs[EM_MAX_SCATTER]; 280114554Spdeuskar}; 28187189Spdeuskar 282114554Spdeuskar/* 283114554Spdeuskar * Bus dma allocation structure used by 284114554Spdeuskar * em_dma_malloc and em_dma_free. 285114554Spdeuskar */ 286114554Spdeuskarstruct em_dma_alloc { 287114567Spdeuskar bus_addr_t dma_paddr; 288114554Spdeuskar caddr_t dma_vaddr; 289114554Spdeuskar bus_dma_tag_t dma_tag; 290114554Spdeuskar bus_dmamap_t dma_map; 291114554Spdeuskar bus_dma_segment_t dma_seg; 292114554Spdeuskar bus_size_t dma_size; 293114554Spdeuskar int dma_nseg; 294114554Spdeuskar}; 295114554Spdeuskar 29687189Spdeuskartypedef enum _XSUM_CONTEXT_T { 29797785Spdeuskar OFFLOAD_NONE, 29897785Spdeuskar OFFLOAD_TCP_IP, 29997785Spdeuskar OFFLOAD_UDP_IP 30087189Spdeuskar} XSUM_CONTEXT_T; 30187189Spdeuskar 30287189Spdeuskar/* Our adapter structure */ 30387189Spdeuskarstruct adapter { 30497785Spdeuskar struct arpcom interface_data; 30597785Spdeuskar struct adapter *next; 30697785Spdeuskar struct adapter *prev; 30797785Spdeuskar struct em_hw hw; 30887189Spdeuskar 30997785Spdeuskar /* FreeBSD operating-system-specific structures */ 31097785Spdeuskar struct em_osdep osdep; 31197785Spdeuskar struct device *dev; 31297785Spdeuskar struct resource *res_memory; 313100184Spdeuskar struct resource *res_ioport; 31497785Spdeuskar struct resource *res_interrupt; 31597785Spdeuskar void *int_handler_tag; 31697785Spdeuskar struct ifmedia media; 31797785Spdeuskar struct callout_handle timer_handle; 318112472Spdeuskar struct callout_handle tx_fifo_timer_handle; 319100184Spdeuskar int io_rid; 32097785Spdeuskar u_int8_t unit; 32187189Spdeuskar 32297785Spdeuskar /* Info about the board itself */ 32397785Spdeuskar u_int32_t part_num; 32497785Spdeuskar u_int8_t link_active; 32597785Spdeuskar u_int16_t link_speed; 32697785Spdeuskar u_int16_t link_duplex; 327112472Spdeuskar u_int32_t smartspeed; 32897785Spdeuskar u_int32_t tx_int_delay; 329108229Spdeuskar u_int32_t tx_abs_int_delay; 33097785Spdeuskar u_int32_t rx_int_delay; 331108229Spdeuskar u_int32_t rx_abs_int_delay; 33287189Spdeuskar 33397785Spdeuskar XSUM_CONTEXT_T active_checksum_context; 33487189Spdeuskar 335108229Spdeuskar /* 336108229Spdeuskar * Transmit definitions 337108229Spdeuskar * 338108229Spdeuskar * We have an array of num_tx_desc descriptors (handled 339108229Spdeuskar * by the controller) paired with an array of tx_buffers 340108229Spdeuskar * (at tx_buffer_area). 341108229Spdeuskar * The index of the next available descriptor is next_avail_tx_desc. 342108229Spdeuskar * The number of remaining tx_desc is num_tx_desc_avail. 343108229Spdeuskar */ 344114554Spdeuskar struct em_dma_alloc txdma; /* bus_dma glue for tx desc */ 345108229Spdeuskar struct em_tx_desc *tx_desc_base; 346108229Spdeuskar u_int32_t next_avail_tx_desc; 347108229Spdeuskar u_int32_t oldest_used_tx_desc; 348108229Spdeuskar volatile u_int16_t num_tx_desc_avail; 349108229Spdeuskar u_int16_t num_tx_desc; 350108229Spdeuskar u_int32_t txd_cmd; 351108229Spdeuskar struct em_buffer *tx_buffer_area; 352114554Spdeuskar bus_dma_tag_t txtag; /* dma tag for tx */ 35387189Spdeuskar 354108229Spdeuskar /* 355108229Spdeuskar * Receive definitions 356108229Spdeuskar * 357108229Spdeuskar * we have an array of num_rx_desc rx_desc (handled by the 358108229Spdeuskar * controller), and paired with an array of rx_buffers 359108229Spdeuskar * (at rx_buffer_area). 360108229Spdeuskar * The next pair to check on receive is at offset next_rx_desc_to_check 361108229Spdeuskar */ 362114554Spdeuskar struct em_dma_alloc rxdma; /* bus_dma glue for rx desc */ 363108229Spdeuskar struct em_rx_desc *rx_desc_base; 364108229Spdeuskar u_int32_t next_rx_desc_to_check; 365108229Spdeuskar u_int16_t num_rx_desc; 366108229Spdeuskar u_int32_t rx_buffer_len; 367108229Spdeuskar struct em_buffer *rx_buffer_area; 368114554Spdeuskar bus_dma_tag_t rxtag; 36987189Spdeuskar 37097785Spdeuskar /* Jumbo frame */ 371112472Spdeuskar struct mbuf *fmp; 372112472Spdeuskar struct mbuf *lmp; 37387189Spdeuskar 374112472Spdeuskar u_int16_t tx_fifo_head; 37587189Spdeuskar 376115878Spdeuskar struct sysctl_ctx_list sysctl_ctx; 377115878Spdeuskar struct sysctl_oid *sysctl_tree; 378115878Spdeuskar 37997785Spdeuskar /* Misc stats maintained by the driver */ 38097785Spdeuskar unsigned long dropped_pkts; 38197785Spdeuskar unsigned long mbuf_alloc_failed; 38297785Spdeuskar unsigned long mbuf_cluster_failed; 383106649Spdeuskar unsigned long no_tx_desc_avail1; 384106649Spdeuskar unsigned long no_tx_desc_avail2; 385114554Spdeuskar unsigned long no_tx_map_avail; 386114554Spdeuskar unsigned long no_tx_dma_setup; 387112472Spdeuskar u_int64_t tx_fifo_reset; 388112472Spdeuskar u_int64_t tx_fifo_wrk; 389112472Spdeuskar 39097785Spdeuskar#ifdef DBG_STATS 39197785Spdeuskar unsigned long no_pkts_avail; 39297785Spdeuskar unsigned long clean_tx_interrupts; 39393914Spdeuskar 39487189Spdeuskar#endif 39597785Spdeuskar struct em_hw_stats stats; 39687189Spdeuskar}; 39787189Spdeuskar 39887189Spdeuskar#endif /* _EM_H_DEFINED_ */ 399