1247835Skib/**************************************************************************
2247835Skib *
3247835Skib * Copyright (c) 2006-2009 VMware, Inc., Palo Alto, CA., USA
4247835Skib * All Rights Reserved.
5247835Skib *
6247835Skib * Permission is hereby granted, free of charge, to any person obtaining a
7247835Skib * copy of this software and associated documentation files (the
8247835Skib * "Software"), to deal in the Software without restriction, including
9247835Skib * without limitation the rights to use, copy, modify, merge, publish,
10247835Skib * distribute, sub license, and/or sell copies of the Software, and to
11247835Skib * permit persons to whom the Software is furnished to do so, subject to
12247835Skib * the following conditions:
13247835Skib *
14247835Skib * The above copyright notice and this permission notice (including the
15247835Skib * next paragraph) shall be included in all copies or substantial portions
16247835Skib * of the Software.
17247835Skib *
18247835Skib * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19247835Skib * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20247835Skib * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21247835Skib * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22247835Skib * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23247835Skib * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24247835Skib * USE OR OTHER DEALINGS IN THE SOFTWARE.
25247835Skib *
26247835Skib **************************************************************************/
27247835Skib/*
28247835Skib * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com>
29247835Skib */
30247835Skib/* $FreeBSD$ */
31247835Skib
32247835Skib#ifndef _TTM_PLACEMENT_H_
33247835Skib#define _TTM_PLACEMENT_H_
34247835Skib/*
35247835Skib * Memory regions for data placement.
36247835Skib */
37247835Skib
38247835Skib#define TTM_PL_SYSTEM           0
39247835Skib#define TTM_PL_TT               1
40247835Skib#define TTM_PL_VRAM             2
41247835Skib#define TTM_PL_PRIV0            3
42247835Skib#define TTM_PL_PRIV1            4
43247835Skib#define TTM_PL_PRIV2            5
44247835Skib#define TTM_PL_PRIV3            6
45247835Skib#define TTM_PL_PRIV4            7
46247835Skib#define TTM_PL_PRIV5            8
47247835Skib#define TTM_PL_SWAPPED          15
48247835Skib
49247835Skib#define TTM_PL_FLAG_SYSTEM      (1 << TTM_PL_SYSTEM)
50247835Skib#define TTM_PL_FLAG_TT          (1 << TTM_PL_TT)
51247835Skib#define TTM_PL_FLAG_VRAM        (1 << TTM_PL_VRAM)
52247835Skib#define TTM_PL_FLAG_PRIV0       (1 << TTM_PL_PRIV0)
53247835Skib#define TTM_PL_FLAG_PRIV1       (1 << TTM_PL_PRIV1)
54247835Skib#define TTM_PL_FLAG_PRIV2       (1 << TTM_PL_PRIV2)
55247835Skib#define TTM_PL_FLAG_PRIV3       (1 << TTM_PL_PRIV3)
56247835Skib#define TTM_PL_FLAG_PRIV4       (1 << TTM_PL_PRIV4)
57247835Skib#define TTM_PL_FLAG_PRIV5       (1 << TTM_PL_PRIV5)
58247835Skib#define TTM_PL_FLAG_SWAPPED     (1 << TTM_PL_SWAPPED)
59247835Skib#define TTM_PL_MASK_MEM         0x0000FFFF
60247835Skib
61247835Skib/*
62247835Skib * Other flags that affects data placement.
63247835Skib * TTM_PL_FLAG_CACHED indicates cache-coherent mappings
64247835Skib * if available.
65247835Skib * TTM_PL_FLAG_SHARED means that another application may
66247835Skib * reference the buffer.
67247835Skib * TTM_PL_FLAG_NO_EVICT means that the buffer may never
68247835Skib * be evicted to make room for other buffers.
69247835Skib */
70247835Skib
71247835Skib#define TTM_PL_FLAG_CACHED      (1 << 16)
72247835Skib#define TTM_PL_FLAG_UNCACHED    (1 << 17)
73247835Skib#define TTM_PL_FLAG_WC          (1 << 18)
74247835Skib#define TTM_PL_FLAG_SHARED      (1 << 20)
75247835Skib#define TTM_PL_FLAG_NO_EVICT    (1 << 21)
76247835Skib
77247835Skib#define TTM_PL_MASK_CACHING     (TTM_PL_FLAG_CACHED | \
78247835Skib				 TTM_PL_FLAG_UNCACHED | \
79247835Skib				 TTM_PL_FLAG_WC)
80247835Skib
81247835Skib#define TTM_PL_MASK_MEMTYPE     (TTM_PL_MASK_MEM | TTM_PL_MASK_CACHING)
82247835Skib
83247835Skib/*
84247835Skib * Access flags to be used for CPU- and GPU- mappings.
85247835Skib * The idea is that the TTM synchronization mechanism will
86247835Skib * allow concurrent READ access and exclusive write access.
87247835Skib * Currently GPU- and CPU accesses are exclusive.
88247835Skib */
89247835Skib
90247835Skib#define TTM_ACCESS_READ         (1 << 0)
91247835Skib#define TTM_ACCESS_WRITE        (1 << 1)
92247835Skib
93247835Skib#endif
94