drm_edid.c revision 259717
1/* 2 * Copyright (c) 2006 Luc Verhaegen (quirks list) 3 * Copyright (c) 2007-2008 Intel Corporation 4 * Jesse Barnes <jesse.barnes@intel.com> 5 * Copyright 2010 Red Hat, Inc. 6 * 7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from 8 * FB layer. 9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com> 10 * 11 * Permission is hereby granted, free of charge, to any person obtaining a 12 * copy of this software and associated documentation files (the "Software"), 13 * to deal in the Software without restriction, including without limitation 14 * the rights to use, copy, modify, merge, publish, distribute, sub license, 15 * and/or sell copies of the Software, and to permit persons to whom the 16 * Software is furnished to do so, subject to the following conditions: 17 * 18 * The above copyright notice and this permission notice (including the 19 * next paragraph) shall be included in all copies or substantial portions 20 * of the Software. 21 * 22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 28 * DEALINGS IN THE SOFTWARE. 29 */ 30 31#include <sys/cdefs.h> 32__FBSDID("$FreeBSD: head/sys/dev/drm2/drm_edid.c 259717 2013-12-22 11:11:23Z dumbbell $"); 33 34#include <dev/drm2/drmP.h> 35#include <dev/drm2/drm_edid.h> 36#include <dev/drm2/drm_edid_modes.h> 37#include <dev/iicbus/iic.h> 38#include <dev/iicbus/iiconf.h> 39#include "iicbus_if.h" 40 41#define version_greater(edid, maj, min) \ 42 (((edid)->version > (maj)) || \ 43 ((edid)->version == (maj) && (edid)->revision > (min))) 44 45#define EDID_EST_TIMINGS 16 46#define EDID_STD_TIMINGS 8 47#define EDID_DETAILED_TIMINGS 4 48 49/* 50 * EDID blocks out in the wild have a variety of bugs, try to collect 51 * them here (note that userspace may work around broken monitors first, 52 * but fixes should make their way here so that the kernel "just works" 53 * on as many displays as possible). 54 */ 55 56/* First detailed mode wrong, use largest 60Hz mode */ 57#define EDID_QUIRK_PREFER_LARGE_60 (1 << 0) 58/* Reported 135MHz pixel clock is too high, needs adjustment */ 59#define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1) 60/* Prefer the largest mode at 75 Hz */ 61#define EDID_QUIRK_PREFER_LARGE_75 (1 << 2) 62/* Detail timing is in cm not mm */ 63#define EDID_QUIRK_DETAILED_IN_CM (1 << 3) 64/* Detailed timing descriptors have bogus size values, so just take the 65 * maximum size and use that. 66 */ 67#define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4) 68/* Monitor forgot to set the first detailed is preferred bit. */ 69#define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5) 70/* use +hsync +vsync for detailed mode */ 71#define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6) 72 73struct detailed_mode_closure { 74 struct drm_connector *connector; 75 struct edid *edid; 76 bool preferred; 77 u32 quirks; 78 int modes; 79}; 80 81#define LEVEL_DMT 0 82#define LEVEL_GTF 1 83#define LEVEL_GTF2 2 84#define LEVEL_CVT 3 85 86static struct edid_quirk { 87 char *vendor; 88 int product_id; 89 u32 quirks; 90} edid_quirk_list[] = { 91 /* Acer AL1706 */ 92 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 }, 93 /* Acer F51 */ 94 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 }, 95 /* Unknown Acer */ 96 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 97 98 /* Belinea 10 15 55 */ 99 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 }, 100 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 }, 101 102 /* Envision Peripherals, Inc. EN-7100e */ 103 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH }, 104 /* Envision EN2028 */ 105 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 }, 106 107 /* Funai Electronics PM36B */ 108 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 | 109 EDID_QUIRK_DETAILED_IN_CM }, 110 111 /* LG Philips LCD LP154W01-A5 */ 112 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, 113 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, 114 115 /* Philips 107p5 CRT */ 116 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 117 118 /* Proview AY765C */ 119 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 120 121 /* Samsung SyncMaster 205BW. Note: irony */ 122 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP }, 123 /* Samsung SyncMaster 22[5-6]BW */ 124 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 }, 125 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 }, 126}; 127 128/*** DDC fetch and block validation ***/ 129 130static const u8 edid_header[] = { 131 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 132}; 133 134 /* 135 * Sanity check the header of the base EDID block. Return 8 if the header 136 * is perfect, down to 0 if it's totally wrong. 137 */ 138int drm_edid_header_is_valid(const u8 *raw_edid) 139{ 140 int i, score = 0; 141 142 for (i = 0; i < sizeof(edid_header); i++) 143 if (raw_edid[i] == edid_header[i]) 144 score++; 145 146 return score; 147} 148 149/* 150 * Sanity check the EDID block (base or extension). Return 0 if the block 151 * doesn't check out, or 1 if it's valid. 152 */ 153static bool 154drm_edid_block_valid(u8 *raw_edid) 155{ 156 int i; 157 u8 csum = 0; 158 struct edid *edid = (struct edid *)raw_edid; 159 160 if (raw_edid[0] == 0x00) { 161 int score = drm_edid_header_is_valid(raw_edid); 162 if (score == 8) ; 163 else if (score >= 6) { 164 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n"); 165 memcpy(raw_edid, edid_header, sizeof(edid_header)); 166 } else { 167 goto bad; 168 } 169 } 170 171 for (i = 0; i < EDID_LENGTH; i++) 172 csum += raw_edid[i]; 173 if (csum) { 174 DRM_DEBUG("EDID checksum is invalid, remainder is %d\n", csum); 175 176 /* allow CEA to slide through, switches mangle this */ 177 if (raw_edid[0] != 0x02) 178 goto bad; 179 } 180 181 /* per-block-type checks */ 182 switch (raw_edid[0]) { 183 case 0: /* base */ 184 if (edid->version != 1) { 185 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version); 186 goto bad; 187 } 188 189 if (edid->revision > 4) 190 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n"); 191 break; 192 193 default: 194 break; 195 } 196 197 return 1; 198 199bad: 200 if (raw_edid) { 201 DRM_DEBUG_KMS("Raw EDID:\n"); 202 if ((drm_debug_flag & DRM_DEBUGBITS_KMS) != 0) { 203 for (i = 0; i < EDID_LENGTH; ) { 204 printf("%02x", raw_edid[i]); 205 i++; 206 if (i % 16 == 0 || i == EDID_LENGTH) 207 printf("\n"); 208 else if (i % 8 == 0) 209 printf(" "); 210 else 211 printf(" "); 212 } 213 } 214 } 215 return 0; 216} 217 218/** 219 * drm_edid_is_valid - sanity check EDID data 220 * @edid: EDID data 221 * 222 * Sanity-check an entire EDID record (including extensions) 223 */ 224bool drm_edid_is_valid(struct edid *edid) 225{ 226 int i; 227 u8 *raw = (u8 *)edid; 228 229 if (!edid) 230 return false; 231 232 for (i = 0; i <= edid->extensions; i++) 233 if (!drm_edid_block_valid(raw + i * EDID_LENGTH)) 234 return false; 235 236 return true; 237} 238 239#define DDC_ADDR 0x50 240#define DDC_SEGMENT_ADDR 0x30 241/** 242 * Get EDID information via I2C. 243 * 244 * \param adapter : i2c device adaptor 245 * \param buf : EDID data buffer to be filled 246 * \param len : EDID data buffer length 247 * \return 0 on success or -1 on failure. 248 * 249 * Try to fetch EDID information by calling i2c driver function. 250 */ 251static int 252drm_do_probe_ddc_edid(device_t adapter, unsigned char *buf, 253 int block, int len) 254{ 255 unsigned char start = block * EDID_LENGTH; 256 unsigned char segment = block >> 1; 257 unsigned char xfers = segment ? 3 : 2; 258 int ret, retries = 5; 259 260 /* The core i2c driver will automatically retry the transfer if the 261 * adapter reports EAGAIN. However, we find that bit-banging transfers 262 * are susceptible to errors under a heavily loaded machine and 263 * generate spurious NAKs and timeouts. Retrying the transfer 264 * of the individual block a few times seems to overcome this. 265 */ 266 do { 267 struct iic_msg msgs[] = { 268 { 269 .slave = DDC_SEGMENT_ADDR << 1, 270 .flags = 0, 271 .len = 1, 272 .buf = &segment, 273 }, { 274 .slave = DDC_ADDR << 1, 275 .flags = IIC_M_WR, 276 .len = 1, 277 .buf = &start, 278 }, { 279 .slave = DDC_ADDR << 1, 280 .flags = IIC_M_RD, 281 .len = len, 282 .buf = buf, 283 } 284 }; 285 286 /* 287 * Avoid sending the segment addr to not upset non-compliant ddc 288 * monitors. 289 */ 290 ret = iicbus_transfer(adapter, &msgs[3 - xfers], xfers); 291 292 if (ret != 0) 293 DRM_DEBUG_KMS("iicbus_transfer countdown %d error %d\n", 294 retries, ret); 295 } while (ret != 0 && --retries); 296 297 return (ret == 0 ? 0 : -1); 298} 299 300static bool drm_edid_is_zero(u8 *in_edid, int length) 301{ 302 int i; 303 u32 *raw_edid = (u32 *)in_edid; 304 305 for (i = 0; i < length / 4; i++) 306 if (*(raw_edid + i) != 0) 307 return false; 308 return true; 309} 310 311static u8 * 312drm_do_get_edid(struct drm_connector *connector, device_t adapter) 313{ 314 int i, j = 0, valid_extensions = 0; 315 u8 *block, *new; 316 317 block = malloc(EDID_LENGTH, DRM_MEM_KMS, M_WAITOK | M_ZERO); 318 319 /* base block fetch */ 320 for (i = 0; i < 4; i++) { 321 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH)) 322 goto out; 323 if (drm_edid_block_valid(block)) 324 break; 325 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) { 326 connector->null_edid_counter++; 327 goto carp; 328 } 329 } 330 if (i == 4) 331 goto carp; 332 333 /* if there's no extensions, we're done */ 334 if (block[0x7e] == 0) 335 return block; 336 337 new = reallocf(block, (block[0x7e] + 1) * EDID_LENGTH, DRM_MEM_KMS, 338 M_WAITOK); 339 block = new; 340 341 for (j = 1; j <= block[0x7e]; j++) { 342 for (i = 0; i < 4; i++) { 343 if (drm_do_probe_ddc_edid(adapter, 344 block + (valid_extensions + 1) * EDID_LENGTH, 345 j, EDID_LENGTH)) 346 goto out; 347 if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH)) { 348 valid_extensions++; 349 break; 350 } 351 } 352 if (i == 4) 353 DRM_DEBUG_KMS("%s: Ignoring invalid EDID block %d.\n", 354 drm_get_connector_name(connector), j); 355 } 356 357 if (valid_extensions != block[0x7e]) { 358 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions; 359 block[0x7e] = valid_extensions; 360 new = reallocf(block, (valid_extensions + 1) * EDID_LENGTH, 361 DRM_MEM_KMS, M_WAITOK); 362 block = new; 363 } 364 365 DRM_DEBUG_KMS("got EDID from %s\n", drm_get_connector_name(connector)); 366 return block; 367 368carp: 369 DRM_ERROR("%s: EDID block %d invalid.\n", 370 drm_get_connector_name(connector), j); 371 372out: 373 free(block, DRM_MEM_KMS); 374 return NULL; 375} 376 377/** 378 * Probe DDC presence. 379 * 380 * \param adapter : i2c device adaptor 381 * \return 1 on success 382 */ 383static bool 384drm_probe_ddc(device_t adapter) 385{ 386 unsigned char out; 387 388 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0); 389} 390 391/** 392 * drm_get_edid - get EDID data, if available 393 * @connector: connector we're probing 394 * @adapter: i2c adapter to use for DDC 395 * 396 * Poke the given i2c channel to grab EDID data if possible. If found, 397 * attach it to the connector. 398 * 399 * Return edid data or NULL if we couldn't find any. 400 */ 401struct edid *drm_get_edid(struct drm_connector *connector, 402 device_t adapter) 403{ 404 struct edid *edid = NULL; 405 406 if (drm_probe_ddc(adapter)) 407 edid = (struct edid *)drm_do_get_edid(connector, adapter); 408 409 connector->display_info.raw_edid = (char *)edid; 410 411 return edid; 412 413} 414 415/*** EDID parsing ***/ 416 417/** 418 * edid_vendor - match a string against EDID's obfuscated vendor field 419 * @edid: EDID to match 420 * @vendor: vendor string 421 * 422 * Returns true if @vendor is in @edid, false otherwise 423 */ 424static bool edid_vendor(struct edid *edid, char *vendor) 425{ 426 char edid_vendor[3]; 427 428 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@'; 429 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) | 430 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@'; 431 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@'; 432 433 return !strncmp(edid_vendor, vendor, 3); 434} 435 436/** 437 * edid_get_quirks - return quirk flags for a given EDID 438 * @edid: EDID to process 439 * 440 * This tells subsequent routines what fixes they need to apply. 441 */ 442static u32 edid_get_quirks(struct edid *edid) 443{ 444 struct edid_quirk *quirk; 445 int i; 446 447 for (i = 0; i < DRM_ARRAY_SIZE(edid_quirk_list); i++) { 448 quirk = &edid_quirk_list[i]; 449 450 if (edid_vendor(edid, quirk->vendor) && 451 (EDID_PRODUCT_ID(edid) == quirk->product_id)) 452 return quirk->quirks; 453 } 454 455 return 0; 456} 457 458#define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay) 459#define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh)) 460 461/** 462 * edid_fixup_preferred - set preferred modes based on quirk list 463 * @connector: has mode list to fix up 464 * @quirks: quirks list 465 * 466 * Walk the mode list for @connector, clearing the preferred status 467 * on existing modes and setting it anew for the right mode ala @quirks. 468 */ 469static void edid_fixup_preferred(struct drm_connector *connector, 470 u32 quirks) 471{ 472 struct drm_display_mode *t, *cur_mode, *preferred_mode; 473 int target_refresh = 0; 474 475 if (list_empty(&connector->probed_modes)) 476 return; 477 478 if (quirks & EDID_QUIRK_PREFER_LARGE_60) 479 target_refresh = 60; 480 if (quirks & EDID_QUIRK_PREFER_LARGE_75) 481 target_refresh = 75; 482 483 preferred_mode = list_first_entry(&connector->probed_modes, 484 struct drm_display_mode, head); 485 486 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) { 487 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED; 488 489 if (cur_mode == preferred_mode) 490 continue; 491 492 /* Largest mode is preferred */ 493 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode)) 494 preferred_mode = cur_mode; 495 496 /* At a given size, try to get closest to target refresh */ 497 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) && 498 MODE_REFRESH_DIFF(cur_mode, target_refresh) < 499 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) { 500 preferred_mode = cur_mode; 501 } 502 } 503 504 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED; 505} 506 507struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev, 508 int hsize, int vsize, int fresh) 509{ 510 struct drm_display_mode *mode = NULL; 511 int i; 512 513 for (i = 0; i < drm_num_dmt_modes; i++) { 514 struct drm_display_mode *ptr = &drm_dmt_modes[i]; 515 if (hsize == ptr->hdisplay && 516 vsize == ptr->vdisplay && 517 fresh == drm_mode_vrefresh(ptr)) { 518 /* get the expected default mode */ 519 mode = drm_mode_duplicate(dev, ptr); 520 break; 521 } 522 } 523 return mode; 524} 525 526typedef void detailed_cb(struct detailed_timing *timing, void *closure); 527 528static void 529cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) 530{ 531 int i, n = 0; 532 u8 rev = ext[0x01], d = ext[0x02]; 533 u8 *det_base = ext + d; 534 535 switch (rev) { 536 case 0: 537 /* can't happen */ 538 return; 539 case 1: 540 /* have to infer how many blocks we have, check pixel clock */ 541 for (i = 0; i < 6; i++) 542 if (det_base[18*i] || det_base[18*i+1]) 543 n++; 544 break; 545 default: 546 /* explicit count */ 547 n = min(ext[0x03] & 0x0f, 6); 548 break; 549 } 550 551 for (i = 0; i < n; i++) 552 cb((struct detailed_timing *)(det_base + 18 * i), closure); 553} 554 555static void 556vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) 557{ 558 unsigned int i, n = min((int)ext[0x02], 6); 559 u8 *det_base = ext + 5; 560 561 if (ext[0x01] != 1) 562 return; /* unknown version */ 563 564 for (i = 0; i < n; i++) 565 cb((struct detailed_timing *)(det_base + 18 * i), closure); 566} 567 568static void 569drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure) 570{ 571 int i; 572 struct edid *edid = (struct edid *)raw_edid; 573 574 if (edid == NULL) 575 return; 576 577 for (i = 0; i < EDID_DETAILED_TIMINGS; i++) 578 cb(&(edid->detailed_timings[i]), closure); 579 580 for (i = 1; i <= raw_edid[0x7e]; i++) { 581 u8 *ext = raw_edid + (i * EDID_LENGTH); 582 switch (*ext) { 583 case CEA_EXT: 584 cea_for_each_detailed_block(ext, cb, closure); 585 break; 586 case VTB_EXT: 587 vtb_for_each_detailed_block(ext, cb, closure); 588 break; 589 default: 590 break; 591 } 592 } 593} 594 595static void 596is_rb(struct detailed_timing *t, void *data) 597{ 598 u8 *r = (u8 *)t; 599 if (r[3] == EDID_DETAIL_MONITOR_RANGE) 600 if (r[15] & 0x10) 601 *(bool *)data = true; 602} 603 604/* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */ 605static bool 606drm_monitor_supports_rb(struct edid *edid) 607{ 608 if (edid->revision >= 4) { 609 bool ret; 610 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret); 611 return ret; 612 } 613 614 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0); 615} 616 617static void 618find_gtf2(struct detailed_timing *t, void *data) 619{ 620 u8 *r = (u8 *)t; 621 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02) 622 *(u8 **)data = r; 623} 624 625/* Secondary GTF curve kicks in above some break frequency */ 626static int 627drm_gtf2_hbreak(struct edid *edid) 628{ 629 u8 *r = NULL; 630 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 631 return r ? (r[12] * 2) : 0; 632} 633 634static int 635drm_gtf2_2c(struct edid *edid) 636{ 637 u8 *r = NULL; 638 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 639 return r ? r[13] : 0; 640} 641 642static int 643drm_gtf2_m(struct edid *edid) 644{ 645 u8 *r = NULL; 646 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 647 return r ? (r[15] << 8) + r[14] : 0; 648} 649 650static int 651drm_gtf2_k(struct edid *edid) 652{ 653 u8 *r = NULL; 654 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 655 return r ? r[16] : 0; 656} 657 658static int 659drm_gtf2_2j(struct edid *edid) 660{ 661 u8 *r = NULL; 662 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 663 return r ? r[17] : 0; 664} 665 666/** 667 * standard_timing_level - get std. timing level(CVT/GTF/DMT) 668 * @edid: EDID block to scan 669 */ 670static int standard_timing_level(struct edid *edid) 671{ 672 if (edid->revision >= 2) { 673 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)) 674 return LEVEL_CVT; 675 if (drm_gtf2_hbreak(edid)) 676 return LEVEL_GTF2; 677 return LEVEL_GTF; 678 } 679 return LEVEL_DMT; 680} 681 682/* 683 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old 684 * monitors fill with ascii space (0x20) instead. 685 */ 686static int 687bad_std_timing(u8 a, u8 b) 688{ 689 return (a == 0x00 && b == 0x00) || 690 (a == 0x01 && b == 0x01) || 691 (a == 0x20 && b == 0x20); 692} 693 694/** 695 * drm_mode_std - convert standard mode info (width, height, refresh) into mode 696 * @t: standard timing params 697 * @timing_level: standard timing level 698 * 699 * Take the standard timing params (in this case width, aspect, and refresh) 700 * and convert them into a real mode using CVT/GTF/DMT. 701 */ 702static struct drm_display_mode * 703drm_mode_std(struct drm_connector *connector, struct edid *edid, 704 struct std_timing *t, int revision) 705{ 706 struct drm_device *dev = connector->dev; 707 struct drm_display_mode *m, *mode = NULL; 708 int hsize, vsize; 709 int vrefresh_rate; 710 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK) 711 >> EDID_TIMING_ASPECT_SHIFT; 712 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK) 713 >> EDID_TIMING_VFREQ_SHIFT; 714 int timing_level = standard_timing_level(edid); 715 716 if (bad_std_timing(t->hsize, t->vfreq_aspect)) 717 return NULL; 718 719 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */ 720 hsize = t->hsize * 8 + 248; 721 /* vrefresh_rate = vfreq + 60 */ 722 vrefresh_rate = vfreq + 60; 723 /* the vdisplay is calculated based on the aspect ratio */ 724 if (aspect_ratio == 0) { 725 if (revision < 3) 726 vsize = hsize; 727 else 728 vsize = (hsize * 10) / 16; 729 } else if (aspect_ratio == 1) 730 vsize = (hsize * 3) / 4; 731 else if (aspect_ratio == 2) 732 vsize = (hsize * 4) / 5; 733 else 734 vsize = (hsize * 9) / 16; 735 736 /* HDTV hack, part 1 */ 737 if (vrefresh_rate == 60 && 738 ((hsize == 1360 && vsize == 765) || 739 (hsize == 1368 && vsize == 769))) { 740 hsize = 1366; 741 vsize = 768; 742 } 743 744 /* 745 * If this connector already has a mode for this size and refresh 746 * rate (because it came from detailed or CVT info), use that 747 * instead. This way we don't have to guess at interlace or 748 * reduced blanking. 749 */ 750 list_for_each_entry(m, &connector->probed_modes, head) 751 if (m->hdisplay == hsize && m->vdisplay == vsize && 752 drm_mode_vrefresh(m) == vrefresh_rate) 753 return NULL; 754 755 /* HDTV hack, part 2 */ 756 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) { 757 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0, 758 false); 759 mode->hdisplay = 1366; 760 mode->hsync_start = mode->hsync_start - 1; 761 mode->hsync_end = mode->hsync_end - 1; 762 return mode; 763 } 764 765 /* check whether it can be found in default mode table */ 766 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate); 767 if (mode) 768 return mode; 769 770 switch (timing_level) { 771 case LEVEL_DMT: 772 break; 773 case LEVEL_GTF: 774 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); 775 break; 776 case LEVEL_GTF2: 777 /* 778 * This is potentially wrong if there's ever a monitor with 779 * more than one ranges section, each claiming a different 780 * secondary GTF curve. Please don't do that. 781 */ 782 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); 783 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) { 784 free(mode, DRM_MEM_KMS); 785 mode = drm_gtf_mode_complex(dev, hsize, vsize, 786 vrefresh_rate, 0, 0, 787 drm_gtf2_m(edid), 788 drm_gtf2_2c(edid), 789 drm_gtf2_k(edid), 790 drm_gtf2_2j(edid)); 791 } 792 break; 793 case LEVEL_CVT: 794 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0, 795 false); 796 break; 797 } 798 return mode; 799} 800 801/* 802 * EDID is delightfully ambiguous about how interlaced modes are to be 803 * encoded. Our internal representation is of frame height, but some 804 * HDTV detailed timings are encoded as field height. 805 * 806 * The format list here is from CEA, in frame size. Technically we 807 * should be checking refresh rate too. Whatever. 808 */ 809static void 810drm_mode_do_interlace_quirk(struct drm_display_mode *mode, 811 struct detailed_pixel_timing *pt) 812{ 813 int i; 814 static const struct { 815 int w, h; 816 } cea_interlaced[] = { 817 { 1920, 1080 }, 818 { 720, 480 }, 819 { 1440, 480 }, 820 { 2880, 480 }, 821 { 720, 576 }, 822 { 1440, 576 }, 823 { 2880, 576 }, 824 }; 825 826 if (!(pt->misc & DRM_EDID_PT_INTERLACED)) 827 return; 828 829 for (i = 0; i < DRM_ARRAY_SIZE(cea_interlaced); i++) { 830 if ((mode->hdisplay == cea_interlaced[i].w) && 831 (mode->vdisplay == cea_interlaced[i].h / 2)) { 832 mode->vdisplay *= 2; 833 mode->vsync_start *= 2; 834 mode->vsync_end *= 2; 835 mode->vtotal *= 2; 836 mode->vtotal |= 1; 837 } 838 } 839 840 mode->flags |= DRM_MODE_FLAG_INTERLACE; 841} 842 843/** 844 * drm_mode_detailed - create a new mode from an EDID detailed timing section 845 * @dev: DRM device (needed to create new mode) 846 * @edid: EDID block 847 * @timing: EDID detailed timing info 848 * @quirks: quirks to apply 849 * 850 * An EDID detailed timing block contains enough info for us to create and 851 * return a new struct drm_display_mode. 852 */ 853static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, 854 struct edid *edid, 855 struct detailed_timing *timing, 856 u32 quirks) 857{ 858 struct drm_display_mode *mode; 859 struct detailed_pixel_timing *pt = &timing->data.pixel_data; 860 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; 861 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; 862 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo; 863 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo; 864 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo; 865 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo; 866 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4; 867 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf); 868 869 /* ignore tiny modes */ 870 if (hactive < 64 || vactive < 64) 871 return NULL; 872 873 if (pt->misc & DRM_EDID_PT_STEREO) { 874 printf("stereo mode not supported\n"); 875 return NULL; 876 } 877 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { 878 printf("composite sync not supported\n"); 879 } 880 881 /* it is incorrect if hsync/vsync width is zero */ 882 if (!hsync_pulse_width || !vsync_pulse_width) { 883 DRM_DEBUG_KMS("Incorrect Detailed timing. " 884 "Wrong Hsync/Vsync pulse width\n"); 885 return NULL; 886 } 887 mode = drm_mode_create(dev); 888 if (!mode) 889 return NULL; 890 891 mode->type = DRM_MODE_TYPE_DRIVER; 892 893 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH) 894 timing->pixel_clock = htole16(1088); 895 896 mode->clock = le16toh(timing->pixel_clock) * 10; 897 898 mode->hdisplay = hactive; 899 mode->hsync_start = mode->hdisplay + hsync_offset; 900 mode->hsync_end = mode->hsync_start + hsync_pulse_width; 901 mode->htotal = mode->hdisplay + hblank; 902 903 mode->vdisplay = vactive; 904 mode->vsync_start = mode->vdisplay + vsync_offset; 905 mode->vsync_end = mode->vsync_start + vsync_pulse_width; 906 mode->vtotal = mode->vdisplay + vblank; 907 908 /* Some EDIDs have bogus h/vtotal values */ 909 if (mode->hsync_end > mode->htotal) 910 mode->htotal = mode->hsync_end + 1; 911 if (mode->vsync_end > mode->vtotal) 912 mode->vtotal = mode->vsync_end + 1; 913 914 drm_mode_do_interlace_quirk(mode, pt); 915 916 drm_mode_set_name(mode); 917 918 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) { 919 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE; 920 } 921 922 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? 923 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 924 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? 925 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 926 927 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4; 928 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8; 929 930 if (quirks & EDID_QUIRK_DETAILED_IN_CM) { 931 mode->width_mm *= 10; 932 mode->height_mm *= 10; 933 } 934 935 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { 936 mode->width_mm = edid->width_cm * 10; 937 mode->height_mm = edid->height_cm * 10; 938 } 939 940 return mode; 941} 942 943static bool 944mode_is_rb(const struct drm_display_mode *mode) 945{ 946 return (mode->htotal - mode->hdisplay == 160) && 947 (mode->hsync_end - mode->hdisplay == 80) && 948 (mode->hsync_end - mode->hsync_start == 32) && 949 (mode->vsync_start - mode->vdisplay == 3); 950} 951 952static bool 953mode_in_hsync_range(struct drm_display_mode *mode, 954 struct edid *edid, u8 *t) 955{ 956 int hsync, hmin, hmax; 957 958 hmin = t[7]; 959 if (edid->revision >= 4) 960 hmin += ((t[4] & 0x04) ? 255 : 0); 961 hmax = t[8]; 962 if (edid->revision >= 4) 963 hmax += ((t[4] & 0x08) ? 255 : 0); 964 hsync = drm_mode_hsync(mode); 965 966 return (hsync <= hmax && hsync >= hmin); 967} 968 969static bool 970mode_in_vsync_range(struct drm_display_mode *mode, 971 struct edid *edid, u8 *t) 972{ 973 int vsync, vmin, vmax; 974 975 vmin = t[5]; 976 if (edid->revision >= 4) 977 vmin += ((t[4] & 0x01) ? 255 : 0); 978 vmax = t[6]; 979 if (edid->revision >= 4) 980 vmax += ((t[4] & 0x02) ? 255 : 0); 981 vsync = drm_mode_vrefresh(mode); 982 983 return (vsync <= vmax && vsync >= vmin); 984} 985 986static u32 987range_pixel_clock(struct edid *edid, u8 *t) 988{ 989 /* unspecified */ 990 if (t[9] == 0 || t[9] == 255) 991 return 0; 992 993 /* 1.4 with CVT support gives us real precision, yay */ 994 if (edid->revision >= 4 && t[10] == 0x04) 995 return (t[9] * 10000) - ((t[12] >> 2) * 250); 996 997 /* 1.3 is pathetic, so fuzz up a bit */ 998 return t[9] * 10000 + 5001; 999} 1000 1001static bool 1002mode_in_range(struct drm_display_mode *mode, struct edid *edid, 1003 struct detailed_timing *timing) 1004{ 1005 u32 max_clock; 1006 u8 *t = (u8 *)timing; 1007 1008 if (!mode_in_hsync_range(mode, edid, t)) 1009 return false; 1010 1011 if (!mode_in_vsync_range(mode, edid, t)) 1012 return false; 1013 1014 if ((max_clock = range_pixel_clock(edid, t))) 1015 if (mode->clock > max_clock) 1016 return false; 1017 1018 /* 1.4 max horizontal check */ 1019 if (edid->revision >= 4 && t[10] == 0x04) 1020 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3)))) 1021 return false; 1022 1023 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid)) 1024 return false; 1025 1026 return true; 1027} 1028 1029/* 1030 * XXX If drm_dmt_modes ever regrows the CVT-R modes (and it will) this will 1031 * need to account for them. 1032 */ 1033static int 1034drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid, 1035 struct detailed_timing *timing) 1036{ 1037 int i, modes = 0; 1038 struct drm_display_mode *newmode; 1039 struct drm_device *dev = connector->dev; 1040 1041 for (i = 0; i < drm_num_dmt_modes; i++) { 1042 if (mode_in_range(drm_dmt_modes + i, edid, timing)) { 1043 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]); 1044 if (newmode) { 1045 drm_mode_probed_add(connector, newmode); 1046 modes++; 1047 } 1048 } 1049 } 1050 1051 return modes; 1052} 1053 1054static void 1055do_inferred_modes(struct detailed_timing *timing, void *c) 1056{ 1057 struct detailed_mode_closure *closure = c; 1058 struct detailed_non_pixel *data = &timing->data.other_data; 1059 int gtf = (closure->edid->features & DRM_EDID_FEATURE_DEFAULT_GTF); 1060 1061 if (gtf && data->type == EDID_DETAIL_MONITOR_RANGE) 1062 closure->modes += drm_gtf_modes_for_range(closure->connector, 1063 closure->edid, 1064 timing); 1065} 1066 1067static int 1068add_inferred_modes(struct drm_connector *connector, struct edid *edid) 1069{ 1070 struct detailed_mode_closure closure = { 1071 connector, edid, 0, 0, 0 1072 }; 1073 1074 if (version_greater(edid, 1, 0)) 1075 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes, 1076 &closure); 1077 1078 return closure.modes; 1079} 1080 1081static int 1082drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing) 1083{ 1084 int i, j, m, modes = 0; 1085 struct drm_display_mode *mode; 1086 u8 *est = ((u8 *)timing) + 5; 1087 1088 for (i = 0; i < 6; i++) { 1089 for (j = 7; j > 0; j--) { 1090 m = (i * 8) + (7 - j); 1091 if (m >= DRM_ARRAY_SIZE(est3_modes)) 1092 break; 1093 if (est[i] & (1 << j)) { 1094 mode = drm_mode_find_dmt(connector->dev, 1095 est3_modes[m].w, 1096 est3_modes[m].h, 1097 est3_modes[m].r 1098 /*, est3_modes[m].rb */); 1099 if (mode) { 1100 drm_mode_probed_add(connector, mode); 1101 modes++; 1102 } 1103 } 1104 } 1105 } 1106 1107 return modes; 1108} 1109 1110static void 1111do_established_modes(struct detailed_timing *timing, void *c) 1112{ 1113 struct detailed_mode_closure *closure = c; 1114 struct detailed_non_pixel *data = &timing->data.other_data; 1115 1116 if (data->type == EDID_DETAIL_EST_TIMINGS) 1117 closure->modes += drm_est3_modes(closure->connector, timing); 1118} 1119 1120/** 1121 * add_established_modes - get est. modes from EDID and add them 1122 * @edid: EDID block to scan 1123 * 1124 * Each EDID block contains a bitmap of the supported "established modes" list 1125 * (defined above). Tease them out and add them to the global modes list. 1126 */ 1127static int 1128add_established_modes(struct drm_connector *connector, struct edid *edid) 1129{ 1130 struct drm_device *dev = connector->dev; 1131 unsigned long est_bits = edid->established_timings.t1 | 1132 (edid->established_timings.t2 << 8) | 1133 ((edid->established_timings.mfg_rsvd & 0x80) << 9); 1134 int i, modes = 0; 1135 struct detailed_mode_closure closure = { 1136 connector, edid, 0, 0, 0 1137 }; 1138 1139 for (i = 0; i <= EDID_EST_TIMINGS; i++) { 1140 if (est_bits & (1<<i)) { 1141 struct drm_display_mode *newmode; 1142 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]); 1143 if (newmode) { 1144 drm_mode_probed_add(connector, newmode); 1145 modes++; 1146 } 1147 } 1148 } 1149 1150 if (version_greater(edid, 1, 0)) 1151 drm_for_each_detailed_block((u8 *)edid, 1152 do_established_modes, &closure); 1153 1154 return modes + closure.modes; 1155} 1156 1157static void 1158do_standard_modes(struct detailed_timing *timing, void *c) 1159{ 1160 struct detailed_mode_closure *closure = c; 1161 struct detailed_non_pixel *data = &timing->data.other_data; 1162 struct drm_connector *connector = closure->connector; 1163 struct edid *edid = closure->edid; 1164 1165 if (data->type == EDID_DETAIL_STD_MODES) { 1166 int i; 1167 for (i = 0; i < 6; i++) { 1168 struct std_timing *std; 1169 struct drm_display_mode *newmode; 1170 1171 std = &data->data.timings[i]; 1172 newmode = drm_mode_std(connector, edid, std, 1173 edid->revision); 1174 if (newmode) { 1175 drm_mode_probed_add(connector, newmode); 1176 closure->modes++; 1177 } 1178 } 1179 } 1180} 1181 1182/** 1183 * add_standard_modes - get std. modes from EDID and add them 1184 * @edid: EDID block to scan 1185 * 1186 * Standard modes can be calculated using the appropriate standard (DMT, 1187 * GTF or CVT. Grab them from @edid and add them to the list. 1188 */ 1189static int 1190add_standard_modes(struct drm_connector *connector, struct edid *edid) 1191{ 1192 int i, modes = 0; 1193 struct detailed_mode_closure closure = { 1194 connector, edid, 0, 0, 0 1195 }; 1196 1197 for (i = 0; i < EDID_STD_TIMINGS; i++) { 1198 struct drm_display_mode *newmode; 1199 1200 newmode = drm_mode_std(connector, edid, 1201 &edid->standard_timings[i], 1202 edid->revision); 1203 if (newmode) { 1204 drm_mode_probed_add(connector, newmode); 1205 modes++; 1206 } 1207 } 1208 1209 if (version_greater(edid, 1, 0)) 1210 drm_for_each_detailed_block((u8 *)edid, do_standard_modes, 1211 &closure); 1212 1213 /* XXX should also look for standard codes in VTB blocks */ 1214 1215 return modes + closure.modes; 1216} 1217 1218static int drm_cvt_modes(struct drm_connector *connector, 1219 struct detailed_timing *timing) 1220{ 1221 int i, j, modes = 0; 1222 struct drm_display_mode *newmode; 1223 struct drm_device *dev = connector->dev; 1224 struct cvt_timing *cvt; 1225 const int rates[] = { 60, 85, 75, 60, 50 }; 1226 const u8 empty[3] = { 0, 0, 0 }; 1227 1228 for (i = 0; i < 4; i++) { 1229 int width = 0, height; 1230 cvt = &(timing->data.other_data.data.cvt[i]); 1231 1232 if (!memcmp(cvt->code, empty, 3)) 1233 continue; 1234 1235 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2; 1236 switch (cvt->code[1] & 0x0c) { 1237 case 0x00: 1238 width = height * 4 / 3; 1239 break; 1240 case 0x04: 1241 width = height * 16 / 9; 1242 break; 1243 case 0x08: 1244 width = height * 16 / 10; 1245 break; 1246 case 0x0c: 1247 width = height * 15 / 9; 1248 break; 1249 } 1250 1251 for (j = 1; j < 5; j++) { 1252 if (cvt->code[2] & (1 << j)) { 1253 newmode = drm_cvt_mode(dev, width, height, 1254 rates[j], j == 0, 1255 false, false); 1256 if (newmode) { 1257 drm_mode_probed_add(connector, newmode); 1258 modes++; 1259 } 1260 } 1261 } 1262 } 1263 1264 return modes; 1265} 1266 1267static void 1268do_cvt_mode(struct detailed_timing *timing, void *c) 1269{ 1270 struct detailed_mode_closure *closure = c; 1271 struct detailed_non_pixel *data = &timing->data.other_data; 1272 1273 if (data->type == EDID_DETAIL_CVT_3BYTE) 1274 closure->modes += drm_cvt_modes(closure->connector, timing); 1275} 1276 1277static int 1278add_cvt_modes(struct drm_connector *connector, struct edid *edid) 1279{ 1280 struct detailed_mode_closure closure = { 1281 connector, edid, 0, 0, 0 1282 }; 1283 1284 if (version_greater(edid, 1, 2)) 1285 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure); 1286 1287 /* XXX should also look for CVT codes in VTB blocks */ 1288 1289 return closure.modes; 1290} 1291 1292static void 1293do_detailed_mode(struct detailed_timing *timing, void *c) 1294{ 1295 struct detailed_mode_closure *closure = c; 1296 struct drm_display_mode *newmode; 1297 1298 if (timing->pixel_clock) { 1299 newmode = drm_mode_detailed(closure->connector->dev, 1300 closure->edid, timing, 1301 closure->quirks); 1302 if (!newmode) 1303 return; 1304 1305 if (closure->preferred) 1306 newmode->type |= DRM_MODE_TYPE_PREFERRED; 1307 1308 drm_mode_probed_add(closure->connector, newmode); 1309 closure->modes++; 1310 closure->preferred = 0; 1311 } 1312} 1313 1314/* 1315 * add_detailed_modes - Add modes from detailed timings 1316 * @connector: attached connector 1317 * @edid: EDID block to scan 1318 * @quirks: quirks to apply 1319 */ 1320static int 1321add_detailed_modes(struct drm_connector *connector, struct edid *edid, 1322 u32 quirks) 1323{ 1324 struct detailed_mode_closure closure = { 1325 connector, 1326 edid, 1327 1, 1328 quirks, 1329 0 1330 }; 1331 1332 if (closure.preferred && !version_greater(edid, 1, 3)) 1333 closure.preferred = 1334 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING); 1335 1336 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure); 1337 1338 return closure.modes; 1339} 1340 1341#define HDMI_IDENTIFIER 0x000C03 1342#define AUDIO_BLOCK 0x01 1343#define VENDOR_BLOCK 0x03 1344#define SPEAKER_BLOCK 0x04 1345#define EDID_BASIC_AUDIO (1 << 6) 1346 1347/** 1348 * Search EDID for CEA extension block. 1349 */ 1350u8 *drm_find_cea_extension(struct edid *edid) 1351{ 1352 u8 *edid_ext = NULL; 1353 int i; 1354 1355 /* No EDID or EDID extensions */ 1356 if (edid == NULL || edid->extensions == 0) 1357 return NULL; 1358 1359 /* Find CEA extension */ 1360 for (i = 0; i < edid->extensions; i++) { 1361 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1); 1362 if (edid_ext[0] == CEA_EXT) 1363 break; 1364 } 1365 1366 if (i == edid->extensions) 1367 return NULL; 1368 1369 return edid_ext; 1370} 1371 1372static void 1373parse_hdmi_vsdb(struct drm_connector *connector, uint8_t *db) 1374{ 1375 connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */ 1376 1377 connector->dvi_dual = db[6] & 1; 1378 connector->max_tmds_clock = db[7] * 5; 1379 1380 connector->latency_present[0] = db[8] >> 7; 1381 connector->latency_present[1] = (db[8] >> 6) & 1; 1382 connector->video_latency[0] = db[9]; 1383 connector->audio_latency[0] = db[10]; 1384 connector->video_latency[1] = db[11]; 1385 connector->audio_latency[1] = db[12]; 1386 1387 DRM_DEBUG_KMS("HDMI: DVI dual %d, " 1388 "max TMDS clock %d, " 1389 "latency present %d %d, " 1390 "video latency %d %d, " 1391 "audio latency %d %d\n", 1392 connector->dvi_dual, 1393 connector->max_tmds_clock, 1394 (int) connector->latency_present[0], 1395 (int) connector->latency_present[1], 1396 connector->video_latency[0], 1397 connector->video_latency[1], 1398 connector->audio_latency[0], 1399 connector->audio_latency[1]); 1400} 1401 1402static void 1403monitor_name(struct detailed_timing *t, void *data) 1404{ 1405 if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME) 1406 *(u8 **)data = t->data.other_data.data.str.str; 1407} 1408 1409/** 1410 * drm_edid_to_eld - build ELD from EDID 1411 * @connector: connector corresponding to the HDMI/DP sink 1412 * @edid: EDID to parse 1413 * 1414 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. 1415 * Some ELD fields are left to the graphics driver caller: 1416 * - Conn_Type 1417 * - HDCP 1418 * - Port_ID 1419 */ 1420void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid) 1421{ 1422 uint8_t *eld = connector->eld; 1423 u8 *cea; 1424 u8 *name; 1425 u8 *db; 1426 int sad_count = 0; 1427 int mnl; 1428 int dbl; 1429 1430 memset(eld, 0, sizeof(connector->eld)); 1431 1432 cea = drm_find_cea_extension(edid); 1433 if (!cea) { 1434 DRM_DEBUG_KMS("ELD: no CEA Extension found\n"); 1435 return; 1436 } 1437 1438 name = NULL; 1439 drm_for_each_detailed_block((u8 *)edid, monitor_name, &name); 1440 for (mnl = 0; name && mnl < 13; mnl++) { 1441 if (name[mnl] == 0x0a) 1442 break; 1443 eld[20 + mnl] = name[mnl]; 1444 } 1445 eld[4] = (cea[1] << 5) | mnl; 1446 DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20); 1447 1448 eld[0] = 2 << 3; /* ELD version: 2 */ 1449 1450 eld[16] = edid->mfg_id[0]; 1451 eld[17] = edid->mfg_id[1]; 1452 eld[18] = edid->prod_code[0]; 1453 eld[19] = edid->prod_code[1]; 1454 1455 for (db = cea + 4; db < cea + cea[2]; db += dbl + 1) { 1456 dbl = db[0] & 0x1f; 1457 1458 switch ((db[0] & 0xe0) >> 5) { 1459 case AUDIO_BLOCK: /* Audio Data Block, contains SADs */ 1460 sad_count = dbl / 3; 1461 memcpy(eld + 20 + mnl, &db[1], dbl); 1462 break; 1463 case SPEAKER_BLOCK: /* Speaker Allocation Data Block */ 1464 eld[7] = db[1]; 1465 break; 1466 case VENDOR_BLOCK: 1467 /* HDMI Vendor-Specific Data Block */ 1468 if (db[1] == 0x03 && db[2] == 0x0c && db[3] == 0) 1469 parse_hdmi_vsdb(connector, db); 1470 break; 1471 default: 1472 break; 1473 } 1474 } 1475 eld[5] |= sad_count << 4; 1476 eld[2] = (20 + mnl + sad_count * 3 + 3) / 4; 1477 1478 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count); 1479} 1480 1481/** 1482 * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond 1483 * @connector: connector associated with the HDMI/DP sink 1484 * @mode: the display mode 1485 */ 1486int drm_av_sync_delay(struct drm_connector *connector, 1487 struct drm_display_mode *mode) 1488{ 1489 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); 1490 int a, v; 1491 1492 if (!connector->latency_present[0]) 1493 return 0; 1494 if (!connector->latency_present[1]) 1495 i = 0; 1496 1497 a = connector->audio_latency[i]; 1498 v = connector->video_latency[i]; 1499 1500 /* 1501 * HDMI/DP sink doesn't support audio or video? 1502 */ 1503 if (a == 255 || v == 255) 1504 return 0; 1505 1506 /* 1507 * Convert raw EDID values to millisecond. 1508 * Treat unknown latency as 0ms. 1509 */ 1510 if (a) 1511 a = min(2 * (a - 1), 500); 1512 if (v) 1513 v = min(2 * (v - 1), 500); 1514 1515 return max(v - a, 0); 1516} 1517 1518/** 1519 * drm_select_eld - select one ELD from multiple HDMI/DP sinks 1520 * @encoder: the encoder just changed display mode 1521 * @mode: the adjusted display mode 1522 * 1523 * It's possible for one encoder to be associated with multiple HDMI/DP sinks. 1524 * The policy is now hard coded to simply use the first HDMI/DP sink's ELD. 1525 */ 1526struct drm_connector *drm_select_eld(struct drm_encoder *encoder, 1527 struct drm_display_mode *mode) 1528{ 1529 struct drm_connector *connector; 1530 struct drm_device *dev = encoder->dev; 1531 1532 list_for_each_entry(connector, &dev->mode_config.connector_list, head) 1533 if (connector->encoder == encoder && connector->eld[0]) 1534 return connector; 1535 1536 return NULL; 1537} 1538 1539/** 1540 * drm_detect_hdmi_monitor - detect whether monitor is hdmi. 1541 * @edid: monitor EDID information 1542 * 1543 * Parse the CEA extension according to CEA-861-B. 1544 * Return true if HDMI, false if not or unknown. 1545 */ 1546bool drm_detect_hdmi_monitor(struct edid *edid) 1547{ 1548 u8 *edid_ext; 1549 int i, hdmi_id; 1550 int start_offset, end_offset; 1551 bool is_hdmi = false; 1552 1553 edid_ext = drm_find_cea_extension(edid); 1554 if (!edid_ext) 1555 goto end; 1556 1557 /* Data block offset in CEA extension block */ 1558 start_offset = 4; 1559 end_offset = edid_ext[2]; 1560 1561 /* 1562 * Because HDMI identifier is in Vendor Specific Block, 1563 * search it from all data blocks of CEA extension. 1564 */ 1565 for (i = start_offset; i < end_offset; 1566 /* Increased by data block len */ 1567 i += ((edid_ext[i] & 0x1f) + 1)) { 1568 /* Find vendor specific block */ 1569 if ((edid_ext[i] >> 5) == VENDOR_BLOCK) { 1570 hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) | 1571 edid_ext[i + 3] << 16; 1572 /* Find HDMI identifier */ 1573 if (hdmi_id == HDMI_IDENTIFIER) 1574 is_hdmi = true; 1575 break; 1576 } 1577 } 1578 1579end: 1580 return is_hdmi; 1581} 1582 1583/** 1584 * drm_detect_monitor_audio - check monitor audio capability 1585 * 1586 * Monitor should have CEA extension block. 1587 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic 1588 * audio' only. If there is any audio extension block and supported 1589 * audio format, assume at least 'basic audio' support, even if 'basic 1590 * audio' is not defined in EDID. 1591 * 1592 */ 1593bool drm_detect_monitor_audio(struct edid *edid) 1594{ 1595 u8 *edid_ext; 1596 int i, j; 1597 bool has_audio = false; 1598 int start_offset, end_offset; 1599 1600 edid_ext = drm_find_cea_extension(edid); 1601 if (!edid_ext) 1602 goto end; 1603 1604 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0); 1605 1606 if (has_audio) { 1607 DRM_DEBUG_KMS("Monitor has basic audio support\n"); 1608 goto end; 1609 } 1610 1611 /* Data block offset in CEA extension block */ 1612 start_offset = 4; 1613 end_offset = edid_ext[2]; 1614 1615 for (i = start_offset; i < end_offset; 1616 i += ((edid_ext[i] & 0x1f) + 1)) { 1617 if ((edid_ext[i] >> 5) == AUDIO_BLOCK) { 1618 has_audio = true; 1619 for (j = 1; j < (edid_ext[i] & 0x1f); j += 3) 1620 DRM_DEBUG_KMS("CEA audio format %d\n", 1621 (edid_ext[i + j] >> 3) & 0xf); 1622 goto end; 1623 } 1624 } 1625end: 1626 return has_audio; 1627} 1628 1629/** 1630 * drm_add_display_info - pull display info out if present 1631 * @edid: EDID data 1632 * @info: display info (attached to connector) 1633 * 1634 * Grab any available display info and stuff it into the drm_display_info 1635 * structure that's part of the connector. Useful for tracking bpp and 1636 * color spaces. 1637 */ 1638static void drm_add_display_info(struct edid *edid, 1639 struct drm_display_info *info) 1640{ 1641 u8 *edid_ext; 1642 1643 info->width_mm = edid->width_cm * 10; 1644 info->height_mm = edid->height_cm * 10; 1645 1646 /* driver figures it out in this case */ 1647 info->bpc = 0; 1648 info->color_formats = 0; 1649 1650 /* Only defined for 1.4 with digital displays */ 1651 if (edid->revision < 4) 1652 return; 1653 1654 if (!(edid->input & DRM_EDID_INPUT_DIGITAL)) 1655 return; 1656 1657 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) { 1658 case DRM_EDID_DIGITAL_DEPTH_6: 1659 info->bpc = 6; 1660 break; 1661 case DRM_EDID_DIGITAL_DEPTH_8: 1662 info->bpc = 8; 1663 break; 1664 case DRM_EDID_DIGITAL_DEPTH_10: 1665 info->bpc = 10; 1666 break; 1667 case DRM_EDID_DIGITAL_DEPTH_12: 1668 info->bpc = 12; 1669 break; 1670 case DRM_EDID_DIGITAL_DEPTH_14: 1671 info->bpc = 14; 1672 break; 1673 case DRM_EDID_DIGITAL_DEPTH_16: 1674 info->bpc = 16; 1675 break; 1676 case DRM_EDID_DIGITAL_DEPTH_UNDEF: 1677 default: 1678 info->bpc = 0; 1679 break; 1680 } 1681 1682 info->color_formats = DRM_COLOR_FORMAT_RGB444; 1683 if (info->color_formats & DRM_EDID_FEATURE_RGB_YCRCB444) 1684 info->color_formats = DRM_COLOR_FORMAT_YCRCB444; 1685 if (info->color_formats & DRM_EDID_FEATURE_RGB_YCRCB422) 1686 info->color_formats = DRM_COLOR_FORMAT_YCRCB422; 1687 1688 /* Get data from CEA blocks if present */ 1689 edid_ext = drm_find_cea_extension(edid); 1690 if (!edid_ext) 1691 return; 1692 1693 info->cea_rev = edid_ext[1]; 1694} 1695 1696/** 1697 * drm_add_edid_modes - add modes from EDID data, if available 1698 * @connector: connector we're probing 1699 * @edid: edid data 1700 * 1701 * Add the specified modes to the connector's mode list. 1702 * 1703 * Return number of modes added or 0 if we couldn't find any. 1704 */ 1705int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid) 1706{ 1707 int num_modes = 0; 1708 u32 quirks; 1709 1710 if (edid == NULL) { 1711 return 0; 1712 } 1713 if (!drm_edid_is_valid(edid)) { 1714 device_printf(connector->dev->device, "%s: EDID invalid.\n", 1715 drm_get_connector_name(connector)); 1716 return 0; 1717 } 1718 1719 quirks = edid_get_quirks(edid); 1720 1721 /* 1722 * EDID spec says modes should be preferred in this order: 1723 * - preferred detailed mode 1724 * - other detailed modes from base block 1725 * - detailed modes from extension blocks 1726 * - CVT 3-byte code modes 1727 * - standard timing codes 1728 * - established timing codes 1729 * - modes inferred from GTF or CVT range information 1730 * 1731 * We get this pretty much right. 1732 * 1733 * XXX order for additional mode types in extension blocks? 1734 */ 1735 num_modes += add_detailed_modes(connector, edid, quirks); 1736 num_modes += add_cvt_modes(connector, edid); 1737 num_modes += add_standard_modes(connector, edid); 1738 num_modes += add_established_modes(connector, edid); 1739 num_modes += add_inferred_modes(connector, edid); 1740 1741 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75)) 1742 edid_fixup_preferred(connector, quirks); 1743 1744 drm_add_display_info(edid, &connector->display_info); 1745 1746 return num_modes; 1747} 1748 1749/** 1750 * drm_add_modes_noedid - add modes for the connectors without EDID 1751 * @connector: connector we're probing 1752 * @hdisplay: the horizontal display limit 1753 * @vdisplay: the vertical display limit 1754 * 1755 * Add the specified modes to the connector's mode list. Only when the 1756 * hdisplay/vdisplay is not beyond the given limit, it will be added. 1757 * 1758 * Return number of modes added or 0 if we couldn't find any. 1759 */ 1760int drm_add_modes_noedid(struct drm_connector *connector, 1761 int hdisplay, int vdisplay) 1762{ 1763 int i, count, num_modes = 0; 1764 struct drm_display_mode *mode; 1765 struct drm_device *dev = connector->dev; 1766 1767 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode); 1768 if (hdisplay < 0) 1769 hdisplay = 0; 1770 if (vdisplay < 0) 1771 vdisplay = 0; 1772 1773 for (i = 0; i < count; i++) { 1774 struct drm_display_mode *ptr = &drm_dmt_modes[i]; 1775 if (hdisplay && vdisplay) { 1776 /* 1777 * Only when two are valid, they will be used to check 1778 * whether the mode should be added to the mode list of 1779 * the connector. 1780 */ 1781 if (ptr->hdisplay > hdisplay || 1782 ptr->vdisplay > vdisplay) 1783 continue; 1784 } 1785 if (drm_mode_vrefresh(ptr) > 61) 1786 continue; 1787 mode = drm_mode_duplicate(dev, ptr); 1788 if (mode) { 1789 drm_mode_probed_add(connector, mode); 1790 num_modes++; 1791 } 1792 } 1793 return num_modes; 1794} 1795