via_dmablit.c revision 207410
1/* via_dmablit.c -- PCI DMA BitBlt support for the VIA Unichrome/Pro
2 *
3 * Copyright (C) 2005 Thomas Hellstrom, All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sub license,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
14 * of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 *    Thomas Hellstrom.
26 *    Partially based on code obtained from Digeo Inc.
27 */
28
29#include <sys/cdefs.h>
30__FBSDID("$FreeBSD: head/sys/dev/drm/via_dmablit.c 207410 2010-04-30 00:46:43Z kmacy $");
31
32/*
33 * Unmaps the DMA mappings.
34 * FIXME: Is this a NoOp on x86? Also
35 * FIXME: What happens if this one is called and a pending blit has previously done
36 * the same DMA mappings?
37 */
38
39#include "dev/drm/drmP.h"
40#include "dev/drm/via_drm.h"
41#include "dev/drm/via_drv.h"
42#include "dev/drm/via_dmablit.h"
43
44#define VIA_PGDN(x)	(((unsigned long)(x)) & ~PAGE_MASK)
45#define VIA_PGOFF(x)	(((unsigned long)(x)) & PAGE_MASK)
46#define VIA_PFN(x)	((unsigned long)(x) >> PAGE_SHIFT)
47
48typedef struct _drm_via_descriptor {
49	uint32_t mem_addr;
50	uint32_t dev_addr;
51	uint32_t size;
52	uint32_t next;
53} drm_via_descriptor_t;
54
55static void via_dmablit_timer(void *arg);
56
57/*
58 * Unmap a DMA mapping.
59 */
60static void
61via_unmap_blit_from_device(drm_via_sg_info_t *vsg)
62{
63	int num_desc = vsg->num_desc;
64	unsigned cur_descriptor_page = num_desc / vsg->descriptors_per_page;
65	unsigned descriptor_this_page = num_desc % vsg->descriptors_per_page;
66	drm_via_descriptor_t *desc_ptr = vsg->desc_pages[cur_descriptor_page] +
67		descriptor_this_page;
68	dma_addr_t next = vsg->chain_start;
69
70	while(num_desc--) {
71		if (descriptor_this_page-- == 0) {
72			cur_descriptor_page--;
73			descriptor_this_page = vsg->descriptors_per_page - 1;
74			desc_ptr = vsg->desc_pages[cur_descriptor_page] +
75				descriptor_this_page;
76		}
77		next = (dma_addr_t) desc_ptr->next;
78		desc_ptr--;
79	}
80}
81
82
83/*
84 * If mode = 0, count how many descriptors are needed.
85 * If mode = 1, Map the DMA pages for the device, put together and map also the descriptors.
86 * Descriptors are run in reverse order by the hardware because we are not allowed to update the
87 * 'next' field without syncing calls when the descriptor is already mapped.
88 */
89static void
90via_map_blit_for_device(const drm_via_dmablit_t *xfer,
91		   drm_via_sg_info_t *vsg, int mode)
92{
93	unsigned cur_descriptor_page = 0;
94	unsigned num_descriptors_this_page = 0;
95	unsigned char *mem_addr = xfer->mem_addr;
96	unsigned char *cur_mem;
97	unsigned char *first_addr = (unsigned char *)VIA_PGDN(mem_addr);
98	uint32_t fb_addr = xfer->fb_addr;
99	uint32_t cur_fb;
100	unsigned long line_len;
101	unsigned remaining_len;
102	int num_desc = 0;
103	int cur_line;
104	dma_addr_t next = 0 | VIA_DMA_DPR_EC;
105	drm_via_descriptor_t *desc_ptr = NULL;
106
107	if (mode == 1)
108		desc_ptr = vsg->desc_pages[cur_descriptor_page];
109
110	for (cur_line = 0; cur_line < xfer->num_lines; ++cur_line) {
111
112		line_len = xfer->line_length;
113		cur_fb = fb_addr;
114		cur_mem = mem_addr;
115
116		while (line_len > 0) {
117
118			remaining_len = min(PAGE_SIZE - VIA_PGOFF(cur_mem),
119			    line_len);
120			line_len -= remaining_len;
121
122			if (mode == 1) {
123				desc_ptr->mem_addr =
124				    VM_PAGE_TO_PHYS(
125				    vsg->pages[VIA_PFN(cur_mem) -
126				    VIA_PFN(first_addr)]) + VIA_PGOFF(cur_mem);
127				desc_ptr->dev_addr = cur_fb;
128
129				desc_ptr->size = remaining_len;
130				desc_ptr->next = (uint32_t) next;
131
132				next = vtophys(desc_ptr);
133
134				desc_ptr++;
135				if (++num_descriptors_this_page >= vsg->descriptors_per_page) {
136					num_descriptors_this_page = 0;
137					desc_ptr = vsg->desc_pages[++cur_descriptor_page];
138				}
139			}
140
141			num_desc++;
142			cur_mem += remaining_len;
143			cur_fb += remaining_len;
144		}
145
146		mem_addr += xfer->mem_stride;
147		fb_addr += xfer->fb_stride;
148	}
149
150	if (mode == 1) {
151		vsg->chain_start = next;
152		vsg->state = dr_via_device_mapped;
153	}
154	vsg->num_desc = num_desc;
155}
156
157
158/*
159 * Function that frees up all resources for a blit. It is usable even if the
160 * blit info has only been partially built as long as the status enum is consistent
161 * with the actual status of the used resources.
162 */
163static void
164via_free_sg_info(drm_via_sg_info_t *vsg)
165{
166	vm_page_t page;
167	int i;
168
169	switch(vsg->state) {
170	case dr_via_device_mapped:
171		via_unmap_blit_from_device(vsg);
172	case dr_via_desc_pages_alloc:
173		for (i=0; i<vsg->num_desc_pages; ++i) {
174			if (vsg->desc_pages[i] != NULL)
175			    free(vsg->desc_pages[i], DRM_MEM_PAGES);
176		}
177		free(vsg->desc_pages, DRM_MEM_DRIVER);
178	case dr_via_pages_locked:
179		for (i=0; i < vsg->num_pages; ++i) {
180			if ( NULL != (page = vsg->pages[i])) {
181				vm_page_lock_queues();
182				vm_page_unwire(page, 0);
183				vm_page_unlock_queues();
184			}
185		}
186	case dr_via_pages_alloc:
187		free(vsg->pages, DRM_MEM_DRIVER);
188	default:
189		vsg->state = dr_via_sg_init;
190	}
191	free(vsg->bounce_buffer, DRM_MEM_DRIVER);
192	vsg->bounce_buffer = NULL;
193	vsg->free_on_sequence = 0;
194}
195
196
197/*
198 * Fire a blit engine.
199 */
200static void
201via_fire_dmablit(struct drm_device *dev, drm_via_sg_info_t *vsg, int engine)
202{
203	drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
204
205	VIA_WRITE(VIA_PCI_DMA_MAR0 + engine*0x10, 0);
206	VIA_WRITE(VIA_PCI_DMA_DAR0 + engine*0x10, 0);
207	VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_DD | VIA_DMA_CSR_TD |
208		  VIA_DMA_CSR_DE);
209	VIA_WRITE(VIA_PCI_DMA_MR0  + engine*0x04, VIA_DMA_MR_CM | VIA_DMA_MR_TDIE);
210	VIA_WRITE(VIA_PCI_DMA_BCR0 + engine*0x10, 0);
211	VIA_WRITE(VIA_PCI_DMA_DPR0 + engine*0x10, vsg->chain_start);
212	DRM_WRITEMEMORYBARRIER();
213	VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_DE | VIA_DMA_CSR_TS);
214	VIA_READ(VIA_PCI_DMA_CSR0 + engine*0x04);
215}
216
217
218/*
219 * Obtain a page pointer array and lock all pages into system memory. A segmentation violation will
220 * occur here if the calling user does not have access to the submitted address.
221 */
222static int
223via_lock_all_dma_pages(drm_via_sg_info_t *vsg,  drm_via_dmablit_t *xfer)
224{
225	unsigned long first_pfn = VIA_PFN(xfer->mem_addr);
226	vm_page_t m;
227	vm_map_t map;
228	int i;
229
230	map = &curproc->p_vmspace->vm_map;
231
232	vsg->num_pages = VIA_PFN(xfer->mem_addr +
233	    (xfer->num_lines * xfer->mem_stride -1)) - first_pfn + 1;
234
235	/* Make sure that the user has access to these pages */
236	for(i = 0; i < vsg->num_pages; i++) {
237		if (vm_fault_quick((caddr_t)xfer->mem_addr + IDX_TO_OFF(i),
238		    VM_PROT_RW) < 0)
239			return (-EACCES);
240	}
241
242	if (NULL == (vsg->pages = malloc(sizeof(vm_page_t) * vsg->num_pages,
243	    DRM_MEM_DRIVER, M_NOWAIT | M_ZERO)))
244		return -ENOMEM;
245
246	for(i = 0; i < vsg->num_pages; i++) {
247		m = pmap_extract_and_hold(map->pmap,
248		    (vm_offset_t)xfer->mem_addr + IDX_TO_OFF(i), VM_PROT_RW);
249		if (m == NULL)
250			break;
251		vm_page_lock(m);
252		vm_page_lock_queues();
253		vm_page_wire(m);
254		vm_page_unhold(m);
255		vm_page_unlock_queues();
256		vm_page_unlock(m);
257		vsg->pages[i] = m;
258	}
259	vsg->state = dr_via_pages_locked;
260
261	if (i != vsg->num_pages)
262		return -EINVAL;
263
264	DRM_DEBUG("DMA pages locked\n");
265
266	return 0;
267}
268
269
270/*
271 * Allocate DMA capable memory for the blit descriptor chain, and an array that keeps track of the
272 * pages we allocate. We don't want to use kmalloc for the descriptor chain because it may be
273 * quite large for some blits, and pages don't need to be contingous.
274 */
275static int
276via_alloc_desc_pages(drm_via_sg_info_t *vsg)
277{
278	int i;
279
280	vsg->descriptors_per_page = PAGE_SIZE / sizeof(drm_via_descriptor_t);
281	vsg->num_desc_pages = (vsg->num_desc + vsg->descriptors_per_page - 1) /
282	    vsg->descriptors_per_page;
283
284	if (NULL ==  (vsg->desc_pages = malloc(vsg->num_desc_pages *
285	    sizeof(void *), DRM_MEM_DRIVER, M_NOWAIT | M_ZERO)))
286		return -ENOMEM;
287
288	vsg->state = dr_via_desc_pages_alloc;
289	for (i = 0; i < vsg->num_desc_pages; ++i) {
290		if (NULL == (vsg->desc_pages[i] =
291		    (drm_via_descriptor_t *)malloc(PAGE_SIZE, DRM_MEM_PAGES,
292		    M_NOWAIT | M_ZERO)))
293			return -ENOMEM;
294	}
295	DRM_DEBUG("Allocated %d pages for %d descriptors.\n",
296	    vsg->num_desc_pages, vsg->num_desc);
297
298	return 0;
299}
300
301
302static void
303via_abort_dmablit(struct drm_device *dev, int engine)
304{
305	drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
306
307	VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TA);
308}
309
310
311static void
312via_dmablit_engine_off(struct drm_device *dev, int engine)
313{
314	drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
315
316	VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TD | VIA_DMA_CSR_DD);
317}
318
319
320/*
321 * The dmablit part of the IRQ handler. Trying to do only reasonably fast things here.
322 * The rest, like unmapping and freeing memory for done blits is done in a separate workqueue
323 * task. Basically the task of the interrupt handler is to submit a new blit to the engine, while
324 * the workqueue task takes care of processing associated with the old blit.
325 */
326void
327via_dmablit_handler(struct drm_device *dev, int engine, int from_irq)
328{
329	drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
330	drm_via_blitq_t *blitq = dev_priv->blit_queues + engine;
331	int cur;
332	int done_transfer;
333	uint32_t status = 0;
334
335	DRM_DEBUG("DMA blit handler called. engine = %d, from_irq = %d, blitq = 0x%lx\n",
336		  engine, from_irq, (unsigned long) blitq);
337
338	mtx_lock(&blitq->blit_lock);
339
340	done_transfer = blitq->is_active &&
341	  (( status = VIA_READ(VIA_PCI_DMA_CSR0 + engine*0x04)) & VIA_DMA_CSR_TD);
342	done_transfer = done_transfer || ( blitq->aborting && !(status & VIA_DMA_CSR_DE));
343
344	cur = blitq->cur;
345	if (done_transfer) {
346
347		blitq->blits[cur]->aborted = blitq->aborting;
348		blitq->done_blit_handle++;
349		DRM_WAKEUP(&blitq->blit_queue[cur]);
350
351		cur++;
352		if (cur >= VIA_NUM_BLIT_SLOTS)
353			cur = 0;
354		blitq->cur = cur;
355
356		/*
357		 * Clear transfer done flag.
358		 */
359
360		VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04,  VIA_DMA_CSR_TD);
361
362		blitq->is_active = 0;
363		blitq->aborting = 0;
364
365		taskqueue_enqueue(taskqueue_swi, &blitq->wq);
366
367	} else if (blitq->is_active && (ticks >= blitq->end)) {
368
369		/*
370		 * Abort transfer after one second.
371		 */
372
373		via_abort_dmablit(dev, engine);
374		blitq->aborting = 1;
375		blitq->end = ticks + DRM_HZ;
376	}
377
378	if (!blitq->is_active) {
379		if (blitq->num_outstanding) {
380			via_fire_dmablit(dev, blitq->blits[cur], engine);
381			blitq->is_active = 1;
382			blitq->cur = cur;
383			blitq->num_outstanding--;
384			blitq->end = ticks + DRM_HZ;
385
386			if (!callout_pending(&blitq->poll_timer))
387				callout_reset(&blitq->poll_timer,
388				    1, (timeout_t *)via_dmablit_timer,
389				    (void *)blitq);
390		} else {
391			if (callout_pending(&blitq->poll_timer)) {
392				callout_stop(&blitq->poll_timer);
393			}
394			via_dmablit_engine_off(dev, engine);
395		}
396	}
397
398	mtx_unlock(&blitq->blit_lock);
399}
400
401
402/*
403 * Check whether this blit is still active, performing necessary locking.
404 */
405static int
406via_dmablit_active(drm_via_blitq_t *blitq, int engine, uint32_t handle, wait_queue_head_t **queue)
407{
408	uint32_t slot;
409	int active;
410
411	mtx_lock(&blitq->blit_lock);
412
413	/*
414	 * Allow for handle wraparounds.
415	 */
416	active = ((blitq->done_blit_handle - handle) > (1 << 23)) &&
417		((blitq->cur_blit_handle - handle) <= (1 << 23));
418
419	if (queue && active) {
420		slot = handle - blitq->done_blit_handle + blitq->cur -1;
421		if (slot >= VIA_NUM_BLIT_SLOTS) {
422			slot -= VIA_NUM_BLIT_SLOTS;
423		}
424		*queue = blitq->blit_queue + slot;
425	}
426
427	mtx_unlock(&blitq->blit_lock);
428
429	return active;
430}
431
432
433/*
434 * Sync. Wait for at least three seconds for the blit to be performed.
435 */
436static int
437via_dmablit_sync(struct drm_device *dev, uint32_t handle, int engine)
438{
439
440	drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
441	drm_via_blitq_t *blitq = dev_priv->blit_queues + engine;
442	wait_queue_head_t *queue;
443	int ret = 0;
444
445	if (via_dmablit_active(blitq, engine, handle, &queue)) {
446		DRM_WAIT_ON(ret, *queue, 3 * DRM_HZ,
447			    !via_dmablit_active(blitq, engine, handle, NULL));
448	}
449	DRM_DEBUG("DMA blit sync handle 0x%x engine %d returned %d\n",
450		  handle, engine, ret);
451
452	return ret;
453}
454
455
456/*
457 * A timer that regularly polls the blit engine in cases where we don't have interrupts:
458 * a) Broken hardware (typically those that don't have any video capture facility).
459 * b) Blit abort. The hardware doesn't send an interrupt when a blit is aborted.
460 * The timer and hardware IRQ's can and do work in parallel. If the hardware has
461 * irqs, it will shorten the latency somewhat.
462 */
463static void
464via_dmablit_timer(void *arg)
465{
466	drm_via_blitq_t *blitq = (drm_via_blitq_t *)arg;
467	struct drm_device *dev = blitq->dev;
468	int engine = (int)
469		(blitq - ((drm_via_private_t *)dev->dev_private)->blit_queues);
470
471	DRM_DEBUG("Polling timer called for engine %d, jiffies %lu\n", engine,
472		  (unsigned long) jiffies);
473
474	via_dmablit_handler(dev, engine, 0);
475
476	if (!callout_pending(&blitq->poll_timer)) {
477		callout_schedule(&blitq->poll_timer, 1);
478
479	       /*
480		* Rerun handler to delete timer if engines are off, and
481		* to shorten abort latency. This is a little nasty.
482		*/
483
484	       via_dmablit_handler(dev, engine, 0);
485
486	}
487}
488
489
490/*
491 * Workqueue task that frees data and mappings associated with a blit.
492 * Also wakes up waiting processes. Each of these tasks handles one
493 * blit engine only and may not be called on each interrupt.
494 */
495static void
496via_dmablit_workqueue(void *arg, int pending)
497{
498	drm_via_blitq_t *blitq = (drm_via_blitq_t *)arg;
499	struct drm_device *dev = blitq->dev;
500	drm_via_sg_info_t *cur_sg;
501	int cur_released;
502
503
504	DRM_DEBUG("task called for blit engine %ld\n",(unsigned long)
505		  (blitq - ((drm_via_private_t *)dev->dev_private)->blit_queues));
506
507	mtx_lock(&blitq->blit_lock);
508
509	while(blitq->serviced != blitq->cur) {
510
511		cur_released = blitq->serviced++;
512
513		DRM_DEBUG("Releasing blit slot %d\n", cur_released);
514
515		if (blitq->serviced >= VIA_NUM_BLIT_SLOTS)
516			blitq->serviced = 0;
517
518		cur_sg = blitq->blits[cur_released];
519		blitq->num_free++;
520
521		mtx_unlock(&blitq->blit_lock);
522
523		DRM_WAKEUP(&blitq->busy_queue);
524
525		via_free_sg_info(cur_sg);
526		free(cur_sg, DRM_MEM_DRIVER);
527
528		mtx_lock(&blitq->blit_lock);
529	}
530
531	mtx_unlock(&blitq->blit_lock);
532}
533
534
535/*
536 * Init all blit engines. Currently we use two, but some hardware have 4.
537 */
538void
539via_init_dmablit(struct drm_device *dev)
540{
541	int i,j;
542	drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
543	drm_via_blitq_t *blitq;
544
545	for (i=0; i< VIA_NUM_BLIT_ENGINES; ++i) {
546		blitq = dev_priv->blit_queues + i;
547		blitq->dev = dev;
548		blitq->cur_blit_handle = 0;
549		blitq->done_blit_handle = 0;
550		blitq->head = 0;
551		blitq->cur = 0;
552		blitq->serviced = 0;
553		blitq->num_free = VIA_NUM_BLIT_SLOTS - 1;
554		blitq->num_outstanding = 0;
555		blitq->is_active = 0;
556		blitq->aborting = 0;
557		mtx_init(&blitq->blit_lock, "via_blit_lk", NULL, MTX_DEF);
558		for (j=0; j<VIA_NUM_BLIT_SLOTS; ++j) {
559			DRM_INIT_WAITQUEUE(blitq->blit_queue + j);
560		}
561		DRM_INIT_WAITQUEUE(&blitq->busy_queue);
562		TASK_INIT(&blitq->wq, 0, via_dmablit_workqueue, blitq);
563		callout_init(&blitq->poll_timer, 0);
564	}
565}
566
567
568/*
569 * Build all info and do all mappings required for a blit.
570 */
571static int
572via_build_sg_info(struct drm_device *dev, drm_via_sg_info_t *vsg,
573    drm_via_dmablit_t *xfer)
574{
575	int ret = 0;
576
577	vsg->bounce_buffer = NULL;
578
579	vsg->state = dr_via_sg_init;
580
581	if (xfer->num_lines <= 0 || xfer->line_length <= 0) {
582		DRM_ERROR("Zero size bitblt.\n");
583		return -EINVAL;
584	}
585
586	/*
587	 * Below check is a driver limitation, not a hardware one. We
588	 * don't want to lock unused pages, and don't want to incoporate the
589	 * extra logic of avoiding them. Make sure there are no.
590	 * (Not a big limitation anyway.)
591	 */
592	if ((xfer->mem_stride - xfer->line_length) > 2 * PAGE_SIZE) {
593		DRM_ERROR("Too large system memory stride. Stride: %d, "
594			  "Length: %d\n", xfer->mem_stride, xfer->line_length);
595		return -EINVAL;
596	}
597
598	if ((xfer->mem_stride == xfer->line_length) &&
599	    (xfer->fb_stride == xfer->line_length)) {
600		xfer->mem_stride *= xfer->num_lines;
601		xfer->line_length = xfer->mem_stride;
602		xfer->fb_stride = xfer->mem_stride;
603		xfer->num_lines = 1;
604	}
605
606	/*
607	 * Don't lock an arbitrary large number of pages, since that causes a
608	 * DOS security hole.
609	 */
610	if (xfer->num_lines > 2048 ||
611	    (xfer->num_lines*xfer->mem_stride > (2048*2048*4))) {
612		DRM_ERROR("Too large PCI DMA bitblt.\n");
613		return -EINVAL;
614	}
615
616	/*
617	 * we allow a negative fb stride to allow flipping of images in
618	 * transfer.
619	 */
620	if (xfer->mem_stride < xfer->line_length ||
621		abs(xfer->fb_stride) < xfer->line_length) {
622		DRM_ERROR("Invalid frame-buffer / memory stride.\n");
623		return -EINVAL;
624	}
625
626	/*
627	 * A hardware bug seems to be worked around if system memory addresses
628	 * start on 16 byte boundaries. This seems a bit restrictive however.
629	 * VIA is contacted about this. Meanwhile, impose the following
630	 * restrictions:
631	 */
632#ifdef VIA_BUGFREE
633	if ((((unsigned long)xfer->mem_addr & 3) !=
634	    ((unsigned long)xfer->fb_addr & 3)) ||
635	    ((xfer->num_lines > 1) && ((xfer->mem_stride & 3) !=
636	    (xfer->fb_stride & 3)))) {
637		DRM_ERROR("Invalid DRM bitblt alignment.\n");
638		return -EINVAL;
639	}
640#else
641	if ((((unsigned long)xfer->mem_addr & 15) ||
642	    ((unsigned long)xfer->fb_addr & 3)) ||
643	    ((xfer->num_lines > 1) &&
644	    ((xfer->mem_stride & 15) || (xfer->fb_stride & 3)))) {
645		DRM_ERROR("Invalid DRM bitblt alignment.\n");
646		return -EINVAL;
647	}
648#endif
649
650	if (0 != (ret = via_lock_all_dma_pages(vsg, xfer))) {
651		DRM_ERROR("Could not lock DMA pages.\n");
652		via_free_sg_info(vsg);
653		return ret;
654	}
655
656	via_map_blit_for_device(xfer, vsg, 0);
657	if (0 != (ret = via_alloc_desc_pages(vsg))) {
658		DRM_ERROR("Could not allocate DMA descriptor pages.\n");
659		via_free_sg_info(vsg);
660		return ret;
661	}
662	via_map_blit_for_device(xfer, vsg, 1);
663
664	return 0;
665}
666
667
668/*
669 * Reserve one free slot in the blit queue. Will wait for one second for one
670 * to become available. Otherwise -EBUSY is returned.
671 */
672static int
673via_dmablit_grab_slot(drm_via_blitq_t *blitq, int engine)
674{
675	struct drm_device *dev = blitq->dev;
676	int ret=0;
677
678	DRM_DEBUG("Num free is %d\n", blitq->num_free);
679	mtx_lock(&blitq->blit_lock);
680	while(blitq->num_free == 0) {
681		mtx_unlock(&blitq->blit_lock);
682
683		DRM_WAIT_ON(ret, blitq->busy_queue, DRM_HZ,
684		    blitq->num_free > 0);
685		if (ret) {
686			return (-EINTR == ret) ? -EAGAIN : ret;
687		}
688
689		mtx_lock(&blitq->blit_lock);
690	}
691
692	blitq->num_free--;
693	mtx_unlock(&blitq->blit_lock);
694
695	return 0;
696}
697
698
699/*
700 * Hand back a free slot if we changed our mind.
701 */
702static void
703via_dmablit_release_slot(drm_via_blitq_t *blitq)
704{
705
706	mtx_lock(&blitq->blit_lock);
707	blitq->num_free++;
708	mtx_unlock(&blitq->blit_lock);
709	DRM_WAKEUP( &blitq->busy_queue );
710}
711
712
713/*
714 * Grab a free slot. Build blit info and queue a blit.
715 */
716static int
717via_dmablit(struct drm_device *dev, drm_via_dmablit_t *xfer)
718{
719	drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
720	drm_via_sg_info_t *vsg;
721	drm_via_blitq_t *blitq;
722	int ret;
723	int engine;
724
725	if (dev_priv == NULL) {
726		DRM_ERROR("Called without initialization.\n");
727		return -EINVAL;
728	}
729
730	engine = (xfer->to_fb) ? 0 : 1;
731	blitq = dev_priv->blit_queues + engine;
732	if (0 != (ret = via_dmablit_grab_slot(blitq, engine))) {
733		return ret;
734	}
735	if (NULL == (vsg = malloc(sizeof(*vsg), DRM_MEM_DRIVER,
736	    M_NOWAIT | M_ZERO))) {
737		via_dmablit_release_slot(blitq);
738		return -ENOMEM;
739	}
740	if (0 != (ret = via_build_sg_info(dev, vsg, xfer))) {
741		via_dmablit_release_slot(blitq);
742		free(vsg, DRM_MEM_DRIVER);
743		return ret;
744	}
745	mtx_lock(&blitq->blit_lock);
746
747	blitq->blits[blitq->head++] = vsg;
748	if (blitq->head >= VIA_NUM_BLIT_SLOTS)
749		blitq->head = 0;
750	blitq->num_outstanding++;
751	xfer->sync.sync_handle = ++blitq->cur_blit_handle;
752
753	mtx_unlock(&blitq->blit_lock);
754	xfer->sync.engine = engine;
755
756	via_dmablit_handler(dev, engine, 0);
757
758	return 0;
759}
760
761
762/*
763 * Sync on a previously submitted blit. Note that the X server use signals
764 * extensively, and that there is a very big probability that this IOCTL will
765 * be interrupted by a signal. In that case it returns with -EAGAIN for the
766 * signal to be delivered. The caller should then reissue the IOCTL. This is
767 * similar to what is being done for drmGetLock().
768 */
769int
770via_dma_blit_sync( struct drm_device *dev, void *data,
771    struct drm_file *file_priv )
772{
773	drm_via_blitsync_t *sync = data;
774	int err;
775
776	if (sync->engine >= VIA_NUM_BLIT_ENGINES)
777		return -EINVAL;
778
779	err = via_dmablit_sync(dev, sync->sync_handle, sync->engine);
780
781	if (-EINTR == err)
782		err = -EAGAIN;
783
784	return err;
785}
786
787
788/*
789 * Queue a blit and hand back a handle to be used for sync. This IOCTL may be
790 * interrupted by a signal while waiting for a free slot in the blit queue.
791 * In that case it returns with -EAGAIN and should be reissued. See the above
792 * IOCTL code.
793 */
794int
795via_dma_blit( struct drm_device *dev, void *data, struct drm_file *file_priv )
796{
797	drm_via_dmablit_t *xfer = data;
798	int err;
799
800	err = via_dmablit(dev, xfer);
801
802	return err;
803}
804