i915_dma.c revision 152909
1145132Sanholt/* i915_dma.c -- DMA support for the I915 -*- linux-c -*- 2145132Sanholt */ 3152909Sanholt/*- 4145132Sanholt * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. 5145132Sanholt * All Rights Reserved. 6152909Sanholt * 7152909Sanholt * Permission is hereby granted, free of charge, to any person obtaining a 8152909Sanholt * copy of this software and associated documentation files (the 9152909Sanholt * "Software"), to deal in the Software without restriction, including 10152909Sanholt * without limitation the rights to use, copy, modify, merge, publish, 11152909Sanholt * distribute, sub license, and/or sell copies of the Software, and to 12152909Sanholt * permit persons to whom the Software is furnished to do so, subject to 13152909Sanholt * the following conditions: 14152909Sanholt * 15152909Sanholt * The above copyright notice and this permission notice (including the 16152909Sanholt * next paragraph) shall be included in all copies or substantial portions 17152909Sanholt * of the Software. 18152909Sanholt * 19152909Sanholt * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 20152909Sanholt * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 21152909Sanholt * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 22152909Sanholt * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR 23152909Sanholt * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 24152909Sanholt * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 25152909Sanholt * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 26152909Sanholt * 27152909Sanholt */ 28145132Sanholt 29152909Sanholt#include <sys/cdefs.h> 30152909Sanholt__FBSDID("$FreeBSD: head/sys/dev/drm/i915_dma.c 152909 2005-11-28 23:13:57Z anholt $"); 31145132Sanholt 32152909Sanholt#include "dev/drm/drmP.h" 33152909Sanholt#include "dev/drm/drm.h" 34152909Sanholt#include "dev/drm/i915_drm.h" 35152909Sanholt#include "dev/drm/i915_drv.h" 36152909Sanholt 37145132Sanholt/* Really want an OS-independent resettable timer. Would like to have 38145132Sanholt * this loop run for (eg) 3 sec, but have the timer reset every time 39145132Sanholt * the head pointer changes, so that EBUSY only happens if the ring 40145132Sanholt * actually stalls for (eg) 3 seconds. 41145132Sanholt */ 42145132Sanholtint i915_wait_ring(drm_device_t * dev, int n, const char *caller) 43145132Sanholt{ 44145132Sanholt drm_i915_private_t *dev_priv = dev->dev_private; 45145132Sanholt drm_i915_ring_buffer_t *ring = &(dev_priv->ring); 46145132Sanholt u32 last_head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR; 47145132Sanholt int i; 48145132Sanholt 49145132Sanholt for (i = 0; i < 10000; i++) { 50145132Sanholt ring->head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR; 51145132Sanholt ring->space = ring->head - (ring->tail + 8); 52145132Sanholt if (ring->space < 0) 53145132Sanholt ring->space += ring->Size; 54145132Sanholt if (ring->space >= n) 55145132Sanholt return 0; 56145132Sanholt 57145132Sanholt dev_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT; 58145132Sanholt 59145132Sanholt if (ring->head != last_head) 60145132Sanholt i = 0; 61145132Sanholt 62145132Sanholt last_head = ring->head; 63145132Sanholt } 64145132Sanholt 65145132Sanholt return DRM_ERR(EBUSY); 66145132Sanholt} 67145132Sanholt 68145132Sanholtvoid i915_kernel_lost_context(drm_device_t * dev) 69145132Sanholt{ 70145132Sanholt drm_i915_private_t *dev_priv = dev->dev_private; 71145132Sanholt drm_i915_ring_buffer_t *ring = &(dev_priv->ring); 72145132Sanholt 73145132Sanholt ring->head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR; 74145132Sanholt ring->tail = I915_READ(LP_RING + RING_TAIL) & TAIL_ADDR; 75145132Sanholt ring->space = ring->head - (ring->tail + 8); 76145132Sanholt if (ring->space < 0) 77145132Sanholt ring->space += ring->Size; 78145132Sanholt 79145132Sanholt if (ring->head == ring->tail) 80145132Sanholt dev_priv->sarea_priv->perf_boxes |= I915_BOX_RING_EMPTY; 81145132Sanholt} 82145132Sanholt 83145132Sanholtstatic int i915_dma_cleanup(drm_device_t * dev) 84145132Sanholt{ 85145132Sanholt /* Make sure interrupts are disabled here because the uninstall ioctl 86145132Sanholt * may not have been called from userspace and after dev_private 87145132Sanholt * is freed, it's too late. 88145132Sanholt */ 89145132Sanholt if (dev->irq) 90145132Sanholt drm_irq_uninstall(dev); 91145132Sanholt 92145132Sanholt if (dev->dev_private) { 93145132Sanholt drm_i915_private_t *dev_priv = 94145132Sanholt (drm_i915_private_t *) dev->dev_private; 95145132Sanholt 96145132Sanholt if (dev_priv->ring.virtual_start) { 97145132Sanholt drm_core_ioremapfree(&dev_priv->ring.map, dev); 98145132Sanholt } 99145132Sanholt 100152909Sanholt if (dev_priv->status_page_dmah) { 101152909Sanholt drm_pci_free(dev, dev_priv->status_page_dmah); 102145132Sanholt /* Need to rewrite hardware status page */ 103145132Sanholt I915_WRITE(0x02080, 0x1ffff000); 104145132Sanholt } 105145132Sanholt 106145132Sanholt drm_free(dev->dev_private, sizeof(drm_i915_private_t), 107145132Sanholt DRM_MEM_DRIVER); 108145132Sanholt 109145132Sanholt dev->dev_private = NULL; 110145132Sanholt } 111145132Sanholt 112145132Sanholt return 0; 113145132Sanholt} 114145132Sanholt 115145132Sanholtstatic int i915_initialize(drm_device_t * dev, 116145132Sanholt drm_i915_private_t * dev_priv, 117145132Sanholt drm_i915_init_t * init) 118145132Sanholt{ 119145132Sanholt memset(dev_priv, 0, sizeof(drm_i915_private_t)); 120145132Sanholt 121145132Sanholt DRM_GETSAREA(); 122145132Sanholt if (!dev_priv->sarea) { 123145132Sanholt DRM_ERROR("can not find sarea!\n"); 124145132Sanholt dev->dev_private = (void *)dev_priv; 125145132Sanholt i915_dma_cleanup(dev); 126145132Sanholt return DRM_ERR(EINVAL); 127145132Sanholt } 128145132Sanholt 129145132Sanholt dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset); 130145132Sanholt if (!dev_priv->mmio_map) { 131145132Sanholt dev->dev_private = (void *)dev_priv; 132145132Sanholt i915_dma_cleanup(dev); 133145132Sanholt DRM_ERROR("can not find mmio map!\n"); 134145132Sanholt return DRM_ERR(EINVAL); 135145132Sanholt } 136145132Sanholt 137145132Sanholt dev_priv->sarea_priv = (drm_i915_sarea_t *) 138145132Sanholt ((u8 *) dev_priv->sarea->handle + init->sarea_priv_offset); 139145132Sanholt 140145132Sanholt dev_priv->ring.Start = init->ring_start; 141145132Sanholt dev_priv->ring.End = init->ring_end; 142145132Sanholt dev_priv->ring.Size = init->ring_size; 143145132Sanholt dev_priv->ring.tail_mask = dev_priv->ring.Size - 1; 144145132Sanholt 145145132Sanholt dev_priv->ring.map.offset = init->ring_start; 146145132Sanholt dev_priv->ring.map.size = init->ring_size; 147145132Sanholt dev_priv->ring.map.type = 0; 148145132Sanholt dev_priv->ring.map.flags = 0; 149145132Sanholt dev_priv->ring.map.mtrr = 0; 150145132Sanholt 151145132Sanholt drm_core_ioremap(&dev_priv->ring.map, dev); 152145132Sanholt 153145132Sanholt if (dev_priv->ring.map.handle == NULL) { 154145132Sanholt dev->dev_private = (void *)dev_priv; 155145132Sanholt i915_dma_cleanup(dev); 156145132Sanholt DRM_ERROR("can not ioremap virtual address for" 157145132Sanholt " ring buffer\n"); 158145132Sanholt return DRM_ERR(ENOMEM); 159145132Sanholt } 160145132Sanholt 161145132Sanholt dev_priv->ring.virtual_start = dev_priv->ring.map.handle; 162145132Sanholt 163145132Sanholt dev_priv->back_offset = init->back_offset; 164145132Sanholt dev_priv->front_offset = init->front_offset; 165145132Sanholt dev_priv->current_page = 0; 166145132Sanholt dev_priv->sarea_priv->pf_current_page = dev_priv->current_page; 167145132Sanholt 168145132Sanholt /* We are using separate values as placeholders for mechanisms for 169145132Sanholt * private backbuffer/depthbuffer usage. 170145132Sanholt */ 171145132Sanholt dev_priv->use_mi_batchbuffer_start = 0; 172145132Sanholt 173145132Sanholt /* Allow hardware batchbuffers unless told otherwise. 174145132Sanholt */ 175145132Sanholt dev_priv->allow_batchbuffer = 1; 176145132Sanholt 177145132Sanholt /* Program Hardware Status Page */ 178152909Sanholt dev_priv->status_page_dmah = drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE, 179152909Sanholt 0xffffffff); 180145132Sanholt 181152909Sanholt if (!dev_priv->status_page_dmah) { 182145132Sanholt dev->dev_private = (void *)dev_priv; 183145132Sanholt i915_dma_cleanup(dev); 184145132Sanholt DRM_ERROR("Can not allocate hardware status page\n"); 185145132Sanholt return DRM_ERR(ENOMEM); 186145132Sanholt } 187152909Sanholt dev_priv->hw_status_page = dev_priv->status_page_dmah->vaddr; 188152909Sanholt dev_priv->dma_status_page = dev_priv->status_page_dmah->busaddr; 189152909Sanholt 190145132Sanholt memset(dev_priv->hw_status_page, 0, PAGE_SIZE); 191145132Sanholt DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page); 192145132Sanholt 193145132Sanholt I915_WRITE(0x02080, dev_priv->dma_status_page); 194145132Sanholt DRM_DEBUG("Enabled hardware status page\n"); 195145132Sanholt 196145132Sanholt dev->dev_private = (void *)dev_priv; 197145132Sanholt 198145132Sanholt return 0; 199145132Sanholt} 200145132Sanholt 201145132Sanholtstatic int i915_dma_resume(drm_device_t * dev) 202145132Sanholt{ 203145132Sanholt drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 204145132Sanholt 205145132Sanholt DRM_DEBUG("%s\n", __FUNCTION__); 206145132Sanholt 207145132Sanholt if (!dev_priv->sarea) { 208145132Sanholt DRM_ERROR("can not find sarea!\n"); 209145132Sanholt return DRM_ERR(EINVAL); 210145132Sanholt } 211145132Sanholt 212145132Sanholt if (!dev_priv->mmio_map) { 213145132Sanholt DRM_ERROR("can not find mmio map!\n"); 214145132Sanholt return DRM_ERR(EINVAL); 215145132Sanholt } 216145132Sanholt 217145132Sanholt if (dev_priv->ring.map.handle == NULL) { 218145132Sanholt DRM_ERROR("can not ioremap virtual address for" 219145132Sanholt " ring buffer\n"); 220145132Sanholt return DRM_ERR(ENOMEM); 221145132Sanholt } 222145132Sanholt 223145132Sanholt /* Program Hardware Status Page */ 224145132Sanholt if (!dev_priv->hw_status_page) { 225145132Sanholt DRM_ERROR("Can not find hardware status page\n"); 226145132Sanholt return DRM_ERR(EINVAL); 227145132Sanholt } 228145132Sanholt DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page); 229145132Sanholt 230145132Sanholt I915_WRITE(0x02080, dev_priv->dma_status_page); 231145132Sanholt DRM_DEBUG("Enabled hardware status page\n"); 232145132Sanholt 233145132Sanholt return 0; 234145132Sanholt} 235145132Sanholt 236145132Sanholtstatic int i915_dma_init(DRM_IOCTL_ARGS) 237145132Sanholt{ 238145132Sanholt DRM_DEVICE; 239145132Sanholt drm_i915_private_t *dev_priv; 240145132Sanholt drm_i915_init_t init; 241145132Sanholt int retcode = 0; 242145132Sanholt 243145132Sanholt DRM_COPY_FROM_USER_IOCTL(init, (drm_i915_init_t __user *) data, 244145132Sanholt sizeof(init)); 245145132Sanholt 246145132Sanholt switch (init.func) { 247145132Sanholt case I915_INIT_DMA: 248145132Sanholt dev_priv = drm_alloc(sizeof(drm_i915_private_t), 249145132Sanholt DRM_MEM_DRIVER); 250145132Sanholt if (dev_priv == NULL) 251145132Sanholt return DRM_ERR(ENOMEM); 252145132Sanholt retcode = i915_initialize(dev, dev_priv, &init); 253145132Sanholt break; 254145132Sanholt case I915_CLEANUP_DMA: 255145132Sanholt retcode = i915_dma_cleanup(dev); 256145132Sanholt break; 257145132Sanholt case I915_RESUME_DMA: 258145132Sanholt retcode = i915_dma_resume(dev); 259145132Sanholt break; 260145132Sanholt default: 261145132Sanholt retcode = -EINVAL; 262145132Sanholt break; 263145132Sanholt } 264145132Sanholt 265145132Sanholt return retcode; 266145132Sanholt} 267145132Sanholt 268145132Sanholt/* Implement basically the same security restrictions as hardware does 269145132Sanholt * for MI_BATCH_NON_SECURE. These can be made stricter at any time. 270145132Sanholt * 271145132Sanholt * Most of the calculations below involve calculating the size of a 272145132Sanholt * particular instruction. It's important to get the size right as 273145132Sanholt * that tells us where the next instruction to check is. Any illegal 274145132Sanholt * instruction detected will be given a size of zero, which is a 275145132Sanholt * signal to abort the rest of the buffer. 276145132Sanholt */ 277145132Sanholtstatic int do_validate_cmd(int cmd) 278145132Sanholt{ 279145132Sanholt switch (((cmd >> 29) & 0x7)) { 280145132Sanholt case 0x0: 281145132Sanholt switch ((cmd >> 23) & 0x3f) { 282145132Sanholt case 0x0: 283145132Sanholt return 1; /* MI_NOOP */ 284145132Sanholt case 0x4: 285145132Sanholt return 1; /* MI_FLUSH */ 286145132Sanholt default: 287145132Sanholt return 0; /* disallow everything else */ 288145132Sanholt } 289145132Sanholt break; 290145132Sanholt case 0x1: 291145132Sanholt return 0; /* reserved */ 292145132Sanholt case 0x2: 293145132Sanholt return (cmd & 0xff) + 2; /* 2d commands */ 294145132Sanholt case 0x3: 295145132Sanholt if (((cmd >> 24) & 0x1f) <= 0x18) 296145132Sanholt return 1; 297145132Sanholt 298145132Sanholt switch ((cmd >> 24) & 0x1f) { 299145132Sanholt case 0x1c: 300145132Sanholt return 1; 301145132Sanholt case 0x1d: 302145132Sanholt switch ((cmd >> 16) & 0xff) { 303145132Sanholt case 0x3: 304145132Sanholt return (cmd & 0x1f) + 2; 305145132Sanholt case 0x4: 306145132Sanholt return (cmd & 0xf) + 2; 307145132Sanholt default: 308145132Sanholt return (cmd & 0xffff) + 2; 309145132Sanholt } 310145132Sanholt case 0x1e: 311145132Sanholt if (cmd & (1 << 23)) 312145132Sanholt return (cmd & 0xffff) + 1; 313145132Sanholt else 314145132Sanholt return 1; 315145132Sanholt case 0x1f: 316145132Sanholt if ((cmd & (1 << 23)) == 0) /* inline vertices */ 317145132Sanholt return (cmd & 0x1ffff) + 2; 318145132Sanholt else if (cmd & (1 << 17)) /* indirect random */ 319145132Sanholt if ((cmd & 0xffff) == 0) 320145132Sanholt return 0; /* unknown length, too hard */ 321145132Sanholt else 322145132Sanholt return (((cmd & 0xffff) + 1) / 2) + 1; 323145132Sanholt else 324145132Sanholt return 2; /* indirect sequential */ 325145132Sanholt default: 326145132Sanholt return 0; 327145132Sanholt } 328145132Sanholt default: 329145132Sanholt return 0; 330145132Sanholt } 331145132Sanholt 332145132Sanholt return 0; 333145132Sanholt} 334145132Sanholt 335145132Sanholtstatic int validate_cmd(int cmd) 336145132Sanholt{ 337145132Sanholt int ret = do_validate_cmd(cmd); 338145132Sanholt 339145132Sanholt/* printk("validate_cmd( %x ): %d\n", cmd, ret); */ 340145132Sanholt 341145132Sanholt return ret; 342145132Sanholt} 343145132Sanholt 344145132Sanholtstatic int i915_emit_cmds(drm_device_t * dev, int __user * buffer, int dwords) 345145132Sanholt{ 346145132Sanholt drm_i915_private_t *dev_priv = dev->dev_private; 347145132Sanholt int i; 348145132Sanholt RING_LOCALS; 349145132Sanholt 350145132Sanholt for (i = 0; i < dwords;) { 351145132Sanholt int cmd, sz; 352145132Sanholt 353145132Sanholt if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i], sizeof(cmd))) 354145132Sanholt return DRM_ERR(EINVAL); 355145132Sanholt 356145132Sanholt/* printk("%d/%d ", i, dwords); */ 357145132Sanholt 358145132Sanholt if ((sz = validate_cmd(cmd)) == 0 || i + sz > dwords) 359145132Sanholt return DRM_ERR(EINVAL); 360145132Sanholt 361145132Sanholt BEGIN_LP_RING(sz); 362145132Sanholt OUT_RING(cmd); 363145132Sanholt 364145132Sanholt while (++i, --sz) { 365145132Sanholt if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i], 366145132Sanholt sizeof(cmd))) { 367145132Sanholt return DRM_ERR(EINVAL); 368145132Sanholt } 369145132Sanholt OUT_RING(cmd); 370145132Sanholt } 371145132Sanholt ADVANCE_LP_RING(); 372145132Sanholt } 373145132Sanholt 374145132Sanholt return 0; 375145132Sanholt} 376145132Sanholt 377145132Sanholtstatic int i915_emit_box(drm_device_t * dev, 378145132Sanholt drm_clip_rect_t __user * boxes, 379145132Sanholt int i, int DR1, int DR4) 380145132Sanholt{ 381145132Sanholt drm_i915_private_t *dev_priv = dev->dev_private; 382145132Sanholt drm_clip_rect_t box; 383145132Sanholt RING_LOCALS; 384145132Sanholt 385145132Sanholt if (DRM_COPY_FROM_USER_UNCHECKED(&box, &boxes[i], sizeof(box))) { 386145132Sanholt return EFAULT; 387145132Sanholt } 388145132Sanholt 389145132Sanholt if (box.y2 <= box.y1 || box.x2 <= box.x1 || box.y2 <= 0 || box.x2 <= 0) { 390145132Sanholt DRM_ERROR("Bad box %d,%d..%d,%d\n", 391145132Sanholt box.x1, box.y1, box.x2, box.y2); 392145132Sanholt return DRM_ERR(EINVAL); 393145132Sanholt } 394145132Sanholt 395145132Sanholt BEGIN_LP_RING(6); 396145132Sanholt OUT_RING(GFX_OP_DRAWRECT_INFO); 397145132Sanholt OUT_RING(DR1); 398145132Sanholt OUT_RING((box.x1 & 0xffff) | (box.y1 << 16)); 399145132Sanholt OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16)); 400145132Sanholt OUT_RING(DR4); 401145132Sanholt OUT_RING(0); 402145132Sanholt ADVANCE_LP_RING(); 403145132Sanholt 404145132Sanholt return 0; 405145132Sanholt} 406145132Sanholt 407145132Sanholtstatic int i915_dispatch_cmdbuffer(drm_device_t * dev, 408145132Sanholt drm_i915_cmdbuffer_t * cmd) 409145132Sanholt{ 410145132Sanholt int nbox = cmd->num_cliprects; 411145132Sanholt int i = 0, count, ret; 412145132Sanholt 413145132Sanholt if (cmd->sz & 0x3) { 414145132Sanholt DRM_ERROR("alignment"); 415145132Sanholt return DRM_ERR(EINVAL); 416145132Sanholt } 417145132Sanholt 418145132Sanholt i915_kernel_lost_context(dev); 419145132Sanholt 420145132Sanholt count = nbox ? nbox : 1; 421145132Sanholt 422145132Sanholt for (i = 0; i < count; i++) { 423145132Sanholt if (i < nbox) { 424145132Sanholt ret = i915_emit_box(dev, cmd->cliprects, i, 425145132Sanholt cmd->DR1, cmd->DR4); 426145132Sanholt if (ret) 427145132Sanholt return ret; 428145132Sanholt } 429145132Sanholt 430145132Sanholt ret = i915_emit_cmds(dev, (int __user *)cmd->buf, cmd->sz / 4); 431145132Sanholt if (ret) 432145132Sanholt return ret; 433145132Sanholt } 434145132Sanholt 435145132Sanholt return 0; 436145132Sanholt} 437145132Sanholt 438145132Sanholtstatic int i915_dispatch_batchbuffer(drm_device_t * dev, 439145132Sanholt drm_i915_batchbuffer_t * batch) 440145132Sanholt{ 441145132Sanholt drm_i915_private_t *dev_priv = dev->dev_private; 442145132Sanholt drm_clip_rect_t __user *boxes = batch->cliprects; 443145132Sanholt int nbox = batch->num_cliprects; 444145132Sanholt int i = 0, count; 445145132Sanholt RING_LOCALS; 446145132Sanholt 447145132Sanholt if ((batch->start | batch->used) & 0x7) { 448145132Sanholt DRM_ERROR("alignment"); 449145132Sanholt return DRM_ERR(EINVAL); 450145132Sanholt } 451145132Sanholt 452145132Sanholt i915_kernel_lost_context(dev); 453145132Sanholt 454145132Sanholt count = nbox ? nbox : 1; 455145132Sanholt 456145132Sanholt for (i = 0; i < count; i++) { 457145132Sanholt if (i < nbox) { 458145132Sanholt int ret = i915_emit_box(dev, boxes, i, 459145132Sanholt batch->DR1, batch->DR4); 460145132Sanholt if (ret) 461145132Sanholt return ret; 462145132Sanholt } 463145132Sanholt 464145132Sanholt if (dev_priv->use_mi_batchbuffer_start) { 465145132Sanholt BEGIN_LP_RING(2); 466145132Sanholt OUT_RING(MI_BATCH_BUFFER_START | (2 << 6)); 467145132Sanholt OUT_RING(batch->start | MI_BATCH_NON_SECURE); 468145132Sanholt ADVANCE_LP_RING(); 469145132Sanholt } else { 470145132Sanholt BEGIN_LP_RING(4); 471145132Sanholt OUT_RING(MI_BATCH_BUFFER); 472145132Sanholt OUT_RING(batch->start | MI_BATCH_NON_SECURE); 473145132Sanholt OUT_RING(batch->start + batch->used - 4); 474145132Sanholt OUT_RING(0); 475145132Sanholt ADVANCE_LP_RING(); 476145132Sanholt } 477145132Sanholt } 478145132Sanholt 479145132Sanholt dev_priv->sarea_priv->last_enqueue = dev_priv->counter++; 480145132Sanholt 481145132Sanholt BEGIN_LP_RING(4); 482145132Sanholt OUT_RING(CMD_STORE_DWORD_IDX); 483145132Sanholt OUT_RING(20); 484145132Sanholt OUT_RING(dev_priv->counter); 485145132Sanholt OUT_RING(0); 486145132Sanholt ADVANCE_LP_RING(); 487145132Sanholt 488145132Sanholt return 0; 489145132Sanholt} 490145132Sanholt 491145132Sanholtstatic int i915_dispatch_flip(drm_device_t * dev) 492145132Sanholt{ 493145132Sanholt drm_i915_private_t *dev_priv = dev->dev_private; 494145132Sanholt RING_LOCALS; 495145132Sanholt 496145132Sanholt DRM_DEBUG("%s: page=%d pfCurrentPage=%d\n", 497145132Sanholt __FUNCTION__, 498145132Sanholt dev_priv->current_page, 499145132Sanholt dev_priv->sarea_priv->pf_current_page); 500145132Sanholt 501145132Sanholt i915_kernel_lost_context(dev); 502145132Sanholt 503145132Sanholt BEGIN_LP_RING(2); 504145132Sanholt OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE); 505145132Sanholt OUT_RING(0); 506145132Sanholt ADVANCE_LP_RING(); 507145132Sanholt 508145132Sanholt BEGIN_LP_RING(6); 509145132Sanholt OUT_RING(CMD_OP_DISPLAYBUFFER_INFO | ASYNC_FLIP); 510145132Sanholt OUT_RING(0); 511145132Sanholt if (dev_priv->current_page == 0) { 512145132Sanholt OUT_RING(dev_priv->back_offset); 513145132Sanholt dev_priv->current_page = 1; 514145132Sanholt } else { 515145132Sanholt OUT_RING(dev_priv->front_offset); 516145132Sanholt dev_priv->current_page = 0; 517145132Sanholt } 518145132Sanholt OUT_RING(0); 519145132Sanholt ADVANCE_LP_RING(); 520145132Sanholt 521145132Sanholt BEGIN_LP_RING(2); 522145132Sanholt OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_A_FLIP); 523145132Sanholt OUT_RING(0); 524145132Sanholt ADVANCE_LP_RING(); 525145132Sanholt 526145132Sanholt dev_priv->sarea_priv->last_enqueue = dev_priv->counter++; 527145132Sanholt 528145132Sanholt BEGIN_LP_RING(4); 529145132Sanholt OUT_RING(CMD_STORE_DWORD_IDX); 530145132Sanholt OUT_RING(20); 531145132Sanholt OUT_RING(dev_priv->counter); 532145132Sanholt OUT_RING(0); 533145132Sanholt ADVANCE_LP_RING(); 534145132Sanholt 535145132Sanholt dev_priv->sarea_priv->pf_current_page = dev_priv->current_page; 536145132Sanholt return 0; 537145132Sanholt} 538145132Sanholt 539145132Sanholtstatic int i915_quiescent(drm_device_t * dev) 540145132Sanholt{ 541145132Sanholt drm_i915_private_t *dev_priv = dev->dev_private; 542145132Sanholt 543145132Sanholt i915_kernel_lost_context(dev); 544145132Sanholt return i915_wait_ring(dev, dev_priv->ring.Size - 8, __FUNCTION__); 545145132Sanholt} 546145132Sanholt 547145132Sanholtstatic int i915_flush_ioctl(DRM_IOCTL_ARGS) 548145132Sanholt{ 549145132Sanholt DRM_DEVICE; 550145132Sanholt 551145132Sanholt LOCK_TEST_WITH_RETURN(dev, filp); 552145132Sanholt 553145132Sanholt return i915_quiescent(dev); 554145132Sanholt} 555145132Sanholt 556145132Sanholtstatic int i915_batchbuffer(DRM_IOCTL_ARGS) 557145132Sanholt{ 558145132Sanholt DRM_DEVICE; 559145132Sanholt drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 560145132Sanholt u32 *hw_status = dev_priv->hw_status_page; 561145132Sanholt drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *) 562145132Sanholt dev_priv->sarea_priv; 563145132Sanholt drm_i915_batchbuffer_t batch; 564145132Sanholt int ret; 565145132Sanholt 566145132Sanholt if (!dev_priv->allow_batchbuffer) { 567145132Sanholt DRM_ERROR("Batchbuffer ioctl disabled\n"); 568145132Sanholt return DRM_ERR(EINVAL); 569145132Sanholt } 570145132Sanholt 571145132Sanholt DRM_COPY_FROM_USER_IOCTL(batch, (drm_i915_batchbuffer_t __user *) data, 572145132Sanholt sizeof(batch)); 573145132Sanholt 574145132Sanholt DRM_DEBUG("i915 batchbuffer, start %x used %d cliprects %d\n", 575145132Sanholt batch.start, batch.used, batch.num_cliprects); 576145132Sanholt 577145132Sanholt LOCK_TEST_WITH_RETURN(dev, filp); 578145132Sanholt 579145132Sanholt if (batch.num_cliprects && DRM_VERIFYAREA_READ(batch.cliprects, 580145132Sanholt batch.num_cliprects * 581145132Sanholt sizeof(drm_clip_rect_t))) 582145132Sanholt return DRM_ERR(EFAULT); 583145132Sanholt 584145132Sanholt ret = i915_dispatch_batchbuffer(dev, &batch); 585145132Sanholt 586145132Sanholt sarea_priv->last_dispatch = (int)hw_status[5]; 587145132Sanholt return ret; 588145132Sanholt} 589145132Sanholt 590145132Sanholtstatic int i915_cmdbuffer(DRM_IOCTL_ARGS) 591145132Sanholt{ 592145132Sanholt DRM_DEVICE; 593145132Sanholt drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 594145132Sanholt u32 *hw_status = dev_priv->hw_status_page; 595145132Sanholt drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *) 596145132Sanholt dev_priv->sarea_priv; 597145132Sanholt drm_i915_cmdbuffer_t cmdbuf; 598145132Sanholt int ret; 599145132Sanholt 600145132Sanholt DRM_COPY_FROM_USER_IOCTL(cmdbuf, (drm_i915_cmdbuffer_t __user *) data, 601145132Sanholt sizeof(cmdbuf)); 602145132Sanholt 603145132Sanholt DRM_DEBUG("i915 cmdbuffer, buf %p sz %d cliprects %d\n", 604145132Sanholt cmdbuf.buf, cmdbuf.sz, cmdbuf.num_cliprects); 605145132Sanholt 606145132Sanholt LOCK_TEST_WITH_RETURN(dev, filp); 607145132Sanholt 608145132Sanholt if (cmdbuf.num_cliprects && 609145132Sanholt DRM_VERIFYAREA_READ(cmdbuf.cliprects, 610145132Sanholt cmdbuf.num_cliprects * 611145132Sanholt sizeof(drm_clip_rect_t))) { 612145132Sanholt DRM_ERROR("Fault accessing cliprects\n"); 613145132Sanholt return DRM_ERR(EFAULT); 614145132Sanholt } 615145132Sanholt 616145132Sanholt ret = i915_dispatch_cmdbuffer(dev, &cmdbuf); 617145132Sanholt if (ret) { 618145132Sanholt DRM_ERROR("i915_dispatch_cmdbuffer failed\n"); 619145132Sanholt return ret; 620145132Sanholt } 621145132Sanholt 622145132Sanholt sarea_priv->last_dispatch = (int)hw_status[5]; 623145132Sanholt return 0; 624145132Sanholt} 625145132Sanholt 626145132Sanholtstatic int i915_do_cleanup_pageflip(drm_device_t * dev) 627145132Sanholt{ 628145132Sanholt drm_i915_private_t *dev_priv = dev->dev_private; 629145132Sanholt 630145132Sanholt DRM_DEBUG("%s\n", __FUNCTION__); 631145132Sanholt if (dev_priv->current_page != 0) 632145132Sanholt i915_dispatch_flip(dev); 633145132Sanholt 634145132Sanholt return 0; 635145132Sanholt} 636145132Sanholt 637145132Sanholtstatic int i915_flip_bufs(DRM_IOCTL_ARGS) 638145132Sanholt{ 639145132Sanholt DRM_DEVICE; 640145132Sanholt 641145132Sanholt DRM_DEBUG("%s\n", __FUNCTION__); 642145132Sanholt 643145132Sanholt LOCK_TEST_WITH_RETURN(dev, filp); 644145132Sanholt 645145132Sanholt return i915_dispatch_flip(dev); 646145132Sanholt} 647145132Sanholt 648145132Sanholtstatic int i915_getparam(DRM_IOCTL_ARGS) 649145132Sanholt{ 650145132Sanholt DRM_DEVICE; 651145132Sanholt drm_i915_private_t *dev_priv = dev->dev_private; 652145132Sanholt drm_i915_getparam_t param; 653145132Sanholt int value; 654145132Sanholt 655145132Sanholt if (!dev_priv) { 656145132Sanholt DRM_ERROR("%s called with no initialization\n", __FUNCTION__); 657145132Sanholt return DRM_ERR(EINVAL); 658145132Sanholt } 659145132Sanholt 660145132Sanholt DRM_COPY_FROM_USER_IOCTL(param, (drm_i915_getparam_t __user *) data, 661145132Sanholt sizeof(param)); 662145132Sanholt 663145132Sanholt switch (param.param) { 664145132Sanholt case I915_PARAM_IRQ_ACTIVE: 665145132Sanholt value = dev->irq ? 1 : 0; 666145132Sanholt break; 667145132Sanholt case I915_PARAM_ALLOW_BATCHBUFFER: 668145132Sanholt value = dev_priv->allow_batchbuffer ? 1 : 0; 669145132Sanholt break; 670145132Sanholt default: 671145132Sanholt DRM_ERROR("Unkown parameter %d\n", param.param); 672145132Sanholt return DRM_ERR(EINVAL); 673145132Sanholt } 674145132Sanholt 675145132Sanholt if (DRM_COPY_TO_USER(param.value, &value, sizeof(int))) { 676145132Sanholt DRM_ERROR("DRM_COPY_TO_USER failed\n"); 677145132Sanholt return DRM_ERR(EFAULT); 678145132Sanholt } 679145132Sanholt 680145132Sanholt return 0; 681145132Sanholt} 682145132Sanholt 683145132Sanholtstatic int i915_setparam(DRM_IOCTL_ARGS) 684145132Sanholt{ 685145132Sanholt DRM_DEVICE; 686145132Sanholt drm_i915_private_t *dev_priv = dev->dev_private; 687145132Sanholt drm_i915_setparam_t param; 688145132Sanholt 689145132Sanholt if (!dev_priv) { 690145132Sanholt DRM_ERROR("%s called with no initialization\n", __FUNCTION__); 691145132Sanholt return DRM_ERR(EINVAL); 692145132Sanholt } 693145132Sanholt 694145132Sanholt DRM_COPY_FROM_USER_IOCTL(param, (drm_i915_setparam_t __user *) data, 695145132Sanholt sizeof(param)); 696145132Sanholt 697145132Sanholt switch (param.param) { 698145132Sanholt case I915_SETPARAM_USE_MI_BATCHBUFFER_START: 699145132Sanholt dev_priv->use_mi_batchbuffer_start = param.value; 700145132Sanholt break; 701145132Sanholt case I915_SETPARAM_TEX_LRU_LOG_GRANULARITY: 702145132Sanholt dev_priv->tex_lru_log_granularity = param.value; 703145132Sanholt break; 704145132Sanholt case I915_SETPARAM_ALLOW_BATCHBUFFER: 705145132Sanholt dev_priv->allow_batchbuffer = param.value; 706145132Sanholt break; 707145132Sanholt default: 708145132Sanholt DRM_ERROR("unknown parameter %d\n", param.param); 709145132Sanholt return DRM_ERR(EINVAL); 710145132Sanholt } 711145132Sanholt 712145132Sanholt return 0; 713145132Sanholt} 714145132Sanholt 715152909Sanholtint i915_driver_load(drm_device_t *dev, unsigned long flags) 716145132Sanholt{ 717152909Sanholt /* i915 has 4 more counters */ 718152909Sanholt dev->counters += 4; 719152909Sanholt dev->types[6] = _DRM_STAT_IRQ; 720152909Sanholt dev->types[7] = _DRM_STAT_PRIMARY; 721152909Sanholt dev->types[8] = _DRM_STAT_SECONDARY; 722152909Sanholt dev->types[9] = _DRM_STAT_DMA; 723152909Sanholt 724152909Sanholt return 0; 725152909Sanholt} 726152909Sanholt 727152909Sanholtvoid i915_driver_lastclose(drm_device_t * dev) 728152909Sanholt{ 729145132Sanholt if (dev->dev_private) { 730145132Sanholt drm_i915_private_t *dev_priv = dev->dev_private; 731145132Sanholt i915_mem_takedown(&(dev_priv->agp_heap)); 732145132Sanholt } 733145132Sanholt i915_dma_cleanup(dev); 734145132Sanholt} 735145132Sanholt 736152909Sanholtvoid i915_driver_preclose(drm_device_t * dev, DRMFILE filp) 737145132Sanholt{ 738145132Sanholt if (dev->dev_private) { 739145132Sanholt drm_i915_private_t *dev_priv = dev->dev_private; 740145132Sanholt if (dev_priv->page_flipping) { 741145132Sanholt i915_do_cleanup_pageflip(dev); 742145132Sanholt } 743145132Sanholt i915_mem_release(dev, filp, dev_priv->agp_heap); 744145132Sanholt } 745145132Sanholt} 746145132Sanholt 747145132Sanholtdrm_ioctl_desc_t i915_ioctls[] = { 748152909Sanholt [DRM_IOCTL_NR(DRM_I915_INIT)] = {i915_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY}, 749152909Sanholt [DRM_IOCTL_NR(DRM_I915_FLUSH)] = {i915_flush_ioctl, DRM_AUTH}, 750152909Sanholt [DRM_IOCTL_NR(DRM_I915_FLIP)] = {i915_flip_bufs, DRM_AUTH}, 751152909Sanholt [DRM_IOCTL_NR(DRM_I915_BATCHBUFFER)] = {i915_batchbuffer, DRM_AUTH}, 752152909Sanholt [DRM_IOCTL_NR(DRM_I915_IRQ_EMIT)] = {i915_irq_emit, DRM_AUTH}, 753152909Sanholt [DRM_IOCTL_NR(DRM_I915_IRQ_WAIT)] = {i915_irq_wait, DRM_AUTH}, 754152909Sanholt [DRM_IOCTL_NR(DRM_I915_GETPARAM)] = {i915_getparam, DRM_AUTH}, 755152909Sanholt [DRM_IOCTL_NR(DRM_I915_SETPARAM)] = {i915_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY}, 756152909Sanholt [DRM_IOCTL_NR(DRM_I915_ALLOC)] = {i915_mem_alloc, DRM_AUTH}, 757152909Sanholt [DRM_IOCTL_NR(DRM_I915_FREE)] = {i915_mem_free, DRM_AUTH}, 758152909Sanholt [DRM_IOCTL_NR(DRM_I915_INIT_HEAP)] = {i915_mem_init_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY}, 759152909Sanholt [DRM_IOCTL_NR(DRM_I915_CMDBUFFER)] = {i915_cmdbuffer, DRM_AUTH} 760145132Sanholt}; 761145132Sanholt 762145132Sanholtint i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls); 763152909Sanholt 764152909Sanholt/** 765152909Sanholt * Determine if the device really is AGP or not. 766152909Sanholt * 767152909Sanholt * All Intel graphics chipsets are treated as AGP, even if they are really 768152909Sanholt * PCI-e. 769152909Sanholt * 770152909Sanholt * \param dev The device to be tested. 771152909Sanholt * 772152909Sanholt * \returns 773152909Sanholt * A value of 1 is always retured to indictate every i9x5 is AGP. 774152909Sanholt */ 775152909Sanholtint i915_driver_device_is_agp(drm_device_t * dev) 776152909Sanholt{ 777152909Sanholt return 1; 778152909Sanholt} 779