drm.h revision 145132
1126261Smlaier/** 2145836Smlaier * \file drm.h 3126258Smlaier * Header for the Direct Rendering Manager 4126258Smlaier * 5126258Smlaier * \author Rickard E. (Rik) Faith <faith@valinux.com> 6126258Smlaier * 7126258Smlaier * \par Acknowledgments: 8126258Smlaier * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic \c cmpxchg. 9126258Smlaier */ 10126258Smlaier 11126258Smlaier/*- 12126258Smlaier * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. 13126258Smlaier * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 14126258Smlaier * All rights reserved. 15126258Smlaier * 16126258Smlaier * Permission is hereby granted, free of charge, to any person obtaining a 17126258Smlaier * copy of this software and associated documentation files (the "Software"), 18126258Smlaier * to deal in the Software without restriction, including without limitation 19126258Smlaier * the rights to use, copy, modify, merge, publish, distribute, sublicense, 20126258Smlaier * and/or sell copies of the Software, and to permit persons to whom the 21126258Smlaier * Software is furnished to do so, subject to the following conditions: 22126258Smlaier * 23126258Smlaier * The above copyright notice and this permission notice (including the next 24126258Smlaier * paragraph) shall be included in all copies or substantial portions of the 25126258Smlaier * Software. 26126258Smlaier * 27126258Smlaier * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 28126258Smlaier * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 29126258Smlaier * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 30127145Smlaier * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 31126261Smlaier * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 32126261Smlaier * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 33126261Smlaier * OTHER DEALINGS IN THE SOFTWARE. 34126261Smlaier * 35127145Smlaier * $FreeBSD: head/sys/dev/drm/drm.h 145132 2005-04-16 03:44:47Z anholt $ 36126258Smlaier */ 37126258Smlaier 38126261Smlaier/** 39126261Smlaier * \mainpage 40126261Smlaier * 41153110Sru * The Direct Rendering Manager (DRM) is a device-independent kernel-level 42153110Sru * device driver that provides support for the XFree86 Direct Rendering 43127145Smlaier * Infrastructure (DRI). 44153110Sru * 45153110Sru * The DRM supports the Direct Rendering Infrastructure (DRI) in four major 46153110Sru * ways: 47153110Sru * -# The DRM provides synchronized access to the graphics hardware via 48153110Sru * the use of an optimized two-tiered lock. 49127145Smlaier * -# The DRM enforces the DRI security policy for access to the graphics 50153110Sru * hardware by only allowing authenticated X11 clients access to 51153110Sru * restricted regions of memory. 52126261Smlaier * -# The DRM provides a generic DMA engine, complete with multiple 53126258Smlaier * queues and the ability to detect the need for an OpenGL context 54153110Sru * switch. 55153110Sru * -# The DRM is extensible via the use of small device-specific modules 56126258Smlaier * that rely extensively on the API exported by the DRM module. 57164033Srwatson * 58164033Srwatson */ 59164033Srwatson 60130613Smlaier#ifndef _DRM_H_ 61126258Smlaier#define _DRM_H_ 62126258Smlaier 63126258Smlaier#ifndef __user 64126258Smlaier#define __user 65145836Smlaier#endif 66127145Smlaier 67145836Smlaier#if defined(__linux__) 68126261Smlaier#include <linux/config.h> 69129907Smlaier#include <asm/ioctl.h> /* For _IO* macros */ 70126261Smlaier#define DRM_IOCTL_NR(n) _IOC_NR(n) 71130613Smlaier#define DRM_IOC_VOID _IOC_NONE 72130613Smlaier#define DRM_IOC_READ _IOC_READ 73148015Smlaier#define DRM_IOC_WRITE _IOC_WRITE 74126261Smlaier#define DRM_IOC_READWRITE _IOC_READ|_IOC_WRITE 75126258Smlaier#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size) 76126258Smlaier#elif defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__) 77126261Smlaier#if defined(__FreeBSD__) && defined(IN_MODULE) 78126258Smlaier/* Prevent name collision when including sys/ioccom.h */ 79126258Smlaier#undef ioctl 80130933Sbrooks#include <sys/ioccom.h> 81130933Sbrooks#define ioctl(a,b,c) xf86ioctl(a,b,c) 82130933Sbrooks#else 83126258Smlaier#include <sys/ioccom.h> 84126258Smlaier#endif /* __FreeBSD__ && xf86ioctl */ 85126258Smlaier#define DRM_IOCTL_NR(n) ((n) & 0xff) 86145836Smlaier#define DRM_IOC_VOID IOC_VOID 87145836Smlaier#define DRM_IOC_READ IOC_OUT 88126258Smlaier#define DRM_IOC_WRITE IOC_IN 89126258Smlaier#define DRM_IOC_READWRITE IOC_INOUT 90126258Smlaier#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size) 91130613Smlaier#endif 92126258Smlaier 93130613Smlaier#define XFREE86_VERSION(major,minor,patch,snap) \ 94130613Smlaier ((major << 16) | (minor << 8) | patch) 95126258Smlaier 96126258Smlaier#ifndef CONFIG_XFREE86_VERSION 97126258Smlaier#define CONFIG_XFREE86_VERSION XFREE86_VERSION(4,1,0,0) 98126258Smlaier#endif 99126258Smlaier 100126258Smlaier#if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0) 101126258Smlaier#define DRM_PROC_DEVICES "/proc/devices" 102126258Smlaier#define DRM_PROC_MISC "/proc/misc" 103126258Smlaier#define DRM_PROC_DRM "/proc/drm" 104145836Smlaier#define DRM_DEV_DRM "/dev/drm" 105145836Smlaier#define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP) 106145836Smlaier#define DRM_DEV_UID 0 107145836Smlaier#define DRM_DEV_GID 0 108159656Smlaier#endif 109159656Smlaier 110145836Smlaier#if CONFIG_XFREE86_VERSION >= XFREE86_VERSION(4,1,0,0) 111145836Smlaier#ifdef __OpenBSD__ 112145836Smlaier#define DRM_MAJOR 81 113145836Smlaier#endif 114145836Smlaier#if defined(__linux__) || defined(__NetBSD__) 115145836Smlaier#define DRM_MAJOR 226 116145836Smlaier#endif 117145836Smlaier#define DRM_MAX_MINOR 255 118126258Smlaier#endif 119126258Smlaier#define DRM_NAME "drm" /**< Name in kernel, /dev, and /proc */ 120126258Smlaier#define DRM_MIN_ORDER 5 /**< At least 2^5 bytes = 32 bytes */ 121127145Smlaier#define DRM_MAX_ORDER 22 /**< Up to 2^22 bytes = 4MB */ 122127145Smlaier#define DRM_RAM_PERCENT 10 /**< How much system ram can we lock? */ 123126261Smlaier 124126261Smlaier#define _DRM_LOCK_HELD 0x80000000U /**< Hardware lock is held */ 125126258Smlaier#define _DRM_LOCK_CONT 0x40000000U /**< Hardware lock is contended */ 126126258Smlaier#define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD) 127126258Smlaier#define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT) 128126258Smlaier#define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT)) 129126258Smlaier 130126258Smlaiertypedef unsigned long drm_handle_t; /**< To mapped regions */ 131126258Smlaiertypedef unsigned int drm_context_t; /**< GLXContext handle */ 132126258Smlaiertypedef unsigned int drm_drawable_t; 133126258Smlaiertypedef unsigned int drm_magic_t; /**< Magic for authentication */ 134126258Smlaier 135127145Smlaier/** 136130613Smlaier * Cliprect. 137126261Smlaier * 138130613Smlaier * \warning If you change this structure, make sure you change 139127145Smlaier * XF86DRIClipRectRec in the server as well 140148015Smlaier * 141148015Smlaier * \note KW: Actually it's illegal to change either for 142148015Smlaier * backwards-compatibility reasons. 143148015Smlaier */ 144130613Smlaiertypedef struct drm_clip_rect { 145130613Smlaier unsigned short x1; 146130613Smlaier unsigned short y1; 147130613Smlaier unsigned short x2; 148130613Smlaier unsigned short y2; 149130613Smlaier} drm_clip_rect_t; 150130613Smlaier 151130613Smlaier/** 152130613Smlaier * Texture region, 153128209Sbrooks */ 154160195Ssamtypedef struct drm_tex_region { 155147261Smlaier unsigned char next; 156126261Smlaier unsigned char prev; 157126258Smlaier unsigned char in_use; 158126261Smlaier unsigned char padding; 159130613Smlaier unsigned int age; 160130613Smlaier} drm_tex_region_t; 161126258Smlaier 162130613Smlaier/** 163126258Smlaier * Hardware lock. 164126258Smlaier * 165126258Smlaier * The lock structure is a simple cache-line aligned integer. To avoid 166130613Smlaier * processor bus contention on a multiprocessor system, there should not be any 167130613Smlaier * other data stored in the same cache line. 168130613Smlaier */ 169130613Smlaiertypedef struct drm_hw_lock { 170130613Smlaier __volatile__ unsigned int lock; /**< lock variable */ 171130613Smlaier char padding[60]; /**< Pad to cache line */ 172130613Smlaier} drm_hw_lock_t; 173126258Smlaier 174145836Smlaier/* This is beyond ugly, and only works on GCC. However, it allows me to use 175127145Smlaier * drm.h in places (i.e., in the X-server) where I can't use size_t. The real 176126258Smlaier * fix is to use uint32_t instead of size_t, but that fix will break existing 177130613Smlaier * LP64 (i.e., PowerPC64, SPARC64, IA-64, Alpha, etc.) systems. That *will* 178130613Smlaier * eventually happen, though. I chose 'unsigned long' to be the fallback type 179130613Smlaier * because that works on all the platforms I know about. Hopefully, the 180126261Smlaier * real fix will happen before that bites us. 181126258Smlaier */ 182127145Smlaier 183126261Smlaier#ifdef __SIZE_TYPE__ 184126261Smlaier# define DRM_SIZE_T __SIZE_TYPE__ 185147256Sbrooks#else 186130933Sbrooks# warning "__SIZE_TYPE__ not defined. Assuming sizeof(size_t) == sizeof(unsigned long)!" 187126261Smlaier# define DRM_SIZE_T unsigned long 188128209Sbrooks#endif 189126261Smlaier 190126261Smlaier/** 191126261Smlaier * DRM_IOCTL_VERSION ioctl argument type. 192126261Smlaier * 193130613Smlaier * \sa drmGetVersion(). 194126261Smlaier */ 195130613Smlaiertypedef struct drm_version { 196130613Smlaier int version_major; /**< Major version */ 197126261Smlaier int version_minor; /**< Minor version */ 198147261Smlaier int version_patchlevel; /**< Patch level */ 199147261Smlaier DRM_SIZE_T name_len; /**< Length of name buffer */ 200126261Smlaier char __user *name; /**< Name of driver */ 201126261Smlaier DRM_SIZE_T date_len; /**< Length of date buffer */ 202126261Smlaier char __user *date; /**< User-space buffer to hold date */ 203126261Smlaier DRM_SIZE_T desc_len; /**< Length of desc buffer */ 204147256Sbrooks char __user *desc; /**< User-space buffer to hold desc */ 205126261Smlaier} drm_version_t; 206160164Smlaier 207126261Smlaier/** 208126261Smlaier * DRM_IOCTL_GET_UNIQUE ioctl argument type. 209126261Smlaier * 210128209Sbrooks * \sa drmGetBusid() and drmSetBusId(). 211160195Ssam */ 212160195Ssamtypedef struct drm_unique { 213160195Ssam DRM_SIZE_T unique_len; /**< Length of unique */ 214126261Smlaier char __user *unique; /**< Unique name for driver instantiation */ 215160195Ssam} drm_unique_t; 216126261Smlaier 217126261Smlaier#undef DRM_SIZE_T 218130613Smlaier 219126261Smlaiertypedef struct drm_list { 220126261Smlaier int count; /**< Length of user-space structures */ 221130613Smlaier drm_version_t __user *version; 222147256Sbrooks} drm_list_t; 223147256Sbrooks 224147256Sbrookstypedef struct drm_block { 225147256Sbrooks int unused; 226147256Sbrooks} drm_block_t; 227126261Smlaier 228130613Smlaier/** 229130613Smlaier * DRM_IOCTL_CONTROL ioctl argument type. 230130613Smlaier * 231130613Smlaier * \sa drmCtlInstHandler() and drmCtlUninstHandler(). 232130613Smlaier */ 233130613Smlaiertypedef struct drm_control { 234159603Smlaier enum { 235130613Smlaier DRM_ADD_COMMAND, 236130613Smlaier DRM_RM_COMMAND, 237130613Smlaier DRM_INST_HANDLER, 238160164Smlaier DRM_UNINST_HANDLER 239160164Smlaier } func; 240160164Smlaier int irq; 241160164Smlaier} drm_control_t; 242130613Smlaier 243141584Smlaier/** 244130613Smlaier * Type of memory to map. 245130613Smlaier */ 246130613Smlaiertypedef enum drm_map_type { 247130613Smlaier _DRM_FRAME_BUFFER = 0, /**< WC (no caching), no core dump */ 248130613Smlaier _DRM_REGISTERS = 1, /**< no caching, no core dump */ 249130613Smlaier _DRM_SHM = 2, /**< shared, cached */ 250130613Smlaier _DRM_AGP = 3, /**< AGP/GART */ 251130613Smlaier _DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */ 252126261Smlaier _DRM_CONSISTENT = 5 /**< Consistent memory for PCI DMA */ 253147321Smlaier} drm_map_type_t; 254147321Smlaier 255147321Smlaier/** 256147321Smlaier * Memory mapping flags. 257147614Smlaier */ 258147261Smlaiertypedef enum drm_map_flags { 259147261Smlaier _DRM_RESTRICTED = 0x01, /**< Cannot be mapped to user-virtual */ 260141584Smlaier _DRM_READ_ONLY = 0x02, 261126261Smlaier _DRM_LOCKED = 0x04, /**< shared, cached, locked */ 262126261Smlaier _DRM_KERNEL = 0x08, /**< kernel requires access */ 263126261Smlaier _DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */ 264141584Smlaier _DRM_CONTAINS_LOCK = 0x20, /**< SHM page that contains lock */ 265126261Smlaier _DRM_REMOVABLE = 0x40 /**< Removable mapping */ 266126261Smlaier} drm_map_flags_t; 267126261Smlaier 268126261Smlaiertypedef struct drm_ctx_priv_map { 269126261Smlaier unsigned int ctx_id; /**< Context requesting private mapping */ 270126261Smlaier void *handle; /**< Handle of map */ 271126258Smlaier} drm_ctx_priv_map_t; 272126258Smlaier 273126258Smlaier/** 274126258Smlaier * DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls 275130613Smlaier * argument type. 276130613Smlaier * 277126258Smlaier * \sa drmAddMap(). 278130613Smlaier */ 279130613Smlaiertypedef struct drm_map { 280130613Smlaier unsigned long offset; /**< Requested physical address (0 for SAREA)*/ 281130613Smlaier unsigned long size; /**< Requested physical size (bytes) */ 282145836Smlaier drm_map_type_t type; /**< Type of memory to map */ 283130613Smlaier drm_map_flags_t flags; /**< Flags */ 284130613Smlaier void *handle; /**< User-space: "Handle" to pass to mmap() */ 285130613Smlaier /**< Kernel-space: kernel-virtual address */ 286126258Smlaier int mtrr; /**< MTRR slot used */ 287126258Smlaier /* Private data */ 288126258Smlaier} drm_map_t; 289126258Smlaier 290126258Smlaier/** 291126258Smlaier * DRM_IOCTL_GET_CLIENT ioctl argument type. 292126258Smlaier */ 293126258Smlaiertypedef struct drm_client { 294126258Smlaier int idx; /**< Which client desired? */ 295126258Smlaier int auth; /**< Is client authenticated? */ 296126258Smlaier unsigned long pid; /**< Process ID */ 297130613Smlaier unsigned long uid; /**< User ID */ 298130613Smlaier unsigned long magic; /**< Magic */ 299126258Smlaier unsigned long iocs; /**< Ioctl count */ 300126258Smlaier} drm_client_t; 301126258Smlaier 302126258Smlaiertypedef enum { 303126258Smlaier _DRM_STAT_LOCK, 304126258Smlaier _DRM_STAT_OPENS, 305126258Smlaier _DRM_STAT_CLOSES, 306126261Smlaier _DRM_STAT_IOCTLS, 307126258Smlaier _DRM_STAT_LOCKS, 308126258Smlaier _DRM_STAT_UNLOCKS, 309126258Smlaier _DRM_STAT_VALUE, /**< Generic value */ 310126258Smlaier _DRM_STAT_BYTE, /**< Generic byte counter (1024bytes/K) */ 311126258Smlaier _DRM_STAT_COUNT, /**< Generic non-byte counter (1000/k) */ 312126258Smlaier 313126258Smlaier _DRM_STAT_IRQ, /**< IRQ */ 314130613Smlaier _DRM_STAT_PRIMARY, /**< Primary DMA bytes */ 315130613Smlaier _DRM_STAT_SECONDARY, /**< Secondary DMA bytes */ 316130613Smlaier _DRM_STAT_DMA, /**< DMA */ 317130613Smlaier _DRM_STAT_SPECIAL, /**< Special DMA (e.g., priority or polled) */ 318130613Smlaier _DRM_STAT_MISSED /**< Missed DMA opportunity */ 319130613Smlaier /* Add to the *END* of the list */ 320126258Smlaier} drm_stat_type_t; 321126258Smlaier 322126258Smlaier/** 323126258Smlaier * DRM_IOCTL_GET_STATS ioctl argument type. 324126258Smlaier */ 325126258Smlaiertypedef struct drm_stats { 326126258Smlaier unsigned long count; 327126258Smlaier struct { 328126258Smlaier unsigned long value; 329126258Smlaier drm_stat_type_t type; 330126258Smlaier } data[15]; 331126258Smlaier} drm_stats_t; 332126258Smlaier 333126258Smlaier/** 334130613Smlaier * Hardware locking flags. 335126258Smlaier */ 336126258Smlaiertypedef enum drm_lock_flags { 337126258Smlaier _DRM_LOCK_READY = 0x01, /**< Wait until hardware is ready for DMA */ 338130613Smlaier _DRM_LOCK_QUIESCENT = 0x02, /**< Wait until hardware quiescent */ 339130613Smlaier _DRM_LOCK_FLUSH = 0x04, /**< Flush this context's DMA queue first */ 340130613Smlaier _DRM_LOCK_FLUSH_ALL = 0x08, /**< Flush all DMA queues first */ 341130613Smlaier /* These *HALT* flags aren't supported yet 342130613Smlaier -- they will be used to support the 343130613Smlaier full-screen DGA-like mode. */ 344130613Smlaier _DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */ 345130613Smlaier _DRM_HALT_CUR_QUEUES = 0x20 /**< Halt all current queues */ 346130613Smlaier} drm_lock_flags_t; 347130613Smlaier 348130613Smlaier/** 349130613Smlaier * DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type. 350130613Smlaier * 351130613Smlaier * \sa drmGetLock() and drmUnlock(). 352130613Smlaier */ 353130613Smlaiertypedef struct drm_lock { 354130613Smlaier int context; 355130613Smlaier drm_lock_flags_t flags; 356130613Smlaier} drm_lock_t; 357130613Smlaier 358130613Smlaier/** 359130613Smlaier * DMA flags 360130613Smlaier * 361130613Smlaier * \warning 362130613Smlaier * These values \e must match xf86drm.h. 363130613Smlaier * 364130613Smlaier * \sa drm_dma. 365130613Smlaier */ 366130613Smlaiertypedef enum drm_dma_flags { 367130613Smlaier /* Flags for DMA buffer dispatch */ 368130613Smlaier _DRM_DMA_BLOCK = 0x01, /**< 369130613Smlaier * Block until buffer dispatched. 370130613Smlaier * 371130613Smlaier * \note The buffer may not yet have 372130613Smlaier * been processed by the hardware -- 373130613Smlaier * getting a hardware lock with the 374130613Smlaier * hardware quiescent will ensure 375130613Smlaier * that the buffer has been 376130613Smlaier * processed. 377130613Smlaier */ 378130613Smlaier _DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */ 379145836Smlaier _DRM_DMA_PRIORITY = 0x04, /**< High priority dispatch */ 380145836Smlaier 381145836Smlaier /* Flags for DMA buffer request */ 382130613Smlaier _DRM_DMA_WAIT = 0x10, /**< Wait for free buffers */ 383130613Smlaier _DRM_DMA_SMALLER_OK = 0x20, /**< Smaller-than-requested buffers OK */ 384130613Smlaier _DRM_DMA_LARGER_OK = 0x40 /**< Larger-than-requested buffers OK */ 385130613Smlaier} drm_dma_flags_t; 386130613Smlaier 387130613Smlaier/** 388130613Smlaier * DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type. 389130613Smlaier * 390130613Smlaier * \sa drmAddBufs(). 391145836Smlaier */ 392130613Smlaiertypedef struct drm_buf_desc { 393130613Smlaier int count; /**< Number of buffers of this size */ 394130613Smlaier int size; /**< Size in bytes */ 395130613Smlaier int low_mark; /**< Low water mark */ 396130613Smlaier int high_mark; /**< High water mark */ 397130613Smlaier enum { 398130613Smlaier _DRM_PAGE_ALIGN = 0x01, /**< Align on page boundaries for DMA */ 399130613Smlaier _DRM_AGP_BUFFER = 0x02, /**< Buffer is in AGP space */ 400130613Smlaier _DRM_SG_BUFFER = 0x04, /**< Scatter/gather memory buffer */ 401130613Smlaier _DRM_FB_BUFFER = 0x08 /**< Buffer is in frame buffer */ 402130613Smlaier } flags; 403145836Smlaier unsigned long agp_start; /**< 404130613Smlaier * Start address of where the AGP buffers are 405130613Smlaier * in the AGP aperture 406130613Smlaier */ 407130613Smlaier} drm_buf_desc_t; 408145836Smlaier 409145836Smlaier/** 410130613Smlaier * DRM_IOCTL_INFO_BUFS ioctl argument type. 411130613Smlaier */ 412130613Smlaiertypedef struct drm_buf_info { 413130613Smlaier int count; /**< Number of buffers described in list */ 414130613Smlaier drm_buf_desc_t __user *list; /**< List of buffer descriptions */ 415130613Smlaier} drm_buf_info_t; 416130613Smlaier 417130613Smlaier/** 418130613Smlaier * DRM_IOCTL_FREE_BUFS ioctl argument type. 419130613Smlaier */ 420130613Smlaiertypedef struct drm_buf_free { 421130613Smlaier int count; 422130613Smlaier int __user *list; 423130613Smlaier} drm_buf_free_t; 424130613Smlaier 425130613Smlaier/** 426130613Smlaier * Buffer information 427130613Smlaier * 428130613Smlaier * \sa drm_buf_map. 429130613Smlaier */ 430130613Smlaiertypedef struct drm_buf_pub { 431130613Smlaier int idx; /**< Index into the master buffer list */ 432130613Smlaier int total; /**< Buffer size */ 433130613Smlaier int used; /**< Amount of buffer in use (for DMA) */ 434130613Smlaier void __user *address; /**< Address of buffer */ 435130613Smlaier} drm_buf_pub_t; 436130613Smlaier 437130613Smlaier/** 438130613Smlaier * DRM_IOCTL_MAP_BUFS ioctl argument type. 439130613Smlaier */ 440145836Smlaiertypedef struct drm_buf_map { 441130613Smlaier int count; /**< Length of the buffer list */ 442130613Smlaier void __user *virtual; /**< Mmap'd area in user-virtual */ 443130613Smlaier drm_buf_pub_t __user *list; /**< Buffer information */ 444130613Smlaier} drm_buf_map_t; 445130613Smlaier 446130613Smlaier/** 447130613Smlaier * DRM_IOCTL_DMA ioctl argument type. 448130613Smlaier * 449130613Smlaier * Indices here refer to the offset into the buffer list in drm_buf_get. 450130613Smlaier * 451130613Smlaier * \sa drmDMA(). 452130613Smlaier */ 453130613Smlaiertypedef struct drm_dma { 454130613Smlaier int context; /**< Context handle */ 455130613Smlaier int send_count; /**< Number of buffers to send */ 456130613Smlaier int __user *send_indices; /**< List of handles to buffers */ 457130613Smlaier int __user *send_sizes; /**< Lengths of data to send */ 458130613Smlaier drm_dma_flags_t flags; /**< Flags */ 459130613Smlaier int request_count; /**< Number of buffers requested */ 460130613Smlaier int request_size; /**< Desired size for buffers */ 461130613Smlaier int __user *request_indices; /**< Buffer information */ 462130613Smlaier int __user *request_sizes; 463130613Smlaier int granted_count; /**< Number of buffers granted */ 464130613Smlaier} drm_dma_t; 465130613Smlaier 466130613Smlaiertypedef enum { 467130613Smlaier _DRM_CONTEXT_PRESERVED = 0x01, 468130613Smlaier _DRM_CONTEXT_2DONLY = 0x02 469130613Smlaier} drm_ctx_flags_t; 470130613Smlaier 471130613Smlaier/** 472130613Smlaier * DRM_IOCTL_ADD_CTX ioctl argument type. 473130613Smlaier * 474130613Smlaier * \sa drmCreateContext() and drmDestroyContext(). 475130613Smlaier */ 476130613Smlaiertypedef struct drm_ctx { 477130613Smlaier drm_context_t handle; 478130613Smlaier drm_ctx_flags_t flags; 479130613Smlaier} drm_ctx_t; 480130613Smlaier 481130613Smlaier/** 482130613Smlaier * DRM_IOCTL_RES_CTX ioctl argument type. 483130613Smlaier */ 484130613Smlaiertypedef struct drm_ctx_res { 485130613Smlaier int count; 486130613Smlaier drm_ctx_t __user *contexts; 487130613Smlaier} drm_ctx_res_t; 488130613Smlaier 489130613Smlaier/** 490130613Smlaier * DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type. 491130613Smlaier */ 492130613Smlaiertypedef struct drm_draw { 493130613Smlaier drm_drawable_t handle; 494130613Smlaier} drm_draw_t; 495130613Smlaier 496145836Smlaier/** 497130613Smlaier * DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type. 498130613Smlaier */ 499130613Smlaiertypedef struct drm_auth { 500130613Smlaier drm_magic_t magic; 501130613Smlaier} drm_auth_t; 502130613Smlaier 503130613Smlaier/** 504130613Smlaier * DRM_IOCTL_IRQ_BUSID ioctl argument type. 505130613Smlaier * 506130613Smlaier * \sa drmGetInterruptFromBusID(). 507130613Smlaier */ 508130613Smlaiertypedef struct drm_irq_busid { 509130613Smlaier int irq; /**< IRQ number */ 510130613Smlaier int busnum; /**< bus number */ 511130613Smlaier int devnum; /**< device number */ 512145836Smlaier int funcnum; /**< function number */ 513145836Smlaier} drm_irq_busid_t; 514145836Smlaier 515145836Smlaiertypedef enum { 516130613Smlaier _DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */ 517145836Smlaier _DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */ 518145836Smlaier _DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking */ 519130613Smlaier} drm_vblank_seq_type_t; 520130613Smlaier 521130613Smlaier#define _DRM_VBLANK_FLAGS_MASK _DRM_VBLANK_SIGNAL 522130613Smlaier 523130613Smlaierstruct drm_wait_vblank_request { 524130613Smlaier drm_vblank_seq_type_t type; 525130613Smlaier unsigned int sequence; 526130613Smlaier unsigned long signal; 527130613Smlaier}; 528130613Smlaier 529130613Smlaierstruct drm_wait_vblank_reply { 530130613Smlaier drm_vblank_seq_type_t type; 531130613Smlaier unsigned int sequence; 532145836Smlaier long tval_sec; 533145836Smlaier long tval_usec; 534145836Smlaier}; 535145836Smlaier 536145836Smlaier/** 537130613Smlaier * DRM_IOCTL_WAIT_VBLANK ioctl argument type. 538145836Smlaier * 539145836Smlaier * \sa drmWaitVBlank(). 540130613Smlaier */ 541130613Smlaiertypedef union drm_wait_vblank { 542130613Smlaier struct drm_wait_vblank_request request; 543130613Smlaier struct drm_wait_vblank_reply reply; 544130613Smlaier} drm_wait_vblank_t; 545130613Smlaier 546130613Smlaier/** 547130613Smlaier * DRM_IOCTL_AGP_ENABLE ioctl argument type. 548130613Smlaier * 549130613Smlaier * \sa drmAgpEnable(). 550130613Smlaier */ 551130613Smlaiertypedef struct drm_agp_mode { 552130613Smlaier unsigned long mode; /**< AGP mode */ 553130613Smlaier} drm_agp_mode_t; 554130613Smlaier 555130613Smlaier/** 556130613Smlaier * DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type. 557130613Smlaier * 558130613Smlaier * \sa drmAgpAlloc() and drmAgpFree(). 559130613Smlaier */ 560130613Smlaiertypedef struct drm_agp_buffer { 561130613Smlaier unsigned long size; /**< In bytes -- will round to page boundary */ 562130613Smlaier unsigned long handle; /**< Used for binding / unbinding */ 563130613Smlaier unsigned long type; /**< Type of memory to allocate */ 564130613Smlaier unsigned long physical; /**< Physical used by i810 */ 565130613Smlaier} drm_agp_buffer_t; 566130613Smlaier 567130613Smlaier/** 568130613Smlaier * DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type. 569130613Smlaier * 570130613Smlaier * \sa drmAgpBind() and drmAgpUnbind(). 571130613Smlaier */ 572130613Smlaiertypedef struct drm_agp_binding { 573130613Smlaier unsigned long handle; /**< From drm_agp_buffer */ 574130613Smlaier unsigned long offset; /**< In bytes -- will round to page boundary */ 575130613Smlaier} drm_agp_binding_t; 576130613Smlaier 577130613Smlaier/** 578130613Smlaier * DRM_IOCTL_AGP_INFO ioctl argument type. 579130613Smlaier * 580130613Smlaier * \sa drmAgpVersionMajor(), drmAgpVersionMinor(), drmAgpGetMode(), 581130613Smlaier * drmAgpBase(), drmAgpSize(), drmAgpMemoryUsed(), drmAgpMemoryAvail(), 582130613Smlaier * drmAgpVendorId() and drmAgpDeviceId(). 583130613Smlaier */ 584130613Smlaiertypedef struct drm_agp_info { 585130613Smlaier int agp_version_major; 586130613Smlaier int agp_version_minor; 587130613Smlaier unsigned long mode; 588130613Smlaier unsigned long aperture_base; /**< physical address */ 589130613Smlaier unsigned long aperture_size; /**< bytes */ 590130613Smlaier unsigned long memory_allowed; /**< bytes */ 591130613Smlaier unsigned long memory_used; 592130613Smlaier 593130613Smlaier /** \name PCI information */ 594130613Smlaier /*@{ */ 595130613Smlaier unsigned short id_vendor; 596130613Smlaier unsigned short id_device; 597130613Smlaier /*@} */ 598130613Smlaier} drm_agp_info_t; 599130613Smlaier 600130613Smlaier/** 601130613Smlaier * DRM_IOCTL_SG_ALLOC ioctl argument type. 602130613Smlaier */ 603130613Smlaiertypedef struct drm_scatter_gather { 604145836Smlaier unsigned long size; /**< In bytes -- will round to page boundary */ 605145836Smlaier unsigned long handle; /**< Used for mapping / unmapping */ 606130613Smlaier} drm_scatter_gather_t; 607130613Smlaier 608130613Smlaier/** 609130613Smlaier * DRM_IOCTL_SET_VERSION ioctl argument type. 610130613Smlaier */ 611130613Smlaiertypedef struct drm_set_version { 612130613Smlaier int drm_di_major; 613130613Smlaier int drm_di_minor; 614130613Smlaier int drm_dd_major; 615130613Smlaier int drm_dd_minor; 616130613Smlaier} drm_set_version_t; 617130613Smlaier 618130613Smlaier/** 619130613Smlaier * \name Ioctls Definitions 620130613Smlaier */ 621130613Smlaier/*@{*/ 622130613Smlaier 623130613Smlaier#define DRM_IOCTL_BASE 'd' 624130613Smlaier#define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr) 625130613Smlaier#define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type) 626130613Smlaier#define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type) 627145836Smlaier#define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE,nr,type) 628145836Smlaier 629145836Smlaier#define DRM_IOCTL_VERSION DRM_IOWR(0x00, drm_version_t) 630145836Smlaier#define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, drm_unique_t) 631145836Smlaier#define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, drm_auth_t) 632145836Smlaier#define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, drm_irq_busid_t) 633145836Smlaier#define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, drm_map_t) 634145836Smlaier#define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, drm_client_t) 635145836Smlaier#define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, drm_stats_t) 636145836Smlaier#define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, drm_set_version_t) 637145836Smlaier 638145836Smlaier#define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, drm_unique_t) 639145836Smlaier#define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, drm_auth_t) 640145836Smlaier#define DRM_IOCTL_BLOCK DRM_IOWR(0x12, drm_block_t) 641145836Smlaier#define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, drm_block_t) 642145836Smlaier#define DRM_IOCTL_CONTROL DRM_IOW( 0x14, drm_control_t) 643145836Smlaier#define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, drm_map_t) 644145836Smlaier#define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, drm_buf_desc_t) 645145836Smlaier#define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, drm_buf_desc_t) 646145836Smlaier#define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, drm_buf_info_t) 647145836Smlaier#define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, drm_buf_map_t) 648145836Smlaier#define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, drm_buf_free_t) 649145836Smlaier 650145836Smlaier#define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, drm_map_t) 651145836Smlaier 652145836Smlaier#define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, drm_ctx_priv_map_t) 653145836Smlaier#define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, drm_ctx_priv_map_t) 654145836Smlaier 655145836Smlaier#define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, drm_ctx_t) 656145836Smlaier#define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, drm_ctx_t) 657145836Smlaier#define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, drm_ctx_t) 658145836Smlaier#define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, drm_ctx_t) 659145836Smlaier#define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, drm_ctx_t) 660145836Smlaier#define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, drm_ctx_t) 661145836Smlaier#define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, drm_ctx_res_t) 662145836Smlaier#define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, drm_draw_t) 663145836Smlaier#define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, drm_draw_t) 664145836Smlaier#define DRM_IOCTL_DMA DRM_IOWR(0x29, drm_dma_t) 665145836Smlaier#define DRM_IOCTL_LOCK DRM_IOW( 0x2a, drm_lock_t) 666145836Smlaier#define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, drm_lock_t) 667145836Smlaier#define DRM_IOCTL_FINISH DRM_IOW( 0x2c, drm_lock_t) 668145836Smlaier 669145836Smlaier#define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30) 670145836Smlaier#define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31) 671145836Smlaier#define DRM_IOCTL_AGP_ENABLE DRM_IOW( 0x32, drm_agp_mode_t) 672145836Smlaier#define DRM_IOCTL_AGP_INFO DRM_IOR( 0x33, drm_agp_info_t) 673145836Smlaier#define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, drm_agp_buffer_t) 674145836Smlaier#define DRM_IOCTL_AGP_FREE DRM_IOW( 0x35, drm_agp_buffer_t) 675145836Smlaier#define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, drm_agp_binding_t) 676145836Smlaier#define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, drm_agp_binding_t) 677145836Smlaier 678145836Smlaier#define DRM_IOCTL_SG_ALLOC DRM_IOW( 0x38, drm_scatter_gather_t) 679145836Smlaier#define DRM_IOCTL_SG_FREE DRM_IOW( 0x39, drm_scatter_gather_t) 680145836Smlaier 681145836Smlaier#define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, drm_wait_vblank_t) 682145836Smlaier 683145836Smlaier/*@}*/ 684145836Smlaier 685145836Smlaier/** 686145836Smlaier * Device specific ioctls should only be in their respective headers 687145836Smlaier * The device specific ioctl range is from 0x40 to 0x79. 688145836Smlaier * 689145836Smlaier * \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and 690145836Smlaier * drmCommandReadWrite(). 691130613Smlaier */ 692130613Smlaier#define DRM_COMMAND_BASE 0x40 693130613Smlaier 694130613Smlaier#endif 695130613Smlaier