common.h revision 306664
1/*- 2 * Copyright (c) 2011 Chelsio Communications, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: stable/11/sys/dev/cxgbe/common/common.h 306664 2016-10-03 23:49:05Z jhb $ 27 * 28 */ 29 30#ifndef __CHELSIO_COMMON_H 31#define __CHELSIO_COMMON_H 32 33#include "t4_hw.h" 34 35#define GLBL_INTR_MASK (F_CIM | F_MPS | F_PL | F_PCIE | F_MC0 | F_EDC0 | \ 36 F_EDC1 | F_LE | F_TP | F_MA | F_PM_TX | F_PM_RX | F_ULP_RX | \ 37 F_CPL_SWITCH | F_SGE | F_ULP_TX) 38 39enum { 40 MAX_NPORTS = 4, /* max # of ports */ 41 SERNUM_LEN = 24, /* Serial # length */ 42 EC_LEN = 16, /* E/C length */ 43 ID_LEN = 16, /* ID length */ 44 PN_LEN = 16, /* Part Number length */ 45 MACADDR_LEN = 12, /* MAC Address length */ 46}; 47 48enum { 49 T4_REGMAP_SIZE = (160 * 1024), 50 T5_REGMAP_SIZE = (332 * 1024), 51}; 52 53enum { MEM_EDC0, MEM_EDC1, MEM_MC, MEM_MC0 = MEM_MC, MEM_MC1 }; 54 55enum dev_master { MASTER_CANT, MASTER_MAY, MASTER_MUST }; 56 57enum dev_state { DEV_STATE_UNINIT, DEV_STATE_INIT, DEV_STATE_ERR }; 58 59enum { 60 PAUSE_RX = 1 << 0, 61 PAUSE_TX = 1 << 1, 62 PAUSE_AUTONEG = 1 << 2 63}; 64 65struct port_stats { 66 u64 tx_octets; /* total # of octets in good frames */ 67 u64 tx_frames; /* all good frames */ 68 u64 tx_bcast_frames; /* all broadcast frames */ 69 u64 tx_mcast_frames; /* all multicast frames */ 70 u64 tx_ucast_frames; /* all unicast frames */ 71 u64 tx_error_frames; /* all error frames */ 72 73 u64 tx_frames_64; /* # of Tx frames in a particular range */ 74 u64 tx_frames_65_127; 75 u64 tx_frames_128_255; 76 u64 tx_frames_256_511; 77 u64 tx_frames_512_1023; 78 u64 tx_frames_1024_1518; 79 u64 tx_frames_1519_max; 80 81 u64 tx_drop; /* # of dropped Tx frames */ 82 u64 tx_pause; /* # of transmitted pause frames */ 83 u64 tx_ppp0; /* # of transmitted PPP prio 0 frames */ 84 u64 tx_ppp1; /* # of transmitted PPP prio 1 frames */ 85 u64 tx_ppp2; /* # of transmitted PPP prio 2 frames */ 86 u64 tx_ppp3; /* # of transmitted PPP prio 3 frames */ 87 u64 tx_ppp4; /* # of transmitted PPP prio 4 frames */ 88 u64 tx_ppp5; /* # of transmitted PPP prio 5 frames */ 89 u64 tx_ppp6; /* # of transmitted PPP prio 6 frames */ 90 u64 tx_ppp7; /* # of transmitted PPP prio 7 frames */ 91 92 u64 rx_octets; /* total # of octets in good frames */ 93 u64 rx_frames; /* all good frames */ 94 u64 rx_bcast_frames; /* all broadcast frames */ 95 u64 rx_mcast_frames; /* all multicast frames */ 96 u64 rx_ucast_frames; /* all unicast frames */ 97 u64 rx_too_long; /* # of frames exceeding MTU */ 98 u64 rx_jabber; /* # of jabber frames */ 99 u64 rx_fcs_err; /* # of received frames with bad FCS */ 100 u64 rx_len_err; /* # of received frames with length error */ 101 u64 rx_symbol_err; /* symbol errors */ 102 u64 rx_runt; /* # of short frames */ 103 104 u64 rx_frames_64; /* # of Rx frames in a particular range */ 105 u64 rx_frames_65_127; 106 u64 rx_frames_128_255; 107 u64 rx_frames_256_511; 108 u64 rx_frames_512_1023; 109 u64 rx_frames_1024_1518; 110 u64 rx_frames_1519_max; 111 112 u64 rx_pause; /* # of received pause frames */ 113 u64 rx_ppp0; /* # of received PPP prio 0 frames */ 114 u64 rx_ppp1; /* # of received PPP prio 1 frames */ 115 u64 rx_ppp2; /* # of received PPP prio 2 frames */ 116 u64 rx_ppp3; /* # of received PPP prio 3 frames */ 117 u64 rx_ppp4; /* # of received PPP prio 4 frames */ 118 u64 rx_ppp5; /* # of received PPP prio 5 frames */ 119 u64 rx_ppp6; /* # of received PPP prio 6 frames */ 120 u64 rx_ppp7; /* # of received PPP prio 7 frames */ 121 122 u64 rx_ovflow0; /* drops due to buffer-group 0 overflows */ 123 u64 rx_ovflow1; /* drops due to buffer-group 1 overflows */ 124 u64 rx_ovflow2; /* drops due to buffer-group 2 overflows */ 125 u64 rx_ovflow3; /* drops due to buffer-group 3 overflows */ 126 u64 rx_trunc0; /* buffer-group 0 truncated packets */ 127 u64 rx_trunc1; /* buffer-group 1 truncated packets */ 128 u64 rx_trunc2; /* buffer-group 2 truncated packets */ 129 u64 rx_trunc3; /* buffer-group 3 truncated packets */ 130}; 131 132struct lb_port_stats { 133 u64 octets; 134 u64 frames; 135 u64 bcast_frames; 136 u64 mcast_frames; 137 u64 ucast_frames; 138 u64 error_frames; 139 140 u64 frames_64; 141 u64 frames_65_127; 142 u64 frames_128_255; 143 u64 frames_256_511; 144 u64 frames_512_1023; 145 u64 frames_1024_1518; 146 u64 frames_1519_max; 147 148 u64 drop; 149 150 u64 ovflow0; 151 u64 ovflow1; 152 u64 ovflow2; 153 u64 ovflow3; 154 u64 trunc0; 155 u64 trunc1; 156 u64 trunc2; 157 u64 trunc3; 158}; 159 160struct tp_tcp_stats { 161 u32 tcp_out_rsts; 162 u64 tcp_in_segs; 163 u64 tcp_out_segs; 164 u64 tcp_retrans_segs; 165}; 166 167struct tp_usm_stats { 168 u32 frames; 169 u32 drops; 170 u64 octets; 171}; 172 173struct tp_fcoe_stats { 174 u32 frames_ddp; 175 u32 frames_drop; 176 u64 octets_ddp; 177}; 178 179struct tp_err_stats { 180 u32 mac_in_errs[MAX_NCHAN]; 181 u32 hdr_in_errs[MAX_NCHAN]; 182 u32 tcp_in_errs[MAX_NCHAN]; 183 u32 tnl_cong_drops[MAX_NCHAN]; 184 u32 ofld_chan_drops[MAX_NCHAN]; 185 u32 tnl_tx_drops[MAX_NCHAN]; 186 u32 ofld_vlan_drops[MAX_NCHAN]; 187 u32 tcp6_in_errs[MAX_NCHAN]; 188 u32 ofld_no_neigh; 189 u32 ofld_cong_defer; 190}; 191 192struct tp_proxy_stats { 193 u32 proxy[MAX_NCHAN]; 194}; 195 196struct tp_cpl_stats { 197 u32 req[MAX_NCHAN]; 198 u32 rsp[MAX_NCHAN]; 199}; 200 201struct tp_rdma_stats { 202 u32 rqe_dfr_pkt; 203 u32 rqe_dfr_mod; 204}; 205 206struct sge_params { 207 int timer_val[SGE_NTIMERS]; 208 int counter_val[SGE_NCOUNTERS]; 209 int fl_starve_threshold; 210 int fl_starve_threshold2; 211 int page_shift; 212 int eq_s_qpp; 213 int iq_s_qpp; 214 int spg_len; 215 int pad_boundary; 216 int pack_boundary; 217 int fl_pktshift; 218 u32 sge_control; 219 u32 sge_fl_buffer_size[SGE_FLBUF_SIZES]; 220}; 221 222struct tp_params { 223 unsigned int tre; /* log2 of core clocks per TP tick */ 224 unsigned int dack_re; /* DACK timer resolution */ 225 unsigned int la_mask; /* what events are recorded by TP LA */ 226 unsigned short tx_modq[MAX_NCHAN]; /* channel to modulation queue map */ 227 228 uint32_t vlan_pri_map; 229 uint32_t ingress_config; 230 uint32_t rx_pkt_encap; 231 232 int8_t fcoe_shift; 233 int8_t port_shift; 234 int8_t vnic_shift; 235 int8_t vlan_shift; 236 int8_t tos_shift; 237 int8_t protocol_shift; 238 int8_t ethertype_shift; 239 int8_t macmatch_shift; 240 int8_t matchtype_shift; 241 int8_t frag_shift; 242}; 243 244struct vpd_params { 245 unsigned int cclk; 246 u8 ec[EC_LEN + 1]; 247 u8 sn[SERNUM_LEN + 1]; 248 u8 id[ID_LEN + 1]; 249 u8 pn[PN_LEN + 1]; 250 u8 na[MACADDR_LEN + 1]; 251}; 252 253struct pci_params { 254 unsigned int vpd_cap_addr; 255 unsigned int mps; 256 unsigned short speed; 257 unsigned short width; 258}; 259 260/* 261 * Firmware device log. 262 */ 263struct devlog_params { 264 u32 memtype; /* which memory (FW_MEMTYPE_* ) */ 265 u32 start; /* start of log in firmware memory */ 266 u32 size; /* size of log */ 267 u32 addr; /* start address in flat addr space */ 268}; 269 270/* Stores chip specific parameters */ 271struct chip_params { 272 u8 nchan; 273 u8 pm_stats_cnt; 274 u8 cng_ch_bits_log; /* congestion channel map bits width */ 275 u8 nsched_cls; 276 u8 cim_num_obq; 277 u16 mps_rplc_size; 278 u16 vfcount; 279 u32 sge_fl_db; 280 u16 mps_tcam_size; 281}; 282 283/* VF-only parameters. */ 284 285/* 286 * Global Receive Side Scaling (RSS) parameters in host-native format. 287 */ 288struct rss_params { 289 unsigned int mode; /* RSS mode */ 290 union { 291 struct { 292 u_int synmapen:1; /* SYN Map Enable */ 293 u_int syn4tupenipv6:1; /* enable hashing 4-tuple IPv6 SYNs */ 294 u_int syn2tupenipv6:1; /* enable hashing 2-tuple IPv6 SYNs */ 295 u_int syn4tupenipv4:1; /* enable hashing 4-tuple IPv4 SYNs */ 296 u_int syn2tupenipv4:1; /* enable hashing 2-tuple IPv4 SYNs */ 297 u_int ofdmapen:1; /* Offload Map Enable */ 298 u_int tnlmapen:1; /* Tunnel Map Enable */ 299 u_int tnlalllookup:1; /* Tunnel All Lookup */ 300 u_int hashtoeplitz:1; /* use Toeplitz hash */ 301 } basicvirtual; 302 } u; 303}; 304 305/* 306 * Maximum resources provisioned for a PCI VF. 307 */ 308struct vf_resources { 309 unsigned int nvi; /* N virtual interfaces */ 310 unsigned int neq; /* N egress Qs */ 311 unsigned int nethctrl; /* N egress ETH or CTRL Qs */ 312 unsigned int niqflint; /* N ingress Qs/w free list(s) & intr */ 313 unsigned int niq; /* N ingress Qs */ 314 unsigned int tc; /* PCI-E traffic class */ 315 unsigned int pmask; /* port access rights mask */ 316 unsigned int nexactf; /* N exact MPS filters */ 317 unsigned int r_caps; /* read capabilities */ 318 unsigned int wx_caps; /* write/execute capabilities */ 319}; 320 321struct adapter_params { 322 struct sge_params sge; 323 struct tp_params tp; /* PF-only */ 324 struct vpd_params vpd; 325 struct pci_params pci; 326 struct devlog_params devlog; /* PF-only */ 327 struct rss_params rss; /* VF-only */ 328 struct vf_resources vfres; /* VF-only */ 329 330 unsigned int sf_size; /* serial flash size in bytes */ 331 unsigned int sf_nsec; /* # of flash sectors */ 332 333 unsigned int fw_vers; 334 unsigned int tp_vers; 335 unsigned int exprom_vers; 336 337 unsigned short mtus[NMTUS]; 338 unsigned short a_wnd[NCCTRL_WIN]; 339 unsigned short b_wnd[NCCTRL_WIN]; 340 341 u_int ftid_min; 342 u_int ftid_max; 343 u_int etid_min; 344 u_int netids; 345 346 unsigned int cim_la_size; 347 348 uint8_t nports; /* # of ethernet ports */ 349 uint8_t portvec; 350 unsigned int chipid:4; /* chip ID. T4 = 4, T5 = 5, ... */ 351 unsigned int rev:4; /* chip revision */ 352 unsigned int fpga:1; /* this is an FPGA */ 353 unsigned int offload:1; /* hw is TOE capable, fw has divvied up card 354 resources for TOE operation. */ 355 unsigned int bypass:1; /* this is a bypass card */ 356 unsigned int ethoffload:1; 357 358 unsigned int ofldq_wr_cred; 359 unsigned int eo_wr_cred; 360}; 361 362#define CHELSIO_T4 0x4 363#define CHELSIO_T5 0x5 364#define CHELSIO_T6 0x6 365 366/* 367 * State needed to monitor the forward progress of SGE Ingress DMA activities 368 * and possible hangs. 369 */ 370struct sge_idma_monitor_state { 371 unsigned int idma_1s_thresh; /* 1s threshold in Core Clock ticks */ 372 unsigned int idma_stalled[2]; /* synthesized stalled timers in HZ */ 373 unsigned int idma_state[2]; /* IDMA Hang detect state */ 374 unsigned int idma_qid[2]; /* IDMA Hung Ingress Queue ID */ 375 unsigned int idma_warn[2]; /* time to warning in HZ */ 376}; 377 378struct trace_params { 379 u32 data[TRACE_LEN / 4]; 380 u32 mask[TRACE_LEN / 4]; 381 unsigned short snap_len; 382 unsigned short min_len; 383 unsigned char skip_ofst; 384 unsigned char skip_len; 385 unsigned char invert; 386 unsigned char port; 387}; 388 389struct link_config { 390 unsigned short supported; /* link capabilities */ 391 unsigned short advertising; /* advertised capabilities */ 392 unsigned short requested_speed; /* speed user has requested */ 393 unsigned short speed; /* actual link speed */ 394 unsigned char requested_fc; /* flow control user has requested */ 395 unsigned char fc; /* actual link flow control */ 396 unsigned char autoneg; /* autonegotiating? */ 397 unsigned char link_ok; /* link up? */ 398}; 399 400#include "adapter.h" 401 402#ifndef PCI_VENDOR_ID_CHELSIO 403# define PCI_VENDOR_ID_CHELSIO 0x1425 404#endif 405 406#define for_each_port(adapter, iter) \ 407 for (iter = 0; iter < (adapter)->params.nports; ++iter) 408 409static inline int is_ftid(const struct adapter *sc, u_int tid) 410{ 411 412 return (tid >= sc->params.ftid_min && tid <= sc->params.ftid_max); 413} 414 415static inline int is_etid(const struct adapter *sc, u_int tid) 416{ 417 418 return (tid >= sc->params.etid_min); 419} 420 421static inline int is_offload(const struct adapter *adap) 422{ 423 return adap->params.offload; 424} 425 426static inline int is_ethoffload(const struct adapter *adap) 427{ 428 return adap->params.ethoffload; 429} 430 431static inline int chip_id(struct adapter *adap) 432{ 433 return adap->params.chipid; 434} 435 436static inline int chip_rev(struct adapter *adap) 437{ 438 return adap->params.rev; 439} 440 441static inline int is_t4(struct adapter *adap) 442{ 443 return adap->params.chipid == CHELSIO_T4; 444} 445 446static inline int is_t5(struct adapter *adap) 447{ 448 return adap->params.chipid == CHELSIO_T5; 449} 450 451static inline int is_t6(struct adapter *adap) 452{ 453 return adap->params.chipid == CHELSIO_T6; 454} 455 456static inline int is_fpga(struct adapter *adap) 457{ 458 return adap->params.fpga; 459} 460 461static inline unsigned int core_ticks_per_usec(const struct adapter *adap) 462{ 463 return adap->params.vpd.cclk / 1000; 464} 465 466static inline unsigned int us_to_core_ticks(const struct adapter *adap, 467 unsigned int us) 468{ 469 return (us * adap->params.vpd.cclk) / 1000; 470} 471 472static inline unsigned int core_ticks_to_us(const struct adapter *adapter, 473 unsigned int ticks) 474{ 475 /* add Core Clock / 2 to round ticks to nearest uS */ 476 return ((ticks * 1000 + adapter->params.vpd.cclk/2) / 477 adapter->params.vpd.cclk); 478} 479 480static inline unsigned int dack_ticks_to_usec(const struct adapter *adap, 481 unsigned int ticks) 482{ 483 return (ticks << adap->params.tp.dack_re) / core_ticks_per_usec(adap); 484} 485 486void t4_set_reg_field(struct adapter *adap, unsigned int addr, u32 mask, u32 val); 487 488int t4_wr_mbox_meat_timeout(struct adapter *adap, int mbox, const void *cmd, 489 int size, void *rpl, bool sleep_ok, int timeout); 490int t4_wr_mbox_meat(struct adapter *adap, int mbox, const void *cmd, int size, 491 void *rpl, bool sleep_ok); 492 493static inline int t4_wr_mbox_timeout(struct adapter *adap, int mbox, 494 const void *cmd, int size, void *rpl, 495 int timeout) 496{ 497 return t4_wr_mbox_meat_timeout(adap, mbox, cmd, size, rpl, true, 498 timeout); 499} 500 501static inline int t4_wr_mbox(struct adapter *adap, int mbox, const void *cmd, 502 int size, void *rpl) 503{ 504 return t4_wr_mbox_meat(adap, mbox, cmd, size, rpl, true); 505} 506 507static inline int t4_wr_mbox_ns(struct adapter *adap, int mbox, const void *cmd, 508 int size, void *rpl) 509{ 510 return t4_wr_mbox_meat(adap, mbox, cmd, size, rpl, false); 511} 512 513void t4_read_indirect(struct adapter *adap, unsigned int addr_reg, 514 unsigned int data_reg, u32 *vals, unsigned int nregs, 515 unsigned int start_idx); 516void t4_write_indirect(struct adapter *adap, unsigned int addr_reg, 517 unsigned int data_reg, const u32 *vals, 518 unsigned int nregs, unsigned int start_idx); 519 520u32 t4_hw_pci_read_cfg4(adapter_t *adapter, int reg); 521 522struct fw_filter_wr; 523 524void t4_intr_enable(struct adapter *adapter); 525void t4_intr_disable(struct adapter *adapter); 526void t4_intr_clear(struct adapter *adapter); 527int t4_slow_intr_handler(struct adapter *adapter); 528 529int t4_hash_mac_addr(const u8 *addr); 530int t4_link_l1cfg(struct adapter *adap, unsigned int mbox, unsigned int port, 531 struct link_config *lc); 532int t4_restart_aneg(struct adapter *adap, unsigned int mbox, unsigned int port); 533int t4_seeprom_read(struct adapter *adapter, u32 addr, u32 *data); 534int t4_seeprom_write(struct adapter *adapter, u32 addr, u32 data); 535int t4_eeprom_ptov(unsigned int phys_addr, unsigned int fn, unsigned int sz); 536int t4_seeprom_wp(struct adapter *adapter, int enable); 537int t4_read_flash(struct adapter *adapter, unsigned int addr, unsigned int nwords, 538 u32 *data, int byte_oriented); 539int t4_write_flash(struct adapter *adapter, unsigned int addr, 540 unsigned int n, const u8 *data, int byte_oriented); 541int t4_load_fw(struct adapter *adapter, const u8 *fw_data, unsigned int size); 542int t4_fwcache(struct adapter *adap, enum fw_params_param_dev_fwcache op); 543int t5_fw_init_extern_mem(struct adapter *adap); 544int t4_load_bootcfg(struct adapter *adapter, const u8 *cfg_data, unsigned int size); 545int t4_load_boot(struct adapter *adap, u8 *boot_data, 546 unsigned int boot_addr, unsigned int size); 547int t4_flash_erase_sectors(struct adapter *adapter, int start, int end); 548int t4_flash_cfg_addr(struct adapter *adapter); 549int t4_load_cfg(struct adapter *adapter, const u8 *cfg_data, unsigned int size); 550int t4_get_fw_version(struct adapter *adapter, u32 *vers); 551int t4_get_tp_version(struct adapter *adapter, u32 *vers); 552int t4_get_exprom_version(struct adapter *adapter, u32 *vers); 553int t4_init_hw(struct adapter *adapter, u32 fw_params); 554const struct chip_params *t4_get_chip_params(int chipid); 555int t4_prep_adapter(struct adapter *adapter, u8 *buf); 556int t4_shutdown_adapter(struct adapter *adapter); 557int t4_init_devlog_params(struct adapter *adapter, int fw_attach); 558int t4_init_sge_params(struct adapter *adapter); 559int t4_init_tp_params(struct adapter *adap); 560int t4_filter_field_shift(const struct adapter *adap, int filter_sel); 561int t4_port_init(struct adapter *adap, int mbox, int pf, int vf, int port_id); 562void t4_fatal_err(struct adapter *adapter); 563void t4_db_full(struct adapter *adapter); 564void t4_db_dropped(struct adapter *adapter); 565int t4_set_trace_filter(struct adapter *adapter, const struct trace_params *tp, 566 int filter_index, int enable); 567void t4_get_trace_filter(struct adapter *adapter, struct trace_params *tp, 568 int filter_index, int *enabled); 569int t4_config_rss_range(struct adapter *adapter, int mbox, unsigned int viid, 570 int start, int n, const u16 *rspq, unsigned int nrspq); 571int t4_config_glbl_rss(struct adapter *adapter, int mbox, unsigned int mode, 572 unsigned int flags); 573int t4_config_vi_rss(struct adapter *adapter, int mbox, unsigned int viid, 574 unsigned int flags, unsigned int defq); 575int t4_read_rss(struct adapter *adapter, u16 *entries); 576void t4_fw_tp_pio_rw(struct adapter *adap, u32 *vals, unsigned int nregs, 577 unsigned int start_index, unsigned int rw); 578void t4_read_rss_key(struct adapter *adapter, u32 *key); 579void t4_write_rss_key(struct adapter *adap, u32 *key, int idx); 580void t4_read_rss_pf_config(struct adapter *adapter, unsigned int index, u32 *valp); 581void t4_write_rss_pf_config(struct adapter *adapter, unsigned int index, u32 val); 582void t4_read_rss_vf_config(struct adapter *adapter, unsigned int index, 583 u32 *vfl, u32 *vfh); 584void t4_write_rss_vf_config(struct adapter *adapter, unsigned int index, 585 u32 vfl, u32 vfh); 586u32 t4_read_rss_pf_map(struct adapter *adapter); 587void t4_write_rss_pf_map(struct adapter *adapter, u32 pfmap); 588u32 t4_read_rss_pf_mask(struct adapter *adapter); 589void t4_write_rss_pf_mask(struct adapter *adapter, u32 pfmask); 590int t4_mps_set_active_ports(struct adapter *adap, unsigned int port_mask); 591void t4_pmtx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]); 592void t4_pmrx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]); 593void t4_read_cimq_cfg(struct adapter *adap, u16 *base, u16 *size, u16 *thres); 594int t4_read_cim_ibq(struct adapter *adap, unsigned int qid, u32 *data, size_t n); 595int t4_read_cim_obq(struct adapter *adap, unsigned int qid, u32 *data, size_t n); 596int t4_cim_read(struct adapter *adap, unsigned int addr, unsigned int n, 597 unsigned int *valp); 598int t4_cim_write(struct adapter *adap, unsigned int addr, unsigned int n, 599 const unsigned int *valp); 600int t4_cim_ctl_read(struct adapter *adap, unsigned int addr, unsigned int n, 601 unsigned int *valp); 602int t4_cim_read_la(struct adapter *adap, u32 *la_buf, unsigned int *wrptr); 603void t4_cim_read_pif_la(struct adapter *adap, u32 *pif_req, u32 *pif_rsp, 604 unsigned int *pif_req_wrptr, unsigned int *pif_rsp_wrptr); 605void t4_cim_read_ma_la(struct adapter *adap, u32 *ma_req, u32 *ma_rsp); 606int t4_get_flash_params(struct adapter *adapter); 607 608u32 t4_read_pcie_cfg4(struct adapter *adap, int reg, int drv_fw_attach); 609int t4_mc_read(struct adapter *adap, int idx, u32 addr, 610 __be32 *data, u64 *parity); 611int t4_edc_read(struct adapter *adap, int idx, u32 addr, __be32 *data, u64 *parity); 612int t4_mem_read(struct adapter *adap, int mtype, u32 addr, u32 size, 613 __be32 *data); 614void t4_idma_monitor_init(struct adapter *adapter, 615 struct sge_idma_monitor_state *idma); 616void t4_idma_monitor(struct adapter *adapter, 617 struct sge_idma_monitor_state *idma, 618 int hz, int ticks); 619 620unsigned int t4_get_regs_len(struct adapter *adapter); 621void t4_get_regs(struct adapter *adap, u8 *buf, size_t buf_size); 622 623const char *t4_get_port_type_description(enum fw_port_type port_type); 624void t4_get_port_stats(struct adapter *adap, int idx, struct port_stats *p); 625void t4_get_port_stats_offset(struct adapter *adap, int idx, 626 struct port_stats *stats, 627 struct port_stats *offset); 628void t4_get_lb_stats(struct adapter *adap, int idx, struct lb_port_stats *p); 629void t4_clr_port_stats(struct adapter *adap, int idx); 630 631void t4_read_mtu_tbl(struct adapter *adap, u16 *mtus, u8 *mtu_log); 632void t4_read_cong_tbl(struct adapter *adap, u16 incr[NMTUS][NCCTRL_WIN]); 633void t4_read_pace_tbl(struct adapter *adap, unsigned int pace_vals[NTX_SCHED]); 634void t4_get_tx_sched(struct adapter *adap, unsigned int sched, unsigned int *kbps, 635 unsigned int *ipg); 636void t4_tp_wr_bits_indirect(struct adapter *adap, unsigned int addr, 637 unsigned int mask, unsigned int val); 638void t4_tp_read_la(struct adapter *adap, u64 *la_buf, unsigned int *wrptr); 639void t4_tp_get_err_stats(struct adapter *adap, struct tp_err_stats *st); 640void t4_tp_get_proxy_stats(struct adapter *adap, struct tp_proxy_stats *st); 641void t4_tp_get_cpl_stats(struct adapter *adap, struct tp_cpl_stats *st); 642void t4_tp_get_rdma_stats(struct adapter *adap, struct tp_rdma_stats *st); 643void t4_get_usm_stats(struct adapter *adap, struct tp_usm_stats *st); 644void t4_tp_get_tcp_stats(struct adapter *adap, struct tp_tcp_stats *v4, 645 struct tp_tcp_stats *v6); 646void t4_get_fcoe_stats(struct adapter *adap, unsigned int idx, 647 struct tp_fcoe_stats *st); 648void t4_load_mtus(struct adapter *adap, const unsigned short *mtus, 649 const unsigned short *alpha, const unsigned short *beta); 650 651void t4_ulprx_read_la(struct adapter *adap, u32 *la_buf); 652 653int t4_set_sched_bps(struct adapter *adap, int sched, unsigned int kbps); 654int t4_set_sched_ipg(struct adapter *adap, int sched, unsigned int ipg); 655int t4_set_pace_tbl(struct adapter *adap, const unsigned int *pace_vals, 656 unsigned int start, unsigned int n); 657void t4_get_chan_txrate(struct adapter *adap, u64 *nic_rate, u64 *ofld_rate); 658int t4_set_filter_mode(struct adapter *adap, unsigned int mode_map); 659void t4_mk_filtdelwr(unsigned int ftid, struct fw_filter_wr *wr, int qid); 660 661void t4_wol_magic_enable(struct adapter *adap, unsigned int port, const u8 *addr); 662int t4_wol_pat_enable(struct adapter *adap, unsigned int port, unsigned int map, 663 u64 mask0, u64 mask1, unsigned int crc, bool enable); 664 665int t4_fw_hello(struct adapter *adap, unsigned int mbox, unsigned int evt_mbox, 666 enum dev_master master, enum dev_state *state); 667int t4_fw_bye(struct adapter *adap, unsigned int mbox); 668int t4_fw_reset(struct adapter *adap, unsigned int mbox, int reset); 669int t4_fw_halt(struct adapter *adap, unsigned int mbox, int force); 670int t4_fw_restart(struct adapter *adap, unsigned int mbox, int reset); 671int t4_fw_upgrade(struct adapter *adap, unsigned int mbox, 672 const u8 *fw_data, unsigned int size, int force); 673int t4_fw_initialize(struct adapter *adap, unsigned int mbox); 674int t4_query_params(struct adapter *adap, unsigned int mbox, unsigned int pf, 675 unsigned int vf, unsigned int nparams, const u32 *params, 676 u32 *val); 677int t4_query_params_rw(struct adapter *adap, unsigned int mbox, unsigned int pf, 678 unsigned int vf, unsigned int nparams, const u32 *params, 679 u32 *val, int rw); 680int t4_set_params_timeout(struct adapter *adap, unsigned int mbox, 681 unsigned int pf, unsigned int vf, 682 unsigned int nparams, const u32 *params, 683 const u32 *val, int timeout); 684int t4_set_params(struct adapter *adap, unsigned int mbox, unsigned int pf, 685 unsigned int vf, unsigned int nparams, const u32 *params, 686 const u32 *val); 687int t4_cfg_pfvf(struct adapter *adap, unsigned int mbox, unsigned int pf, 688 unsigned int vf, unsigned int txq, unsigned int txq_eth_ctrl, 689 unsigned int rxqi, unsigned int rxq, unsigned int tc, 690 unsigned int vi, unsigned int cmask, unsigned int pmask, 691 unsigned int exactf, unsigned int rcaps, unsigned int wxcaps); 692int t4_alloc_vi_func(struct adapter *adap, unsigned int mbox, 693 unsigned int port, unsigned int pf, unsigned int vf, 694 unsigned int nmac, u8 *mac, u16 *rss_size, 695 unsigned int portfunc, unsigned int idstype); 696int t4_alloc_vi(struct adapter *adap, unsigned int mbox, unsigned int port, 697 unsigned int pf, unsigned int vf, unsigned int nmac, u8 *mac, 698 u16 *rss_size); 699int t4_free_vi(struct adapter *adap, unsigned int mbox, 700 unsigned int pf, unsigned int vf, 701 unsigned int viid); 702int t4_set_rxmode(struct adapter *adap, unsigned int mbox, unsigned int viid, 703 int mtu, int promisc, int all_multi, int bcast, int vlanex, 704 bool sleep_ok); 705int t4_alloc_mac_filt(struct adapter *adap, unsigned int mbox, unsigned int viid, 706 bool free, unsigned int naddr, const u8 **addr, u16 *idx, 707 u64 *hash, bool sleep_ok); 708int t4_change_mac(struct adapter *adap, unsigned int mbox, unsigned int viid, 709 int idx, const u8 *addr, bool persist, bool add_smt); 710int t4_set_addr_hash(struct adapter *adap, unsigned int mbox, unsigned int viid, 711 bool ucast, u64 vec, bool sleep_ok); 712int t4_enable_vi_params(struct adapter *adap, unsigned int mbox, 713 unsigned int viid, bool rx_en, bool tx_en, bool dcb_en); 714int t4_enable_vi(struct adapter *adap, unsigned int mbox, unsigned int viid, 715 bool rx_en, bool tx_en); 716int t4_identify_port(struct adapter *adap, unsigned int mbox, unsigned int viid, 717 unsigned int nblinks); 718int t4_mdio_rd(struct adapter *adap, unsigned int mbox, unsigned int phy_addr, 719 unsigned int mmd, unsigned int reg, unsigned int *valp); 720int t4_mdio_wr(struct adapter *adap, unsigned int mbox, unsigned int phy_addr, 721 unsigned int mmd, unsigned int reg, unsigned int val); 722int t4_i2c_rd(struct adapter *adap, unsigned int mbox, 723 int port, unsigned int devid, 724 unsigned int offset, unsigned int len, 725 u8 *buf); 726int t4_i2c_wr(struct adapter *adap, unsigned int mbox, 727 int port, unsigned int devid, 728 unsigned int offset, unsigned int len, 729 u8 *buf); 730int t4_iq_stop(struct adapter *adap, unsigned int mbox, unsigned int pf, 731 unsigned int vf, unsigned int iqtype, unsigned int iqid, 732 unsigned int fl0id, unsigned int fl1id); 733int t4_iq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, 734 unsigned int vf, unsigned int iqtype, unsigned int iqid, 735 unsigned int fl0id, unsigned int fl1id); 736int t4_eth_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, 737 unsigned int vf, unsigned int eqid); 738int t4_ctrl_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, 739 unsigned int vf, unsigned int eqid); 740int t4_ofld_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, 741 unsigned int vf, unsigned int eqid); 742int t4_sge_ctxt_rd(struct adapter *adap, unsigned int mbox, unsigned int cid, 743 enum ctxt_type ctype, u32 *data); 744int t4_sge_ctxt_rd_bd(struct adapter *adap, unsigned int cid, enum ctxt_type ctype, 745 u32 *data); 746int t4_sge_ctxt_flush(struct adapter *adap, unsigned int mbox); 747const char *t4_link_down_rc_str(unsigned char link_down_rc); 748int t4_handle_fw_rpl(struct adapter *adap, const __be64 *rpl); 749int t4_fwaddrspace_write(struct adapter *adap, unsigned int mbox, u32 addr, u32 val); 750int t4_sched_config(struct adapter *adapter, int type, int minmaxen, 751 int sleep_ok); 752int t4_sched_params(struct adapter *adapter, int type, int level, int mode, 753 int rateunit, int ratemode, int channel, int cl, 754 int minrate, int maxrate, int weight, int pktsize, 755 int sleep_ok); 756int t4_config_watchdog(struct adapter *adapter, unsigned int mbox, 757 unsigned int pf, unsigned int vf, 758 unsigned int timeout, unsigned int action); 759int t4_get_devlog_level(struct adapter *adapter, unsigned int *level); 760int t4_set_devlog_level(struct adapter *adapter, unsigned int level); 761void t4_sge_decode_idma_state(struct adapter *adapter, int state); 762 763static inline int t4vf_query_params(struct adapter *adapter, 764 unsigned int nparams, const u32 *params, 765 u32 *vals) 766{ 767 return t4_query_params(adapter, 0, 0, 0, nparams, params, vals); 768} 769 770static inline int t4vf_set_params(struct adapter *adapter, 771 unsigned int nparams, const u32 *params, 772 const u32 *vals) 773{ 774 return t4_set_params(adapter, 0, 0, 0, nparams, params, vals); 775} 776 777static inline int t4vf_wr_mbox(struct adapter *adap, const void *cmd, 778 int size, void *rpl) 779{ 780 return t4_wr_mbox(adap, adap->mbox, cmd, size, rpl); 781} 782 783int t4vf_wait_dev_ready(struct adapter *adapter); 784int t4vf_fw_reset(struct adapter *adapter); 785int t4vf_get_sge_params(struct adapter *adapter); 786int t4vf_get_rss_glb_config(struct adapter *adapter); 787int t4vf_get_vfres(struct adapter *adapter); 788int t4vf_prep_adapter(struct adapter *adapter); 789 790#endif /* __CHELSIO_COMMON_H */ 791