cxgb_tom.h revision 183321
154359Sroberto 254359Sroberto/************************************************************************** 354359Sroberto 4132451SrobertoCopyright (c) 2007, Chelsio Inc. 5132451SrobertoAll rights reserved. 654359Sroberto 754359SrobertoRedistribution and use in source and binary forms, with or without 854359Srobertomodification, are permitted provided that the following conditions are met: 954359Sroberto 1054359Sroberto 1. Redistributions of source code must retain the above copyright notice, 11285612Sdelphij this list of conditions and the following disclaimer. 12285612Sdelphij 13285612Sdelphij 2. Neither the name of the Chelsio Corporation nor the names of its 1482498Sroberto contributors may be used to endorse or promote products derived from 1582498Sroberto this software without specific prior written permission. 1682498Sroberto 1782498SrobertoTHIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 1882498SrobertoAND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19285612SdelphijIMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2054359SrobertoARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 2154359SrobertoLIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 2254359SrobertoCONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 2354359SrobertoSUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 2454359SrobertoINTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 2554359SrobertoCONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 2654359SrobertoARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 2754359SrobertoPOSSIBILITY OF SUCH DAMAGE. 2854359Sroberto 2954359Sroberto 3054359Sroberto$FreeBSD: head/sys/dev/cxgb/ulp/tom/cxgb_tom.h 183321 2008-09-24 01:19:08Z kmacy $ 3154359Sroberto 3254359Sroberto***************************************************************************/ 3354359Sroberto#ifndef CXGB_TOM_H_ 3454359Sroberto#define CXGB_TOM_H_ 3554359Sroberto#include <sys/protosw.h> 3654359Sroberto#include <netinet/toedev.h> 37132451Sroberto 38285612Sdelphij#define LISTEN_INFO_HASH_SIZE 32 39132451Sroberto 4082498Srobertostruct listen_info { 41182007Sroberto struct listen_info *next; /* Link to next entry */ 42182007Sroberto struct socket *so; /* The listening socket */ 43285612Sdelphij unsigned int stid; /* The server TID */ 44285612Sdelphij}; 45285612Sdelphij 4654359Sroberto 4754359Sroberto/* 48106163Sroberto * TOM tunable parameters. They can be manipulated through sysctl(2) or /proc. 49285612Sdelphij */ 50285612Sdelphijstruct tom_tunables { 5154359Sroberto int max_host_sndbuf; // max host RAM consumed by a sndbuf 5254359Sroberto int tx_hold_thres; // push/pull threshold for non-full TX sk_buffs 5354359Sroberto int max_wrs; // max # of outstanding WRs per connection 5454359Sroberto int rx_credit_thres; // min # of RX credits needed for RX_DATA_ACK 5582498Sroberto int cong_alg; // Congestion control algorithm 5682498Sroberto int mss; // max TX_DATA WR payload size 57182007Sroberto int delack; // delayed ACK control 58285612Sdelphij int max_conn; // maximum number of offloaded connections 59285612Sdelphij int soft_backlog_limit; // whether the listen backlog limit is soft 6082498Sroberto int ddp; // whether to put new connections in DDP mode 61285612Sdelphij int ddp_thres; // min recvmsg size before activating DDP 6282498Sroberto int ddp_copy_limit; // capacity of kernel DDP buffer 63285612Sdelphij int ddp_push_wait; // whether blocking DDP waits for PSH flag 64182007Sroberto int ddp_rcvcoalesce; // whether receive coalescing is enabled 65182007Sroberto int zcopy_sosend_enabled; // < is never zcopied 66182007Sroberto int zcopy_sosend_partial_thres; // < is never zcopied 6782498Sroberto int zcopy_sosend_partial_copy; // bytes copied in partial zcopy 68285612Sdelphij int zcopy_sosend_thres;// >= are mostly zcopied 69285612Sdelphij int zcopy_sosend_copy; // bytes coped in zcopied 70285612Sdelphij int zcopy_sosend_ret_pending_dma;// pot. return while pending DMA 71182007Sroberto int activated; // TOE engine activation state 72285612Sdelphij}; 7354359Sroberto 7454359Srobertostruct tom_data { 7554359Sroberto TAILQ_ENTRY(tom_data) entry; 76285612Sdelphij 7754359Sroberto struct t3cdev *cdev; 7854359Sroberto struct pci_dev *pdev; 7954359Sroberto struct toedev tdev; 8054359Sroberto 81182007Sroberto struct cxgb_client *client; 8254359Sroberto struct tom_tunables conf; 8354359Sroberto struct tom_sysctl_table *sysctl; 84182007Sroberto 8554359Sroberto /* 86182007Sroberto * The next three locks listen_lock, deferq.lock, and tid_release_lock 87182007Sroberto * are used rarely so we let them potentially share a cacheline. 88182007Sroberto */ 89182007Sroberto 90182007Sroberto struct listen_info *listen_hash_tab[LISTEN_INFO_HASH_SIZE]; 91182007Sroberto struct mtx listen_lock; 92182007Sroberto 93182007Sroberto struct mbuf_head deferq; 94285612Sdelphij struct task deferq_task; 95285612Sdelphij 96285612Sdelphij struct socket **tid_release_list; 97285612Sdelphij struct mtx tid_release_lock; 9854359Sroberto struct task tid_release_task; 9954359Sroberto 10054359Sroberto volatile int tx_dma_pending; 10154359Sroberto 10254359Sroberto unsigned int ddp_llimit; 10354359Sroberto unsigned int ddp_ulimit; 104285612Sdelphij 10554359Sroberto unsigned int rx_page_size; 10654359Sroberto 10782498Sroberto u8 *ppod_map; 10882498Sroberto unsigned int nppods; 109285612Sdelphij struct mtx ppod_map_lock; 110285612Sdelphij 111285612Sdelphij struct adap_ports *ports; 112285612Sdelphij struct taskqueue *tq; 11382498Sroberto}; 114285612Sdelphij 11582498Sroberto 11682498Srobertostruct listen_ctx { 11754359Sroberto struct socket *lso; 11854359Sroberto struct tom_data *tom_data; 119285612Sdelphij int ulp_mode; 120285612Sdelphij LIST_HEAD(, toepcb) synq_head; 121182007Sroberto 122285612Sdelphij}; 123182007Sroberto 124285612Sdelphij#define TOM_DATA(dev) (*(struct tom_data **)&(dev)->tod_l4opt) 125285612Sdelphij#define T3C_DEV(sk) ((TOM_DATA(TOE_DEV(sk)))->cdev) 126285612Sdelphij#define TOEP_T3C_DEV(toep) (TOM_DATA(toep->tp_toedev)->cdev) 127285612Sdelphij#define TOM_TUNABLE(dev, param) (TOM_DATA(dev)->conf.param) 128285612Sdelphij 129285612Sdelphij#define TP_DATASENT (1 << 0) 130285612Sdelphij#define TP_TX_WAIT_IDLE (1 << 1) 131285612Sdelphij#define TP_FIN_SENT (1 << 2) 132285612Sdelphij#define TP_ABORT_RPL_PENDING (1 << 3) 133285612Sdelphij#define TP_ABORT_SHUTDOWN (1 << 4) 134285612Sdelphij#define TP_ABORT_RPL_RCVD (1 << 5) 135285612Sdelphij#define TP_ABORT_REQ_RCVD (1 << 6) 13654359Sroberto#define TP_CLOSE_CON_REQUESTED (1 << 7) 13754359Sroberto#define TP_SYN_RCVD (1 << 8) 138285612Sdelphij#define TP_ESTABLISHED (1 << 9) 139285612Sdelphij 140285612Sdelphijvoid t3_init_tunables(struct tom_data *t); 141285612Sdelphij 142285612Sdelphijvoid t3_sysctl_register(struct adapter *sc, const struct tom_tunables *p); 143285612Sdelphij 144285612Sdelphijstatic __inline struct mbuf * 14554359Srobertom_gethdr_nofail(int len) 14654359Sroberto{ 14754359Sroberto struct mbuf *m; 14854359Sroberto 14954359Sroberto m = m_gethdr(M_NOWAIT, MT_DATA); 150285612Sdelphij if (m == NULL) { 15154359Sroberto panic("implement lowmem cache\n"); 152285612Sdelphij } 153285612Sdelphij 15454359Sroberto KASSERT(len < MHLEN, ("requested header size too large for mbuf")); 15582498Sroberto m->m_pkthdr.len = m->m_len = len; 156285612Sdelphij return (m); 157285612Sdelphij} 158285612Sdelphij 159285612Sdelphij 160285612Sdelphij#endif 16154359Sroberto