cpuctl.c revision 308760
1/*- 2 * Copyright (c) 2006-2008 Stanislav Sedov <stas@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 */ 27 28#include <sys/cdefs.h> 29__FBSDID("$FreeBSD: stable/11/sys/dev/cpuctl/cpuctl.c 308760 2016-11-17 15:16:52Z avg $"); 30 31#include <sys/param.h> 32#include <sys/systm.h> 33#include <sys/conf.h> 34#include <sys/fcntl.h> 35#include <sys/ioccom.h> 36#include <sys/malloc.h> 37#include <sys/module.h> 38#include <sys/mutex.h> 39#include <sys/priv.h> 40#include <sys/proc.h> 41#include <sys/queue.h> 42#include <sys/sched.h> 43#include <sys/kernel.h> 44#include <sys/sysctl.h> 45#include <sys/uio.h> 46#include <sys/pcpu.h> 47#include <sys/smp.h> 48#include <sys/pmckern.h> 49#include <sys/cpuctl.h> 50 51#include <machine/cpufunc.h> 52#include <machine/md_var.h> 53#include <machine/specialreg.h> 54 55static d_open_t cpuctl_open; 56static d_ioctl_t cpuctl_ioctl; 57 58#define CPUCTL_VERSION 1 59 60#ifdef CPUCTL_DEBUG 61# define DPRINTF(format,...) printf(format, __VA_ARGS__); 62#else 63# define DPRINTF(...) 64#endif 65 66#define UCODE_SIZE_MAX (32 * 1024) 67 68static int cpuctl_do_msr(int cpu, cpuctl_msr_args_t *data, u_long cmd, 69 struct thread *td); 70static int cpuctl_do_cpuid(int cpu, cpuctl_cpuid_args_t *data, 71 struct thread *td); 72static int cpuctl_do_cpuid_count(int cpu, cpuctl_cpuid_count_args_t *data, 73 struct thread *td); 74static int cpuctl_do_update(int cpu, cpuctl_update_args_t *data, 75 struct thread *td); 76static int update_intel(int cpu, cpuctl_update_args_t *args, 77 struct thread *td); 78static int update_amd(int cpu, cpuctl_update_args_t *args, struct thread *td); 79static int update_via(int cpu, cpuctl_update_args_t *args, 80 struct thread *td); 81 82static struct cdev **cpuctl_devs; 83static MALLOC_DEFINE(M_CPUCTL, "cpuctl", "CPUCTL buffer"); 84 85static struct cdevsw cpuctl_cdevsw = { 86 .d_version = D_VERSION, 87 .d_open = cpuctl_open, 88 .d_ioctl = cpuctl_ioctl, 89 .d_name = "cpuctl", 90}; 91 92/* 93 * This function checks if specified cpu enabled or not. 94 */ 95static int 96cpu_enabled(int cpu) 97{ 98 99 return (pmc_cpu_is_disabled(cpu) == 0); 100} 101 102/* 103 * Check if the current thread is bound to a specific cpu. 104 */ 105static int 106cpu_sched_is_bound(struct thread *td) 107{ 108 int ret; 109 110 thread_lock(td); 111 ret = sched_is_bound(td); 112 thread_unlock(td); 113 return (ret); 114} 115 116/* 117 * Switch to target cpu to run. 118 */ 119static void 120set_cpu(int cpu, struct thread *td) 121{ 122 123 KASSERT(cpu >= 0 && cpu <= mp_maxid && cpu_enabled(cpu), 124 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu)); 125 thread_lock(td); 126 sched_bind(td, cpu); 127 thread_unlock(td); 128 KASSERT(td->td_oncpu == cpu, 129 ("[cpuctl,%d]: cannot bind to target cpu %d on cpu %d", __LINE__, cpu, td->td_oncpu)); 130} 131 132static void 133restore_cpu(int oldcpu, int is_bound, struct thread *td) 134{ 135 136 KASSERT(oldcpu >= 0 && oldcpu <= mp_maxid && cpu_enabled(oldcpu), 137 ("[cpuctl,%d]: bad cpu number %d", __LINE__, oldcpu)); 138 thread_lock(td); 139 if (is_bound == 0) 140 sched_unbind(td); 141 else 142 sched_bind(td, oldcpu); 143 thread_unlock(td); 144} 145 146int 147cpuctl_ioctl(struct cdev *dev, u_long cmd, caddr_t data, 148 int flags, struct thread *td) 149{ 150 int ret; 151 int cpu = dev2unit(dev); 152 153 if (cpu > mp_maxid || !cpu_enabled(cpu)) { 154 DPRINTF("[cpuctl,%d]: bad cpu number %d\n", __LINE__, cpu); 155 return (ENXIO); 156 } 157 /* Require write flag for "write" requests. */ 158 if ((cmd == CPUCTL_WRMSR || cmd == CPUCTL_UPDATE) && 159 ((flags & FWRITE) == 0)) 160 return (EPERM); 161 switch (cmd) { 162 case CPUCTL_RDMSR: 163 ret = cpuctl_do_msr(cpu, (cpuctl_msr_args_t *)data, cmd, td); 164 break; 165 case CPUCTL_MSRSBIT: 166 case CPUCTL_MSRCBIT: 167 case CPUCTL_WRMSR: 168 ret = priv_check(td, PRIV_CPUCTL_WRMSR); 169 if (ret != 0) 170 goto fail; 171 ret = cpuctl_do_msr(cpu, (cpuctl_msr_args_t *)data, cmd, td); 172 break; 173 case CPUCTL_CPUID: 174 ret = cpuctl_do_cpuid(cpu, (cpuctl_cpuid_args_t *)data, td); 175 break; 176 case CPUCTL_UPDATE: 177 ret = priv_check(td, PRIV_CPUCTL_UPDATE); 178 if (ret != 0) 179 goto fail; 180 ret = cpuctl_do_update(cpu, (cpuctl_update_args_t *)data, td); 181 break; 182 case CPUCTL_CPUID_COUNT: 183 ret = cpuctl_do_cpuid_count(cpu, 184 (cpuctl_cpuid_count_args_t *)data, td); 185 break; 186 default: 187 ret = EINVAL; 188 break; 189 } 190fail: 191 return (ret); 192} 193 194/* 195 * Actually perform cpuid operation. 196 */ 197static int 198cpuctl_do_cpuid_count(int cpu, cpuctl_cpuid_count_args_t *data, 199 struct thread *td) 200{ 201 int is_bound = 0; 202 int oldcpu; 203 204 KASSERT(cpu >= 0 && cpu <= mp_maxid, 205 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu)); 206 207 /* Explicitly clear cpuid data to avoid returning stale info. */ 208 bzero(data->data, sizeof(data->data)); 209 DPRINTF("[cpuctl,%d]: retrieving cpuid lev %#0x type %#0x for %d cpu\n", 210 __LINE__, data->level, data->level_type, cpu); 211#ifdef __i386__ 212 if (cpu_id == 0) 213 return (ENODEV); 214#endif 215 oldcpu = td->td_oncpu; 216 is_bound = cpu_sched_is_bound(td); 217 set_cpu(cpu, td); 218 cpuid_count(data->level, data->level_type, data->data); 219 restore_cpu(oldcpu, is_bound, td); 220 return (0); 221} 222 223static int 224cpuctl_do_cpuid(int cpu, cpuctl_cpuid_args_t *data, struct thread *td) 225{ 226 cpuctl_cpuid_count_args_t cdata; 227 int error; 228 229 cdata.level = data->level; 230 /* Override the level type. */ 231 cdata.level_type = 0; 232 error = cpuctl_do_cpuid_count(cpu, &cdata, td); 233 bcopy(cdata.data, data->data, sizeof(data->data)); /* Ignore error */ 234 return (error); 235} 236 237/* 238 * Actually perform MSR operations. 239 */ 240static int 241cpuctl_do_msr(int cpu, cpuctl_msr_args_t *data, u_long cmd, struct thread *td) 242{ 243 uint64_t reg; 244 int is_bound = 0; 245 int oldcpu; 246 int ret; 247 248 KASSERT(cpu >= 0 && cpu <= mp_maxid, 249 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu)); 250 251 /* 252 * Explicitly clear cpuid data to avoid returning stale 253 * info 254 */ 255 DPRINTF("[cpuctl,%d]: operating on MSR %#0x for %d cpu\n", __LINE__, 256 data->msr, cpu); 257#ifdef __i386__ 258 if ((cpu_feature & CPUID_MSR) == 0) 259 return (ENODEV); 260#endif 261 oldcpu = td->td_oncpu; 262 is_bound = cpu_sched_is_bound(td); 263 set_cpu(cpu, td); 264 if (cmd == CPUCTL_RDMSR) { 265 data->data = 0; 266 ret = rdmsr_safe(data->msr, &data->data); 267 } else if (cmd == CPUCTL_WRMSR) { 268 ret = wrmsr_safe(data->msr, data->data); 269 } else if (cmd == CPUCTL_MSRSBIT) { 270 critical_enter(); 271 ret = rdmsr_safe(data->msr, ®); 272 if (ret == 0) 273 ret = wrmsr_safe(data->msr, reg | data->data); 274 critical_exit(); 275 } else if (cmd == CPUCTL_MSRCBIT) { 276 critical_enter(); 277 ret = rdmsr_safe(data->msr, ®); 278 if (ret == 0) 279 ret = wrmsr_safe(data->msr, reg & ~data->data); 280 critical_exit(); 281 } else 282 panic("[cpuctl,%d]: unknown operation requested: %lu", __LINE__, cmd); 283 restore_cpu(oldcpu, is_bound, td); 284 return (ret); 285} 286 287/* 288 * Actually perform microcode update. 289 */ 290static int 291cpuctl_do_update(int cpu, cpuctl_update_args_t *data, struct thread *td) 292{ 293 cpuctl_cpuid_args_t args = { 294 .level = 0, 295 }; 296 char vendor[13]; 297 int ret; 298 299 KASSERT(cpu >= 0 && cpu <= mp_maxid, 300 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu)); 301 DPRINTF("[cpuctl,%d]: XXX %d", __LINE__, cpu); 302 303 ret = cpuctl_do_cpuid(cpu, &args, td); 304 if (ret != 0) 305 return (ret); 306 ((uint32_t *)vendor)[0] = args.data[1]; 307 ((uint32_t *)vendor)[1] = args.data[3]; 308 ((uint32_t *)vendor)[2] = args.data[2]; 309 vendor[12] = '\0'; 310 if (strncmp(vendor, INTEL_VENDOR_ID, sizeof(INTEL_VENDOR_ID)) == 0) 311 ret = update_intel(cpu, data, td); 312 else if(strncmp(vendor, AMD_VENDOR_ID, sizeof(AMD_VENDOR_ID)) == 0) 313 ret = update_amd(cpu, data, td); 314 else if(strncmp(vendor, CENTAUR_VENDOR_ID, sizeof(CENTAUR_VENDOR_ID)) == 0) 315 ret = update_via(cpu, data, td); 316 else 317 ret = ENXIO; 318 return (ret); 319} 320 321static int 322update_intel(int cpu, cpuctl_update_args_t *args, struct thread *td) 323{ 324 void *ptr; 325 uint64_t rev0, rev1; 326 uint32_t tmp[4]; 327 int is_bound; 328 int oldcpu; 329 int ret; 330 331 if (args->size == 0 || args->data == NULL) { 332 DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__); 333 return (EINVAL); 334 } 335 if (args->size > UCODE_SIZE_MAX) { 336 DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__); 337 return (EINVAL); 338 } 339 340 /* 341 * 16 byte alignment required. Rely on the fact that 342 * malloc(9) always returns the pointer aligned at least on 343 * the size of the allocation. 344 */ 345 ptr = malloc(args->size + 16, M_CPUCTL, M_WAITOK); 346 if (copyin(args->data, ptr, args->size) != 0) { 347 DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed", 348 __LINE__, args->data, ptr, args->size); 349 ret = EFAULT; 350 goto fail; 351 } 352 oldcpu = td->td_oncpu; 353 is_bound = cpu_sched_is_bound(td); 354 set_cpu(cpu, td); 355 critical_enter(); 356 rdmsr_safe(MSR_BIOS_SIGN, &rev0); /* Get current microcode revision. */ 357 358 /* 359 * Perform update. 360 */ 361 wrmsr_safe(MSR_BIOS_UPDT_TRIG, (uintptr_t)(ptr)); 362 wrmsr_safe(MSR_BIOS_SIGN, 0); 363 364 /* 365 * Serialize instruction flow. 366 */ 367 do_cpuid(0, tmp); 368 critical_exit(); 369 rdmsr_safe(MSR_BIOS_SIGN, &rev1); /* Get new microcode revision. */ 370 restore_cpu(oldcpu, is_bound, td); 371 if (rev1 > rev0) 372 ret = 0; 373 else 374 ret = EEXIST; 375fail: 376 free(ptr, M_CPUCTL); 377 return (ret); 378} 379 380/* 381 * NB: MSR 0xc0010020, MSR_K8_UCODE_UPDATE, is not documented by AMD. 382 * Coreboot, illumos and Linux source code was used to understand 383 * its workings. 384 */ 385static void 386amd_ucode_wrmsr(void *ucode_ptr) 387{ 388 uint32_t tmp[4]; 389 390 wrmsr_safe(MSR_K8_UCODE_UPDATE, (uintptr_t)ucode_ptr); 391 do_cpuid(0, tmp); 392} 393 394static int 395update_amd(int cpu, cpuctl_update_args_t *args, struct thread *td) 396{ 397 void *ptr; 398 int ret; 399 400 if (args->size == 0 || args->data == NULL) { 401 DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__); 402 return (EINVAL); 403 } 404 if (args->size > UCODE_SIZE_MAX) { 405 DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__); 406 return (EINVAL); 407 } 408 409 /* 410 * 16 byte alignment required. Rely on the fact that 411 * malloc(9) always returns the pointer aligned at least on 412 * the size of the allocation. 413 */ 414 ptr = malloc(args->size + 16, M_CPUCTL, M_ZERO | M_WAITOK); 415 if (copyin(args->data, ptr, args->size) != 0) { 416 DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed", 417 __LINE__, args->data, ptr, args->size); 418 ret = EFAULT; 419 goto fail; 420 } 421 smp_rendezvous(NULL, amd_ucode_wrmsr, NULL, ptr); 422 ret = 0; 423fail: 424 free(ptr, M_CPUCTL); 425 return (ret); 426} 427 428static int 429update_via(int cpu, cpuctl_update_args_t *args, struct thread *td) 430{ 431 void *ptr; 432 uint64_t rev0, rev1, res; 433 uint32_t tmp[4]; 434 int is_bound; 435 int oldcpu; 436 int ret; 437 438 if (args->size == 0 || args->data == NULL) { 439 DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__); 440 return (EINVAL); 441 } 442 if (args->size > UCODE_SIZE_MAX) { 443 DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__); 444 return (EINVAL); 445 } 446 447 /* 448 * 4 byte alignment required. 449 */ 450 ptr = malloc(args->size, M_CPUCTL, M_WAITOK); 451 if (copyin(args->data, ptr, args->size) != 0) { 452 DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed", 453 __LINE__, args->data, ptr, args->size); 454 ret = EFAULT; 455 goto fail; 456 } 457 oldcpu = td->td_oncpu; 458 is_bound = cpu_sched_is_bound(td); 459 set_cpu(cpu, td); 460 critical_enter(); 461 rdmsr_safe(MSR_BIOS_SIGN, &rev0); /* Get current microcode revision. */ 462 463 /* 464 * Perform update. 465 */ 466 wrmsr_safe(MSR_BIOS_UPDT_TRIG, (uintptr_t)(ptr)); 467 do_cpuid(1, tmp); 468 469 /* 470 * Result are in low byte of MSR FCR5: 471 * 0x00: No update has been attempted since RESET. 472 * 0x01: The last attempted update was successful. 473 * 0x02: The last attempted update was unsuccessful due to a bad 474 * environment. No update was loaded and any preexisting 475 * patches are still active. 476 * 0x03: The last attempted update was not applicable to this processor. 477 * No update was loaded and any preexisting patches are still 478 * active. 479 * 0x04: The last attempted update was not successful due to an invalid 480 * update data block. No update was loaded and any preexisting 481 * patches are still active 482 */ 483 rdmsr_safe(0x1205, &res); 484 res &= 0xff; 485 critical_exit(); 486 rdmsr_safe(MSR_BIOS_SIGN, &rev1); /* Get new microcode revision. */ 487 restore_cpu(oldcpu, is_bound, td); 488 489 DPRINTF("[cpu,%d]: rev0=%x rev1=%x res=%x\n", __LINE__, 490 (unsigned)(rev0 >> 32), (unsigned)(rev1 >> 32), (unsigned)res); 491 492 if (res != 0x01) 493 ret = EINVAL; 494 else 495 ret = 0; 496fail: 497 free(ptr, M_CPUCTL); 498 return (ret); 499} 500 501int 502cpuctl_open(struct cdev *dev, int flags, int fmt __unused, struct thread *td) 503{ 504 int ret = 0; 505 int cpu; 506 507 cpu = dev2unit(dev); 508 if (cpu > mp_maxid || !cpu_enabled(cpu)) { 509 DPRINTF("[cpuctl,%d]: incorrect cpu number %d\n", __LINE__, 510 cpu); 511 return (ENXIO); 512 } 513 if (flags & FWRITE) 514 ret = securelevel_gt(td->td_ucred, 0); 515 return (ret); 516} 517 518static int 519cpuctl_modevent(module_t mod __unused, int type, void *data __unused) 520{ 521 int cpu; 522 523 switch(type) { 524 case MOD_LOAD: 525 if (bootverbose) 526 printf("cpuctl: access to MSR registers/cpuid info.\n"); 527 cpuctl_devs = malloc(sizeof(*cpuctl_devs) * (mp_maxid + 1), M_CPUCTL, 528 M_WAITOK | M_ZERO); 529 CPU_FOREACH(cpu) 530 if (cpu_enabled(cpu)) 531 cpuctl_devs[cpu] = make_dev(&cpuctl_cdevsw, cpu, 532 UID_ROOT, GID_KMEM, 0640, "cpuctl%d", cpu); 533 break; 534 case MOD_UNLOAD: 535 CPU_FOREACH(cpu) { 536 if (cpuctl_devs[cpu] != NULL) 537 destroy_dev(cpuctl_devs[cpu]); 538 } 539 free(cpuctl_devs, M_CPUCTL); 540 break; 541 case MOD_SHUTDOWN: 542 break; 543 default: 544 return (EOPNOTSUPP); 545 } 546 return (0); 547} 548 549DEV_MODULE(cpuctl, cpuctl_modevent, NULL); 550MODULE_VERSION(cpuctl, CPUCTL_VERSION); 551