cpuctl.c revision 334152
1181430Sstas/*- 2181430Sstas * Copyright (c) 2006-2008 Stanislav Sedov <stas@FreeBSD.org> 3181430Sstas * All rights reserved. 4181430Sstas * 5181430Sstas * Redistribution and use in source and binary forms, with or without 6181430Sstas * modification, are permitted provided that the following conditions 7181430Sstas * are met: 8181430Sstas * 1. Redistributions of source code must retain the above copyright 9181430Sstas * notice, this list of conditions and the following disclaimer. 10181430Sstas * 2. Redistributions in binary form must reproduce the above copyright 11181430Sstas * notice, this list of conditions and the following disclaimer in the 12181430Sstas * documentation and/or other materials provided with the distribution. 13181430Sstas * 14181430Sstas * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15181430Sstas * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16181430Sstas * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17181430Sstas * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18181430Sstas * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19181430Sstas * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20181430Sstas * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21181430Sstas * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22181430Sstas * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23181430Sstas * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24181430Sstas * SUCH DAMAGE. 25181430Sstas * 26181430Sstas */ 27181430Sstas 28181430Sstas#include <sys/cdefs.h> 29181430Sstas__FBSDID("$FreeBSD: stable/11/sys/dev/cpuctl/cpuctl.c 334152 2018-05-24 13:17:24Z kib $"); 30181430Sstas 31181430Sstas#include <sys/param.h> 32181430Sstas#include <sys/systm.h> 33181430Sstas#include <sys/conf.h> 34181430Sstas#include <sys/fcntl.h> 35181430Sstas#include <sys/ioccom.h> 36181430Sstas#include <sys/malloc.h> 37181430Sstas#include <sys/module.h> 38181430Sstas#include <sys/mutex.h> 39181430Sstas#include <sys/priv.h> 40181430Sstas#include <sys/proc.h> 41181430Sstas#include <sys/queue.h> 42181430Sstas#include <sys/sched.h> 43181430Sstas#include <sys/kernel.h> 44181430Sstas#include <sys/sysctl.h> 45181430Sstas#include <sys/uio.h> 46181430Sstas#include <sys/pcpu.h> 47181430Sstas#include <sys/smp.h> 48181430Sstas#include <sys/pmckern.h> 49181430Sstas#include <sys/cpuctl.h> 50181430Sstas 51181430Sstas#include <machine/cpufunc.h> 52181430Sstas#include <machine/md_var.h> 53181430Sstas#include <machine/specialreg.h> 54181430Sstas 55181430Sstasstatic d_open_t cpuctl_open; 56181430Sstasstatic d_ioctl_t cpuctl_ioctl; 57181430Sstas 58181430Sstas#define CPUCTL_VERSION 1 59181430Sstas 60308481Savg#ifdef CPUCTL_DEBUG 61181430Sstas# define DPRINTF(format,...) printf(format, __VA_ARGS__); 62181430Sstas#else 63181430Sstas# define DPRINTF(...) 64181430Sstas#endif 65181430Sstas 66308801Skib#define UCODE_SIZE_MAX (4 * 1024 * 1024) 67181430Sstas 68181430Sstasstatic int cpuctl_do_msr(int cpu, cpuctl_msr_args_t *data, u_long cmd, 69181430Sstas struct thread *td); 70301962Skibstatic int cpuctl_do_cpuid(int cpu, cpuctl_cpuid_args_t *data, 71181430Sstas struct thread *td); 72301962Skibstatic int cpuctl_do_cpuid_count(int cpu, cpuctl_cpuid_count_args_t *data, 73267651Sattilio struct thread *td); 74327871Skibstatic int cpuctl_do_eval_cpu_features(int cpu, struct thread *td); 75181430Sstasstatic int cpuctl_do_update(int cpu, cpuctl_update_args_t *data, 76181430Sstas struct thread *td); 77181430Sstasstatic int update_intel(int cpu, cpuctl_update_args_t *args, 78181430Sstas struct thread *td); 79181430Sstasstatic int update_amd(int cpu, cpuctl_update_args_t *args, struct thread *td); 80228436Sfabientstatic int update_via(int cpu, cpuctl_update_args_t *args, 81228436Sfabient struct thread *td); 82181430Sstas 83181430Sstasstatic struct cdev **cpuctl_devs; 84181430Sstasstatic MALLOC_DEFINE(M_CPUCTL, "cpuctl", "CPUCTL buffer"); 85181430Sstas 86181430Sstasstatic struct cdevsw cpuctl_cdevsw = { 87181430Sstas .d_version = D_VERSION, 88181430Sstas .d_open = cpuctl_open, 89181430Sstas .d_ioctl = cpuctl_ioctl, 90181430Sstas .d_name = "cpuctl", 91181430Sstas}; 92181430Sstas 93181430Sstas/* 94181430Sstas * This function checks if specified cpu enabled or not. 95181430Sstas */ 96181430Sstasstatic int 97181430Sstascpu_enabled(int cpu) 98181430Sstas{ 99181430Sstas 100181430Sstas return (pmc_cpu_is_disabled(cpu) == 0); 101181430Sstas} 102181430Sstas 103181430Sstas/* 104181430Sstas * Check if the current thread is bound to a specific cpu. 105181430Sstas */ 106181430Sstasstatic int 107181430Sstascpu_sched_is_bound(struct thread *td) 108181430Sstas{ 109181430Sstas int ret; 110181430Sstas 111181430Sstas thread_lock(td); 112181430Sstas ret = sched_is_bound(td); 113181430Sstas thread_unlock(td); 114181430Sstas return (ret); 115181430Sstas} 116181430Sstas 117181430Sstas/* 118181430Sstas * Switch to target cpu to run. 119181430Sstas */ 120181430Sstasstatic void 121181430Sstasset_cpu(int cpu, struct thread *td) 122181430Sstas{ 123181430Sstas 124302372Snwhitehorn KASSERT(cpu >= 0 && cpu <= mp_maxid && cpu_enabled(cpu), 125181430Sstas ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu)); 126181430Sstas thread_lock(td); 127181430Sstas sched_bind(td, cpu); 128181430Sstas thread_unlock(td); 129181430Sstas KASSERT(td->td_oncpu == cpu, 130315969Skib ("[cpuctl,%d]: cannot bind to target cpu %d on cpu %d", __LINE__, 131315969Skib cpu, td->td_oncpu)); 132181430Sstas} 133181430Sstas 134181430Sstasstatic void 135181430Sstasrestore_cpu(int oldcpu, int is_bound, struct thread *td) 136181430Sstas{ 137181430Sstas 138302372Snwhitehorn KASSERT(oldcpu >= 0 && oldcpu <= mp_maxid && cpu_enabled(oldcpu), 139181430Sstas ("[cpuctl,%d]: bad cpu number %d", __LINE__, oldcpu)); 140181430Sstas thread_lock(td); 141181430Sstas if (is_bound == 0) 142181430Sstas sched_unbind(td); 143181430Sstas else 144181430Sstas sched_bind(td, oldcpu); 145181430Sstas thread_unlock(td); 146181430Sstas} 147181430Sstas 148181430Sstasint 149181430Sstascpuctl_ioctl(struct cdev *dev, u_long cmd, caddr_t data, 150315969Skib int flags, struct thread *td) 151181430Sstas{ 152315969Skib int cpu, ret; 153181430Sstas 154315969Skib cpu = dev2unit(dev); 155302372Snwhitehorn if (cpu > mp_maxid || !cpu_enabled(cpu)) { 156181430Sstas DPRINTF("[cpuctl,%d]: bad cpu number %d\n", __LINE__, cpu); 157181430Sstas return (ENXIO); 158181430Sstas } 159181430Sstas /* Require write flag for "write" requests. */ 160315970Skib if ((cmd == CPUCTL_MSRCBIT || cmd == CPUCTL_MSRSBIT || 161327871Skib cmd == CPUCTL_UPDATE || cmd == CPUCTL_WRMSR || 162327871Skib cmd == CPUCTL_EVAL_CPU_FEATURES) && 163315970Skib (flags & FWRITE) == 0) 164181430Sstas return (EPERM); 165181430Sstas switch (cmd) { 166181430Sstas case CPUCTL_RDMSR: 167181430Sstas ret = cpuctl_do_msr(cpu, (cpuctl_msr_args_t *)data, cmd, td); 168181430Sstas break; 169195189Sstas case CPUCTL_MSRSBIT: 170195189Sstas case CPUCTL_MSRCBIT: 171181430Sstas case CPUCTL_WRMSR: 172181430Sstas ret = priv_check(td, PRIV_CPUCTL_WRMSR); 173181430Sstas if (ret != 0) 174181430Sstas goto fail; 175181430Sstas ret = cpuctl_do_msr(cpu, (cpuctl_msr_args_t *)data, cmd, td); 176181430Sstas break; 177181430Sstas case CPUCTL_CPUID: 178301962Skib ret = cpuctl_do_cpuid(cpu, (cpuctl_cpuid_args_t *)data, td); 179181430Sstas break; 180181430Sstas case CPUCTL_UPDATE: 181181430Sstas ret = priv_check(td, PRIV_CPUCTL_UPDATE); 182181430Sstas if (ret != 0) 183181430Sstas goto fail; 184181430Sstas ret = cpuctl_do_update(cpu, (cpuctl_update_args_t *)data, td); 185181430Sstas break; 186267651Sattilio case CPUCTL_CPUID_COUNT: 187301962Skib ret = cpuctl_do_cpuid_count(cpu, 188301962Skib (cpuctl_cpuid_count_args_t *)data, td); 189267651Sattilio break; 190327871Skib case CPUCTL_EVAL_CPU_FEATURES: 191327871Skib ret = cpuctl_do_eval_cpu_features(cpu, td); 192327871Skib break; 193181430Sstas default: 194181430Sstas ret = EINVAL; 195181430Sstas break; 196181430Sstas } 197181430Sstasfail: 198181430Sstas return (ret); 199181430Sstas} 200181430Sstas 201181430Sstas/* 202181430Sstas * Actually perform cpuid operation. 203181430Sstas */ 204301962Skibstatic int 205267673Skibcpuctl_do_cpuid_count(int cpu, cpuctl_cpuid_count_args_t *data, 206267673Skib struct thread *td) 207181430Sstas{ 208181430Sstas int is_bound = 0; 209181430Sstas int oldcpu; 210181430Sstas 211302372Snwhitehorn KASSERT(cpu >= 0 && cpu <= mp_maxid, 212181430Sstas ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu)); 213181430Sstas 214181430Sstas /* Explicitly clear cpuid data to avoid returning stale info. */ 215181430Sstas bzero(data->data, sizeof(data->data)); 216267651Sattilio DPRINTF("[cpuctl,%d]: retrieving cpuid lev %#0x type %#0x for %d cpu\n", 217267651Sattilio __LINE__, data->level, data->level_type, cpu); 218301962Skib#ifdef __i386__ 219301962Skib if (cpu_id == 0) 220301962Skib return (ENODEV); 221301962Skib#endif 222181430Sstas oldcpu = td->td_oncpu; 223181430Sstas is_bound = cpu_sched_is_bound(td); 224181430Sstas set_cpu(cpu, td); 225267651Sattilio cpuid_count(data->level, data->level_type, data->data); 226181430Sstas restore_cpu(oldcpu, is_bound, td); 227301962Skib return (0); 228181430Sstas} 229181430Sstas 230301962Skibstatic int 231267651Sattiliocpuctl_do_cpuid(int cpu, cpuctl_cpuid_args_t *data, struct thread *td) 232267651Sattilio{ 233267673Skib cpuctl_cpuid_count_args_t cdata; 234301962Skib int error; 235267651Sattilio 236267673Skib cdata.level = data->level; 237267651Sattilio /* Override the level type. */ 238267673Skib cdata.level_type = 0; 239301962Skib error = cpuctl_do_cpuid_count(cpu, &cdata, td); 240267673Skib bcopy(cdata.data, data->data, sizeof(data->data)); /* Ignore error */ 241301962Skib return (error); 242267651Sattilio} 243267651Sattilio 244181430Sstas/* 245181430Sstas * Actually perform MSR operations. 246181430Sstas */ 247181430Sstasstatic int 248181430Sstascpuctl_do_msr(int cpu, cpuctl_msr_args_t *data, u_long cmd, struct thread *td) 249181430Sstas{ 250195189Sstas uint64_t reg; 251181430Sstas int is_bound = 0; 252181430Sstas int oldcpu; 253181430Sstas int ret; 254181430Sstas 255302372Snwhitehorn KASSERT(cpu >= 0 && cpu <= mp_maxid, 256181430Sstas ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu)); 257181430Sstas 258181430Sstas /* 259181430Sstas * Explicitly clear cpuid data to avoid returning stale 260181430Sstas * info 261181430Sstas */ 262181430Sstas DPRINTF("[cpuctl,%d]: operating on MSR %#0x for %d cpu\n", __LINE__, 263181430Sstas data->msr, cpu); 264301962Skib#ifdef __i386__ 265301962Skib if ((cpu_feature & CPUID_MSR) == 0) 266301962Skib return (ENODEV); 267301962Skib#endif 268181430Sstas oldcpu = td->td_oncpu; 269181430Sstas is_bound = cpu_sched_is_bound(td); 270181430Sstas set_cpu(cpu, td); 271195081Sstas if (cmd == CPUCTL_RDMSR) { 272195081Sstas data->data = 0; 273195081Sstas ret = rdmsr_safe(data->msr, &data->data); 274195189Sstas } else if (cmd == CPUCTL_WRMSR) { 275195081Sstas ret = wrmsr_safe(data->msr, data->data); 276195189Sstas } else if (cmd == CPUCTL_MSRSBIT) { 277195189Sstas critical_enter(); 278195189Sstas ret = rdmsr_safe(data->msr, ®); 279195189Sstas if (ret == 0) 280195189Sstas ret = wrmsr_safe(data->msr, reg | data->data); 281195189Sstas critical_exit(); 282195189Sstas } else if (cmd == CPUCTL_MSRCBIT) { 283195189Sstas critical_enter(); 284195189Sstas ret = rdmsr_safe(data->msr, ®); 285195189Sstas if (ret == 0) 286195189Sstas ret = wrmsr_safe(data->msr, reg & ~data->data); 287195189Sstas critical_exit(); 288195189Sstas } else 289315969Skib panic("[cpuctl,%d]: unknown operation requested: %lu", 290315969Skib __LINE__, cmd); 291181430Sstas restore_cpu(oldcpu, is_bound, td); 292181430Sstas return (ret); 293181430Sstas} 294181430Sstas 295181430Sstas/* 296181430Sstas * Actually perform microcode update. 297181430Sstas */ 298181430Sstasstatic int 299181430Sstascpuctl_do_update(int cpu, cpuctl_update_args_t *data, struct thread *td) 300181430Sstas{ 301181430Sstas cpuctl_cpuid_args_t args = { 302181430Sstas .level = 0, 303181430Sstas }; 304181430Sstas char vendor[13]; 305181430Sstas int ret; 306181430Sstas 307302372Snwhitehorn KASSERT(cpu >= 0 && cpu <= mp_maxid, 308181430Sstas ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu)); 309181430Sstas DPRINTF("[cpuctl,%d]: XXX %d", __LINE__, cpu); 310181430Sstas 311301962Skib ret = cpuctl_do_cpuid(cpu, &args, td); 312301962Skib if (ret != 0) 313301962Skib return (ret); 314181430Sstas ((uint32_t *)vendor)[0] = args.data[1]; 315181430Sstas ((uint32_t *)vendor)[1] = args.data[3]; 316181430Sstas ((uint32_t *)vendor)[2] = args.data[2]; 317181430Sstas vendor[12] = '\0'; 318181430Sstas if (strncmp(vendor, INTEL_VENDOR_ID, sizeof(INTEL_VENDOR_ID)) == 0) 319181430Sstas ret = update_intel(cpu, data, td); 320228436Sfabient else if(strncmp(vendor, AMD_VENDOR_ID, sizeof(AMD_VENDOR_ID)) == 0) 321181430Sstas ret = update_amd(cpu, data, td); 322315969Skib else if(strncmp(vendor, CENTAUR_VENDOR_ID, sizeof(CENTAUR_VENDOR_ID)) 323315969Skib == 0) 324228436Sfabient ret = update_via(cpu, data, td); 325181430Sstas else 326181430Sstas ret = ENXIO; 327181430Sstas return (ret); 328181430Sstas} 329181430Sstas 330181430Sstasstatic int 331181430Sstasupdate_intel(int cpu, cpuctl_update_args_t *args, struct thread *td) 332181430Sstas{ 333255439Skib void *ptr; 334181430Sstas uint64_t rev0, rev1; 335181430Sstas uint32_t tmp[4]; 336255439Skib int is_bound; 337181430Sstas int oldcpu; 338181430Sstas int ret; 339181430Sstas 340181430Sstas if (args->size == 0 || args->data == NULL) { 341181430Sstas DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__); 342181430Sstas return (EINVAL); 343181430Sstas } 344181430Sstas if (args->size > UCODE_SIZE_MAX) { 345181430Sstas DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__); 346181430Sstas return (EINVAL); 347181430Sstas } 348181430Sstas 349181430Sstas /* 350255439Skib * 16 byte alignment required. Rely on the fact that 351255439Skib * malloc(9) always returns the pointer aligned at least on 352255439Skib * the size of the allocation. 353181430Sstas */ 354181430Sstas ptr = malloc(args->size + 16, M_CPUCTL, M_WAITOK); 355181430Sstas if (copyin(args->data, ptr, args->size) != 0) { 356181430Sstas DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed", 357181430Sstas __LINE__, args->data, ptr, args->size); 358181430Sstas ret = EFAULT; 359181430Sstas goto fail; 360181430Sstas } 361181430Sstas oldcpu = td->td_oncpu; 362181430Sstas is_bound = cpu_sched_is_bound(td); 363181430Sstas set_cpu(cpu, td); 364181430Sstas critical_enter(); 365252592Srpaulo rdmsr_safe(MSR_BIOS_SIGN, &rev0); /* Get current microcode revision. */ 366181430Sstas 367181430Sstas /* 368181430Sstas * Perform update. 369181430Sstas */ 370181430Sstas wrmsr_safe(MSR_BIOS_UPDT_TRIG, (uintptr_t)(ptr)); 371181430Sstas wrmsr_safe(MSR_BIOS_SIGN, 0); 372181430Sstas 373181430Sstas /* 374181430Sstas * Serialize instruction flow. 375181430Sstas */ 376181430Sstas do_cpuid(0, tmp); 377181430Sstas critical_exit(); 378252592Srpaulo rdmsr_safe(MSR_BIOS_SIGN, &rev1); /* Get new microcode revision. */ 379181430Sstas restore_cpu(oldcpu, is_bound, td); 380181430Sstas if (rev1 > rev0) 381181430Sstas ret = 0; 382181430Sstas else 383181430Sstas ret = EEXIST; 384181430Sstasfail: 385254191Skib free(ptr, M_CPUCTL); 386181430Sstas return (ret); 387181430Sstas} 388181430Sstas 389308760Savg/* 390308760Savg * NB: MSR 0xc0010020, MSR_K8_UCODE_UPDATE, is not documented by AMD. 391308760Savg * Coreboot, illumos and Linux source code was used to understand 392308760Savg * its workings. 393308760Savg */ 394308760Savgstatic void 395308760Savgamd_ucode_wrmsr(void *ucode_ptr) 396308760Savg{ 397308760Savg uint32_t tmp[4]; 398308760Savg 399308760Savg wrmsr_safe(MSR_K8_UCODE_UPDATE, (uintptr_t)ucode_ptr); 400308760Savg do_cpuid(0, tmp); 401308760Savg} 402308760Savg 403181430Sstasstatic int 404181430Sstasupdate_amd(int cpu, cpuctl_update_args_t *args, struct thread *td) 405181430Sstas{ 406308760Savg void *ptr; 407181430Sstas int ret; 408181430Sstas 409181430Sstas if (args->size == 0 || args->data == NULL) { 410181430Sstas DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__); 411181430Sstas return (EINVAL); 412181430Sstas } 413181430Sstas if (args->size > UCODE_SIZE_MAX) { 414181430Sstas DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__); 415181430Sstas return (EINVAL); 416181430Sstas } 417308760Savg 418181430Sstas /* 419308760Savg * 16 byte alignment required. Rely on the fact that 420308760Savg * malloc(9) always returns the pointer aligned at least on 421308760Savg * the size of the allocation. 422181430Sstas */ 423308760Savg ptr = malloc(args->size + 16, M_CPUCTL, M_ZERO | M_WAITOK); 424181430Sstas if (copyin(args->data, ptr, args->size) != 0) { 425181430Sstas DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed", 426181430Sstas __LINE__, args->data, ptr, args->size); 427181430Sstas ret = EFAULT; 428181430Sstas goto fail; 429181430Sstas } 430308760Savg smp_rendezvous(NULL, amd_ucode_wrmsr, NULL, ptr); 431181430Sstas ret = 0; 432181430Sstasfail: 433308760Savg free(ptr, M_CPUCTL); 434181430Sstas return (ret); 435181430Sstas} 436181430Sstas 437228436Sfabientstatic int 438228436Sfabientupdate_via(int cpu, cpuctl_update_args_t *args, struct thread *td) 439228436Sfabient{ 440255439Skib void *ptr; 441228436Sfabient uint64_t rev0, rev1, res; 442228436Sfabient uint32_t tmp[4]; 443255439Skib int is_bound; 444228436Sfabient int oldcpu; 445228436Sfabient int ret; 446228436Sfabient 447228436Sfabient if (args->size == 0 || args->data == NULL) { 448228436Sfabient DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__); 449228436Sfabient return (EINVAL); 450228436Sfabient } 451228436Sfabient if (args->size > UCODE_SIZE_MAX) { 452228436Sfabient DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__); 453228436Sfabient return (EINVAL); 454228436Sfabient } 455228436Sfabient 456228436Sfabient /* 457228436Sfabient * 4 byte alignment required. 458228436Sfabient */ 459255439Skib ptr = malloc(args->size, M_CPUCTL, M_WAITOK); 460228436Sfabient if (copyin(args->data, ptr, args->size) != 0) { 461228436Sfabient DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed", 462228436Sfabient __LINE__, args->data, ptr, args->size); 463228436Sfabient ret = EFAULT; 464228436Sfabient goto fail; 465228436Sfabient } 466228436Sfabient oldcpu = td->td_oncpu; 467228436Sfabient is_bound = cpu_sched_is_bound(td); 468228436Sfabient set_cpu(cpu, td); 469228436Sfabient critical_enter(); 470252592Srpaulo rdmsr_safe(MSR_BIOS_SIGN, &rev0); /* Get current microcode revision. */ 471228436Sfabient 472228436Sfabient /* 473228436Sfabient * Perform update. 474228436Sfabient */ 475228436Sfabient wrmsr_safe(MSR_BIOS_UPDT_TRIG, (uintptr_t)(ptr)); 476228436Sfabient do_cpuid(1, tmp); 477228436Sfabient 478228436Sfabient /* 479228436Sfabient * Result are in low byte of MSR FCR5: 480228436Sfabient * 0x00: No update has been attempted since RESET. 481228436Sfabient * 0x01: The last attempted update was successful. 482228436Sfabient * 0x02: The last attempted update was unsuccessful due to a bad 483228436Sfabient * environment. No update was loaded and any preexisting 484228436Sfabient * patches are still active. 485228436Sfabient * 0x03: The last attempted update was not applicable to this processor. 486228436Sfabient * No update was loaded and any preexisting patches are still 487228436Sfabient * active. 488228436Sfabient * 0x04: The last attempted update was not successful due to an invalid 489228436Sfabient * update data block. No update was loaded and any preexisting 490228436Sfabient * patches are still active 491228436Sfabient */ 492228436Sfabient rdmsr_safe(0x1205, &res); 493228436Sfabient res &= 0xff; 494228436Sfabient critical_exit(); 495228436Sfabient rdmsr_safe(MSR_BIOS_SIGN, &rev1); /* Get new microcode revision. */ 496228436Sfabient restore_cpu(oldcpu, is_bound, td); 497228436Sfabient 498228436Sfabient DPRINTF("[cpu,%d]: rev0=%x rev1=%x res=%x\n", __LINE__, 499228436Sfabient (unsigned)(rev0 >> 32), (unsigned)(rev1 >> 32), (unsigned)res); 500228436Sfabient 501228436Sfabient if (res != 0x01) 502228436Sfabient ret = EINVAL; 503228436Sfabient else 504228436Sfabient ret = 0; 505228436Sfabientfail: 506254191Skib free(ptr, M_CPUCTL); 507228436Sfabient return (ret); 508228436Sfabient} 509228436Sfabient 510327871Skibstatic int 511327871Skibcpuctl_do_eval_cpu_features(int cpu, struct thread *td) 512327871Skib{ 513327871Skib int is_bound = 0; 514327871Skib int oldcpu; 515327871Skib 516327871Skib KASSERT(cpu >= 0 && cpu <= mp_maxid, 517327871Skib ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu)); 518327871Skib 519327871Skib#ifdef __i386__ 520327871Skib if (cpu_id == 0) 521327871Skib return (ENODEV); 522327871Skib#endif 523327871Skib oldcpu = td->td_oncpu; 524327871Skib is_bound = cpu_sched_is_bound(td); 525327871Skib set_cpu(cpu, td); 526327871Skib identify_cpu1(); 527327871Skib identify_cpu2(); 528329462Skib hw_ibrs_recalculate(); 529327871Skib restore_cpu(oldcpu, is_bound, td); 530334152Skib hw_ssb_recalculate(true); 531328213Skib printcpuinfo(); 532327871Skib return (0); 533327871Skib} 534327871Skib 535327871Skib 536181430Sstasint 537181430Sstascpuctl_open(struct cdev *dev, int flags, int fmt __unused, struct thread *td) 538181430Sstas{ 539181430Sstas int ret = 0; 540181430Sstas int cpu; 541181430Sstas 542183397Sed cpu = dev2unit(dev); 543302372Snwhitehorn if (cpu > mp_maxid || !cpu_enabled(cpu)) { 544181430Sstas DPRINTF("[cpuctl,%d]: incorrect cpu number %d\n", __LINE__, 545181430Sstas cpu); 546181430Sstas return (ENXIO); 547181430Sstas } 548181430Sstas if (flags & FWRITE) 549181430Sstas ret = securelevel_gt(td->td_ucred, 0); 550181430Sstas return (ret); 551181430Sstas} 552181430Sstas 553181430Sstasstatic int 554181430Sstascpuctl_modevent(module_t mod __unused, int type, void *data __unused) 555181430Sstas{ 556181430Sstas int cpu; 557181430Sstas 558181430Sstas switch(type) { 559181430Sstas case MOD_LOAD: 560181430Sstas if (bootverbose) 561181430Sstas printf("cpuctl: access to MSR registers/cpuid info.\n"); 562302372Snwhitehorn cpuctl_devs = malloc(sizeof(*cpuctl_devs) * (mp_maxid + 1), M_CPUCTL, 563263080Skib M_WAITOK | M_ZERO); 564302372Snwhitehorn CPU_FOREACH(cpu) 565181430Sstas if (cpu_enabled(cpu)) 566181430Sstas cpuctl_devs[cpu] = make_dev(&cpuctl_cdevsw, cpu, 567181430Sstas UID_ROOT, GID_KMEM, 0640, "cpuctl%d", cpu); 568181430Sstas break; 569181430Sstas case MOD_UNLOAD: 570302372Snwhitehorn CPU_FOREACH(cpu) { 571181430Sstas if (cpuctl_devs[cpu] != NULL) 572181430Sstas destroy_dev(cpuctl_devs[cpu]); 573181430Sstas } 574181430Sstas free(cpuctl_devs, M_CPUCTL); 575181430Sstas break; 576181430Sstas case MOD_SHUTDOWN: 577181430Sstas break; 578181430Sstas default: 579181430Sstas return (EOPNOTSUPP); 580181430Sstas } 581181430Sstas return (0); 582181430Sstas} 583181430Sstas 584181430SstasDEV_MODULE(cpuctl, cpuctl_modevent, NULL); 585181430SstasMODULE_VERSION(cpuctl, CPUCTL_VERSION); 586