cpuctl.c revision 254191
1/*-
2 * Copyright (c) 2006-2008 Stanislav Sedov <stas@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 */
27
28#include <sys/cdefs.h>
29__FBSDID("$FreeBSD: head/sys/dev/cpuctl/cpuctl.c 254191 2013-08-10 20:54:15Z kib $");
30
31#include <sys/param.h>
32#include <sys/systm.h>
33#include <sys/conf.h>
34#include <sys/fcntl.h>
35#include <sys/ioccom.h>
36#include <sys/malloc.h>
37#include <sys/module.h>
38#include <sys/mutex.h>
39#include <sys/priv.h>
40#include <sys/proc.h>
41#include <sys/queue.h>
42#include <sys/sched.h>
43#include <sys/kernel.h>
44#include <sys/sysctl.h>
45#include <sys/uio.h>
46#include <sys/pcpu.h>
47#include <sys/smp.h>
48#include <sys/pmckern.h>
49#include <sys/cpuctl.h>
50
51#include <machine/cpufunc.h>
52#include <machine/md_var.h>
53#include <machine/specialreg.h>
54
55static d_open_t cpuctl_open;
56static d_ioctl_t cpuctl_ioctl;
57
58#define	CPUCTL_VERSION 1
59
60#ifdef DEBUG
61# define	DPRINTF(format,...) printf(format, __VA_ARGS__);
62#else
63# define	DPRINTF(...)
64#endif
65
66#define	UCODE_SIZE_MAX	(16 * 1024)
67
68static int cpuctl_do_msr(int cpu, cpuctl_msr_args_t *data, u_long cmd,
69    struct thread *td);
70static int cpuctl_do_cpuid(int cpu, cpuctl_cpuid_args_t *data,
71    struct thread *td);
72static int cpuctl_do_update(int cpu, cpuctl_update_args_t *data,
73    struct thread *td);
74static int update_intel(int cpu, cpuctl_update_args_t *args,
75    struct thread *td);
76static int update_amd(int cpu, cpuctl_update_args_t *args, struct thread *td);
77static int update_via(int cpu, cpuctl_update_args_t *args,
78    struct thread *td);
79
80static struct cdev **cpuctl_devs;
81static MALLOC_DEFINE(M_CPUCTL, "cpuctl", "CPUCTL buffer");
82
83static struct cdevsw cpuctl_cdevsw = {
84        .d_version =    D_VERSION,
85        .d_open =       cpuctl_open,
86        .d_ioctl =      cpuctl_ioctl,
87        .d_name =       "cpuctl",
88};
89
90/*
91 * This function checks if specified cpu enabled or not.
92 */
93static int
94cpu_enabled(int cpu)
95{
96
97	return (pmc_cpu_is_disabled(cpu) == 0);
98}
99
100/*
101 * Check if the current thread is bound to a specific cpu.
102 */
103static int
104cpu_sched_is_bound(struct thread *td)
105{
106	int ret;
107
108	thread_lock(td);
109	ret = sched_is_bound(td);
110	thread_unlock(td);
111	return (ret);
112}
113
114/*
115 * Switch to target cpu to run.
116 */
117static void
118set_cpu(int cpu, struct thread *td)
119{
120
121	KASSERT(cpu >= 0 && cpu < mp_ncpus && cpu_enabled(cpu),
122	    ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu));
123	thread_lock(td);
124	sched_bind(td, cpu);
125	thread_unlock(td);
126	KASSERT(td->td_oncpu == cpu,
127	    ("[cpuctl,%d]: cannot bind to target cpu %d", __LINE__, cpu));
128}
129
130static void
131restore_cpu(int oldcpu, int is_bound, struct thread *td)
132{
133
134	KASSERT(oldcpu >= 0 && oldcpu < mp_ncpus && cpu_enabled(oldcpu),
135	    ("[cpuctl,%d]: bad cpu number %d", __LINE__, oldcpu));
136	thread_lock(td);
137	if (is_bound == 0)
138		sched_unbind(td);
139	else
140		sched_bind(td, oldcpu);
141	thread_unlock(td);
142}
143
144int
145cpuctl_ioctl(struct cdev *dev, u_long cmd, caddr_t data,
146	int flags, struct thread *td)
147{
148	int ret;
149	int cpu = dev2unit(dev);
150
151	if (cpu >= mp_ncpus || !cpu_enabled(cpu)) {
152		DPRINTF("[cpuctl,%d]: bad cpu number %d\n", __LINE__, cpu);
153		return (ENXIO);
154	}
155	/* Require write flag for "write" requests. */
156	if ((cmd == CPUCTL_WRMSR || cmd == CPUCTL_UPDATE) &&
157	    ((flags & FWRITE) == 0))
158		return (EPERM);
159	switch (cmd) {
160	case CPUCTL_RDMSR:
161		ret = cpuctl_do_msr(cpu, (cpuctl_msr_args_t *)data, cmd, td);
162		break;
163	case CPUCTL_MSRSBIT:
164	case CPUCTL_MSRCBIT:
165	case CPUCTL_WRMSR:
166		ret = priv_check(td, PRIV_CPUCTL_WRMSR);
167		if (ret != 0)
168			goto fail;
169		ret = cpuctl_do_msr(cpu, (cpuctl_msr_args_t *)data, cmd, td);
170		break;
171	case CPUCTL_CPUID:
172		ret = cpuctl_do_cpuid(cpu, (cpuctl_cpuid_args_t *)data, td);
173		break;
174	case CPUCTL_UPDATE:
175		ret = priv_check(td, PRIV_CPUCTL_UPDATE);
176		if (ret != 0)
177			goto fail;
178		ret = cpuctl_do_update(cpu, (cpuctl_update_args_t *)data, td);
179		break;
180	default:
181		ret = EINVAL;
182		break;
183	}
184fail:
185	return (ret);
186}
187
188/*
189 * Actually perform cpuid operation.
190 */
191static int
192cpuctl_do_cpuid(int cpu, cpuctl_cpuid_args_t *data, struct thread *td)
193{
194	int is_bound = 0;
195	int oldcpu;
196
197	KASSERT(cpu >= 0 && cpu < mp_ncpus,
198	    ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu));
199
200	/* Explicitly clear cpuid data to avoid returning stale info. */
201	bzero(data->data, sizeof(data->data));
202	DPRINTF("[cpuctl,%d]: retriving cpuid level %#0x for %d cpu\n",
203	    __LINE__, data->level, cpu);
204	oldcpu = td->td_oncpu;
205	is_bound = cpu_sched_is_bound(td);
206	set_cpu(cpu, td);
207	cpuid_count(data->level, 0, data->data);
208	restore_cpu(oldcpu, is_bound, td);
209	return (0);
210}
211
212/*
213 * Actually perform MSR operations.
214 */
215static int
216cpuctl_do_msr(int cpu, cpuctl_msr_args_t *data, u_long cmd, struct thread *td)
217{
218	uint64_t reg;
219	int is_bound = 0;
220	int oldcpu;
221	int ret;
222
223	KASSERT(cpu >= 0 && cpu < mp_ncpus,
224	    ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu));
225
226	/*
227	 * Explicitly clear cpuid data to avoid returning stale
228	 * info
229	 */
230	DPRINTF("[cpuctl,%d]: operating on MSR %#0x for %d cpu\n", __LINE__,
231	    data->msr, cpu);
232	oldcpu = td->td_oncpu;
233	is_bound = cpu_sched_is_bound(td);
234	set_cpu(cpu, td);
235	if (cmd == CPUCTL_RDMSR) {
236		data->data = 0;
237		ret = rdmsr_safe(data->msr, &data->data);
238	} else if (cmd == CPUCTL_WRMSR) {
239		ret = wrmsr_safe(data->msr, data->data);
240	} else if (cmd == CPUCTL_MSRSBIT) {
241		critical_enter();
242		ret = rdmsr_safe(data->msr, &reg);
243		if (ret == 0)
244			ret = wrmsr_safe(data->msr, reg | data->data);
245		critical_exit();
246	} else if (cmd == CPUCTL_MSRCBIT) {
247		critical_enter();
248		ret = rdmsr_safe(data->msr, &reg);
249		if (ret == 0)
250			ret = wrmsr_safe(data->msr, reg & ~data->data);
251		critical_exit();
252	} else
253		panic("[cpuctl,%d]: unknown operation requested: %lu", __LINE__, cmd);
254	restore_cpu(oldcpu, is_bound, td);
255	return (ret);
256}
257
258/*
259 * Actually perform microcode update.
260 */
261static int
262cpuctl_do_update(int cpu, cpuctl_update_args_t *data, struct thread *td)
263{
264	cpuctl_cpuid_args_t args = {
265		.level = 0,
266	};
267	char vendor[13];
268	int ret;
269
270	KASSERT(cpu >= 0 && cpu < mp_ncpus,
271	    ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu));
272	DPRINTF("[cpuctl,%d]: XXX %d", __LINE__, cpu);
273
274	ret = cpuctl_do_cpuid(cpu, &args, td);
275	if (ret != 0) {
276		DPRINTF("[cpuctl,%d]: cannot retrive cpuid info for cpu %d",
277		    __LINE__, cpu);
278		return (ENXIO);
279	}
280	((uint32_t *)vendor)[0] = args.data[1];
281	((uint32_t *)vendor)[1] = args.data[3];
282	((uint32_t *)vendor)[2] = args.data[2];
283	vendor[12] = '\0';
284	if (strncmp(vendor, INTEL_VENDOR_ID, sizeof(INTEL_VENDOR_ID)) == 0)
285		ret = update_intel(cpu, data, td);
286	else if(strncmp(vendor, AMD_VENDOR_ID, sizeof(AMD_VENDOR_ID)) == 0)
287		ret = update_amd(cpu, data, td);
288	else if(strncmp(vendor, CENTAUR_VENDOR_ID, sizeof(CENTAUR_VENDOR_ID)) == 0)
289		ret = update_via(cpu, data, td);
290	else
291		ret = ENXIO;
292	return (ret);
293}
294
295static int
296update_intel(int cpu, cpuctl_update_args_t *args, struct thread *td)
297{
298	void *ptr = NULL;
299	uint64_t rev0, rev1;
300	uint32_t tmp[4];
301	int is_bound = 0;
302	int oldcpu;
303	int ret;
304
305	if (args->size == 0 || args->data == NULL) {
306		DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__);
307		return (EINVAL);
308	}
309	if (args->size > UCODE_SIZE_MAX) {
310		DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__);
311		return (EINVAL);
312	}
313
314	/*
315	 * 16 byte alignment required.
316	 */
317	ptr = malloc(args->size + 16, M_CPUCTL, M_WAITOK);
318	ptr = (void *)(16 + ((intptr_t)ptr & ~0xf));
319	if (copyin(args->data, ptr, args->size) != 0) {
320		DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed",
321		    __LINE__, args->data, ptr, args->size);
322		ret = EFAULT;
323		goto fail;
324	}
325	oldcpu = td->td_oncpu;
326	is_bound = cpu_sched_is_bound(td);
327	set_cpu(cpu, td);
328	critical_enter();
329	rdmsr_safe(MSR_BIOS_SIGN, &rev0); /* Get current microcode revision. */
330
331	/*
332	 * Perform update.
333	 */
334	wrmsr_safe(MSR_BIOS_UPDT_TRIG, (uintptr_t)(ptr));
335	wrmsr_safe(MSR_BIOS_SIGN, 0);
336
337	/*
338	 * Serialize instruction flow.
339	 */
340	do_cpuid(0, tmp);
341	critical_exit();
342	rdmsr_safe(MSR_BIOS_SIGN, &rev1); /* Get new microcode revision. */
343	restore_cpu(oldcpu, is_bound, td);
344	if (rev1 > rev0)
345		ret = 0;
346	else
347		ret = EEXIST;
348fail:
349	free(ptr, M_CPUCTL);
350	return (ret);
351}
352
353static int
354update_amd(int cpu, cpuctl_update_args_t *args, struct thread *td)
355{
356	void *ptr = NULL;
357	uint32_t tmp[4];
358	int is_bound = 0;
359	int oldcpu;
360	int ret;
361
362	if (args->size == 0 || args->data == NULL) {
363		DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__);
364		return (EINVAL);
365	}
366	if (args->size > UCODE_SIZE_MAX) {
367		DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__);
368		return (EINVAL);
369	}
370	/*
371	 * XXX Might not require contignous address space - needs check
372	 */
373	ptr = contigmalloc(args->size, M_CPUCTL, 0, 0, 0xffffffff, 16, 0);
374	if (ptr == NULL) {
375		DPRINTF("[cpuctl,%d]: cannot allocate %zd bytes of memory",
376		    __LINE__, args->size);
377		return (ENOMEM);
378	}
379	if (copyin(args->data, ptr, args->size) != 0) {
380		DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed",
381		    __LINE__, args->data, ptr, args->size);
382		ret = EFAULT;
383		goto fail;
384	}
385	oldcpu = td->td_oncpu;
386	is_bound = cpu_sched_is_bound(td);
387	set_cpu(cpu, td);
388	critical_enter();
389
390	/*
391	 * Perform update.
392	 */
393	wrmsr_safe(MSR_K8_UCODE_UPDATE, (uintptr_t)ptr);
394
395	/*
396	 * Serialize instruction flow.
397	 */
398	do_cpuid(0, tmp);
399	critical_exit();
400	restore_cpu(oldcpu, is_bound, td);
401	ret = 0;
402fail:
403	if (ptr != NULL)
404		contigfree(ptr, args->size, M_CPUCTL);
405	return (ret);
406}
407
408static int
409update_via(int cpu, cpuctl_update_args_t *args, struct thread *td)
410{
411	void *ptr = NULL;
412	uint64_t rev0, rev1, res;
413	uint32_t tmp[4];
414	int is_bound = 0;
415	int oldcpu;
416	int ret;
417
418	if (args->size == 0 || args->data == NULL) {
419		DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__);
420		return (EINVAL);
421	}
422	if (args->size > UCODE_SIZE_MAX) {
423		DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__);
424		return (EINVAL);
425	}
426
427	/*
428	 * 4 byte alignment required.
429	 */
430	ptr = malloc(args->size + 16, M_CPUCTL, M_WAITOK);
431	ptr = (void *)(16 + ((intptr_t)ptr & ~0xf));
432	if (copyin(args->data, ptr, args->size) != 0) {
433		DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed",
434		    __LINE__, args->data, ptr, args->size);
435		ret = EFAULT;
436		goto fail;
437	}
438	oldcpu = td->td_oncpu;
439	is_bound = cpu_sched_is_bound(td);
440	set_cpu(cpu, td);
441	critical_enter();
442	rdmsr_safe(MSR_BIOS_SIGN, &rev0); /* Get current microcode revision. */
443
444	/*
445	 * Perform update.
446	 */
447	wrmsr_safe(MSR_BIOS_UPDT_TRIG, (uintptr_t)(ptr));
448	do_cpuid(1, tmp);
449
450	/*
451	 * Result are in low byte of MSR FCR5:
452	 * 0x00: No update has been attempted since RESET.
453	 * 0x01: The last attempted update was successful.
454	 * 0x02: The last attempted update was unsuccessful due to a bad
455	 *       environment. No update was loaded and any preexisting
456	 *       patches are still active.
457	 * 0x03: The last attempted update was not applicable to this processor.
458	 *       No update was loaded and any preexisting patches are still
459	 *       active.
460	 * 0x04: The last attempted update was not successful due to an invalid
461	 *       update data block. No update was loaded and any preexisting
462	 *       patches are still active
463	 */
464	rdmsr_safe(0x1205, &res);
465	res &= 0xff;
466	critical_exit();
467	rdmsr_safe(MSR_BIOS_SIGN, &rev1); /* Get new microcode revision. */
468	restore_cpu(oldcpu, is_bound, td);
469
470	DPRINTF("[cpu,%d]: rev0=%x rev1=%x res=%x\n", __LINE__,
471	    (unsigned)(rev0 >> 32), (unsigned)(rev1 >> 32), (unsigned)res);
472
473	if (res != 0x01)
474		ret = EINVAL;
475	else
476		ret = 0;
477fail:
478	free(ptr, M_CPUCTL);
479	return (ret);
480}
481
482int
483cpuctl_open(struct cdev *dev, int flags, int fmt __unused, struct thread *td)
484{
485	int ret = 0;
486	int cpu;
487
488	cpu = dev2unit(dev);
489	if (cpu >= mp_ncpus || !cpu_enabled(cpu)) {
490		DPRINTF("[cpuctl,%d]: incorrect cpu number %d\n", __LINE__,
491		    cpu);
492		return (ENXIO);
493	}
494	if (flags & FWRITE)
495		ret = securelevel_gt(td->td_ucred, 0);
496	return (ret);
497}
498
499static int
500cpuctl_modevent(module_t mod __unused, int type, void *data __unused)
501{
502	int cpu;
503
504	switch(type) {
505	case MOD_LOAD:
506		if ((cpu_feature & CPUID_MSR) == 0) {
507			if (bootverbose)
508				printf("cpuctl: not available.\n");
509			return (ENODEV);
510		}
511		if (bootverbose)
512			printf("cpuctl: access to MSR registers/cpuid info.\n");
513		cpuctl_devs = (struct cdev **)malloc(sizeof(void *) * mp_ncpus,
514		    M_CPUCTL, M_WAITOK | M_ZERO);
515		if (cpuctl_devs == NULL) {
516			DPRINTF("[cpuctl,%d]: cannot allocate memory\n",
517			    __LINE__);
518			return (ENOMEM);
519		}
520		for (cpu = 0; cpu < mp_ncpus; cpu++)
521			if (cpu_enabled(cpu))
522				cpuctl_devs[cpu] = make_dev(&cpuctl_cdevsw, cpu,
523				    UID_ROOT, GID_KMEM, 0640, "cpuctl%d", cpu);
524		break;
525	case MOD_UNLOAD:
526		for (cpu = 0; cpu < mp_ncpus; cpu++) {
527			if (cpuctl_devs[cpu] != NULL)
528				destroy_dev(cpuctl_devs[cpu]);
529		}
530		free(cpuctl_devs, M_CPUCTL);
531		break;
532	case MOD_SHUTDOWN:
533		break;
534	default:
535		return (EOPNOTSUPP);
536        }
537	return (0);
538}
539
540DEV_MODULE(cpuctl, cpuctl_modevent, NULL);
541MODULE_VERSION(cpuctl, CPUCTL_VERSION);
542