bxe_stats.c revision 298294
1/*- 2 * Copyright (c) 2007-2014 QLogic Corporation. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS' 15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS 18 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 19 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 20 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 21 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 22 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 23 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 24 * THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> 28__FBSDID("$FreeBSD: head/sys/dev/bxe/bxe_stats.c 298294 2016-04-19 20:28:30Z davidcs $"); 29 30#include "bxe.h" 31#include "bxe_stats.h" 32 33#ifdef __i386__ 34#define BITS_PER_LONG 32 35#else 36#define BITS_PER_LONG 64 37#endif 38 39static inline long 40bxe_hilo(uint32_t *hiref) 41{ 42 uint32_t lo = *(hiref + 1); 43#if (BITS_PER_LONG == 64) 44 uint32_t hi = *hiref; 45 return (HILO_U64(hi, lo)); 46#else 47 return (lo); 48#endif 49} 50 51static inline uint16_t 52bxe_get_port_stats_dma_len(struct bxe_softc *sc) 53{ 54 uint16_t res = 0; 55 uint32_t size; 56 57 /* 'newest' convention - shmem2 contains the size of the port stats */ 58 if (SHMEM2_HAS(sc, sizeof_port_stats)) { 59 size = SHMEM2_RD(sc, sizeof_port_stats); 60 if (size) { 61 res = size; 62 } 63 64 /* prevent newer BC from causing buffer overflow */ 65 if (res > sizeof(struct host_port_stats)) { 66 res = sizeof(struct host_port_stats); 67 } 68 } 69 70 /* 71 * Older convention - all BCs support the port stats fields up until 72 * the 'not_used' field 73 */ 74 if (!res) { 75 res = (offsetof(struct host_port_stats, not_used) + 4); 76 77 /* if PFC stats are supported by the MFW, DMA them as well */ 78 if (sc->devinfo.bc_ver >= REQ_BC_VER_4_PFC_STATS_SUPPORTED) { 79 res += (offsetof(struct host_port_stats, pfc_frames_rx_lo) - 80 offsetof(struct host_port_stats, pfc_frames_tx_hi) + 4); 81 } 82 } 83 84 res >>= 2; 85 86 DBASSERT(sc, !(res > 2 * DMAE_LEN32_RD_MAX), ("big stats dmae length\n")); 87 return (res); 88} 89 90/* 91 * Init service functions 92 */ 93 94static void 95bxe_dp_stats(struct bxe_softc *sc) 96{ 97 int i; 98 99 BLOGD(sc, DBG_STATS, 100 "dumping stats:\n" 101 " fw_stats_req\n" 102 " hdr\n" 103 " cmd_num %d\n" 104 " reserved0 %d\n" 105 " drv_stats_counter %d\n" 106 " reserved1 %d\n" 107 " stats_counters_addrs %x %x\n", 108 sc->fw_stats_req->hdr.cmd_num, 109 sc->fw_stats_req->hdr.reserved0, 110 sc->fw_stats_req->hdr.drv_stats_counter, 111 sc->fw_stats_req->hdr.reserved1, 112 sc->fw_stats_req->hdr.stats_counters_addrs.hi, 113 sc->fw_stats_req->hdr.stats_counters_addrs.lo); 114 115 for (i = 0; i < sc->fw_stats_req->hdr.cmd_num; i++) { 116 BLOGD(sc, DBG_STATS, 117 "query[%d]\n" 118 " kind %d\n" 119 " index %d\n" 120 " funcID %d\n" 121 " reserved %d\n" 122 " address %x %x\n", 123 i, 124 sc->fw_stats_req->query[i].kind, 125 sc->fw_stats_req->query[i].index, 126 sc->fw_stats_req->query[i].funcID, 127 sc->fw_stats_req->query[i].reserved, 128 sc->fw_stats_req->query[i].address.hi, 129 sc->fw_stats_req->query[i].address.lo); 130 } 131} 132 133/* 134 * Post the next statistics ramrod. Protect it with the lock in 135 * order to ensure the strict order between statistics ramrods 136 * (each ramrod has a sequence number passed in a 137 * sc->fw_stats_req->hdr.drv_stats_counter and ramrods must be 138 * sent in order). 139 */ 140static void 141bxe_storm_stats_post(struct bxe_softc *sc) 142{ 143 int rc; 144 145 if (!sc->stats_pending) { 146 BXE_STATS_LOCK(sc); 147 148 if (sc->stats_pending) { 149 BXE_STATS_UNLOCK(sc); 150 return; 151 } 152 153 sc->fw_stats_req->hdr.drv_stats_counter = 154 htole16(sc->stats_counter++); 155 156 BLOGD(sc, DBG_STATS, 157 "sending statistics ramrod %d\n", 158 le16toh(sc->fw_stats_req->hdr.drv_stats_counter)); 159 160 /* adjust the ramrod to include VF queues statistics */ 161 // XXX bxe_iov_adjust_stats_req(sc); 162 163 bxe_dp_stats(sc); 164 165 /* send FW stats ramrod */ 166 rc = bxe_sp_post(sc, RAMROD_CMD_ID_COMMON_STAT_QUERY, 0, 167 U64_HI(sc->fw_stats_req_mapping), 168 U64_LO(sc->fw_stats_req_mapping), 169 NONE_CONNECTION_TYPE); 170 if (rc == 0) { 171 sc->stats_pending = 1; 172 } 173 174 BXE_STATS_UNLOCK(sc); 175 } 176} 177 178static void 179bxe_hw_stats_post(struct bxe_softc *sc) 180{ 181 struct dmae_cmd *dmae = &sc->stats_dmae; 182 uint32_t *stats_comp = BXE_SP(sc, stats_comp); 183 int loader_idx; 184 uint32_t opcode; 185 186 *stats_comp = DMAE_COMP_VAL; 187 if (CHIP_REV_IS_SLOW(sc)) { 188 return; 189 } 190 191 /* Update MCP's statistics if possible */ 192 if (sc->func_stx) { 193 memcpy(BXE_SP(sc, func_stats), &sc->func_stats, 194 sizeof(sc->func_stats)); 195 } 196 197 /* loader */ 198 if (sc->executer_idx) { 199 loader_idx = PMF_DMAE_C(sc); 200 opcode = bxe_dmae_opcode(sc, DMAE_SRC_PCI, DMAE_DST_GRC, 201 TRUE, DMAE_COMP_GRC); 202 opcode = bxe_dmae_opcode_clr_src_reset(opcode); 203 204 memset(dmae, 0, sizeof(struct dmae_cmd)); 205 dmae->opcode = opcode; 206 dmae->src_addr_lo = U64_LO(BXE_SP_MAPPING(sc, dmae[0])); 207 dmae->src_addr_hi = U64_HI(BXE_SP_MAPPING(sc, dmae[0])); 208 dmae->dst_addr_lo = ((DMAE_REG_CMD_MEM + 209 sizeof(struct dmae_cmd) * 210 (loader_idx + 1)) >> 2); 211 dmae->dst_addr_hi = 0; 212 dmae->len = sizeof(struct dmae_cmd) >> 2; 213 if (CHIP_IS_E1(sc)) { 214 dmae->len--; 215 } 216 dmae->comp_addr_lo = (dmae_reg_go_c[loader_idx + 1] >> 2); 217 dmae->comp_addr_hi = 0; 218 dmae->comp_val = 1; 219 220 *stats_comp = 0; 221 bxe_post_dmae(sc, dmae, loader_idx); 222 } else if (sc->func_stx) { 223 *stats_comp = 0; 224 bxe_post_dmae(sc, dmae, INIT_DMAE_C(sc)); 225 } 226} 227 228static int 229bxe_stats_comp(struct bxe_softc *sc) 230{ 231 uint32_t *stats_comp = BXE_SP(sc, stats_comp); 232 int cnt = 10; 233 234 while (*stats_comp != DMAE_COMP_VAL) { 235 if (!cnt) { 236 BLOGE(sc, "Timeout waiting for stats finished\n"); 237 if(sc->trigger_grcdump) { 238 /* taking grcdump */ 239 bxe_grc_dump(sc); 240 } 241 break; 242 } 243 244 cnt--; 245 DELAY(1000); 246 } 247 248 return (1); 249} 250 251/* 252 * Statistics service functions 253 */ 254 255static void 256bxe_stats_pmf_update(struct bxe_softc *sc) 257{ 258 struct dmae_cmd *dmae; 259 uint32_t opcode; 260 int loader_idx = PMF_DMAE_C(sc); 261 uint32_t *stats_comp = BXE_SP(sc, stats_comp); 262 263 if (sc->devinfo.bc_ver <= 0x06001400) { 264 /* 265 * Bootcode v6.0.21 fixed a GRC timeout that occurs when accessing 266 * BRB registers while the BRB block is in reset. The DMA transfer 267 * below triggers this issue resulting in the DMAE to stop 268 * functioning. Skip this initial stats transfer for old bootcode 269 * versions <= 6.0.20. 270 */ 271 return; 272 } 273 274 /* sanity */ 275 if (!sc->port.pmf || !sc->port.port_stx) { 276 BLOGE(sc, "BUG!\n"); 277 return; 278 } 279 280 sc->executer_idx = 0; 281 282 opcode = bxe_dmae_opcode(sc, DMAE_SRC_GRC, DMAE_DST_PCI, FALSE, 0); 283 284 dmae = BXE_SP(sc, dmae[sc->executer_idx++]); 285 dmae->opcode = bxe_dmae_opcode_add_comp(opcode, DMAE_COMP_GRC); 286 dmae->src_addr_lo = (sc->port.port_stx >> 2); 287 dmae->src_addr_hi = 0; 288 dmae->dst_addr_lo = U64_LO(BXE_SP_MAPPING(sc, port_stats)); 289 dmae->dst_addr_hi = U64_HI(BXE_SP_MAPPING(sc, port_stats)); 290 dmae->len = DMAE_LEN32_RD_MAX; 291 dmae->comp_addr_lo = (dmae_reg_go_c[loader_idx] >> 2); 292 dmae->comp_addr_hi = 0; 293 dmae->comp_val = 1; 294 295 dmae = BXE_SP(sc, dmae[sc->executer_idx++]); 296 dmae->opcode = bxe_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI); 297 dmae->src_addr_lo = ((sc->port.port_stx >> 2) + DMAE_LEN32_RD_MAX); 298 dmae->src_addr_hi = 0; 299 dmae->dst_addr_lo = U64_LO(BXE_SP_MAPPING(sc, port_stats) + 300 DMAE_LEN32_RD_MAX * 4); 301 dmae->dst_addr_hi = U64_HI(BXE_SP_MAPPING(sc, port_stats) + 302 DMAE_LEN32_RD_MAX * 4); 303 dmae->len = (bxe_get_port_stats_dma_len(sc) - DMAE_LEN32_RD_MAX); 304 305 dmae->comp_addr_lo = U64_LO(BXE_SP_MAPPING(sc, stats_comp)); 306 dmae->comp_addr_hi = U64_HI(BXE_SP_MAPPING(sc, stats_comp)); 307 dmae->comp_val = DMAE_COMP_VAL; 308 309 *stats_comp = 0; 310 bxe_hw_stats_post(sc); 311 bxe_stats_comp(sc); 312} 313 314static void 315bxe_port_stats_init(struct bxe_softc *sc) 316{ 317 struct dmae_cmd *dmae; 318 int port = SC_PORT(sc); 319 uint32_t opcode; 320 int loader_idx = PMF_DMAE_C(sc); 321 uint32_t mac_addr; 322 uint32_t *stats_comp = BXE_SP(sc, stats_comp); 323 324 /* sanity */ 325 if (!sc->link_vars.link_up || !sc->port.pmf) { 326 BLOGE(sc, "BUG!\n"); 327 return; 328 } 329 330 sc->executer_idx = 0; 331 332 /* MCP */ 333 opcode = bxe_dmae_opcode(sc, DMAE_SRC_PCI, DMAE_DST_GRC, 334 TRUE, DMAE_COMP_GRC); 335 336 if (sc->port.port_stx) { 337 dmae = BXE_SP(sc, dmae[sc->executer_idx++]); 338 dmae->opcode = opcode; 339 dmae->src_addr_lo = U64_LO(BXE_SP_MAPPING(sc, port_stats)); 340 dmae->src_addr_hi = U64_HI(BXE_SP_MAPPING(sc, port_stats)); 341 dmae->dst_addr_lo = sc->port.port_stx >> 2; 342 dmae->dst_addr_hi = 0; 343 dmae->len = bxe_get_port_stats_dma_len(sc); 344 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; 345 dmae->comp_addr_hi = 0; 346 dmae->comp_val = 1; 347 } 348 349 if (sc->func_stx) { 350 dmae = BXE_SP(sc, dmae[sc->executer_idx++]); 351 dmae->opcode = opcode; 352 dmae->src_addr_lo = U64_LO(BXE_SP_MAPPING(sc, func_stats)); 353 dmae->src_addr_hi = U64_HI(BXE_SP_MAPPING(sc, func_stats)); 354 dmae->dst_addr_lo = (sc->func_stx >> 2); 355 dmae->dst_addr_hi = 0; 356 dmae->len = (sizeof(struct host_func_stats) >> 2); 357 dmae->comp_addr_lo = (dmae_reg_go_c[loader_idx] >> 2); 358 dmae->comp_addr_hi = 0; 359 dmae->comp_val = 1; 360 } 361 362 /* MAC */ 363 opcode = bxe_dmae_opcode(sc, DMAE_SRC_GRC, DMAE_DST_PCI, 364 TRUE, DMAE_COMP_GRC); 365 366 /* EMAC is special */ 367 if (sc->link_vars.mac_type == ELINK_MAC_TYPE_EMAC) { 368 mac_addr = (port ? GRCBASE_EMAC1 : GRCBASE_EMAC0); 369 370 /* EMAC_REG_EMAC_RX_STAT_AC (EMAC_REG_EMAC_RX_STAT_AC_COUNT)*/ 371 dmae = BXE_SP(sc, dmae[sc->executer_idx++]); 372 dmae->opcode = opcode; 373 dmae->src_addr_lo = (mac_addr + EMAC_REG_EMAC_RX_STAT_AC) >> 2; 374 dmae->src_addr_hi = 0; 375 dmae->dst_addr_lo = U64_LO(BXE_SP_MAPPING(sc, mac_stats)); 376 dmae->dst_addr_hi = U64_HI(BXE_SP_MAPPING(sc, mac_stats)); 377 dmae->len = EMAC_REG_EMAC_RX_STAT_AC_COUNT; 378 dmae->comp_addr_lo = (dmae_reg_go_c[loader_idx] >> 2); 379 dmae->comp_addr_hi = 0; 380 dmae->comp_val = 1; 381 382 /* EMAC_REG_EMAC_RX_STAT_AC_28 */ 383 dmae = BXE_SP(sc, dmae[sc->executer_idx++]); 384 dmae->opcode = opcode; 385 dmae->src_addr_lo = ((mac_addr + EMAC_REG_EMAC_RX_STAT_AC_28) >> 2); 386 dmae->src_addr_hi = 0; 387 dmae->dst_addr_lo = U64_LO(BXE_SP_MAPPING(sc, mac_stats) + 388 offsetof(struct emac_stats, 389 rx_stat_falsecarriererrors)); 390 dmae->dst_addr_hi = U64_HI(BXE_SP_MAPPING(sc, mac_stats) + 391 offsetof(struct emac_stats, 392 rx_stat_falsecarriererrors)); 393 dmae->len = 1; 394 dmae->comp_addr_lo = (dmae_reg_go_c[loader_idx] >> 2); 395 dmae->comp_addr_hi = 0; 396 dmae->comp_val = 1; 397 398 /* EMAC_REG_EMAC_TX_STAT_AC (EMAC_REG_EMAC_TX_STAT_AC_COUNT)*/ 399 dmae = BXE_SP(sc, dmae[sc->executer_idx++]); 400 dmae->opcode = opcode; 401 dmae->src_addr_lo = ((mac_addr + EMAC_REG_EMAC_TX_STAT_AC) >> 2); 402 dmae->src_addr_hi = 0; 403 dmae->dst_addr_lo = U64_LO(BXE_SP_MAPPING(sc, mac_stats) + 404 offsetof(struct emac_stats, 405 tx_stat_ifhcoutoctets)); 406 dmae->dst_addr_hi = U64_HI(BXE_SP_MAPPING(sc, mac_stats) + 407 offsetof(struct emac_stats, 408 tx_stat_ifhcoutoctets)); 409 dmae->len = EMAC_REG_EMAC_TX_STAT_AC_COUNT; 410 dmae->comp_addr_lo = (dmae_reg_go_c[loader_idx] >> 2); 411 dmae->comp_addr_hi = 0; 412 dmae->comp_val = 1; 413 } else { 414 uint32_t tx_src_addr_lo, rx_src_addr_lo; 415 uint16_t rx_len, tx_len; 416 417 /* configure the params according to MAC type */ 418 switch (sc->link_vars.mac_type) { 419 case ELINK_MAC_TYPE_BMAC: 420 mac_addr = (port) ? NIG_REG_INGRESS_BMAC1_MEM : 421 NIG_REG_INGRESS_BMAC0_MEM; 422 423 /* BIGMAC_REGISTER_TX_STAT_GTPKT .. 424 BIGMAC_REGISTER_TX_STAT_GTBYT */ 425 if (CHIP_IS_E1x(sc)) { 426 tx_src_addr_lo = 427 ((mac_addr + BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2); 428 tx_len = ((8 + BIGMAC_REGISTER_TX_STAT_GTBYT - 429 BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2); 430 rx_src_addr_lo = 431 ((mac_addr + BIGMAC_REGISTER_RX_STAT_GR64) >> 2); 432 rx_len = ((8 + BIGMAC_REGISTER_RX_STAT_GRIPJ - 433 BIGMAC_REGISTER_RX_STAT_GR64) >> 2); 434 } else { 435 tx_src_addr_lo = 436 ((mac_addr + BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2); 437 tx_len = ((8 + BIGMAC2_REGISTER_TX_STAT_GTBYT - 438 BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2); 439 rx_src_addr_lo = 440 ((mac_addr + BIGMAC2_REGISTER_RX_STAT_GR64) >> 2); 441 rx_len = ((8 + BIGMAC2_REGISTER_RX_STAT_GRIPJ - 442 BIGMAC2_REGISTER_RX_STAT_GR64) >> 2); 443 } 444 445 break; 446 447 case ELINK_MAC_TYPE_UMAC: /* handled by MSTAT */ 448 case ELINK_MAC_TYPE_XMAC: /* handled by MSTAT */ 449 default: 450 mac_addr = (port) ? GRCBASE_MSTAT1 : GRCBASE_MSTAT0; 451 tx_src_addr_lo = ((mac_addr + MSTAT_REG_TX_STAT_GTXPOK_LO) >> 2); 452 rx_src_addr_lo = ((mac_addr + MSTAT_REG_RX_STAT_GR64_LO) >> 2); 453 tx_len = 454 (sizeof(sc->sp->mac_stats.mstat_stats.stats_tx) >> 2); 455 rx_len = 456 (sizeof(sc->sp->mac_stats.mstat_stats.stats_rx) >> 2); 457 break; 458 } 459 460 /* TX stats */ 461 dmae = BXE_SP(sc, dmae[sc->executer_idx++]); 462 dmae->opcode = opcode; 463 dmae->src_addr_lo = tx_src_addr_lo; 464 dmae->src_addr_hi = 0; 465 dmae->len = tx_len; 466 dmae->dst_addr_lo = U64_LO(BXE_SP_MAPPING(sc, mac_stats)); 467 dmae->dst_addr_hi = U64_HI(BXE_SP_MAPPING(sc, mac_stats)); 468 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; 469 dmae->comp_addr_hi = 0; 470 dmae->comp_val = 1; 471 472 /* RX stats */ 473 dmae = BXE_SP(sc, dmae[sc->executer_idx++]); 474 dmae->opcode = opcode; 475 dmae->src_addr_hi = 0; 476 dmae->src_addr_lo = rx_src_addr_lo; 477 dmae->dst_addr_lo = 478 U64_LO(BXE_SP_MAPPING(sc, mac_stats) + (tx_len << 2)); 479 dmae->dst_addr_hi = 480 U64_HI(BXE_SP_MAPPING(sc, mac_stats) + (tx_len << 2)); 481 dmae->len = rx_len; 482 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; 483 dmae->comp_addr_hi = 0; 484 dmae->comp_val = 1; 485 } 486 487 /* NIG */ 488 if (!CHIP_IS_E3(sc)) { 489 dmae = BXE_SP(sc, dmae[sc->executer_idx++]); 490 dmae->opcode = opcode; 491 dmae->src_addr_lo = 492 (port ? NIG_REG_STAT1_EGRESS_MAC_PKT0 : 493 NIG_REG_STAT0_EGRESS_MAC_PKT0) >> 2; 494 dmae->src_addr_hi = 0; 495 dmae->dst_addr_lo = U64_LO(BXE_SP_MAPPING(sc, nig_stats) + 496 offsetof(struct nig_stats, 497 egress_mac_pkt0_lo)); 498 dmae->dst_addr_hi = U64_HI(BXE_SP_MAPPING(sc, nig_stats) + 499 offsetof(struct nig_stats, 500 egress_mac_pkt0_lo)); 501 dmae->len = ((2 * sizeof(uint32_t)) >> 2); 502 dmae->comp_addr_lo = (dmae_reg_go_c[loader_idx] >> 2); 503 dmae->comp_addr_hi = 0; 504 dmae->comp_val = 1; 505 506 dmae = BXE_SP(sc, dmae[sc->executer_idx++]); 507 dmae->opcode = opcode; 508 dmae->src_addr_lo = 509 (port ? NIG_REG_STAT1_EGRESS_MAC_PKT1 : 510 NIG_REG_STAT0_EGRESS_MAC_PKT1) >> 2; 511 dmae->src_addr_hi = 0; 512 dmae->dst_addr_lo = U64_LO(BXE_SP_MAPPING(sc, nig_stats) + 513 offsetof(struct nig_stats, 514 egress_mac_pkt1_lo)); 515 dmae->dst_addr_hi = U64_HI(BXE_SP_MAPPING(sc, nig_stats) + 516 offsetof(struct nig_stats, 517 egress_mac_pkt1_lo)); 518 dmae->len = ((2 * sizeof(uint32_t)) >> 2); 519 dmae->comp_addr_lo = (dmae_reg_go_c[loader_idx] >> 2); 520 dmae->comp_addr_hi = 0; 521 dmae->comp_val = 1; 522 } 523 524 dmae = BXE_SP(sc, dmae[sc->executer_idx++]); 525 dmae->opcode = bxe_dmae_opcode(sc, DMAE_SRC_GRC, DMAE_DST_PCI, 526 TRUE, DMAE_COMP_PCI); 527 dmae->src_addr_lo = 528 (port ? NIG_REG_STAT1_BRB_DISCARD : 529 NIG_REG_STAT0_BRB_DISCARD) >> 2; 530 dmae->src_addr_hi = 0; 531 dmae->dst_addr_lo = U64_LO(BXE_SP_MAPPING(sc, nig_stats)); 532 dmae->dst_addr_hi = U64_HI(BXE_SP_MAPPING(sc, nig_stats)); 533 dmae->len = (sizeof(struct nig_stats) - 4*sizeof(uint32_t)) >> 2; 534 535 dmae->comp_addr_lo = U64_LO(BXE_SP_MAPPING(sc, stats_comp)); 536 dmae->comp_addr_hi = U64_HI(BXE_SP_MAPPING(sc, stats_comp)); 537 dmae->comp_val = DMAE_COMP_VAL; 538 539 *stats_comp = 0; 540} 541 542static void 543bxe_func_stats_init(struct bxe_softc *sc) 544{ 545 struct dmae_cmd *dmae = &sc->stats_dmae; 546 uint32_t *stats_comp = BXE_SP(sc, stats_comp); 547 548 /* sanity */ 549 if (!sc->func_stx) { 550 BLOGE(sc, "BUG!\n"); 551 return; 552 } 553 554 sc->executer_idx = 0; 555 memset(dmae, 0, sizeof(struct dmae_cmd)); 556 557 dmae->opcode = bxe_dmae_opcode(sc, DMAE_SRC_PCI, DMAE_DST_GRC, 558 TRUE, DMAE_COMP_PCI); 559 dmae->src_addr_lo = U64_LO(BXE_SP_MAPPING(sc, func_stats)); 560 dmae->src_addr_hi = U64_HI(BXE_SP_MAPPING(sc, func_stats)); 561 dmae->dst_addr_lo = (sc->func_stx >> 2); 562 dmae->dst_addr_hi = 0; 563 dmae->len = (sizeof(struct host_func_stats) >> 2); 564 dmae->comp_addr_lo = U64_LO(BXE_SP_MAPPING(sc, stats_comp)); 565 dmae->comp_addr_hi = U64_HI(BXE_SP_MAPPING(sc, stats_comp)); 566 dmae->comp_val = DMAE_COMP_VAL; 567 568 *stats_comp = 0; 569} 570 571static void 572bxe_stats_start(struct bxe_softc *sc) 573{ 574 /* 575 * VFs travel through here as part of the statistics FSM, but no action 576 * is required 577 */ 578 if (IS_VF(sc)) { 579 return; 580 } 581 582 if (sc->port.pmf) { 583 bxe_port_stats_init(sc); 584 } 585 586 else if (sc->func_stx) { 587 bxe_func_stats_init(sc); 588 } 589 590 bxe_hw_stats_post(sc); 591 bxe_storm_stats_post(sc); 592} 593 594static void 595bxe_stats_pmf_start(struct bxe_softc *sc) 596{ 597 bxe_stats_comp(sc); 598 bxe_stats_pmf_update(sc); 599 bxe_stats_start(sc); 600} 601 602static void 603bxe_stats_restart(struct bxe_softc *sc) 604{ 605 /* 606 * VFs travel through here as part of the statistics FSM, but no action 607 * is required 608 */ 609 if (IS_VF(sc)) { 610 return; 611 } 612 613 bxe_stats_comp(sc); 614 bxe_stats_start(sc); 615} 616 617static void 618bxe_bmac_stats_update(struct bxe_softc *sc) 619{ 620 struct host_port_stats *pstats = BXE_SP(sc, port_stats); 621 struct bxe_eth_stats *estats = &sc->eth_stats; 622 struct { 623 uint32_t lo; 624 uint32_t hi; 625 } diff; 626 627 if (CHIP_IS_E1x(sc)) { 628 struct bmac1_stats *new = BXE_SP(sc, mac_stats.bmac1_stats); 629 630 /* the macros below will use "bmac1_stats" type */ 631 UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets); 632 UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors); 633 UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts); 634 UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong); 635 UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments); 636 UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers); 637 UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived); 638 UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered); 639 UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf); 640 641 UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent); 642 UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone); 643 UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets); 644 UPDATE_STAT64(tx_stat_gt127, 645 tx_stat_etherstatspkts65octetsto127octets); 646 UPDATE_STAT64(tx_stat_gt255, 647 tx_stat_etherstatspkts128octetsto255octets); 648 UPDATE_STAT64(tx_stat_gt511, 649 tx_stat_etherstatspkts256octetsto511octets); 650 UPDATE_STAT64(tx_stat_gt1023, 651 tx_stat_etherstatspkts512octetsto1023octets); 652 UPDATE_STAT64(tx_stat_gt1518, 653 tx_stat_etherstatspkts1024octetsto1522octets); 654 UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047); 655 UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095); 656 UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216); 657 UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383); 658 UPDATE_STAT64(tx_stat_gterr, 659 tx_stat_dot3statsinternalmactransmiterrors); 660 UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl); 661 } else { 662 struct bmac2_stats *new = BXE_SP(sc, mac_stats.bmac2_stats); 663 struct bxe_fw_port_stats_old *fwstats = &sc->fw_stats_old; 664 665 /* the macros below will use "bmac2_stats" type */ 666 UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets); 667 UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors); 668 UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts); 669 UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong); 670 UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments); 671 UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers); 672 UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived); 673 UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered); 674 UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf); 675 UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent); 676 UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone); 677 UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets); 678 UPDATE_STAT64(tx_stat_gt127, 679 tx_stat_etherstatspkts65octetsto127octets); 680 UPDATE_STAT64(tx_stat_gt255, 681 tx_stat_etherstatspkts128octetsto255octets); 682 UPDATE_STAT64(tx_stat_gt511, 683 tx_stat_etherstatspkts256octetsto511octets); 684 UPDATE_STAT64(tx_stat_gt1023, 685 tx_stat_etherstatspkts512octetsto1023octets); 686 UPDATE_STAT64(tx_stat_gt1518, 687 tx_stat_etherstatspkts1024octetsto1522octets); 688 UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047); 689 UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095); 690 UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216); 691 UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383); 692 UPDATE_STAT64(tx_stat_gterr, 693 tx_stat_dot3statsinternalmactransmiterrors); 694 UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl); 695 696 /* collect PFC stats */ 697 pstats->pfc_frames_tx_hi = new->tx_stat_gtpp_hi; 698 pstats->pfc_frames_tx_lo = new->tx_stat_gtpp_lo; 699 ADD_64(pstats->pfc_frames_tx_hi, fwstats->pfc_frames_tx_hi, 700 pstats->pfc_frames_tx_lo, fwstats->pfc_frames_tx_lo); 701 702 pstats->pfc_frames_rx_hi = new->rx_stat_grpp_hi; 703 pstats->pfc_frames_rx_lo = new->rx_stat_grpp_lo; 704 ADD_64(pstats->pfc_frames_rx_hi, fwstats->pfc_frames_rx_hi, 705 pstats->pfc_frames_rx_lo, fwstats->pfc_frames_rx_lo); 706 } 707 708 estats->pause_frames_received_hi = pstats->mac_stx[1].rx_stat_mac_xpf_hi; 709 estats->pause_frames_received_lo = pstats->mac_stx[1].rx_stat_mac_xpf_lo; 710 711 estats->pause_frames_sent_hi = pstats->mac_stx[1].tx_stat_outxoffsent_hi; 712 estats->pause_frames_sent_lo = pstats->mac_stx[1].tx_stat_outxoffsent_lo; 713 714 estats->pfc_frames_received_hi = pstats->pfc_frames_rx_hi; 715 estats->pfc_frames_received_lo = pstats->pfc_frames_rx_lo; 716 estats->pfc_frames_sent_hi = pstats->pfc_frames_tx_hi; 717 estats->pfc_frames_sent_lo = pstats->pfc_frames_tx_lo; 718} 719 720static void 721bxe_mstat_stats_update(struct bxe_softc *sc) 722{ 723 struct host_port_stats *pstats = BXE_SP(sc, port_stats); 724 struct bxe_eth_stats *estats = &sc->eth_stats; 725 struct mstat_stats *new = BXE_SP(sc, mac_stats.mstat_stats); 726 727 ADD_STAT64(stats_rx.rx_grerb, rx_stat_ifhcinbadoctets); 728 ADD_STAT64(stats_rx.rx_grfcs, rx_stat_dot3statsfcserrors); 729 ADD_STAT64(stats_rx.rx_grund, rx_stat_etherstatsundersizepkts); 730 ADD_STAT64(stats_rx.rx_grovr, rx_stat_dot3statsframestoolong); 731 ADD_STAT64(stats_rx.rx_grfrg, rx_stat_etherstatsfragments); 732 ADD_STAT64(stats_rx.rx_grxcf, rx_stat_maccontrolframesreceived); 733 ADD_STAT64(stats_rx.rx_grxpf, rx_stat_xoffstateentered); 734 ADD_STAT64(stats_rx.rx_grxpf, rx_stat_mac_xpf); 735 ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_outxoffsent); 736 ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_flowcontroldone); 737 738 /* collect pfc stats */ 739 ADD_64(pstats->pfc_frames_tx_hi, new->stats_tx.tx_gtxpp_hi, 740 pstats->pfc_frames_tx_lo, new->stats_tx.tx_gtxpp_lo); 741 ADD_64(pstats->pfc_frames_rx_hi, new->stats_rx.rx_grxpp_hi, 742 pstats->pfc_frames_rx_lo, new->stats_rx.rx_grxpp_lo); 743 744 ADD_STAT64(stats_tx.tx_gt64, tx_stat_etherstatspkts64octets); 745 ADD_STAT64(stats_tx.tx_gt127, tx_stat_etherstatspkts65octetsto127octets); 746 ADD_STAT64(stats_tx.tx_gt255, tx_stat_etherstatspkts128octetsto255octets); 747 ADD_STAT64(stats_tx.tx_gt511, tx_stat_etherstatspkts256octetsto511octets); 748 ADD_STAT64(stats_tx.tx_gt1023, 749 tx_stat_etherstatspkts512octetsto1023octets); 750 ADD_STAT64(stats_tx.tx_gt1518, 751 tx_stat_etherstatspkts1024octetsto1522octets); 752 ADD_STAT64(stats_tx.tx_gt2047, tx_stat_mac_2047); 753 754 ADD_STAT64(stats_tx.tx_gt4095, tx_stat_mac_4095); 755 ADD_STAT64(stats_tx.tx_gt9216, tx_stat_mac_9216); 756 ADD_STAT64(stats_tx.tx_gt16383, tx_stat_mac_16383); 757 758 ADD_STAT64(stats_tx.tx_gterr, tx_stat_dot3statsinternalmactransmiterrors); 759 ADD_STAT64(stats_tx.tx_gtufl, tx_stat_mac_ufl); 760 761 estats->etherstatspkts1024octetsto1522octets_hi = 762 pstats->mac_stx[1].tx_stat_etherstatspkts1024octetsto1522octets_hi; 763 estats->etherstatspkts1024octetsto1522octets_lo = 764 pstats->mac_stx[1].tx_stat_etherstatspkts1024octetsto1522octets_lo; 765 766 estats->etherstatspktsover1522octets_hi = 767 pstats->mac_stx[1].tx_stat_mac_2047_hi; 768 estats->etherstatspktsover1522octets_lo = 769 pstats->mac_stx[1].tx_stat_mac_2047_lo; 770 771 ADD_64(estats->etherstatspktsover1522octets_hi, 772 pstats->mac_stx[1].tx_stat_mac_4095_hi, 773 estats->etherstatspktsover1522octets_lo, 774 pstats->mac_stx[1].tx_stat_mac_4095_lo); 775 776 ADD_64(estats->etherstatspktsover1522octets_hi, 777 pstats->mac_stx[1].tx_stat_mac_9216_hi, 778 estats->etherstatspktsover1522octets_lo, 779 pstats->mac_stx[1].tx_stat_mac_9216_lo); 780 781 ADD_64(estats->etherstatspktsover1522octets_hi, 782 pstats->mac_stx[1].tx_stat_mac_16383_hi, 783 estats->etherstatspktsover1522octets_lo, 784 pstats->mac_stx[1].tx_stat_mac_16383_lo); 785 786 estats->pause_frames_received_hi = pstats->mac_stx[1].rx_stat_mac_xpf_hi; 787 estats->pause_frames_received_lo = pstats->mac_stx[1].rx_stat_mac_xpf_lo; 788 789 estats->pause_frames_sent_hi = pstats->mac_stx[1].tx_stat_outxoffsent_hi; 790 estats->pause_frames_sent_lo = pstats->mac_stx[1].tx_stat_outxoffsent_lo; 791 792 estats->pfc_frames_received_hi = pstats->pfc_frames_rx_hi; 793 estats->pfc_frames_received_lo = pstats->pfc_frames_rx_lo; 794 estats->pfc_frames_sent_hi = pstats->pfc_frames_tx_hi; 795 estats->pfc_frames_sent_lo = pstats->pfc_frames_tx_lo; 796} 797 798static void 799bxe_emac_stats_update(struct bxe_softc *sc) 800{ 801 struct emac_stats *new = BXE_SP(sc, mac_stats.emac_stats); 802 struct host_port_stats *pstats = BXE_SP(sc, port_stats); 803 struct bxe_eth_stats *estats = &sc->eth_stats; 804 805 UPDATE_EXTEND_STAT(rx_stat_ifhcinbadoctets); 806 UPDATE_EXTEND_STAT(tx_stat_ifhcoutbadoctets); 807 UPDATE_EXTEND_STAT(rx_stat_dot3statsfcserrors); 808 UPDATE_EXTEND_STAT(rx_stat_dot3statsalignmenterrors); 809 UPDATE_EXTEND_STAT(rx_stat_dot3statscarriersenseerrors); 810 UPDATE_EXTEND_STAT(rx_stat_falsecarriererrors); 811 UPDATE_EXTEND_STAT(rx_stat_etherstatsundersizepkts); 812 UPDATE_EXTEND_STAT(rx_stat_dot3statsframestoolong); 813 UPDATE_EXTEND_STAT(rx_stat_etherstatsfragments); 814 UPDATE_EXTEND_STAT(rx_stat_etherstatsjabbers); 815 UPDATE_EXTEND_STAT(rx_stat_maccontrolframesreceived); 816 UPDATE_EXTEND_STAT(rx_stat_xoffstateentered); 817 UPDATE_EXTEND_STAT(rx_stat_xonpauseframesreceived); 818 UPDATE_EXTEND_STAT(rx_stat_xoffpauseframesreceived); 819 UPDATE_EXTEND_STAT(tx_stat_outxonsent); 820 UPDATE_EXTEND_STAT(tx_stat_outxoffsent); 821 UPDATE_EXTEND_STAT(tx_stat_flowcontroldone); 822 UPDATE_EXTEND_STAT(tx_stat_etherstatscollisions); 823 UPDATE_EXTEND_STAT(tx_stat_dot3statssinglecollisionframes); 824 UPDATE_EXTEND_STAT(tx_stat_dot3statsmultiplecollisionframes); 825 UPDATE_EXTEND_STAT(tx_stat_dot3statsdeferredtransmissions); 826 UPDATE_EXTEND_STAT(tx_stat_dot3statsexcessivecollisions); 827 UPDATE_EXTEND_STAT(tx_stat_dot3statslatecollisions); 828 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts64octets); 829 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts65octetsto127octets); 830 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts128octetsto255octets); 831 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts256octetsto511octets); 832 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts512octetsto1023octets); 833 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts1024octetsto1522octets); 834 UPDATE_EXTEND_STAT(tx_stat_etherstatspktsover1522octets); 835 UPDATE_EXTEND_STAT(tx_stat_dot3statsinternalmactransmiterrors); 836 837 estats->pause_frames_received_hi = 838 pstats->mac_stx[1].rx_stat_xonpauseframesreceived_hi; 839 estats->pause_frames_received_lo = 840 pstats->mac_stx[1].rx_stat_xonpauseframesreceived_lo; 841 ADD_64(estats->pause_frames_received_hi, 842 pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_hi, 843 estats->pause_frames_received_lo, 844 pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_lo); 845 846 estats->pause_frames_sent_hi = 847 pstats->mac_stx[1].tx_stat_outxonsent_hi; 848 estats->pause_frames_sent_lo = 849 pstats->mac_stx[1].tx_stat_outxonsent_lo; 850 ADD_64(estats->pause_frames_sent_hi, 851 pstats->mac_stx[1].tx_stat_outxoffsent_hi, 852 estats->pause_frames_sent_lo, 853 pstats->mac_stx[1].tx_stat_outxoffsent_lo); 854} 855 856static int 857bxe_hw_stats_update(struct bxe_softc *sc) 858{ 859 struct nig_stats *new = BXE_SP(sc, nig_stats); 860 struct nig_stats *old = &(sc->port.old_nig_stats); 861 struct host_port_stats *pstats = BXE_SP(sc, port_stats); 862 struct bxe_eth_stats *estats = &sc->eth_stats; 863 uint32_t lpi_reg, nig_timer_max; 864 struct { 865 uint32_t lo; 866 uint32_t hi; 867 } diff; 868 869 switch (sc->link_vars.mac_type) { 870 case ELINK_MAC_TYPE_BMAC: 871 bxe_bmac_stats_update(sc); 872 break; 873 874 case ELINK_MAC_TYPE_EMAC: 875 bxe_emac_stats_update(sc); 876 break; 877 878 case ELINK_MAC_TYPE_UMAC: 879 case ELINK_MAC_TYPE_XMAC: 880 bxe_mstat_stats_update(sc); 881 break; 882 883 case ELINK_MAC_TYPE_NONE: /* unreached */ 884 BLOGD(sc, DBG_STATS, 885 "stats updated by DMAE but no MAC active\n"); 886 return (-1); 887 888 default: /* unreached */ 889 BLOGE(sc, "stats update failed, unknown MAC type\n"); 890 } 891 892 ADD_EXTEND_64(pstats->brb_drop_hi, pstats->brb_drop_lo, 893 new->brb_discard - old->brb_discard); 894 ADD_EXTEND_64(estats->brb_truncate_hi, estats->brb_truncate_lo, 895 new->brb_truncate - old->brb_truncate); 896 897 if (!CHIP_IS_E3(sc)) { 898 UPDATE_STAT64_NIG(egress_mac_pkt0, 899 etherstatspkts1024octetsto1522octets); 900 UPDATE_STAT64_NIG(egress_mac_pkt1, 901 etherstatspktsover1522octets); 902 } 903 904 memcpy(old, new, sizeof(struct nig_stats)); 905 906 memcpy(&(estats->rx_stat_ifhcinbadoctets_hi), &(pstats->mac_stx[1]), 907 sizeof(struct mac_stx)); 908 estats->brb_drop_hi = pstats->brb_drop_hi; 909 estats->brb_drop_lo = pstats->brb_drop_lo; 910 911 pstats->host_port_stats_counter++; 912 913 if (CHIP_IS_E3(sc)) { 914 lpi_reg = (SC_PORT(sc)) ? 915 MISC_REG_CPMU_LP_SM_ENT_CNT_P1 : 916 MISC_REG_CPMU_LP_SM_ENT_CNT_P0; 917 estats->eee_tx_lpi += REG_RD(sc, lpi_reg); 918 } 919 920 if (!BXE_NOMCP(sc)) { 921 nig_timer_max = SHMEM_RD(sc, port_mb[SC_PORT(sc)].stat_nig_timer); 922 if (nig_timer_max != estats->nig_timer_max) { 923 estats->nig_timer_max = nig_timer_max; 924 BLOGE(sc, "invalid NIG timer max (%u)\n", 925 estats->nig_timer_max); 926 } 927 } 928 929 return (0); 930} 931 932static int 933bxe_storm_stats_validate_counters(struct bxe_softc *sc) 934{ 935 struct stats_counter *counters = &sc->fw_stats_data->storm_counters; 936 uint16_t cur_stats_counter; 937 938 /* 939 * Make sure we use the value of the counter 940 * used for sending the last stats ramrod. 941 */ 942 BXE_STATS_LOCK(sc); 943 cur_stats_counter = (sc->stats_counter - 1); 944 BXE_STATS_UNLOCK(sc); 945 946 /* are storm stats valid? */ 947 if (le16toh(counters->xstats_counter) != cur_stats_counter) { 948 BLOGD(sc, DBG_STATS, 949 "stats not updated by xstorm, " 950 "counter 0x%x != stats_counter 0x%x\n", 951 le16toh(counters->xstats_counter), sc->stats_counter); 952 return (-EAGAIN); 953 } 954 955 if (le16toh(counters->ustats_counter) != cur_stats_counter) { 956 BLOGD(sc, DBG_STATS, 957 "stats not updated by ustorm, " 958 "counter 0x%x != stats_counter 0x%x\n", 959 le16toh(counters->ustats_counter), sc->stats_counter); 960 return (-EAGAIN); 961 } 962 963 if (le16toh(counters->cstats_counter) != cur_stats_counter) { 964 BLOGD(sc, DBG_STATS, 965 "stats not updated by cstorm, " 966 "counter 0x%x != stats_counter 0x%x\n", 967 le16toh(counters->cstats_counter), sc->stats_counter); 968 return (-EAGAIN); 969 } 970 971 if (le16toh(counters->tstats_counter) != cur_stats_counter) { 972 BLOGD(sc, DBG_STATS, 973 "stats not updated by tstorm, " 974 "counter 0x%x != stats_counter 0x%x\n", 975 le16toh(counters->tstats_counter), sc->stats_counter); 976 return (-EAGAIN); 977 } 978 979 return (0); 980} 981 982static int 983bxe_storm_stats_update(struct bxe_softc *sc) 984{ 985 struct tstorm_per_port_stats *tport = 986 &sc->fw_stats_data->port.tstorm_port_statistics; 987 struct tstorm_per_pf_stats *tfunc = 988 &sc->fw_stats_data->pf.tstorm_pf_statistics; 989 struct host_func_stats *fstats = &sc->func_stats; 990 struct bxe_eth_stats *estats = &sc->eth_stats; 991 struct bxe_eth_stats_old *estats_old = &sc->eth_stats_old; 992 int i; 993 994 /* vfs stat counter is managed by pf */ 995 if (IS_PF(sc) && bxe_storm_stats_validate_counters(sc)) { 996 return (-EAGAIN); 997 } 998 999 estats->error_bytes_received_hi = 0; 1000 estats->error_bytes_received_lo = 0; 1001 1002 for (i = 0; i < sc->num_queues; i++) { 1003 struct bxe_fastpath *fp = &sc->fp[i]; 1004 struct tstorm_per_queue_stats *tclient = 1005 &sc->fw_stats_data->queue_stats[i].tstorm_queue_statistics; 1006 struct tstorm_per_queue_stats *old_tclient = &fp->old_tclient; 1007 struct ustorm_per_queue_stats *uclient = 1008 &sc->fw_stats_data->queue_stats[i].ustorm_queue_statistics; 1009 struct ustorm_per_queue_stats *old_uclient = &fp->old_uclient; 1010 struct xstorm_per_queue_stats *xclient = 1011 &sc->fw_stats_data->queue_stats[i].xstorm_queue_statistics; 1012 struct xstorm_per_queue_stats *old_xclient = &fp->old_xclient; 1013 struct bxe_eth_q_stats *qstats = &fp->eth_q_stats; 1014 struct bxe_eth_q_stats_old *qstats_old = &fp->eth_q_stats_old; 1015 1016 uint32_t diff; 1017 1018 BLOGD(sc, DBG_STATS, 1019 "queue[%d]: ucast_sent 0x%x bcast_sent 0x%x mcast_sent 0x%x\n", 1020 i, xclient->ucast_pkts_sent, xclient->bcast_pkts_sent, 1021 xclient->mcast_pkts_sent); 1022 1023 BLOGD(sc, DBG_STATS, "---------------\n"); 1024 1025 UPDATE_QSTAT(tclient->rcv_bcast_bytes, 1026 total_broadcast_bytes_received); 1027 UPDATE_QSTAT(tclient->rcv_mcast_bytes, 1028 total_multicast_bytes_received); 1029 UPDATE_QSTAT(tclient->rcv_ucast_bytes, 1030 total_unicast_bytes_received); 1031 1032 /* 1033 * sum to total_bytes_received all 1034 * unicast/multicast/broadcast 1035 */ 1036 qstats->total_bytes_received_hi = 1037 qstats->total_broadcast_bytes_received_hi; 1038 qstats->total_bytes_received_lo = 1039 qstats->total_broadcast_bytes_received_lo; 1040 1041 ADD_64(qstats->total_bytes_received_hi, 1042 qstats->total_multicast_bytes_received_hi, 1043 qstats->total_bytes_received_lo, 1044 qstats->total_multicast_bytes_received_lo); 1045 1046 ADD_64(qstats->total_bytes_received_hi, 1047 qstats->total_unicast_bytes_received_hi, 1048 qstats->total_bytes_received_lo, 1049 qstats->total_unicast_bytes_received_lo); 1050 1051 qstats->valid_bytes_received_hi = qstats->total_bytes_received_hi; 1052 qstats->valid_bytes_received_lo = qstats->total_bytes_received_lo; 1053 1054 UPDATE_EXTEND_TSTAT(rcv_ucast_pkts, total_unicast_packets_received); 1055 UPDATE_EXTEND_TSTAT(rcv_mcast_pkts, total_multicast_packets_received); 1056 UPDATE_EXTEND_TSTAT(rcv_bcast_pkts, total_broadcast_packets_received); 1057 UPDATE_EXTEND_E_TSTAT(pkts_too_big_discard, 1058 etherstatsoverrsizepkts, 32); 1059 UPDATE_EXTEND_E_TSTAT(no_buff_discard, no_buff_discard, 16); 1060 1061 SUB_EXTEND_USTAT(ucast_no_buff_pkts, total_unicast_packets_received); 1062 SUB_EXTEND_USTAT(mcast_no_buff_pkts, 1063 total_multicast_packets_received); 1064 SUB_EXTEND_USTAT(bcast_no_buff_pkts, 1065 total_broadcast_packets_received); 1066 UPDATE_EXTEND_E_USTAT(ucast_no_buff_pkts, no_buff_discard); 1067 UPDATE_EXTEND_E_USTAT(mcast_no_buff_pkts, no_buff_discard); 1068 UPDATE_EXTEND_E_USTAT(bcast_no_buff_pkts, no_buff_discard); 1069 1070 UPDATE_QSTAT(xclient->bcast_bytes_sent, 1071 total_broadcast_bytes_transmitted); 1072 UPDATE_QSTAT(xclient->mcast_bytes_sent, 1073 total_multicast_bytes_transmitted); 1074 UPDATE_QSTAT(xclient->ucast_bytes_sent, 1075 total_unicast_bytes_transmitted); 1076 1077 /* 1078 * sum to total_bytes_transmitted all 1079 * unicast/multicast/broadcast 1080 */ 1081 qstats->total_bytes_transmitted_hi = 1082 qstats->total_unicast_bytes_transmitted_hi; 1083 qstats->total_bytes_transmitted_lo = 1084 qstats->total_unicast_bytes_transmitted_lo; 1085 1086 ADD_64(qstats->total_bytes_transmitted_hi, 1087 qstats->total_broadcast_bytes_transmitted_hi, 1088 qstats->total_bytes_transmitted_lo, 1089 qstats->total_broadcast_bytes_transmitted_lo); 1090 1091 ADD_64(qstats->total_bytes_transmitted_hi, 1092 qstats->total_multicast_bytes_transmitted_hi, 1093 qstats->total_bytes_transmitted_lo, 1094 qstats->total_multicast_bytes_transmitted_lo); 1095 1096 UPDATE_EXTEND_XSTAT(ucast_pkts_sent, 1097 total_unicast_packets_transmitted); 1098 UPDATE_EXTEND_XSTAT(mcast_pkts_sent, 1099 total_multicast_packets_transmitted); 1100 UPDATE_EXTEND_XSTAT(bcast_pkts_sent, 1101 total_broadcast_packets_transmitted); 1102 1103 UPDATE_EXTEND_TSTAT(checksum_discard, 1104 total_packets_received_checksum_discarded); 1105 UPDATE_EXTEND_TSTAT(ttl0_discard, 1106 total_packets_received_ttl0_discarded); 1107 1108 UPDATE_EXTEND_XSTAT(error_drop_pkts, 1109 total_transmitted_dropped_packets_error); 1110 1111 /* TPA aggregations completed */ 1112 UPDATE_EXTEND_E_USTAT(coalesced_events, total_tpa_aggregations); 1113 /* Number of network frames aggregated by TPA */ 1114 UPDATE_EXTEND_E_USTAT(coalesced_pkts, total_tpa_aggregated_frames); 1115 /* Total number of bytes in completed TPA aggregations */ 1116 UPDATE_QSTAT(uclient->coalesced_bytes, total_tpa_bytes); 1117 1118 UPDATE_ESTAT_QSTAT_64(total_tpa_bytes); 1119 1120 UPDATE_FSTAT_QSTAT(total_bytes_received); 1121 UPDATE_FSTAT_QSTAT(total_bytes_transmitted); 1122 UPDATE_FSTAT_QSTAT(total_unicast_packets_received); 1123 UPDATE_FSTAT_QSTAT(total_multicast_packets_received); 1124 UPDATE_FSTAT_QSTAT(total_broadcast_packets_received); 1125 UPDATE_FSTAT_QSTAT(total_unicast_packets_transmitted); 1126 UPDATE_FSTAT_QSTAT(total_multicast_packets_transmitted); 1127 UPDATE_FSTAT_QSTAT(total_broadcast_packets_transmitted); 1128 UPDATE_FSTAT_QSTAT(valid_bytes_received); 1129 } 1130 1131 ADD_64(estats->total_bytes_received_hi, 1132 estats->rx_stat_ifhcinbadoctets_hi, 1133 estats->total_bytes_received_lo, 1134 estats->rx_stat_ifhcinbadoctets_lo); 1135 1136 ADD_64_LE(estats->total_bytes_received_hi, 1137 tfunc->rcv_error_bytes.hi, 1138 estats->total_bytes_received_lo, 1139 tfunc->rcv_error_bytes.lo); 1140 1141 ADD_64_LE(estats->error_bytes_received_hi, 1142 tfunc->rcv_error_bytes.hi, 1143 estats->error_bytes_received_lo, 1144 tfunc->rcv_error_bytes.lo); 1145 1146 UPDATE_ESTAT(etherstatsoverrsizepkts, rx_stat_dot3statsframestoolong); 1147 1148 ADD_64(estats->error_bytes_received_hi, 1149 estats->rx_stat_ifhcinbadoctets_hi, 1150 estats->error_bytes_received_lo, 1151 estats->rx_stat_ifhcinbadoctets_lo); 1152 1153 if (sc->port.pmf) { 1154 struct bxe_fw_port_stats_old *fwstats = &sc->fw_stats_old; 1155 UPDATE_FW_STAT(mac_filter_discard); 1156 UPDATE_FW_STAT(mf_tag_discard); 1157 UPDATE_FW_STAT(brb_truncate_discard); 1158 UPDATE_FW_STAT(mac_discard); 1159 } 1160 1161 fstats->host_func_stats_start = ++fstats->host_func_stats_end; 1162 1163 sc->stats_pending = 0; 1164 1165 return (0); 1166} 1167 1168static void 1169bxe_net_stats_update(struct bxe_softc *sc) 1170{ 1171 1172 for (int i = 0; i < sc->num_queues; i++) 1173 if_inc_counter(sc->ifp, IFCOUNTER_IQDROPS, 1174 le32toh(sc->fp[i].old_tclient.checksum_discard)); 1175} 1176 1177uint64_t 1178bxe_get_counter(if_t ifp, ift_counter cnt) 1179{ 1180 struct bxe_softc *sc; 1181 struct bxe_eth_stats *estats; 1182 1183 sc = if_getsoftc(ifp); 1184 estats = &sc->eth_stats; 1185 1186 switch (cnt) { 1187 case IFCOUNTER_IPACKETS: 1188 return (bxe_hilo(&estats->total_unicast_packets_received_hi) + 1189 bxe_hilo(&estats->total_multicast_packets_received_hi) + 1190 bxe_hilo(&estats->total_broadcast_packets_received_hi)); 1191 case IFCOUNTER_OPACKETS: 1192 return (bxe_hilo(&estats->total_unicast_packets_transmitted_hi) + 1193 bxe_hilo(&estats->total_multicast_packets_transmitted_hi) + 1194 bxe_hilo(&estats->total_broadcast_packets_transmitted_hi)); 1195 case IFCOUNTER_IBYTES: 1196 return (bxe_hilo(&estats->total_bytes_received_hi)); 1197 case IFCOUNTER_OBYTES: 1198 return (bxe_hilo(&estats->total_bytes_transmitted_hi)); 1199 case IFCOUNTER_IERRORS: 1200 return (bxe_hilo(&estats->rx_stat_etherstatsundersizepkts_hi) + 1201 bxe_hilo(&estats->etherstatsoverrsizepkts_hi) + 1202 bxe_hilo(&estats->brb_drop_hi) + 1203 bxe_hilo(&estats->brb_truncate_hi) + 1204 bxe_hilo(&estats->rx_stat_dot3statsfcserrors_hi) + 1205 bxe_hilo(&estats->rx_stat_dot3statsalignmenterrors_hi) + 1206 bxe_hilo(&estats->no_buff_discard_hi)); 1207 case IFCOUNTER_OERRORS: 1208 return (bxe_hilo(&estats->rx_stat_dot3statscarriersenseerrors_hi) + 1209 bxe_hilo(&estats->tx_stat_dot3statsinternalmactransmiterrors_hi)); 1210 case IFCOUNTER_IMCASTS: 1211 return (bxe_hilo(&estats->total_multicast_packets_received_hi)); 1212 case IFCOUNTER_COLLISIONS: 1213 return (bxe_hilo(&estats->tx_stat_etherstatscollisions_hi) + 1214 bxe_hilo(&estats->tx_stat_dot3statslatecollisions_hi) + 1215 bxe_hilo(&estats->tx_stat_dot3statsexcessivecollisions_hi)); 1216 default: 1217 return (if_get_counter_default(ifp, cnt)); 1218 } 1219} 1220 1221static void 1222bxe_drv_stats_update(struct bxe_softc *sc) 1223{ 1224 struct bxe_eth_stats *estats = &sc->eth_stats; 1225 int i; 1226 1227 for (i = 0; i < sc->num_queues; i++) { 1228 struct bxe_eth_q_stats *qstats = &sc->fp[i].eth_q_stats; 1229 struct bxe_eth_q_stats_old *qstats_old = &sc->fp[i].eth_q_stats_old; 1230 1231 UPDATE_ESTAT_QSTAT(rx_calls); 1232 UPDATE_ESTAT_QSTAT(rx_pkts); 1233 UPDATE_ESTAT_QSTAT(rx_tpa_pkts); 1234 UPDATE_ESTAT_QSTAT(rx_erroneous_jumbo_sge_pkts); 1235 UPDATE_ESTAT_QSTAT(rx_bxe_service_rxsgl); 1236 UPDATE_ESTAT_QSTAT(rx_jumbo_sge_pkts); 1237 UPDATE_ESTAT_QSTAT(rx_soft_errors); 1238 UPDATE_ESTAT_QSTAT(rx_hw_csum_errors); 1239 UPDATE_ESTAT_QSTAT(rx_ofld_frames_csum_ip); 1240 UPDATE_ESTAT_QSTAT(rx_ofld_frames_csum_tcp_udp); 1241 UPDATE_ESTAT_QSTAT(rx_budget_reached); 1242 UPDATE_ESTAT_QSTAT(tx_pkts); 1243 UPDATE_ESTAT_QSTAT(tx_soft_errors); 1244 UPDATE_ESTAT_QSTAT(tx_ofld_frames_csum_ip); 1245 UPDATE_ESTAT_QSTAT(tx_ofld_frames_csum_tcp); 1246 UPDATE_ESTAT_QSTAT(tx_ofld_frames_csum_udp); 1247 UPDATE_ESTAT_QSTAT(tx_ofld_frames_lso); 1248 UPDATE_ESTAT_QSTAT(tx_ofld_frames_lso_hdr_splits); 1249 UPDATE_ESTAT_QSTAT(tx_encap_failures); 1250 UPDATE_ESTAT_QSTAT(tx_hw_queue_full); 1251 UPDATE_ESTAT_QSTAT(tx_hw_max_queue_depth); 1252 UPDATE_ESTAT_QSTAT(tx_dma_mapping_failure); 1253 UPDATE_ESTAT_QSTAT(tx_max_drbr_queue_depth); 1254 UPDATE_ESTAT_QSTAT(tx_window_violation_std); 1255 UPDATE_ESTAT_QSTAT(tx_window_violation_tso); 1256 //UPDATE_ESTAT_QSTAT(tx_unsupported_tso_request_ipv6); 1257 //UPDATE_ESTAT_QSTAT(tx_unsupported_tso_request_not_tcp); 1258 UPDATE_ESTAT_QSTAT(tx_chain_lost_mbuf); 1259 UPDATE_ESTAT_QSTAT(tx_frames_deferred); 1260 UPDATE_ESTAT_QSTAT(tx_queue_xoff); 1261 1262 /* mbuf driver statistics */ 1263 UPDATE_ESTAT_QSTAT(mbuf_defrag_attempts); 1264 UPDATE_ESTAT_QSTAT(mbuf_defrag_failures); 1265 UPDATE_ESTAT_QSTAT(mbuf_rx_bd_alloc_failed); 1266 UPDATE_ESTAT_QSTAT(mbuf_rx_bd_mapping_failed); 1267 UPDATE_ESTAT_QSTAT(mbuf_rx_tpa_alloc_failed); 1268 UPDATE_ESTAT_QSTAT(mbuf_rx_tpa_mapping_failed); 1269 UPDATE_ESTAT_QSTAT(mbuf_rx_sge_alloc_failed); 1270 UPDATE_ESTAT_QSTAT(mbuf_rx_sge_mapping_failed); 1271 1272 /* track the number of allocated mbufs */ 1273 UPDATE_ESTAT_QSTAT(mbuf_alloc_tx); 1274 UPDATE_ESTAT_QSTAT(mbuf_alloc_rx); 1275 UPDATE_ESTAT_QSTAT(mbuf_alloc_sge); 1276 UPDATE_ESTAT_QSTAT(mbuf_alloc_tpa); 1277 } 1278} 1279 1280static uint8_t 1281bxe_edebug_stats_stopped(struct bxe_softc *sc) 1282{ 1283 uint32_t val; 1284 1285 if (SHMEM2_HAS(sc, edebug_driver_if[1])) { 1286 val = SHMEM2_RD(sc, edebug_driver_if[1]); 1287 1288 if (val == EDEBUG_DRIVER_IF_OP_CODE_DISABLE_STAT) { 1289 return (TRUE); 1290 } 1291 } 1292 1293 return (FALSE); 1294} 1295 1296static void 1297bxe_stats_update(struct bxe_softc *sc) 1298{ 1299 uint32_t *stats_comp = BXE_SP(sc, stats_comp); 1300 1301 if (bxe_edebug_stats_stopped(sc)) { 1302 return; 1303 } 1304 1305 if (IS_PF(sc)) { 1306 if (*stats_comp != DMAE_COMP_VAL) { 1307 return; 1308 } 1309 1310 if (sc->port.pmf) { 1311 bxe_hw_stats_update(sc); 1312 } 1313 1314 if (bxe_storm_stats_update(sc)) { 1315 if (sc->stats_pending++ == 3) { 1316 if (if_getdrvflags(sc->ifp) & IFF_DRV_RUNNING) { 1317 if(sc->trigger_grcdump) { 1318 /* taking grcdump */ 1319 bxe_grc_dump(sc); 1320 } 1321 atomic_store_rel_long(&sc->chip_tq_flags, CHIP_TQ_REINIT); 1322 taskqueue_enqueue(sc->chip_tq, &sc->chip_tq_task); 1323 } 1324 } 1325 return; 1326 } 1327 } else { 1328 /* 1329 * VF doesn't collect HW statistics, and doesn't get completions, 1330 * performs only update. 1331 */ 1332 bxe_storm_stats_update(sc); 1333 } 1334 1335 bxe_net_stats_update(sc); 1336 bxe_drv_stats_update(sc); 1337 1338 /* vf is done */ 1339 if (IS_VF(sc)) { 1340 return; 1341 } 1342 1343 bxe_hw_stats_post(sc); 1344 bxe_storm_stats_post(sc); 1345} 1346 1347static void 1348bxe_port_stats_stop(struct bxe_softc *sc) 1349{ 1350 struct dmae_cmd *dmae; 1351 uint32_t opcode; 1352 int loader_idx = PMF_DMAE_C(sc); 1353 uint32_t *stats_comp = BXE_SP(sc, stats_comp); 1354 1355 sc->executer_idx = 0; 1356 1357 opcode = bxe_dmae_opcode(sc, DMAE_SRC_PCI, DMAE_DST_GRC, FALSE, 0); 1358 1359 if (sc->port.port_stx) { 1360 dmae = BXE_SP(sc, dmae[sc->executer_idx++]); 1361 1362 if (sc->func_stx) { 1363 dmae->opcode = bxe_dmae_opcode_add_comp(opcode, DMAE_COMP_GRC); 1364 } else { 1365 dmae->opcode = bxe_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI); 1366 } 1367 1368 dmae->src_addr_lo = U64_LO(BXE_SP_MAPPING(sc, port_stats)); 1369 dmae->src_addr_hi = U64_HI(BXE_SP_MAPPING(sc, port_stats)); 1370 dmae->dst_addr_lo = sc->port.port_stx >> 2; 1371 dmae->dst_addr_hi = 0; 1372 dmae->len = bxe_get_port_stats_dma_len(sc); 1373 if (sc->func_stx) { 1374 dmae->comp_addr_lo = (dmae_reg_go_c[loader_idx] >> 2); 1375 dmae->comp_addr_hi = 0; 1376 dmae->comp_val = 1; 1377 } else { 1378 dmae->comp_addr_lo = U64_LO(BXE_SP_MAPPING(sc, stats_comp)); 1379 dmae->comp_addr_hi = U64_HI(BXE_SP_MAPPING(sc, stats_comp)); 1380 dmae->comp_val = DMAE_COMP_VAL; 1381 1382 *stats_comp = 0; 1383 } 1384 } 1385 1386 if (sc->func_stx) { 1387 dmae = BXE_SP(sc, dmae[sc->executer_idx++]); 1388 dmae->opcode = bxe_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI); 1389 dmae->src_addr_lo = U64_LO(BXE_SP_MAPPING(sc, func_stats)); 1390 dmae->src_addr_hi = U64_HI(BXE_SP_MAPPING(sc, func_stats)); 1391 dmae->dst_addr_lo = (sc->func_stx >> 2); 1392 dmae->dst_addr_hi = 0; 1393 dmae->len = (sizeof(struct host_func_stats) >> 2); 1394 dmae->comp_addr_lo = U64_LO(BXE_SP_MAPPING(sc, stats_comp)); 1395 dmae->comp_addr_hi = U64_HI(BXE_SP_MAPPING(sc, stats_comp)); 1396 dmae->comp_val = DMAE_COMP_VAL; 1397 1398 *stats_comp = 0; 1399 } 1400} 1401 1402static void 1403bxe_stats_stop(struct bxe_softc *sc) 1404{ 1405 uint8_t update = FALSE; 1406 1407 bxe_stats_comp(sc); 1408 1409 if (sc->port.pmf) { 1410 update = bxe_hw_stats_update(sc) == 0; 1411 } 1412 1413 update |= bxe_storm_stats_update(sc) == 0; 1414 1415 if (update) { 1416 bxe_net_stats_update(sc); 1417 1418 if (sc->port.pmf) { 1419 bxe_port_stats_stop(sc); 1420 } 1421 1422 bxe_hw_stats_post(sc); 1423 bxe_stats_comp(sc); 1424 } 1425} 1426 1427static void 1428bxe_stats_do_nothing(struct bxe_softc *sc) 1429{ 1430 return; 1431} 1432 1433static const struct { 1434 void (*action)(struct bxe_softc *sc); 1435 enum bxe_stats_state next_state; 1436} bxe_stats_stm[STATS_STATE_MAX][STATS_EVENT_MAX] = { 1437 { 1438 /* DISABLED PMF */ { bxe_stats_pmf_update, STATS_STATE_DISABLED }, 1439 /* LINK_UP */ { bxe_stats_start, STATS_STATE_ENABLED }, 1440 /* UPDATE */ { bxe_stats_do_nothing, STATS_STATE_DISABLED }, 1441 /* STOP */ { bxe_stats_do_nothing, STATS_STATE_DISABLED } 1442 }, 1443 { 1444 /* ENABLED PMF */ { bxe_stats_pmf_start, STATS_STATE_ENABLED }, 1445 /* LINK_UP */ { bxe_stats_restart, STATS_STATE_ENABLED }, 1446 /* UPDATE */ { bxe_stats_update, STATS_STATE_ENABLED }, 1447 /* STOP */ { bxe_stats_stop, STATS_STATE_DISABLED } 1448 } 1449}; 1450 1451void bxe_stats_handle(struct bxe_softc *sc, 1452 enum bxe_stats_event event) 1453{ 1454 enum bxe_stats_state state; 1455 1456 if (__predict_false(sc->panic)) { 1457 return; 1458 } 1459 1460 BXE_STATS_LOCK(sc); 1461 state = sc->stats_state; 1462 sc->stats_state = bxe_stats_stm[state][event].next_state; 1463 BXE_STATS_UNLOCK(sc); 1464 1465 bxe_stats_stm[state][event].action(sc); 1466 1467 if (event != STATS_EVENT_UPDATE) { 1468 BLOGD(sc, DBG_STATS, 1469 "state %d -> event %d -> state %d\n", 1470 state, event, sc->stats_state); 1471 } 1472} 1473 1474static void 1475bxe_port_stats_base_init(struct bxe_softc *sc) 1476{ 1477 struct dmae_cmd *dmae; 1478 uint32_t *stats_comp = BXE_SP(sc, stats_comp); 1479 1480 /* sanity */ 1481 if (!sc->port.pmf || !sc->port.port_stx) { 1482 BLOGE(sc, "BUG!\n"); 1483 return; 1484 } 1485 1486 sc->executer_idx = 0; 1487 1488 dmae = BXE_SP(sc, dmae[sc->executer_idx++]); 1489 dmae->opcode = bxe_dmae_opcode(sc, DMAE_SRC_PCI, DMAE_DST_GRC, 1490 TRUE, DMAE_COMP_PCI); 1491 dmae->src_addr_lo = U64_LO(BXE_SP_MAPPING(sc, port_stats)); 1492 dmae->src_addr_hi = U64_HI(BXE_SP_MAPPING(sc, port_stats)); 1493 dmae->dst_addr_lo = (sc->port.port_stx >> 2); 1494 dmae->dst_addr_hi = 0; 1495 dmae->len = bxe_get_port_stats_dma_len(sc); 1496 dmae->comp_addr_lo = U64_LO(BXE_SP_MAPPING(sc, stats_comp)); 1497 dmae->comp_addr_hi = U64_HI(BXE_SP_MAPPING(sc, stats_comp)); 1498 dmae->comp_val = DMAE_COMP_VAL; 1499 1500 *stats_comp = 0; 1501 bxe_hw_stats_post(sc); 1502 bxe_stats_comp(sc); 1503} 1504 1505/* 1506 * This function will prepare the statistics ramrod data the way 1507 * we will only have to increment the statistics counter and 1508 * send the ramrod each time we have to. 1509 */ 1510static void 1511bxe_prep_fw_stats_req(struct bxe_softc *sc) 1512{ 1513 int i; 1514 int first_queue_query_index; 1515 struct stats_query_header *stats_hdr = &sc->fw_stats_req->hdr; 1516 bus_addr_t cur_data_offset; 1517 struct stats_query_entry *cur_query_entry; 1518 1519 stats_hdr->cmd_num = sc->fw_stats_num; 1520 stats_hdr->drv_stats_counter = 0; 1521 1522 /* 1523 * The storm_counters struct contains the counters of completed 1524 * statistics requests per storm which are incremented by FW 1525 * each time it completes hadning a statistics ramrod. We will 1526 * check these counters in the timer handler and discard a 1527 * (statistics) ramrod completion. 1528 */ 1529 cur_data_offset = (sc->fw_stats_data_mapping + 1530 offsetof(struct bxe_fw_stats_data, storm_counters)); 1531 1532 stats_hdr->stats_counters_addrs.hi = htole32(U64_HI(cur_data_offset)); 1533 stats_hdr->stats_counters_addrs.lo = htole32(U64_LO(cur_data_offset)); 1534 1535 /* 1536 * Prepare the first stats ramrod (will be completed with 1537 * the counters equal to zero) - init counters to somethig different. 1538 */ 1539 memset(&sc->fw_stats_data->storm_counters, 0xff, 1540 sizeof(struct stats_counter)); 1541 1542 /**** Port FW statistics data ****/ 1543 cur_data_offset = (sc->fw_stats_data_mapping + 1544 offsetof(struct bxe_fw_stats_data, port)); 1545 1546 cur_query_entry = &sc->fw_stats_req->query[BXE_PORT_QUERY_IDX]; 1547 1548 cur_query_entry->kind = STATS_TYPE_PORT; 1549 /* For port query index is a DONT CARE */ 1550 cur_query_entry->index = SC_PORT(sc); 1551 /* For port query funcID is a DONT CARE */ 1552 cur_query_entry->funcID = htole16(SC_FUNC(sc)); 1553 cur_query_entry->address.hi = htole32(U64_HI(cur_data_offset)); 1554 cur_query_entry->address.lo = htole32(U64_LO(cur_data_offset)); 1555 1556 /**** PF FW statistics data ****/ 1557 cur_data_offset = (sc->fw_stats_data_mapping + 1558 offsetof(struct bxe_fw_stats_data, pf)); 1559 1560 cur_query_entry = &sc->fw_stats_req->query[BXE_PF_QUERY_IDX]; 1561 1562 cur_query_entry->kind = STATS_TYPE_PF; 1563 /* For PF query index is a DONT CARE */ 1564 cur_query_entry->index = SC_PORT(sc); 1565 cur_query_entry->funcID = htole16(SC_FUNC(sc)); 1566 cur_query_entry->address.hi = htole32(U64_HI(cur_data_offset)); 1567 cur_query_entry->address.lo = htole32(U64_LO(cur_data_offset)); 1568 1569 /**** Clients' queries ****/ 1570 cur_data_offset = (sc->fw_stats_data_mapping + 1571 offsetof(struct bxe_fw_stats_data, queue_stats)); 1572 1573 /* 1574 * First queue query index depends whether FCoE offloaded request will 1575 * be included in the ramrod 1576 */ 1577 first_queue_query_index = (BXE_FIRST_QUEUE_QUERY_IDX - 1); 1578 1579 for (i = 0; i < sc->num_queues; i++) { 1580 cur_query_entry = 1581 &sc->fw_stats_req->query[first_queue_query_index + i]; 1582 1583 cur_query_entry->kind = STATS_TYPE_QUEUE; 1584 cur_query_entry->index = bxe_stats_id(&sc->fp[i]); 1585 cur_query_entry->funcID = htole16(SC_FUNC(sc)); 1586 cur_query_entry->address.hi = htole32(U64_HI(cur_data_offset)); 1587 cur_query_entry->address.lo = htole32(U64_LO(cur_data_offset)); 1588 1589 cur_data_offset += sizeof(struct per_queue_stats); 1590 } 1591} 1592 1593void 1594bxe_stats_init(struct bxe_softc *sc) 1595{ 1596 int /*abs*/port = SC_PORT(sc); 1597 int mb_idx = SC_FW_MB_IDX(sc); 1598 int i; 1599 1600 sc->stats_pending = 0; 1601 sc->executer_idx = 0; 1602 sc->stats_counter = 0; 1603 1604 /* port and func stats for management */ 1605 if (!BXE_NOMCP(sc)) { 1606 sc->port.port_stx = SHMEM_RD(sc, port_mb[port].port_stx); 1607 sc->func_stx = SHMEM_RD(sc, func_mb[mb_idx].fw_mb_param); 1608 } else { 1609 sc->port.port_stx = 0; 1610 sc->func_stx = 0; 1611 } 1612 1613 BLOGD(sc, DBG_STATS, "port_stx 0x%x func_stx 0x%x\n", 1614 sc->port.port_stx, sc->func_stx); 1615 1616 /* pmf should retrieve port statistics from SP on a non-init*/ 1617 if (!sc->stats_init && sc->port.pmf && sc->port.port_stx) { 1618 bxe_stats_handle(sc, STATS_EVENT_PMF); 1619 } 1620 1621 port = SC_PORT(sc); 1622 /* port stats */ 1623 memset(&(sc->port.old_nig_stats), 0, sizeof(struct nig_stats)); 1624 sc->port.old_nig_stats.brb_discard = 1625 REG_RD(sc, NIG_REG_STAT0_BRB_DISCARD + port*0x38); 1626 sc->port.old_nig_stats.brb_truncate = 1627 REG_RD(sc, NIG_REG_STAT0_BRB_TRUNCATE + port*0x38); 1628 if (!CHIP_IS_E3(sc)) { 1629 REG_RD_DMAE(sc, NIG_REG_STAT0_EGRESS_MAC_PKT0 + port*0x50, 1630 &(sc->port.old_nig_stats.egress_mac_pkt0_lo), 2); 1631 REG_RD_DMAE(sc, NIG_REG_STAT0_EGRESS_MAC_PKT1 + port*0x50, 1632 &(sc->port.old_nig_stats.egress_mac_pkt1_lo), 2); 1633 } 1634 1635 /* function stats */ 1636 for (i = 0; i < sc->num_queues; i++) { 1637 memset(&sc->fp[i].old_tclient, 0, sizeof(sc->fp[i].old_tclient)); 1638 memset(&sc->fp[i].old_uclient, 0, sizeof(sc->fp[i].old_uclient)); 1639 memset(&sc->fp[i].old_xclient, 0, sizeof(sc->fp[i].old_xclient)); 1640 if (sc->stats_init) { 1641 memset(&sc->fp[i].eth_q_stats, 0, 1642 sizeof(sc->fp[i].eth_q_stats)); 1643 memset(&sc->fp[i].eth_q_stats_old, 0, 1644 sizeof(sc->fp[i].eth_q_stats_old)); 1645 } 1646 } 1647 1648 /* prepare statistics ramrod data */ 1649 bxe_prep_fw_stats_req(sc); 1650 1651 if (sc->stats_init) { 1652 memset(&sc->net_stats_old, 0, sizeof(sc->net_stats_old)); 1653 memset(&sc->fw_stats_old, 0, sizeof(sc->fw_stats_old)); 1654 memset(&sc->eth_stats_old, 0, sizeof(sc->eth_stats_old)); 1655 memset(&sc->eth_stats, 0, sizeof(sc->eth_stats)); 1656 memset(&sc->func_stats, 0, sizeof(sc->func_stats)); 1657 1658 /* Clean SP from previous statistics */ 1659 if (sc->func_stx) { 1660 memset(BXE_SP(sc, func_stats), 0, sizeof(struct host_func_stats)); 1661 bxe_func_stats_init(sc); 1662 bxe_hw_stats_post(sc); 1663 bxe_stats_comp(sc); 1664 } 1665 } 1666 1667 sc->stats_state = STATS_STATE_DISABLED; 1668 1669 if (sc->port.pmf && sc->port.port_stx) { 1670 bxe_port_stats_base_init(sc); 1671 } 1672 1673 /* mark the end of statistics initializiation */ 1674 sc->stats_init = FALSE; 1675} 1676 1677void 1678bxe_save_statistics(struct bxe_softc *sc) 1679{ 1680 int i; 1681 1682 /* save queue statistics */ 1683 for (i = 0; i < sc->num_queues; i++) { 1684 struct bxe_fastpath *fp = &sc->fp[i]; 1685 struct bxe_eth_q_stats *qstats = &fp->eth_q_stats; 1686 struct bxe_eth_q_stats_old *qstats_old = &fp->eth_q_stats_old; 1687 1688 UPDATE_QSTAT_OLD(total_unicast_bytes_received_hi); 1689 UPDATE_QSTAT_OLD(total_unicast_bytes_received_lo); 1690 UPDATE_QSTAT_OLD(total_broadcast_bytes_received_hi); 1691 UPDATE_QSTAT_OLD(total_broadcast_bytes_received_lo); 1692 UPDATE_QSTAT_OLD(total_multicast_bytes_received_hi); 1693 UPDATE_QSTAT_OLD(total_multicast_bytes_received_lo); 1694 UPDATE_QSTAT_OLD(total_unicast_bytes_transmitted_hi); 1695 UPDATE_QSTAT_OLD(total_unicast_bytes_transmitted_lo); 1696 UPDATE_QSTAT_OLD(total_broadcast_bytes_transmitted_hi); 1697 UPDATE_QSTAT_OLD(total_broadcast_bytes_transmitted_lo); 1698 UPDATE_QSTAT_OLD(total_multicast_bytes_transmitted_hi); 1699 UPDATE_QSTAT_OLD(total_multicast_bytes_transmitted_lo); 1700 UPDATE_QSTAT_OLD(total_tpa_bytes_hi); 1701 UPDATE_QSTAT_OLD(total_tpa_bytes_lo); 1702 } 1703 1704 /* store port firmware statistics */ 1705 if (sc->port.pmf) { 1706 struct bxe_eth_stats *estats = &sc->eth_stats; 1707 struct bxe_fw_port_stats_old *fwstats = &sc->fw_stats_old; 1708 struct host_port_stats *pstats = BXE_SP(sc, port_stats); 1709 1710 fwstats->pfc_frames_rx_hi = pstats->pfc_frames_rx_hi; 1711 fwstats->pfc_frames_rx_lo = pstats->pfc_frames_rx_lo; 1712 fwstats->pfc_frames_tx_hi = pstats->pfc_frames_tx_hi; 1713 fwstats->pfc_frames_tx_lo = pstats->pfc_frames_tx_lo; 1714 1715 if (IS_MF(sc)) { 1716 UPDATE_FW_STAT_OLD(mac_filter_discard); 1717 UPDATE_FW_STAT_OLD(mf_tag_discard); 1718 UPDATE_FW_STAT_OLD(brb_truncate_discard); 1719 UPDATE_FW_STAT_OLD(mac_discard); 1720 } 1721 } 1722} 1723 1724void 1725bxe_afex_collect_stats(struct bxe_softc *sc, 1726 void *void_afex_stats, 1727 uint32_t stats_type) 1728{ 1729 int i; 1730 struct afex_stats *afex_stats = (struct afex_stats *)void_afex_stats; 1731 struct bxe_eth_stats *estats = &sc->eth_stats; 1732 1733 memset(afex_stats, 0, sizeof(struct afex_stats)); 1734 1735 for (i = 0; i < sc->num_queues; i++) { 1736 struct bxe_eth_q_stats *qstats = &sc->fp[i].eth_q_stats; 1737 1738 ADD_64(afex_stats->rx_unicast_bytes_hi, 1739 qstats->total_unicast_bytes_received_hi, 1740 afex_stats->rx_unicast_bytes_lo, 1741 qstats->total_unicast_bytes_received_lo); 1742 1743 ADD_64(afex_stats->rx_broadcast_bytes_hi, 1744 qstats->total_broadcast_bytes_received_hi, 1745 afex_stats->rx_broadcast_bytes_lo, 1746 qstats->total_broadcast_bytes_received_lo); 1747 1748 ADD_64(afex_stats->rx_multicast_bytes_hi, 1749 qstats->total_multicast_bytes_received_hi, 1750 afex_stats->rx_multicast_bytes_lo, 1751 qstats->total_multicast_bytes_received_lo); 1752 1753 ADD_64(afex_stats->rx_unicast_frames_hi, 1754 qstats->total_unicast_packets_received_hi, 1755 afex_stats->rx_unicast_frames_lo, 1756 qstats->total_unicast_packets_received_lo); 1757 1758 ADD_64(afex_stats->rx_broadcast_frames_hi, 1759 qstats->total_broadcast_packets_received_hi, 1760 afex_stats->rx_broadcast_frames_lo, 1761 qstats->total_broadcast_packets_received_lo); 1762 1763 ADD_64(afex_stats->rx_multicast_frames_hi, 1764 qstats->total_multicast_packets_received_hi, 1765 afex_stats->rx_multicast_frames_lo, 1766 qstats->total_multicast_packets_received_lo); 1767 1768 /* 1769 * sum to rx_frames_discarded all discarded 1770 * packets due to size, ttl0 and checksum 1771 */ 1772 ADD_64(afex_stats->rx_frames_discarded_hi, 1773 qstats->total_packets_received_checksum_discarded_hi, 1774 afex_stats->rx_frames_discarded_lo, 1775 qstats->total_packets_received_checksum_discarded_lo); 1776 1777 ADD_64(afex_stats->rx_frames_discarded_hi, 1778 qstats->total_packets_received_ttl0_discarded_hi, 1779 afex_stats->rx_frames_discarded_lo, 1780 qstats->total_packets_received_ttl0_discarded_lo); 1781 1782 ADD_64(afex_stats->rx_frames_discarded_hi, 1783 qstats->etherstatsoverrsizepkts_hi, 1784 afex_stats->rx_frames_discarded_lo, 1785 qstats->etherstatsoverrsizepkts_lo); 1786 1787 ADD_64(afex_stats->rx_frames_dropped_hi, 1788 qstats->no_buff_discard_hi, 1789 afex_stats->rx_frames_dropped_lo, 1790 qstats->no_buff_discard_lo); 1791 1792 ADD_64(afex_stats->tx_unicast_bytes_hi, 1793 qstats->total_unicast_bytes_transmitted_hi, 1794 afex_stats->tx_unicast_bytes_lo, 1795 qstats->total_unicast_bytes_transmitted_lo); 1796 1797 ADD_64(afex_stats->tx_broadcast_bytes_hi, 1798 qstats->total_broadcast_bytes_transmitted_hi, 1799 afex_stats->tx_broadcast_bytes_lo, 1800 qstats->total_broadcast_bytes_transmitted_lo); 1801 1802 ADD_64(afex_stats->tx_multicast_bytes_hi, 1803 qstats->total_multicast_bytes_transmitted_hi, 1804 afex_stats->tx_multicast_bytes_lo, 1805 qstats->total_multicast_bytes_transmitted_lo); 1806 1807 ADD_64(afex_stats->tx_unicast_frames_hi, 1808 qstats->total_unicast_packets_transmitted_hi, 1809 afex_stats->tx_unicast_frames_lo, 1810 qstats->total_unicast_packets_transmitted_lo); 1811 1812 ADD_64(afex_stats->tx_broadcast_frames_hi, 1813 qstats->total_broadcast_packets_transmitted_hi, 1814 afex_stats->tx_broadcast_frames_lo, 1815 qstats->total_broadcast_packets_transmitted_lo); 1816 1817 ADD_64(afex_stats->tx_multicast_frames_hi, 1818 qstats->total_multicast_packets_transmitted_hi, 1819 afex_stats->tx_multicast_frames_lo, 1820 qstats->total_multicast_packets_transmitted_lo); 1821 1822 ADD_64(afex_stats->tx_frames_dropped_hi, 1823 qstats->total_transmitted_dropped_packets_error_hi, 1824 afex_stats->tx_frames_dropped_lo, 1825 qstats->total_transmitted_dropped_packets_error_lo); 1826 } 1827 1828 /* 1829 * If port stats are requested, add them to the PMF 1830 * stats, as anyway they will be accumulated by the 1831 * MCP before sent to the switch 1832 */ 1833 if ((sc->port.pmf) && (stats_type == VICSTATST_UIF_INDEX)) { 1834 ADD_64(afex_stats->rx_frames_dropped_hi, 1835 0, 1836 afex_stats->rx_frames_dropped_lo, 1837 estats->mac_filter_discard); 1838 ADD_64(afex_stats->rx_frames_dropped_hi, 1839 0, 1840 afex_stats->rx_frames_dropped_lo, 1841 estats->brb_truncate_discard); 1842 ADD_64(afex_stats->rx_frames_discarded_hi, 1843 0, 1844 afex_stats->rx_frames_discarded_lo, 1845 estats->mac_discard); 1846 } 1847} 1848 1849