if_bfe.c revision 136804
1119917Swpaul/* 2119917Swpaul * Copyright (c) 2003 Stuart Walsh<stu@ipng.org.uk> 3119917Swpaul * and Duncan Barclay<dmlb@dmlb.org> 4119917Swpaul */ 5119917Swpaul 6119917Swpaul/* 7119917Swpaul * Redistribution and use in source and binary forms, with or without 8119917Swpaul * modification, are permitted provided that the following conditions 9119917Swpaul * are met: 10119917Swpaul * 1. Redistributions of source code must retain the above copyright 11119917Swpaul * notice, this list of conditions and the following disclaimer. 12119917Swpaul * 2. Redistributions in binary form must reproduce the above copyright 13119917Swpaul * notice, this list of conditions and the following disclaimer in the 14119917Swpaul * documentation and/or other materials provided with the distribution. 15119917Swpaul * 16119917Swpaul * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS 'AS IS' AND 17119917Swpaul * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18119917Swpaul * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19119917Swpaul * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20119917Swpaul * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21119917Swpaul * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22119917Swpaul * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23119917Swpaul * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24119917Swpaul * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25119917Swpaul * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26119917Swpaul * SUCH DAMAGE. 27119917Swpaul */ 28119917Swpaul 29119917Swpaul 30119917Swpaul#include <sys/cdefs.h> 31119917Swpaul__FBSDID("$FreeBSD: head/sys/dev/bfe/if_bfe.c 136804 2004-10-23 08:33:10Z mtm $"); 32119917Swpaul 33119917Swpaul#include <sys/param.h> 34119917Swpaul#include <sys/systm.h> 35119917Swpaul#include <sys/sockio.h> 36119917Swpaul#include <sys/mbuf.h> 37119917Swpaul#include <sys/malloc.h> 38119917Swpaul#include <sys/kernel.h> 39129879Sphk#include <sys/module.h> 40119917Swpaul#include <sys/socket.h> 41119917Swpaul#include <sys/queue.h> 42119917Swpaul 43119917Swpaul#include <net/if.h> 44119917Swpaul#include <net/if_arp.h> 45119917Swpaul#include <net/ethernet.h> 46119917Swpaul#include <net/if_dl.h> 47119917Swpaul#include <net/if_media.h> 48119917Swpaul 49119917Swpaul#include <net/bpf.h> 50119917Swpaul 51119917Swpaul#include <net/if_types.h> 52119917Swpaul#include <net/if_vlan_var.h> 53119917Swpaul 54119917Swpaul#include <netinet/in_systm.h> 55119917Swpaul#include <netinet/in.h> 56119917Swpaul#include <netinet/ip.h> 57119917Swpaul 58119917Swpaul#include <machine/clock.h> /* for DELAY */ 59119917Swpaul#include <machine/bus_memio.h> 60119917Swpaul#include <machine/bus.h> 61119917Swpaul#include <machine/resource.h> 62119917Swpaul#include <sys/bus.h> 63119917Swpaul#include <sys/rman.h> 64119917Swpaul 65119917Swpaul#include <dev/mii/mii.h> 66119917Swpaul#include <dev/mii/miivar.h> 67119917Swpaul#include "miidevs.h" 68119917Swpaul 69119917Swpaul#include <dev/pci/pcireg.h> 70119917Swpaul#include <dev/pci/pcivar.h> 71119917Swpaul 72119917Swpaul#include <dev/bfe/if_bfereg.h> 73119917Swpaul 74119917SwpaulMODULE_DEPEND(bfe, pci, 1, 1, 1); 75119917SwpaulMODULE_DEPEND(bfe, ether, 1, 1, 1); 76119917SwpaulMODULE_DEPEND(bfe, miibus, 1, 1, 1); 77119917Swpaul 78119917Swpaul/* "controller miibus0" required. See GENERIC if you get errors here. */ 79119917Swpaul#include "miibus_if.h" 80119917Swpaul 81119917Swpaul#define BFE_DEVDESC_MAX 64 /* Maximum device description length */ 82119917Swpaul 83119917Swpaulstatic struct bfe_type bfe_devs[] = { 84119917Swpaul { BCOM_VENDORID, BCOM_DEVICEID_BCM4401, 85119917Swpaul "Broadcom BCM4401 Fast Ethernet" }, 86134590Sdes { BCOM_VENDORID, BCOM_DEVICEID_BCM4401B0, 87134590Sdes "Broadcom BCM4401-B0 Fast Ethernet" }, 88119917Swpaul { 0, 0, NULL } 89119917Swpaul}; 90119917Swpaul 91119917Swpaulstatic int bfe_probe (device_t); 92119917Swpaulstatic int bfe_attach (device_t); 93119917Swpaulstatic int bfe_detach (device_t); 94119917Swpaulstatic void bfe_release_resources (struct bfe_softc *); 95119917Swpaulstatic void bfe_intr (void *); 96119917Swpaulstatic void bfe_start (struct ifnet *); 97136804Smtmstatic void bfe_start_locked (struct ifnet *); 98119917Swpaulstatic int bfe_ioctl (struct ifnet *, u_long, caddr_t); 99119917Swpaulstatic void bfe_init (void *); 100136804Smtmstatic void bfe_init_locked (void *); 101119917Swpaulstatic void bfe_stop (struct bfe_softc *); 102119917Swpaulstatic void bfe_watchdog (struct ifnet *); 103119917Swpaulstatic void bfe_shutdown (device_t); 104119917Swpaulstatic void bfe_tick (void *); 105119917Swpaulstatic void bfe_txeof (struct bfe_softc *); 106119917Swpaulstatic void bfe_rxeof (struct bfe_softc *); 107119917Swpaulstatic void bfe_set_rx_mode (struct bfe_softc *); 108119917Swpaulstatic int bfe_list_rx_init (struct bfe_softc *); 109119917Swpaulstatic int bfe_list_newbuf (struct bfe_softc *, int, struct mbuf*); 110119917Swpaulstatic void bfe_rx_ring_free (struct bfe_softc *); 111119917Swpaul 112119917Swpaulstatic void bfe_pci_setup (struct bfe_softc *, u_int32_t); 113119917Swpaulstatic int bfe_ifmedia_upd (struct ifnet *); 114119917Swpaulstatic void bfe_ifmedia_sts (struct ifnet *, struct ifmediareq *); 115119917Swpaulstatic int bfe_miibus_readreg (device_t, int, int); 116119917Swpaulstatic int bfe_miibus_writereg (device_t, int, int, int); 117119917Swpaulstatic void bfe_miibus_statchg (device_t); 118133282Sdesstatic int bfe_wait_bit (struct bfe_softc *, u_int32_t, u_int32_t, 119119917Swpaul u_long, const int); 120119917Swpaulstatic void bfe_get_config (struct bfe_softc *sc); 121119917Swpaulstatic void bfe_read_eeprom (struct bfe_softc *, u_int8_t *); 122119917Swpaulstatic void bfe_stats_update (struct bfe_softc *); 123119917Swpaulstatic void bfe_clear_stats (struct bfe_softc *); 124119917Swpaulstatic int bfe_readphy (struct bfe_softc *, u_int32_t, u_int32_t*); 125119917Swpaulstatic int bfe_writephy (struct bfe_softc *, u_int32_t, u_int32_t); 126119917Swpaulstatic int bfe_resetphy (struct bfe_softc *); 127119917Swpaulstatic int bfe_setupphy (struct bfe_softc *); 128119917Swpaulstatic void bfe_chip_reset (struct bfe_softc *); 129119917Swpaulstatic void bfe_chip_halt (struct bfe_softc *); 130119917Swpaulstatic void bfe_core_reset (struct bfe_softc *); 131119917Swpaulstatic void bfe_core_disable (struct bfe_softc *); 132119917Swpaulstatic int bfe_dma_alloc (device_t); 133119917Swpaulstatic void bfe_dma_map_desc (void *, bus_dma_segment_t *, int, int); 134119917Swpaulstatic void bfe_dma_map (void *, bus_dma_segment_t *, int, int); 135119917Swpaulstatic void bfe_cam_write (struct bfe_softc *, u_char *, int); 136119917Swpaul 137119917Swpaulstatic device_method_t bfe_methods[] = { 138119917Swpaul /* Device interface */ 139119917Swpaul DEVMETHOD(device_probe, bfe_probe), 140119917Swpaul DEVMETHOD(device_attach, bfe_attach), 141119917Swpaul DEVMETHOD(device_detach, bfe_detach), 142119917Swpaul DEVMETHOD(device_shutdown, bfe_shutdown), 143119917Swpaul 144119917Swpaul /* bus interface */ 145119917Swpaul DEVMETHOD(bus_print_child, bus_generic_print_child), 146119917Swpaul DEVMETHOD(bus_driver_added, bus_generic_driver_added), 147119917Swpaul 148119917Swpaul /* MII interface */ 149119917Swpaul DEVMETHOD(miibus_readreg, bfe_miibus_readreg), 150119917Swpaul DEVMETHOD(miibus_writereg, bfe_miibus_writereg), 151119917Swpaul DEVMETHOD(miibus_statchg, bfe_miibus_statchg), 152119917Swpaul 153119917Swpaul { 0, 0 } 154119917Swpaul}; 155119917Swpaul 156119917Swpaulstatic driver_t bfe_driver = { 157119917Swpaul "bfe", 158119917Swpaul bfe_methods, 159119917Swpaul sizeof(struct bfe_softc) 160119917Swpaul}; 161119917Swpaul 162119917Swpaulstatic devclass_t bfe_devclass; 163119917Swpaul 164119917SwpaulDRIVER_MODULE(bfe, pci, bfe_driver, bfe_devclass, 0, 0); 165119917SwpaulDRIVER_MODULE(miibus, bfe, miibus_driver, miibus_devclass, 0, 0); 166119917Swpaul 167119917Swpaul/* 168133282Sdes * Probe for a Broadcom 4401 chip. 169119917Swpaul */ 170119917Swpaulstatic int 171119917Swpaulbfe_probe(device_t dev) 172119917Swpaul{ 173119917Swpaul struct bfe_type *t; 174119917Swpaul struct bfe_softc *sc; 175119917Swpaul 176119917Swpaul t = bfe_devs; 177119917Swpaul 178119917Swpaul sc = device_get_softc(dev); 179119917Swpaul bzero(sc, sizeof(struct bfe_softc)); 180119917Swpaul sc->bfe_unit = device_get_unit(dev); 181119917Swpaul sc->bfe_dev = dev; 182119917Swpaul 183119917Swpaul while(t->bfe_name != NULL) { 184119917Swpaul if ((pci_get_vendor(dev) == t->bfe_vid) && 185119917Swpaul (pci_get_device(dev) == t->bfe_did)) { 186119917Swpaul device_set_desc_copy(dev, t->bfe_name); 187133282Sdes return (0); 188119917Swpaul } 189119917Swpaul t++; 190119917Swpaul } 191119917Swpaul 192133282Sdes return (ENXIO); 193119917Swpaul} 194119917Swpaul 195119917Swpaulstatic int 196119917Swpaulbfe_dma_alloc(device_t dev) 197119917Swpaul{ 198119917Swpaul struct bfe_softc *sc; 199119917Swpaul int error, i; 200119917Swpaul 201119917Swpaul sc = device_get_softc(dev); 202119917Swpaul 203119917Swpaul /* parent tag */ 204119917Swpaul error = bus_dma_tag_create(NULL, /* parent */ 205119917Swpaul PAGE_SIZE, 0, /* alignment, boundary */ 206133282Sdes BUS_SPACE_MAXADDR, /* lowaddr */ 207119917Swpaul BUS_SPACE_MAXADDR_32BIT, /* highaddr */ 208119917Swpaul NULL, NULL, /* filter, filterarg */ 209119917Swpaul MAXBSIZE, /* maxsize */ 210119917Swpaul BUS_SPACE_UNRESTRICTED, /* num of segments */ 211119917Swpaul BUS_SPACE_MAXSIZE_32BIT, /* max segment size */ 212119917Swpaul BUS_DMA_ALLOCNOW, /* flags */ 213119917Swpaul NULL, NULL, /* lockfunc, lockarg */ 214119917Swpaul &sc->bfe_parent_tag); 215119917Swpaul 216119917Swpaul /* tag for TX ring */ 217126470Sjulian error = bus_dma_tag_create(sc->bfe_parent_tag, 218126470Sjulian BFE_TX_LIST_SIZE, BFE_TX_LIST_SIZE, 219126470Sjulian BUS_SPACE_MAXADDR, 220133282Sdes BUS_SPACE_MAXADDR, 221126470Sjulian NULL, NULL, 222126470Sjulian BFE_TX_LIST_SIZE, 223126470Sjulian 1, 224126470Sjulian BUS_SPACE_MAXSIZE_32BIT, 225126470Sjulian 0, 226126470Sjulian NULL, NULL, 227126470Sjulian &sc->bfe_tx_tag); 228119917Swpaul 229119917Swpaul if (error) { 230119917Swpaul device_printf(dev, "could not allocate dma tag\n"); 231133282Sdes return (ENOMEM); 232119917Swpaul } 233119917Swpaul 234119917Swpaul /* tag for RX ring */ 235126470Sjulian error = bus_dma_tag_create(sc->bfe_parent_tag, 236126470Sjulian BFE_RX_LIST_SIZE, BFE_RX_LIST_SIZE, 237126470Sjulian BUS_SPACE_MAXADDR, 238126470Sjulian BUS_SPACE_MAXADDR, 239126470Sjulian NULL, NULL, 240126470Sjulian BFE_RX_LIST_SIZE, 241126470Sjulian 1, 242126470Sjulian BUS_SPACE_MAXSIZE_32BIT, 243126470Sjulian 0, 244126470Sjulian NULL, NULL, 245126470Sjulian &sc->bfe_rx_tag); 246119917Swpaul 247119917Swpaul if (error) { 248119917Swpaul device_printf(dev, "could not allocate dma tag\n"); 249133282Sdes return (ENOMEM); 250119917Swpaul } 251119917Swpaul 252119917Swpaul /* tag for mbufs */ 253126470Sjulian error = bus_dma_tag_create(sc->bfe_parent_tag, 254126470Sjulian ETHER_ALIGN, 0, 255126470Sjulian BUS_SPACE_MAXADDR, 256126470Sjulian BUS_SPACE_MAXADDR, 257126470Sjulian NULL, NULL, 258126470Sjulian MCLBYTES, 259126470Sjulian 1, 260126470Sjulian BUS_SPACE_MAXSIZE_32BIT, 261126470Sjulian 0, 262126470Sjulian NULL, NULL, 263126470Sjulian &sc->bfe_tag); 264119917Swpaul 265119917Swpaul if (error) { 266119917Swpaul device_printf(dev, "could not allocate dma tag\n"); 267133282Sdes return (ENOMEM); 268119917Swpaul } 269119917Swpaul 270119917Swpaul /* pre allocate dmamaps for RX list */ 271119917Swpaul for (i = 0; i < BFE_RX_LIST_CNT; i++) { 272126470Sjulian error = bus_dmamap_create(sc->bfe_tag, 0, 273126470Sjulian &sc->bfe_rx_ring[i].bfe_map); 274119917Swpaul if (error) { 275119917Swpaul device_printf(dev, "cannot create DMA map for RX\n"); 276133282Sdes return (ENOMEM); 277119917Swpaul } 278119917Swpaul } 279119917Swpaul 280119917Swpaul /* pre allocate dmamaps for TX list */ 281119917Swpaul for (i = 0; i < BFE_TX_LIST_CNT; i++) { 282126470Sjulian error = bus_dmamap_create(sc->bfe_tag, 0, 283126470Sjulian &sc->bfe_tx_ring[i].bfe_map); 284119917Swpaul if (error) { 285119917Swpaul device_printf(dev, "cannot create DMA map for TX\n"); 286133282Sdes return (ENOMEM); 287119917Swpaul } 288119917Swpaul } 289119917Swpaul 290119917Swpaul /* Alloc dma for rx ring */ 291119917Swpaul error = bus_dmamem_alloc(sc->bfe_rx_tag, (void *)&sc->bfe_rx_list, 292119917Swpaul BUS_DMA_NOWAIT, &sc->bfe_rx_map); 293119917Swpaul 294119917Swpaul if(error) 295133282Sdes return (ENOMEM); 296119917Swpaul 297119917Swpaul bzero(sc->bfe_rx_list, BFE_RX_LIST_SIZE); 298119917Swpaul error = bus_dmamap_load(sc->bfe_rx_tag, sc->bfe_rx_map, 299119917Swpaul sc->bfe_rx_list, sizeof(struct bfe_desc), 300119917Swpaul bfe_dma_map, &sc->bfe_rx_dma, 0); 301119917Swpaul 302119917Swpaul if(error) 303133282Sdes return (ENOMEM); 304119917Swpaul 305119917Swpaul bus_dmamap_sync(sc->bfe_rx_tag, sc->bfe_rx_map, BUS_DMASYNC_PREREAD); 306119917Swpaul 307133282Sdes error = bus_dmamem_alloc(sc->bfe_tx_tag, (void *)&sc->bfe_tx_list, 308119917Swpaul BUS_DMA_NOWAIT, &sc->bfe_tx_map); 309133282Sdes if (error) 310133282Sdes return (ENOMEM); 311119917Swpaul 312119917Swpaul 313133282Sdes error = bus_dmamap_load(sc->bfe_tx_tag, sc->bfe_tx_map, 314133282Sdes sc->bfe_tx_list, sizeof(struct bfe_desc), 315119917Swpaul bfe_dma_map, &sc->bfe_tx_dma, 0); 316119917Swpaul if(error) 317133282Sdes return (ENOMEM); 318119917Swpaul 319119917Swpaul bzero(sc->bfe_tx_list, BFE_TX_LIST_SIZE); 320119917Swpaul bus_dmamap_sync(sc->bfe_tx_tag, sc->bfe_tx_map, BUS_DMASYNC_PREREAD); 321119917Swpaul 322133282Sdes return (0); 323119917Swpaul} 324119917Swpaul 325119917Swpaulstatic int 326119917Swpaulbfe_attach(device_t dev) 327119917Swpaul{ 328119917Swpaul struct ifnet *ifp; 329119917Swpaul struct bfe_softc *sc; 330119917Swpaul int unit, error = 0, rid; 331119917Swpaul 332119917Swpaul sc = device_get_softc(dev); 333119917Swpaul mtx_init(&sc->bfe_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 334136804Smtm MTX_DEF); 335119917Swpaul 336119917Swpaul unit = device_get_unit(dev); 337119917Swpaul sc->bfe_dev = dev; 338119917Swpaul sc->bfe_unit = unit; 339119917Swpaul 340119917Swpaul /* 341119917Swpaul * Handle power management nonsense. 342119917Swpaul */ 343119917Swpaul if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) { 344119917Swpaul u_int32_t membase, irq; 345119917Swpaul 346119917Swpaul /* Save important PCI config data. */ 347119917Swpaul membase = pci_read_config(dev, BFE_PCI_MEMLO, 4); 348119917Swpaul irq = pci_read_config(dev, BFE_PCI_INTLINE, 4); 349119917Swpaul 350119917Swpaul /* Reset the power state. */ 351126470Sjulian printf("bfe%d: chip is is in D%d power mode -- setting to D0\n", 352119917Swpaul sc->bfe_unit, pci_get_powerstate(dev)); 353119917Swpaul 354119917Swpaul pci_set_powerstate(dev, PCI_POWERSTATE_D0); 355119917Swpaul 356119917Swpaul /* Restore PCI config data. */ 357119917Swpaul pci_write_config(dev, BFE_PCI_MEMLO, membase, 4); 358119917Swpaul pci_write_config(dev, BFE_PCI_INTLINE, irq, 4); 359119917Swpaul } 360119917Swpaul 361119917Swpaul /* 362119917Swpaul * Map control/status registers. 363119917Swpaul */ 364119917Swpaul pci_enable_busmaster(dev); 365119917Swpaul 366119917Swpaul rid = BFE_PCI_MEMLO; 367127135Snjl sc->bfe_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 368119917Swpaul RF_ACTIVE); 369119917Swpaul if (sc->bfe_res == NULL) { 370119917Swpaul printf ("bfe%d: couldn't map memory\n", unit); 371119917Swpaul error = ENXIO; 372119917Swpaul goto fail; 373119917Swpaul } 374119917Swpaul 375119917Swpaul sc->bfe_btag = rman_get_bustag(sc->bfe_res); 376119917Swpaul sc->bfe_bhandle = rman_get_bushandle(sc->bfe_res); 377119917Swpaul sc->bfe_vhandle = (vm_offset_t)rman_get_virtual(sc->bfe_res); 378119917Swpaul 379119917Swpaul /* Allocate interrupt */ 380119917Swpaul rid = 0; 381119917Swpaul 382127135Snjl sc->bfe_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 383119917Swpaul RF_SHAREABLE | RF_ACTIVE); 384119917Swpaul if (sc->bfe_irq == NULL) { 385119917Swpaul printf("bfe%d: couldn't map interrupt\n", unit); 386119917Swpaul error = ENXIO; 387119917Swpaul goto fail; 388119917Swpaul } 389119917Swpaul 390119917Swpaul if (bfe_dma_alloc(dev)) { 391126470Sjulian printf("bfe%d: failed to allocate DMA resources\n", 392126470Sjulian sc->bfe_unit); 393119917Swpaul bfe_release_resources(sc); 394119917Swpaul error = ENXIO; 395119917Swpaul goto fail; 396119917Swpaul } 397119917Swpaul 398119917Swpaul /* Set up ifnet structure */ 399119917Swpaul ifp = &sc->arpcom.ac_if; 400119917Swpaul ifp->if_softc = sc; 401121816Sbrooks if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 402119917Swpaul ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 403119917Swpaul ifp->if_ioctl = bfe_ioctl; 404119917Swpaul ifp->if_start = bfe_start; 405119917Swpaul ifp->if_watchdog = bfe_watchdog; 406119917Swpaul ifp->if_init = bfe_init; 407119917Swpaul ifp->if_mtu = ETHERMTU; 408129708Sdes ifp->if_baudrate = 100000000; 409131455Smlaier IFQ_SET_MAXLEN(&ifp->if_snd, BFE_TX_QLEN); 410131455Smlaier ifp->if_snd.ifq_drv_maxlen = BFE_TX_QLEN; 411131455Smlaier IFQ_SET_READY(&ifp->if_snd); 412119917Swpaul 413119917Swpaul bfe_get_config(sc); 414119917Swpaul 415119917Swpaul /* Reset the chip and turn on the PHY */ 416136804Smtm BFE_LOCK(sc); 417119917Swpaul bfe_chip_reset(sc); 418136804Smtm BFE_UNLOCK(sc); 419119917Swpaul 420119917Swpaul if (mii_phy_probe(dev, &sc->bfe_miibus, 421119917Swpaul bfe_ifmedia_upd, bfe_ifmedia_sts)) { 422119917Swpaul printf("bfe%d: MII without any PHY!\n", sc->bfe_unit); 423119917Swpaul error = ENXIO; 424119917Swpaul goto fail; 425119917Swpaul } 426119917Swpaul 427119917Swpaul ether_ifattach(ifp, sc->arpcom.ac_enaddr); 428119917Swpaul callout_handle_init(&sc->bfe_stat_ch); 429119917Swpaul 430119917Swpaul /* 431129708Sdes * Tell the upper layer(s) we support long frames. 432129708Sdes */ 433129708Sdes ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header); 434129708Sdes ifp->if_capabilities |= IFCAP_VLAN_MTU; 435129709Sdes ifp->if_capenable |= IFCAP_VLAN_MTU; 436129708Sdes 437129708Sdes /* 438119917Swpaul * Hook interrupt last to avoid having to lock softc 439119917Swpaul */ 440136804Smtm error = bus_setup_intr(dev, sc->bfe_irq, INTR_TYPE_NET | INTR_MPSAFE, 441119917Swpaul bfe_intr, sc, &sc->bfe_intrhand); 442119917Swpaul 443119917Swpaul if (error) { 444119917Swpaul bfe_release_resources(sc); 445119917Swpaul printf("bfe%d: couldn't set up irq\n", unit); 446119917Swpaul goto fail; 447119917Swpaul } 448119917Swpaulfail: 449119917Swpaul if(error) 450119917Swpaul bfe_release_resources(sc); 451133282Sdes return (error); 452119917Swpaul} 453119917Swpaul 454119917Swpaulstatic int 455119917Swpaulbfe_detach(device_t dev) 456119917Swpaul{ 457119917Swpaul struct bfe_softc *sc; 458119917Swpaul struct ifnet *ifp; 459119917Swpaul 460119917Swpaul sc = device_get_softc(dev); 461119917Swpaul 462119917Swpaul KASSERT(mtx_initialized(&sc->bfe_mtx), ("bfe mutex not initialized")); 463136804Smtm BFE_LOCK(sc); 464119917Swpaul 465119917Swpaul ifp = &sc->arpcom.ac_if; 466119917Swpaul 467119917Swpaul if (device_is_attached(dev)) { 468119917Swpaul bfe_stop(sc); 469119917Swpaul ether_ifdetach(ifp); 470119917Swpaul } 471119917Swpaul 472119917Swpaul bfe_chip_reset(sc); 473119917Swpaul 474119917Swpaul bus_generic_detach(dev); 475119917Swpaul if(sc->bfe_miibus != NULL) 476119917Swpaul device_delete_child(dev, sc->bfe_miibus); 477119917Swpaul 478119917Swpaul bfe_release_resources(sc); 479119917Swpaul BFE_UNLOCK(sc); 480119917Swpaul mtx_destroy(&sc->bfe_mtx); 481119917Swpaul 482133282Sdes return (0); 483119917Swpaul} 484119917Swpaul 485119917Swpaul/* 486119917Swpaul * Stop all chip I/O so that the kernel's probe routines don't 487119917Swpaul * get confused by errant DMAs when rebooting. 488119917Swpaul */ 489119917Swpaulstatic void 490119917Swpaulbfe_shutdown(device_t dev) 491119917Swpaul{ 492119917Swpaul struct bfe_softc *sc; 493119917Swpaul 494119917Swpaul sc = device_get_softc(dev); 495119917Swpaul BFE_LOCK(sc); 496133282Sdes bfe_stop(sc); 497119917Swpaul 498119917Swpaul BFE_UNLOCK(sc); 499119917Swpaul return; 500119917Swpaul} 501119917Swpaul 502119917Swpaulstatic int 503119917Swpaulbfe_miibus_readreg(device_t dev, int phy, int reg) 504119917Swpaul{ 505119917Swpaul struct bfe_softc *sc; 506119917Swpaul u_int32_t ret; 507119917Swpaul 508119917Swpaul sc = device_get_softc(dev); 509119917Swpaul if(phy != sc->bfe_phyaddr) 510133282Sdes return (0); 511119917Swpaul bfe_readphy(sc, reg, &ret); 512119917Swpaul 513133282Sdes return (ret); 514119917Swpaul} 515119917Swpaul 516119917Swpaulstatic int 517119917Swpaulbfe_miibus_writereg(device_t dev, int phy, int reg, int val) 518119917Swpaul{ 519119917Swpaul struct bfe_softc *sc; 520119917Swpaul 521119917Swpaul sc = device_get_softc(dev); 522119917Swpaul if(phy != sc->bfe_phyaddr) 523133282Sdes return (0); 524133282Sdes bfe_writephy(sc, reg, val); 525119917Swpaul 526133282Sdes return (0); 527119917Swpaul} 528119917Swpaul 529119917Swpaulstatic void 530119917Swpaulbfe_miibus_statchg(device_t dev) 531119917Swpaul{ 532119917Swpaul return; 533119917Swpaul} 534119917Swpaul 535119917Swpaulstatic void 536119917Swpaulbfe_tx_ring_free(struct bfe_softc *sc) 537119917Swpaul{ 538126470Sjulian int i; 539133282Sdes 540126470Sjulian for(i = 0; i < BFE_TX_LIST_CNT; i++) { 541126470Sjulian if(sc->bfe_tx_ring[i].bfe_mbuf != NULL) { 542126470Sjulian m_freem(sc->bfe_tx_ring[i].bfe_mbuf); 543126470Sjulian sc->bfe_tx_ring[i].bfe_mbuf = NULL; 544126470Sjulian bus_dmamap_unload(sc->bfe_tag, 545126470Sjulian sc->bfe_tx_ring[i].bfe_map); 546126470Sjulian bus_dmamap_destroy(sc->bfe_tag, 547126470Sjulian sc->bfe_tx_ring[i].bfe_map); 548126470Sjulian } 549126470Sjulian } 550126470Sjulian bzero(sc->bfe_tx_list, BFE_TX_LIST_SIZE); 551126470Sjulian bus_dmamap_sync(sc->bfe_tx_tag, sc->bfe_tx_map, BUS_DMASYNC_PREREAD); 552119917Swpaul} 553119917Swpaul 554119917Swpaulstatic void 555119917Swpaulbfe_rx_ring_free(struct bfe_softc *sc) 556119917Swpaul{ 557119917Swpaul int i; 558119917Swpaul 559119917Swpaul for (i = 0; i < BFE_RX_LIST_CNT; i++) { 560119917Swpaul if (sc->bfe_rx_ring[i].bfe_mbuf != NULL) { 561119917Swpaul m_freem(sc->bfe_rx_ring[i].bfe_mbuf); 562119917Swpaul sc->bfe_rx_ring[i].bfe_mbuf = NULL; 563119917Swpaul bus_dmamap_unload(sc->bfe_tag, 564119917Swpaul sc->bfe_rx_ring[i].bfe_map); 565119917Swpaul bus_dmamap_destroy(sc->bfe_tag, 566119917Swpaul sc->bfe_rx_ring[i].bfe_map); 567119917Swpaul } 568119917Swpaul } 569119917Swpaul bzero(sc->bfe_rx_list, BFE_RX_LIST_SIZE); 570119917Swpaul bus_dmamap_sync(sc->bfe_rx_tag, sc->bfe_rx_map, BUS_DMASYNC_PREREAD); 571119917Swpaul} 572119917Swpaul 573119917Swpaul 574133282Sdesstatic int 575119917Swpaulbfe_list_rx_init(struct bfe_softc *sc) 576119917Swpaul{ 577119917Swpaul int i; 578119917Swpaul 579119917Swpaul for(i = 0; i < BFE_RX_LIST_CNT; i++) { 580133282Sdes if(bfe_list_newbuf(sc, i, NULL) == ENOBUFS) 581133282Sdes return (ENOBUFS); 582119917Swpaul } 583119917Swpaul 584119917Swpaul bus_dmamap_sync(sc->bfe_rx_tag, sc->bfe_rx_map, BUS_DMASYNC_PREREAD); 585119917Swpaul CSR_WRITE_4(sc, BFE_DMARX_PTR, (i * sizeof(struct bfe_desc))); 586119917Swpaul 587119917Swpaul sc->bfe_rx_cons = 0; 588119917Swpaul 589133282Sdes return (0); 590119917Swpaul} 591119917Swpaul 592119917Swpaulstatic int 593119917Swpaulbfe_list_newbuf(struct bfe_softc *sc, int c, struct mbuf *m) 594119917Swpaul{ 595119917Swpaul struct bfe_rxheader *rx_header; 596119917Swpaul struct bfe_desc *d; 597119917Swpaul struct bfe_data *r; 598119917Swpaul u_int32_t ctrl; 599119917Swpaul 600119917Swpaul if ((c < 0) || (c >= BFE_RX_LIST_CNT)) 601133282Sdes return (EINVAL); 602119917Swpaul 603119917Swpaul if(m == NULL) { 604119917Swpaul m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 605119917Swpaul if(m == NULL) 606133282Sdes return (ENOBUFS); 607119917Swpaul m->m_len = m->m_pkthdr.len = MCLBYTES; 608119917Swpaul } 609119917Swpaul else 610119917Swpaul m->m_data = m->m_ext.ext_buf; 611119917Swpaul 612119917Swpaul rx_header = mtod(m, struct bfe_rxheader *); 613119917Swpaul rx_header->len = 0; 614119917Swpaul rx_header->flags = 0; 615119917Swpaul 616119917Swpaul /* Map the mbuf into DMA */ 617119917Swpaul sc->bfe_rx_cnt = c; 618119917Swpaul d = &sc->bfe_rx_list[c]; 619119917Swpaul r = &sc->bfe_rx_ring[c]; 620133282Sdes bus_dmamap_load(sc->bfe_tag, r->bfe_map, mtod(m, void *), 621119917Swpaul MCLBYTES, bfe_dma_map_desc, d, 0); 622119917Swpaul bus_dmamap_sync(sc->bfe_tag, r->bfe_map, BUS_DMASYNC_PREWRITE); 623119917Swpaul 624119917Swpaul ctrl = ETHER_MAX_LEN + 32; 625119917Swpaul 626119917Swpaul if(c == BFE_RX_LIST_CNT - 1) 627119917Swpaul ctrl |= BFE_DESC_EOT; 628119917Swpaul 629119917Swpaul d->bfe_ctrl = ctrl; 630119917Swpaul r->bfe_mbuf = m; 631119917Swpaul bus_dmamap_sync(sc->bfe_rx_tag, sc->bfe_rx_map, BUS_DMASYNC_PREREAD); 632133282Sdes return (0); 633119917Swpaul} 634119917Swpaul 635119917Swpaulstatic void 636119917Swpaulbfe_get_config(struct bfe_softc *sc) 637119917Swpaul{ 638119917Swpaul u_int8_t eeprom[128]; 639119917Swpaul 640119917Swpaul bfe_read_eeprom(sc, eeprom); 641119917Swpaul 642119917Swpaul sc->arpcom.ac_enaddr[0] = eeprom[79]; 643119917Swpaul sc->arpcom.ac_enaddr[1] = eeprom[78]; 644119917Swpaul sc->arpcom.ac_enaddr[2] = eeprom[81]; 645119917Swpaul sc->arpcom.ac_enaddr[3] = eeprom[80]; 646119917Swpaul sc->arpcom.ac_enaddr[4] = eeprom[83]; 647119917Swpaul sc->arpcom.ac_enaddr[5] = eeprom[82]; 648119917Swpaul 649119917Swpaul sc->bfe_phyaddr = eeprom[90] & 0x1f; 650119917Swpaul sc->bfe_mdc_port = (eeprom[90] >> 14) & 0x1; 651119917Swpaul 652133282Sdes sc->bfe_core_unit = 0; 653119917Swpaul sc->bfe_dma_offset = BFE_PCI_DMA; 654119917Swpaul} 655119917Swpaul 656119917Swpaulstatic void 657119917Swpaulbfe_pci_setup(struct bfe_softc *sc, u_int32_t cores) 658119917Swpaul{ 659119917Swpaul u_int32_t bar_orig, pci_rev, val; 660119917Swpaul 661119917Swpaul bar_orig = pci_read_config(sc->bfe_dev, BFE_BAR0_WIN, 4); 662119917Swpaul pci_write_config(sc->bfe_dev, BFE_BAR0_WIN, BFE_REG_PCI, 4); 663119917Swpaul pci_rev = CSR_READ_4(sc, BFE_SBIDHIGH) & BFE_RC_MASK; 664119917Swpaul 665119917Swpaul val = CSR_READ_4(sc, BFE_SBINTVEC); 666119917Swpaul val |= cores; 667119917Swpaul CSR_WRITE_4(sc, BFE_SBINTVEC, val); 668119917Swpaul 669119917Swpaul val = CSR_READ_4(sc, BFE_SSB_PCI_TRANS_2); 670119917Swpaul val |= BFE_SSB_PCI_PREF | BFE_SSB_PCI_BURST; 671119917Swpaul CSR_WRITE_4(sc, BFE_SSB_PCI_TRANS_2, val); 672119917Swpaul 673119917Swpaul pci_write_config(sc->bfe_dev, BFE_BAR0_WIN, bar_orig, 4); 674119917Swpaul} 675119917Swpaul 676133282Sdesstatic void 677119917Swpaulbfe_clear_stats(struct bfe_softc *sc) 678119917Swpaul{ 679119917Swpaul u_long reg; 680119917Swpaul 681136804Smtm BFE_LOCK_ASSERT(sc); 682119917Swpaul 683119917Swpaul CSR_WRITE_4(sc, BFE_MIB_CTRL, BFE_MIB_CLR_ON_READ); 684119917Swpaul for (reg = BFE_TX_GOOD_O; reg <= BFE_TX_PAUSE; reg += 4) 685119917Swpaul CSR_READ_4(sc, reg); 686119917Swpaul for (reg = BFE_RX_GOOD_O; reg <= BFE_RX_NPAUSE; reg += 4) 687119917Swpaul CSR_READ_4(sc, reg); 688119917Swpaul} 689119917Swpaul 690133282Sdesstatic int 691119917Swpaulbfe_resetphy(struct bfe_softc *sc) 692119917Swpaul{ 693119917Swpaul u_int32_t val; 694119917Swpaul 695119917Swpaul bfe_writephy(sc, 0, BMCR_RESET); 696119917Swpaul DELAY(100); 697119917Swpaul bfe_readphy(sc, 0, &val); 698119917Swpaul if (val & BMCR_RESET) { 699119917Swpaul printf("bfe%d: PHY Reset would not complete.\n", sc->bfe_unit); 700133282Sdes return (ENXIO); 701119917Swpaul } 702133282Sdes return (0); 703119917Swpaul} 704119917Swpaul 705119917Swpaulstatic void 706119917Swpaulbfe_chip_halt(struct bfe_softc *sc) 707119917Swpaul{ 708136804Smtm BFE_LOCK_ASSERT(sc); 709119917Swpaul /* disable interrupts - not that it actually does..*/ 710119917Swpaul CSR_WRITE_4(sc, BFE_IMASK, 0); 711119917Swpaul CSR_READ_4(sc, BFE_IMASK); 712119917Swpaul 713119917Swpaul CSR_WRITE_4(sc, BFE_ENET_CTRL, BFE_ENET_DISABLE); 714119917Swpaul bfe_wait_bit(sc, BFE_ENET_CTRL, BFE_ENET_DISABLE, 200, 1); 715119917Swpaul 716119917Swpaul CSR_WRITE_4(sc, BFE_DMARX_CTRL, 0); 717119917Swpaul CSR_WRITE_4(sc, BFE_DMATX_CTRL, 0); 718119917Swpaul DELAY(10); 719119917Swpaul} 720119917Swpaul 721119917Swpaulstatic void 722119917Swpaulbfe_chip_reset(struct bfe_softc *sc) 723119917Swpaul{ 724133282Sdes u_int32_t val; 725119917Swpaul 726136804Smtm BFE_LOCK_ASSERT(sc); 727119917Swpaul 728119917Swpaul /* Set the interrupt vector for the enet core */ 729119917Swpaul bfe_pci_setup(sc, BFE_INTVEC_ENET0); 730119917Swpaul 731119917Swpaul /* is core up? */ 732126470Sjulian val = CSR_READ_4(sc, BFE_SBTMSLOW) & 733126470Sjulian (BFE_RESET | BFE_REJECT | BFE_CLOCK); 734119917Swpaul if (val == BFE_CLOCK) { 735119917Swpaul /* It is, so shut it down */ 736119917Swpaul CSR_WRITE_4(sc, BFE_RCV_LAZY, 0); 737119917Swpaul CSR_WRITE_4(sc, BFE_ENET_CTRL, BFE_ENET_DISABLE); 738119917Swpaul bfe_wait_bit(sc, BFE_ENET_CTRL, BFE_ENET_DISABLE, 100, 1); 739119917Swpaul CSR_WRITE_4(sc, BFE_DMATX_CTRL, 0); 740119917Swpaul sc->bfe_tx_cnt = sc->bfe_tx_prod = sc->bfe_tx_cons = 0; 741133282Sdes if (CSR_READ_4(sc, BFE_DMARX_STAT) & BFE_STAT_EMASK) 742126470Sjulian bfe_wait_bit(sc, BFE_DMARX_STAT, BFE_STAT_SIDLE, 743126470Sjulian 100, 0); 744119917Swpaul CSR_WRITE_4(sc, BFE_DMARX_CTRL, 0); 745119917Swpaul sc->bfe_rx_prod = sc->bfe_rx_cons = 0; 746119917Swpaul } 747119917Swpaul 748119917Swpaul bfe_core_reset(sc); 749119917Swpaul bfe_clear_stats(sc); 750119917Swpaul 751119917Swpaul /* 752119917Swpaul * We want the phy registers to be accessible even when 753119917Swpaul * the driver is "downed" so initialize MDC preamble, frequency, 754119917Swpaul * and whether internal or external phy here. 755119917Swpaul */ 756119917Swpaul 757119917Swpaul /* 4402 has 62.5Mhz SB clock and internal phy */ 758119917Swpaul CSR_WRITE_4(sc, BFE_MDIO_CTRL, 0x8d); 759119917Swpaul 760119917Swpaul /* Internal or external PHY? */ 761119917Swpaul val = CSR_READ_4(sc, BFE_DEVCTRL); 762133282Sdes if(!(val & BFE_IPP)) 763119917Swpaul CSR_WRITE_4(sc, BFE_ENET_CTRL, BFE_ENET_EPSEL); 764119917Swpaul else if(CSR_READ_4(sc, BFE_DEVCTRL) & BFE_EPR) { 765119917Swpaul BFE_AND(sc, BFE_DEVCTRL, ~BFE_EPR); 766119917Swpaul DELAY(100); 767119917Swpaul } 768119917Swpaul 769133282Sdes /* Enable CRC32 generation and set proper LED modes */ 770133282Sdes BFE_OR(sc, BFE_MAC_CTRL, BFE_CTRL_CRC32_ENAB | BFE_CTRL_LED); 771129602Sdmlb 772133282Sdes /* Reset or clear powerdown control bit */ 773133282Sdes BFE_AND(sc, BFE_MAC_CTRL, ~BFE_CTRL_PDOWN); 774129602Sdmlb 775133282Sdes CSR_WRITE_4(sc, BFE_RCV_LAZY, ((1 << BFE_LAZY_FC_SHIFT) & 776119917Swpaul BFE_LAZY_FC_MASK)); 777119917Swpaul 778133282Sdes /* 779126470Sjulian * We don't want lazy interrupts, so just send them at 780133282Sdes * the end of a frame, please 781119917Swpaul */ 782119917Swpaul BFE_OR(sc, BFE_RCV_LAZY, 0); 783119917Swpaul 784119917Swpaul /* Set max lengths, accounting for VLAN tags */ 785119917Swpaul CSR_WRITE_4(sc, BFE_RXMAXLEN, ETHER_MAX_LEN+32); 786119917Swpaul CSR_WRITE_4(sc, BFE_TXMAXLEN, ETHER_MAX_LEN+32); 787119917Swpaul 788119917Swpaul /* Set watermark XXX - magic */ 789119917Swpaul CSR_WRITE_4(sc, BFE_TX_WMARK, 56); 790119917Swpaul 791133282Sdes /* 792126470Sjulian * Initialise DMA channels 793133282Sdes * - not forgetting dma addresses need to be added to BFE_PCI_DMA 794119917Swpaul */ 795119917Swpaul CSR_WRITE_4(sc, BFE_DMATX_CTRL, BFE_TX_CTRL_ENABLE); 796119917Swpaul CSR_WRITE_4(sc, BFE_DMATX_ADDR, sc->bfe_tx_dma + BFE_PCI_DMA); 797119917Swpaul 798133282Sdes CSR_WRITE_4(sc, BFE_DMARX_CTRL, (BFE_RX_OFFSET << BFE_RX_CTRL_ROSHIFT) | 799119917Swpaul BFE_RX_CTRL_ENABLE); 800119917Swpaul CSR_WRITE_4(sc, BFE_DMARX_ADDR, sc->bfe_rx_dma + BFE_PCI_DMA); 801119917Swpaul 802119917Swpaul bfe_resetphy(sc); 803119917Swpaul bfe_setupphy(sc); 804119917Swpaul} 805119917Swpaul 806119917Swpaulstatic void 807119917Swpaulbfe_core_disable(struct bfe_softc *sc) 808119917Swpaul{ 809119917Swpaul if((CSR_READ_4(sc, BFE_SBTMSLOW)) & BFE_RESET) 810119917Swpaul return; 811119917Swpaul 812133282Sdes /* 813126470Sjulian * Set reject, wait for it set, then wait for the core to stop 814126470Sjulian * being busy, then set reset and reject and enable the clocks. 815119917Swpaul */ 816119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSLOW, (BFE_REJECT | BFE_CLOCK)); 817119917Swpaul bfe_wait_bit(sc, BFE_SBTMSLOW, BFE_REJECT, 1000, 0); 818119917Swpaul bfe_wait_bit(sc, BFE_SBTMSHIGH, BFE_BUSY, 1000, 1); 819119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSLOW, (BFE_FGC | BFE_CLOCK | BFE_REJECT | 820119917Swpaul BFE_RESET)); 821119917Swpaul CSR_READ_4(sc, BFE_SBTMSLOW); 822119917Swpaul DELAY(10); 823119917Swpaul /* Leave reset and reject set */ 824119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSLOW, (BFE_REJECT | BFE_RESET)); 825119917Swpaul DELAY(10); 826119917Swpaul} 827119917Swpaul 828119917Swpaulstatic void 829119917Swpaulbfe_core_reset(struct bfe_softc *sc) 830119917Swpaul{ 831119917Swpaul u_int32_t val; 832119917Swpaul 833119917Swpaul /* Disable the core */ 834119917Swpaul bfe_core_disable(sc); 835119917Swpaul 836119917Swpaul /* and bring it back up */ 837119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSLOW, (BFE_RESET | BFE_CLOCK | BFE_FGC)); 838119917Swpaul CSR_READ_4(sc, BFE_SBTMSLOW); 839119917Swpaul DELAY(10); 840119917Swpaul 841119917Swpaul /* Chip bug, clear SERR, IB and TO if they are set. */ 842119917Swpaul if (CSR_READ_4(sc, BFE_SBTMSHIGH) & BFE_SERR) 843119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSHIGH, 0); 844119917Swpaul val = CSR_READ_4(sc, BFE_SBIMSTATE); 845119917Swpaul if (val & (BFE_IBE | BFE_TO)) 846119917Swpaul CSR_WRITE_4(sc, BFE_SBIMSTATE, val & ~(BFE_IBE | BFE_TO)); 847119917Swpaul 848119917Swpaul /* Clear reset and allow it to move through the core */ 849119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSLOW, (BFE_CLOCK | BFE_FGC)); 850119917Swpaul CSR_READ_4(sc, BFE_SBTMSLOW); 851119917Swpaul DELAY(10); 852119917Swpaul 853119917Swpaul /* Leave the clock set */ 854119917Swpaul CSR_WRITE_4(sc, BFE_SBTMSLOW, BFE_CLOCK); 855119917Swpaul CSR_READ_4(sc, BFE_SBTMSLOW); 856119917Swpaul DELAY(10); 857119917Swpaul} 858119917Swpaul 859133282Sdesstatic void 860119917Swpaulbfe_cam_write(struct bfe_softc *sc, u_char *data, int index) 861119917Swpaul{ 862119917Swpaul u_int32_t val; 863119917Swpaul 864119917Swpaul val = ((u_int32_t) data[2]) << 24; 865119917Swpaul val |= ((u_int32_t) data[3]) << 16; 866119917Swpaul val |= ((u_int32_t) data[4]) << 8; 867119917Swpaul val |= ((u_int32_t) data[5]); 868119917Swpaul CSR_WRITE_4(sc, BFE_CAM_DATA_LO, val); 869119917Swpaul val = (BFE_CAM_HI_VALID | 870119917Swpaul (((u_int32_t) data[0]) << 8) | 871119917Swpaul (((u_int32_t) data[1]))); 872119917Swpaul CSR_WRITE_4(sc, BFE_CAM_DATA_HI, val); 873119917Swpaul CSR_WRITE_4(sc, BFE_CAM_CTRL, (BFE_CAM_WRITE | 874129602Sdmlb ((u_int32_t) index << BFE_CAM_INDEX_SHIFT))); 875119917Swpaul bfe_wait_bit(sc, BFE_CAM_CTRL, BFE_CAM_BUSY, 10000, 1); 876119917Swpaul} 877119917Swpaul 878133282Sdesstatic void 879119917Swpaulbfe_set_rx_mode(struct bfe_softc *sc) 880119917Swpaul{ 881119917Swpaul struct ifnet *ifp = &sc->arpcom.ac_if; 882119917Swpaul struct ifmultiaddr *ifma; 883119917Swpaul u_int32_t val; 884119917Swpaul int i = 0; 885119917Swpaul 886119917Swpaul val = CSR_READ_4(sc, BFE_RXCONF); 887119917Swpaul 888119917Swpaul if (ifp->if_flags & IFF_PROMISC) 889119917Swpaul val |= BFE_RXCONF_PROMISC; 890119917Swpaul else 891119917Swpaul val &= ~BFE_RXCONF_PROMISC; 892119917Swpaul 893119917Swpaul if (ifp->if_flags & IFF_BROADCAST) 894119917Swpaul val &= ~BFE_RXCONF_DBCAST; 895119917Swpaul else 896119917Swpaul val |= BFE_RXCONF_DBCAST; 897119917Swpaul 898119917Swpaul 899119917Swpaul CSR_WRITE_4(sc, BFE_CAM_CTRL, 0); 900119917Swpaul bfe_cam_write(sc, sc->arpcom.ac_enaddr, i++); 901119917Swpaul 902119917Swpaul if (ifp->if_flags & IFF_ALLMULTI) 903119917Swpaul val |= BFE_RXCONF_ALLMULTI; 904119917Swpaul else { 905119917Swpaul val &= ~BFE_RXCONF_ALLMULTI; 906119917Swpaul TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 907119917Swpaul if (ifma->ifma_addr->sa_family != AF_LINK) 908119917Swpaul continue; 909126470Sjulian bfe_cam_write(sc, 910126470Sjulian LLADDR((struct sockaddr_dl *)ifma->ifma_addr), i++); 911119917Swpaul } 912119917Swpaul } 913119917Swpaul 914119917Swpaul CSR_WRITE_4(sc, BFE_RXCONF, val); 915119917Swpaul BFE_OR(sc, BFE_CAM_CTRL, BFE_CAM_ENABLE); 916119917Swpaul} 917119917Swpaul 918119917Swpaulstatic void 919119917Swpaulbfe_dma_map(void *arg, bus_dma_segment_t *segs, int nseg, int error) 920119917Swpaul{ 921119917Swpaul u_int32_t *ptr; 922119917Swpaul 923119917Swpaul ptr = arg; 924119917Swpaul *ptr = segs->ds_addr; 925119917Swpaul} 926119917Swpaul 927119917Swpaulstatic void 928119917Swpaulbfe_dma_map_desc(void *arg, bus_dma_segment_t *segs, int nseg, int error) 929119917Swpaul{ 930119917Swpaul struct bfe_desc *d; 931119917Swpaul 932119917Swpaul d = arg; 933119917Swpaul /* The chip needs all addresses to be added to BFE_PCI_DMA */ 934119917Swpaul d->bfe_addr = segs->ds_addr + BFE_PCI_DMA; 935119917Swpaul} 936119917Swpaul 937119917Swpaulstatic void 938119917Swpaulbfe_release_resources(struct bfe_softc *sc) 939119917Swpaul{ 940119917Swpaul device_t dev; 941119917Swpaul int i; 942119917Swpaul 943119917Swpaul dev = sc->bfe_dev; 944119917Swpaul 945119917Swpaul if (sc->bfe_vpd_prodname != NULL) 946119917Swpaul free(sc->bfe_vpd_prodname, M_DEVBUF); 947119917Swpaul 948119917Swpaul if (sc->bfe_vpd_readonly != NULL) 949119917Swpaul free(sc->bfe_vpd_readonly, M_DEVBUF); 950119917Swpaul 951119917Swpaul if (sc->bfe_intrhand != NULL) 952119917Swpaul bus_teardown_intr(dev, sc->bfe_irq, sc->bfe_intrhand); 953119917Swpaul 954119917Swpaul if (sc->bfe_irq != NULL) 955119917Swpaul bus_release_resource(dev, SYS_RES_IRQ, 0, sc->bfe_irq); 956119917Swpaul 957119917Swpaul if (sc->bfe_res != NULL) 958119917Swpaul bus_release_resource(dev, SYS_RES_MEMORY, 0x10, sc->bfe_res); 959119917Swpaul 960119917Swpaul if(sc->bfe_tx_tag != NULL) { 961119917Swpaul bus_dmamap_unload(sc->bfe_tx_tag, sc->bfe_tx_map); 962126470Sjulian bus_dmamem_free(sc->bfe_tx_tag, sc->bfe_tx_list, 963126470Sjulian sc->bfe_tx_map); 964119917Swpaul bus_dma_tag_destroy(sc->bfe_tx_tag); 965119917Swpaul sc->bfe_tx_tag = NULL; 966119917Swpaul } 967119917Swpaul 968119917Swpaul if(sc->bfe_rx_tag != NULL) { 969119917Swpaul bus_dmamap_unload(sc->bfe_rx_tag, sc->bfe_rx_map); 970126470Sjulian bus_dmamem_free(sc->bfe_rx_tag, sc->bfe_rx_list, 971126470Sjulian sc->bfe_rx_map); 972119917Swpaul bus_dma_tag_destroy(sc->bfe_rx_tag); 973119917Swpaul sc->bfe_rx_tag = NULL; 974119917Swpaul } 975119917Swpaul 976119917Swpaul if(sc->bfe_tag != NULL) { 977119917Swpaul for(i = 0; i < BFE_TX_LIST_CNT; i++) { 978126470Sjulian bus_dmamap_destroy(sc->bfe_tag, 979126470Sjulian sc->bfe_tx_ring[i].bfe_map); 980119917Swpaul } 981119917Swpaul bus_dma_tag_destroy(sc->bfe_tag); 982126470Sjulian sc->bfe_tag = NULL; 983119917Swpaul } 984119917Swpaul 985119917Swpaul if(sc->bfe_parent_tag != NULL) 986119917Swpaul bus_dma_tag_destroy(sc->bfe_parent_tag); 987119917Swpaul 988119917Swpaul return; 989119917Swpaul} 990119917Swpaul 991119917Swpaulstatic void 992119917Swpaulbfe_read_eeprom(struct bfe_softc *sc, u_int8_t *data) 993119917Swpaul{ 994119917Swpaul long i; 995119917Swpaul u_int16_t *ptr = (u_int16_t *)data; 996119917Swpaul 997119917Swpaul for(i = 0; i < 128; i += 2) 998119917Swpaul ptr[i/2] = CSR_READ_4(sc, 4096 + i); 999119917Swpaul} 1000119917Swpaul 1001119917Swpaulstatic int 1002133282Sdesbfe_wait_bit(struct bfe_softc *sc, u_int32_t reg, u_int32_t bit, 1003119917Swpaul u_long timeout, const int clear) 1004119917Swpaul{ 1005119917Swpaul u_long i; 1006119917Swpaul 1007119917Swpaul for (i = 0; i < timeout; i++) { 1008119917Swpaul u_int32_t val = CSR_READ_4(sc, reg); 1009119917Swpaul 1010119917Swpaul if (clear && !(val & bit)) 1011119917Swpaul break; 1012119917Swpaul if (!clear && (val & bit)) 1013119917Swpaul break; 1014119917Swpaul DELAY(10); 1015119917Swpaul } 1016119917Swpaul if (i == timeout) { 1017119917Swpaul printf("bfe%d: BUG! Timeout waiting for bit %08x of register " 1018133282Sdes "%x to %s.\n", sc->bfe_unit, bit, reg, 1019119917Swpaul (clear ? "clear" : "set")); 1020133282Sdes return (-1); 1021119917Swpaul } 1022133282Sdes return (0); 1023119917Swpaul} 1024119917Swpaul 1025119917Swpaulstatic int 1026119917Swpaulbfe_readphy(struct bfe_softc *sc, u_int32_t reg, u_int32_t *val) 1027119917Swpaul{ 1028133282Sdes int err; 1029119917Swpaul 1030119917Swpaul /* Clear MII ISR */ 1031119917Swpaul CSR_WRITE_4(sc, BFE_EMAC_ISTAT, BFE_EMAC_INT_MII); 1032119917Swpaul CSR_WRITE_4(sc, BFE_MDIO_DATA, (BFE_MDIO_SB_START | 1033119917Swpaul (BFE_MDIO_OP_READ << BFE_MDIO_OP_SHIFT) | 1034119917Swpaul (sc->bfe_phyaddr << BFE_MDIO_PMD_SHIFT) | 1035119917Swpaul (reg << BFE_MDIO_RA_SHIFT) | 1036119917Swpaul (BFE_MDIO_TA_VALID << BFE_MDIO_TA_SHIFT))); 1037119917Swpaul err = bfe_wait_bit(sc, BFE_EMAC_ISTAT, BFE_EMAC_INT_MII, 100, 0); 1038119917Swpaul *val = CSR_READ_4(sc, BFE_MDIO_DATA) & BFE_MDIO_DATA_DATA; 1039119917Swpaul 1040133282Sdes return (err); 1041119917Swpaul} 1042119917Swpaul 1043119917Swpaulstatic int 1044119917Swpaulbfe_writephy(struct bfe_softc *sc, u_int32_t reg, u_int32_t val) 1045119917Swpaul{ 1046119917Swpaul int status; 1047119917Swpaul 1048119917Swpaul CSR_WRITE_4(sc, BFE_EMAC_ISTAT, BFE_EMAC_INT_MII); 1049119917Swpaul CSR_WRITE_4(sc, BFE_MDIO_DATA, (BFE_MDIO_SB_START | 1050119917Swpaul (BFE_MDIO_OP_WRITE << BFE_MDIO_OP_SHIFT) | 1051119917Swpaul (sc->bfe_phyaddr << BFE_MDIO_PMD_SHIFT) | 1052119917Swpaul (reg << BFE_MDIO_RA_SHIFT) | 1053119917Swpaul (BFE_MDIO_TA_VALID << BFE_MDIO_TA_SHIFT) | 1054119917Swpaul (val & BFE_MDIO_DATA_DATA))); 1055119917Swpaul status = bfe_wait_bit(sc, BFE_EMAC_ISTAT, BFE_EMAC_INT_MII, 100, 0); 1056119917Swpaul 1057133282Sdes return (status); 1058119917Swpaul} 1059119917Swpaul 1060133282Sdes/* 1061119917Swpaul * XXX - I think this is handled by the PHY driver, but it can't hurt to do it 1062119917Swpaul * twice 1063119917Swpaul */ 1064119917Swpaulstatic int 1065119917Swpaulbfe_setupphy(struct bfe_softc *sc) 1066119917Swpaul{ 1067119917Swpaul u_int32_t val; 1068119917Swpaul 1069119917Swpaul /* Enable activity LED */ 1070119917Swpaul bfe_readphy(sc, 26, &val); 1071133282Sdes bfe_writephy(sc, 26, val & 0x7fff); 1072119917Swpaul bfe_readphy(sc, 26, &val); 1073119917Swpaul 1074119917Swpaul /* Enable traffic meter LED mode */ 1075119917Swpaul bfe_readphy(sc, 27, &val); 1076119917Swpaul bfe_writephy(sc, 27, val | (1 << 6)); 1077119917Swpaul 1078133282Sdes return (0); 1079119917Swpaul} 1080119917Swpaul 1081133282Sdesstatic void 1082119917Swpaulbfe_stats_update(struct bfe_softc *sc) 1083119917Swpaul{ 1084119917Swpaul u_long reg; 1085119917Swpaul u_int32_t *val; 1086119917Swpaul 1087119917Swpaul val = &sc->bfe_hwstats.tx_good_octets; 1088119917Swpaul for (reg = BFE_TX_GOOD_O; reg <= BFE_TX_PAUSE; reg += 4) { 1089119917Swpaul *val++ += CSR_READ_4(sc, reg); 1090119917Swpaul } 1091119917Swpaul val = &sc->bfe_hwstats.rx_good_octets; 1092119917Swpaul for (reg = BFE_RX_GOOD_O; reg <= BFE_RX_NPAUSE; reg += 4) { 1093119917Swpaul *val++ += CSR_READ_4(sc, reg); 1094119917Swpaul } 1095119917Swpaul} 1096119917Swpaul 1097119917Swpaulstatic void 1098119917Swpaulbfe_txeof(struct bfe_softc *sc) 1099119917Swpaul{ 1100119917Swpaul struct ifnet *ifp; 1101119917Swpaul int i, chipidx; 1102119917Swpaul 1103136804Smtm BFE_LOCK_ASSERT(sc); 1104119917Swpaul 1105119917Swpaul ifp = &sc->arpcom.ac_if; 1106119917Swpaul 1107119917Swpaul chipidx = CSR_READ_4(sc, BFE_DMATX_STAT) & BFE_STAT_CDMASK; 1108119917Swpaul chipidx /= sizeof(struct bfe_desc); 1109119917Swpaul 1110126470Sjulian i = sc->bfe_tx_cons; 1111119917Swpaul /* Go through the mbufs and free those that have been transmitted */ 1112126470Sjulian while(i != chipidx) { 1113119917Swpaul struct bfe_data *r = &sc->bfe_tx_ring[i]; 1114119917Swpaul if(r->bfe_mbuf != NULL) { 1115119917Swpaul ifp->if_opackets++; 1116119917Swpaul m_freem(r->bfe_mbuf); 1117119917Swpaul r->bfe_mbuf = NULL; 1118119917Swpaul bus_dmamap_unload(sc->bfe_tag, r->bfe_map); 1119119917Swpaul } 1120126470Sjulian sc->bfe_tx_cnt--; 1121126470Sjulian BFE_INC(i, BFE_TX_LIST_CNT); 1122119917Swpaul } 1123119917Swpaul 1124119917Swpaul if(i != sc->bfe_tx_cons) { 1125119917Swpaul /* we freed up some mbufs */ 1126119917Swpaul sc->bfe_tx_cons = i; 1127119917Swpaul ifp->if_flags &= ~IFF_OACTIVE; 1128119917Swpaul } 1129119917Swpaul if(sc->bfe_tx_cnt == 0) 1130119917Swpaul ifp->if_timer = 0; 1131119917Swpaul else 1132119917Swpaul ifp->if_timer = 5; 1133119917Swpaul} 1134119917Swpaul 1135119917Swpaul/* Pass a received packet up the stack */ 1136119917Swpaulstatic void 1137119917Swpaulbfe_rxeof(struct bfe_softc *sc) 1138119917Swpaul{ 1139119917Swpaul struct mbuf *m; 1140119917Swpaul struct ifnet *ifp; 1141119917Swpaul struct bfe_rxheader *rxheader; 1142119917Swpaul struct bfe_data *r; 1143119917Swpaul int cons; 1144119917Swpaul u_int32_t status, current, len, flags; 1145119917Swpaul 1146136804Smtm BFE_LOCK_ASSERT(sc); 1147119917Swpaul cons = sc->bfe_rx_cons; 1148119917Swpaul status = CSR_READ_4(sc, BFE_DMARX_STAT); 1149119917Swpaul current = (status & BFE_STAT_CDMASK) / sizeof(struct bfe_desc); 1150119917Swpaul 1151119917Swpaul ifp = &sc->arpcom.ac_if; 1152119917Swpaul 1153119917Swpaul while(current != cons) { 1154119917Swpaul r = &sc->bfe_rx_ring[cons]; 1155119917Swpaul m = r->bfe_mbuf; 1156119917Swpaul rxheader = mtod(m, struct bfe_rxheader*); 1157119917Swpaul bus_dmamap_sync(sc->bfe_tag, r->bfe_map, BUS_DMASYNC_POSTWRITE); 1158119917Swpaul len = rxheader->len; 1159119917Swpaul r->bfe_mbuf = NULL; 1160119917Swpaul 1161119917Swpaul bus_dmamap_unload(sc->bfe_tag, r->bfe_map); 1162119917Swpaul flags = rxheader->flags; 1163119917Swpaul 1164119917Swpaul len -= ETHER_CRC_LEN; 1165119917Swpaul 1166119917Swpaul /* flag an error and try again */ 1167119917Swpaul if ((len > ETHER_MAX_LEN+32) || (flags & BFE_RX_FLAG_ERRORS)) { 1168119917Swpaul ifp->if_ierrors++; 1169119917Swpaul if (flags & BFE_RX_FLAG_SERR) 1170119917Swpaul ifp->if_collisions++; 1171119917Swpaul bfe_list_newbuf(sc, cons, m); 1172126473Sjulian BFE_INC(cons, BFE_RX_LIST_CNT); 1173119917Swpaul continue; 1174119917Swpaul } 1175119917Swpaul 1176119917Swpaul /* Go past the rx header */ 1177119917Swpaul if (bfe_list_newbuf(sc, cons, NULL) == 0) { 1178119917Swpaul m_adj(m, BFE_RX_OFFSET); 1179119917Swpaul m->m_len = m->m_pkthdr.len = len; 1180119917Swpaul } else { 1181119917Swpaul bfe_list_newbuf(sc, cons, m); 1182119917Swpaul ifp->if_ierrors++; 1183126473Sjulian BFE_INC(cons, BFE_RX_LIST_CNT); 1184119917Swpaul continue; 1185119917Swpaul } 1186119917Swpaul 1187119917Swpaul ifp->if_ipackets++; 1188119917Swpaul m->m_pkthdr.rcvif = ifp; 1189122689Ssam BFE_UNLOCK(sc); 1190119917Swpaul (*ifp->if_input)(ifp, m); 1191122689Ssam BFE_LOCK(sc); 1192119917Swpaul 1193126470Sjulian BFE_INC(cons, BFE_RX_LIST_CNT); 1194119917Swpaul } 1195119917Swpaul sc->bfe_rx_cons = cons; 1196119917Swpaul} 1197119917Swpaul 1198119917Swpaulstatic void 1199119917Swpaulbfe_intr(void *xsc) 1200119917Swpaul{ 1201119917Swpaul struct bfe_softc *sc = xsc; 1202119917Swpaul struct ifnet *ifp; 1203119917Swpaul u_int32_t istat, imask, flag; 1204119917Swpaul 1205119917Swpaul ifp = &sc->arpcom.ac_if; 1206119917Swpaul 1207119917Swpaul BFE_LOCK(sc); 1208119917Swpaul 1209119917Swpaul istat = CSR_READ_4(sc, BFE_ISTAT); 1210119917Swpaul imask = CSR_READ_4(sc, BFE_IMASK); 1211119917Swpaul 1212133282Sdes /* 1213119917Swpaul * Defer unsolicited interrupts - This is necessary because setting the 1214119917Swpaul * chips interrupt mask register to 0 doesn't actually stop the 1215119917Swpaul * interrupts 1216119917Swpaul */ 1217119917Swpaul istat &= imask; 1218119917Swpaul CSR_WRITE_4(sc, BFE_ISTAT, istat); 1219119917Swpaul CSR_READ_4(sc, BFE_ISTAT); 1220119917Swpaul 1221119917Swpaul /* not expecting this interrupt, disregard it */ 1222119917Swpaul if(istat == 0) { 1223119917Swpaul BFE_UNLOCK(sc); 1224119917Swpaul return; 1225119917Swpaul } 1226119917Swpaul 1227119917Swpaul if(istat & BFE_ISTAT_ERRORS) { 1228119917Swpaul flag = CSR_READ_4(sc, BFE_DMATX_STAT); 1229119917Swpaul if(flag & BFE_STAT_EMASK) 1230119917Swpaul ifp->if_oerrors++; 1231119917Swpaul 1232119917Swpaul flag = CSR_READ_4(sc, BFE_DMARX_STAT); 1233119917Swpaul if(flag & BFE_RX_FLAG_ERRORS) 1234119917Swpaul ifp->if_ierrors++; 1235119917Swpaul 1236119917Swpaul ifp->if_flags &= ~IFF_RUNNING; 1237136804Smtm bfe_init_locked(sc); 1238119917Swpaul } 1239119917Swpaul 1240119917Swpaul /* A packet was received */ 1241119917Swpaul if(istat & BFE_ISTAT_RX) 1242119917Swpaul bfe_rxeof(sc); 1243119917Swpaul 1244119917Swpaul /* A packet was sent */ 1245119917Swpaul if(istat & BFE_ISTAT_TX) 1246119917Swpaul bfe_txeof(sc); 1247119917Swpaul 1248133282Sdes /* We have packets pending, fire them out */ 1249131455Smlaier if (ifp->if_flags & IFF_RUNNING && !IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1250136804Smtm bfe_start_locked(ifp); 1251119917Swpaul 1252119917Swpaul BFE_UNLOCK(sc); 1253119917Swpaul} 1254119917Swpaul 1255119917Swpaulstatic int 1256119917Swpaulbfe_encap(struct bfe_softc *sc, struct mbuf *m_head, u_int32_t *txidx) 1257119917Swpaul{ 1258119917Swpaul struct bfe_desc *d = NULL; 1259119917Swpaul struct bfe_data *r = NULL; 1260133282Sdes struct mbuf *m; 1261126470Sjulian u_int32_t frag, cur, cnt = 0; 1262119917Swpaul int chainlen = 0; 1263119917Swpaul 1264119917Swpaul if(BFE_TX_LIST_CNT - sc->bfe_tx_cnt < 2) 1265133282Sdes return (ENOBUFS); 1266119917Swpaul 1267119917Swpaul /* 1268119917Swpaul * Count the number of frags in this chain to see if 1269119917Swpaul * we need to m_defrag. Since the descriptor list is shared 1270119917Swpaul * by all packets, we'll m_defrag long chains so that they 1271119917Swpaul * do not use up the entire list, even if they would fit. 1272119917Swpaul */ 1273133282Sdes for(m = m_head; m != NULL; m = m->m_next) 1274119917Swpaul chainlen++; 1275119917Swpaul 1276119917Swpaul 1277133282Sdes if ((chainlen > BFE_TX_LIST_CNT / 4) || 1278119917Swpaul ((BFE_TX_LIST_CNT - (chainlen + sc->bfe_tx_cnt)) < 2)) { 1279119917Swpaul m = m_defrag(m_head, M_DONTWAIT); 1280133282Sdes if (m == NULL) 1281133282Sdes return (ENOBUFS); 1282119917Swpaul m_head = m; 1283119917Swpaul } 1284119917Swpaul 1285119917Swpaul /* 1286119917Swpaul * Start packing the mbufs in this chain into 1287119917Swpaul * the fragment pointers. Stop when we run out 1288119917Swpaul * of fragments or hit the end of the mbuf chain. 1289119917Swpaul */ 1290119917Swpaul m = m_head; 1291119917Swpaul cur = frag = *txidx; 1292119917Swpaul cnt = 0; 1293119917Swpaul 1294119917Swpaul for(m = m_head; m != NULL; m = m->m_next) { 1295119917Swpaul if(m->m_len != 0) { 1296119917Swpaul if((BFE_TX_LIST_CNT - (sc->bfe_tx_cnt + cnt)) < 2) 1297133282Sdes return (ENOBUFS); 1298119917Swpaul 1299119917Swpaul d = &sc->bfe_tx_list[cur]; 1300119917Swpaul r = &sc->bfe_tx_ring[cur]; 1301119917Swpaul d->bfe_ctrl = BFE_DESC_LEN & m->m_len; 1302119917Swpaul /* always intterupt on completion */ 1303119917Swpaul d->bfe_ctrl |= BFE_DESC_IOC; 1304119917Swpaul if(cnt == 0) 1305119917Swpaul /* Set start of frame */ 1306119917Swpaul d->bfe_ctrl |= BFE_DESC_SOF; 1307119917Swpaul if(cur == BFE_TX_LIST_CNT - 1) 1308126470Sjulian /* 1309126470Sjulian * Tell the chip to wrap to the start of 1310126470Sjulian * the descriptor list 1311126470Sjulian */ 1312119917Swpaul d->bfe_ctrl |= BFE_DESC_EOT; 1313119917Swpaul 1314126470Sjulian bus_dmamap_load(sc->bfe_tag, 1315133282Sdes r->bfe_map, mtod(m, void*), m->m_len, 1316126470Sjulian bfe_dma_map_desc, d, 0); 1317126470Sjulian bus_dmamap_sync(sc->bfe_tag, r->bfe_map, 1318126470Sjulian BUS_DMASYNC_PREREAD); 1319119917Swpaul 1320119917Swpaul frag = cur; 1321126470Sjulian BFE_INC(cur, BFE_TX_LIST_CNT); 1322119917Swpaul cnt++; 1323119917Swpaul } 1324119917Swpaul } 1325119917Swpaul 1326119917Swpaul if (m != NULL) 1327133282Sdes return (ENOBUFS); 1328119917Swpaul 1329119917Swpaul sc->bfe_tx_list[frag].bfe_ctrl |= BFE_DESC_EOF; 1330119917Swpaul sc->bfe_tx_ring[frag].bfe_mbuf = m_head; 1331119917Swpaul bus_dmamap_sync(sc->bfe_tx_tag, sc->bfe_tx_map, BUS_DMASYNC_PREREAD); 1332119917Swpaul 1333119917Swpaul *txidx = cur; 1334119917Swpaul sc->bfe_tx_cnt += cnt; 1335119917Swpaul return (0); 1336119917Swpaul} 1337119917Swpaul 1338119917Swpaul/* 1339136804Smtm * Set up to transmit a packet. 1340119917Swpaul */ 1341119917Swpaulstatic void 1342119917Swpaulbfe_start(struct ifnet *ifp) 1343119917Swpaul{ 1344136804Smtm BFE_LOCK((struct bfe_softc *)ifp->if_softc); 1345136804Smtm bfe_start_locked(ifp); 1346136804Smtm BFE_UNLOCK((struct bfe_softc *)ifp->if_softc); 1347136804Smtm} 1348136804Smtm 1349136804Smtm/* 1350136804Smtm * Set up to transmit a packet. The softc is already locked. 1351136804Smtm */ 1352136804Smtmstatic void 1353136804Smtmbfe_start_locked(struct ifnet *ifp) 1354136804Smtm{ 1355119917Swpaul struct bfe_softc *sc; 1356119917Swpaul struct mbuf *m_head = NULL; 1357136269Smlaier int idx, queued = 0; 1358119917Swpaul 1359119917Swpaul sc = ifp->if_softc; 1360119917Swpaul idx = sc->bfe_tx_prod; 1361119917Swpaul 1362136804Smtm BFE_LOCK_ASSERT(sc); 1363119917Swpaul 1364133282Sdes /* 1365126470Sjulian * Not much point trying to send if the link is down 1366126470Sjulian * or we have nothing to send. 1367119917Swpaul */ 1368136804Smtm if (!sc->bfe_link && ifp->if_snd.ifq_len < 10) 1369119917Swpaul return; 1370119917Swpaul 1371136804Smtm if (ifp->if_flags & IFF_OACTIVE) 1372119917Swpaul return; 1373119917Swpaul 1374119917Swpaul while(sc->bfe_tx_ring[idx].bfe_mbuf == NULL) { 1375131455Smlaier IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head); 1376119917Swpaul if(m_head == NULL) 1377119917Swpaul break; 1378119917Swpaul 1379133282Sdes /* 1380126470Sjulian * Pack the data into the tx ring. If we dont have 1381126470Sjulian * enough room, let the chip drain the ring. 1382119917Swpaul */ 1383119917Swpaul if(bfe_encap(sc, m_head, &idx)) { 1384131455Smlaier IFQ_DRV_PREPEND(&ifp->if_snd, m_head); 1385119917Swpaul ifp->if_flags |= IFF_OACTIVE; 1386119917Swpaul break; 1387119917Swpaul } 1388119917Swpaul 1389136269Smlaier queued++; 1390136269Smlaier 1391119917Swpaul /* 1392119917Swpaul * If there's a BPF listener, bounce a copy of this frame 1393119917Swpaul * to him. 1394119917Swpaul */ 1395119917Swpaul BPF_MTAP(ifp, m_head); 1396119917Swpaul } 1397119917Swpaul 1398136269Smlaier if (queued) { 1399136269Smlaier sc->bfe_tx_prod = idx; 1400136269Smlaier /* Transmit - twice due to apparent hardware bug */ 1401136269Smlaier CSR_WRITE_4(sc, BFE_DMATX_PTR, idx * sizeof(struct bfe_desc)); 1402136269Smlaier CSR_WRITE_4(sc, BFE_DMATX_PTR, idx * sizeof(struct bfe_desc)); 1403119917Swpaul 1404136269Smlaier /* 1405136269Smlaier * Set a timeout in case the chip goes out to lunch. 1406136269Smlaier */ 1407136269Smlaier ifp->if_timer = 5; 1408136269Smlaier } 1409119917Swpaul} 1410119917Swpaul 1411119917Swpaulstatic void 1412119917Swpaulbfe_init(void *xsc) 1413119917Swpaul{ 1414136804Smtm BFE_LOCK((struct bfe_softc *)xsc); 1415136804Smtm bfe_init_locked(xsc); 1416136804Smtm BFE_UNLOCK((struct bfe_softc *)xsc); 1417136804Smtm} 1418136804Smtm 1419136804Smtmstatic void 1420136804Smtmbfe_init_locked(void *xsc) 1421136804Smtm{ 1422119917Swpaul struct bfe_softc *sc = (struct bfe_softc*)xsc; 1423119917Swpaul struct ifnet *ifp = &sc->arpcom.ac_if; 1424119917Swpaul 1425136804Smtm BFE_LOCK_ASSERT(sc); 1426119917Swpaul 1427136804Smtm if (ifp->if_flags & IFF_RUNNING) 1428119917Swpaul return; 1429119917Swpaul 1430119917Swpaul bfe_stop(sc); 1431119917Swpaul bfe_chip_reset(sc); 1432119917Swpaul 1433119917Swpaul if (bfe_list_rx_init(sc) == ENOBUFS) { 1434126470Sjulian printf("bfe%d: bfe_init: Not enough memory for list buffers\n", 1435126470Sjulian sc->bfe_unit); 1436119917Swpaul bfe_stop(sc); 1437119917Swpaul return; 1438119917Swpaul } 1439119917Swpaul 1440119917Swpaul bfe_set_rx_mode(sc); 1441119917Swpaul 1442119917Swpaul /* Enable the chip and core */ 1443119917Swpaul BFE_OR(sc, BFE_ENET_CTRL, BFE_ENET_ENABLE); 1444119917Swpaul /* Enable interrupts */ 1445119917Swpaul CSR_WRITE_4(sc, BFE_IMASK, BFE_IMASK_DEF); 1446119917Swpaul 1447119917Swpaul bfe_ifmedia_upd(ifp); 1448119917Swpaul ifp->if_flags |= IFF_RUNNING; 1449119917Swpaul ifp->if_flags &= ~IFF_OACTIVE; 1450119917Swpaul 1451119917Swpaul sc->bfe_stat_ch = timeout(bfe_tick, sc, hz); 1452119917Swpaul} 1453119917Swpaul 1454119917Swpaul/* 1455119917Swpaul * Set media options. 1456119917Swpaul */ 1457119917Swpaulstatic int 1458119917Swpaulbfe_ifmedia_upd(struct ifnet *ifp) 1459119917Swpaul{ 1460119917Swpaul struct bfe_softc *sc; 1461119917Swpaul struct mii_data *mii; 1462119917Swpaul 1463119917Swpaul sc = ifp->if_softc; 1464119917Swpaul 1465119917Swpaul mii = device_get_softc(sc->bfe_miibus); 1466119917Swpaul sc->bfe_link = 0; 1467119917Swpaul if (mii->mii_instance) { 1468119917Swpaul struct mii_softc *miisc; 1469119917Swpaul for (miisc = LIST_FIRST(&mii->mii_phys); miisc != NULL; 1470119917Swpaul miisc = LIST_NEXT(miisc, mii_list)) 1471119917Swpaul mii_phy_reset(miisc); 1472119917Swpaul } 1473119917Swpaul mii_mediachg(mii); 1474119917Swpaul 1475133282Sdes return (0); 1476119917Swpaul} 1477119917Swpaul 1478119917Swpaul/* 1479119917Swpaul * Report current media status. 1480119917Swpaul */ 1481119917Swpaulstatic void 1482119917Swpaulbfe_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 1483119917Swpaul{ 1484119917Swpaul struct bfe_softc *sc = ifp->if_softc; 1485119917Swpaul struct mii_data *mii; 1486119917Swpaul 1487119917Swpaul mii = device_get_softc(sc->bfe_miibus); 1488119917Swpaul mii_pollstat(mii); 1489119917Swpaul ifmr->ifm_active = mii->mii_media_active; 1490119917Swpaul ifmr->ifm_status = mii->mii_media_status; 1491119917Swpaul} 1492119917Swpaul 1493119917Swpaulstatic int 1494119917Swpaulbfe_ioctl(struct ifnet *ifp, u_long command, caddr_t data) 1495119917Swpaul{ 1496119917Swpaul struct bfe_softc *sc = ifp->if_softc; 1497119917Swpaul struct ifreq *ifr = (struct ifreq *) data; 1498119917Swpaul struct mii_data *mii; 1499119917Swpaul int error = 0; 1500119917Swpaul 1501119917Swpaul switch(command) { 1502119917Swpaul case SIOCSIFFLAGS: 1503136804Smtm BFE_LOCK(sc); 1504119917Swpaul if(ifp->if_flags & IFF_UP) 1505119917Swpaul if(ifp->if_flags & IFF_RUNNING) 1506119917Swpaul bfe_set_rx_mode(sc); 1507119917Swpaul else 1508136804Smtm bfe_init_locked(sc); 1509119917Swpaul else if(ifp->if_flags & IFF_RUNNING) 1510119917Swpaul bfe_stop(sc); 1511136804Smtm BFE_UNLOCK(sc); 1512119917Swpaul break; 1513119917Swpaul case SIOCADDMULTI: 1514119917Swpaul case SIOCDELMULTI: 1515136804Smtm BFE_LOCK(sc); 1516119917Swpaul if(ifp->if_flags & IFF_RUNNING) 1517119917Swpaul bfe_set_rx_mode(sc); 1518136804Smtm BFE_UNLOCK(sc); 1519119917Swpaul break; 1520119917Swpaul case SIOCGIFMEDIA: 1521119917Swpaul case SIOCSIFMEDIA: 1522119917Swpaul mii = device_get_softc(sc->bfe_miibus); 1523126470Sjulian error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, 1524126470Sjulian command); 1525119917Swpaul break; 1526119917Swpaul default: 1527133282Sdes error = ether_ioctl(ifp, command, data); 1528119917Swpaul break; 1529119917Swpaul } 1530119917Swpaul 1531133282Sdes return (error); 1532119917Swpaul} 1533119917Swpaul 1534119917Swpaulstatic void 1535119917Swpaulbfe_watchdog(struct ifnet *ifp) 1536119917Swpaul{ 1537119917Swpaul struct bfe_softc *sc; 1538119917Swpaul 1539119917Swpaul sc = ifp->if_softc; 1540119917Swpaul 1541119917Swpaul BFE_LOCK(sc); 1542119917Swpaul 1543119917Swpaul printf("bfe%d: watchdog timeout -- resetting\n", sc->bfe_unit); 1544119917Swpaul 1545119917Swpaul ifp->if_flags &= ~IFF_RUNNING; 1546136804Smtm bfe_init_locked(sc); 1547119917Swpaul 1548119917Swpaul ifp->if_oerrors++; 1549119917Swpaul 1550119917Swpaul BFE_UNLOCK(sc); 1551119917Swpaul} 1552119917Swpaul 1553119917Swpaulstatic void 1554119917Swpaulbfe_tick(void *xsc) 1555119917Swpaul{ 1556119917Swpaul struct bfe_softc *sc = xsc; 1557119917Swpaul struct mii_data *mii; 1558119917Swpaul 1559119917Swpaul if (sc == NULL) 1560119917Swpaul return; 1561119917Swpaul 1562119917Swpaul BFE_LOCK(sc); 1563119917Swpaul 1564119917Swpaul mii = device_get_softc(sc->bfe_miibus); 1565119917Swpaul 1566119917Swpaul bfe_stats_update(sc); 1567119917Swpaul sc->bfe_stat_ch = timeout(bfe_tick, sc, hz); 1568119917Swpaul 1569119917Swpaul if(sc->bfe_link) { 1570119917Swpaul BFE_UNLOCK(sc); 1571119917Swpaul return; 1572119917Swpaul } 1573119917Swpaul 1574119917Swpaul mii_tick(mii); 1575119917Swpaul if (!sc->bfe_link && mii->mii_media_status & IFM_ACTIVE && 1576133282Sdes IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) 1577119917Swpaul sc->bfe_link++; 1578119917Swpaul 1579119917Swpaul BFE_UNLOCK(sc); 1580119917Swpaul} 1581119917Swpaul 1582119917Swpaul/* 1583119917Swpaul * Stop the adapter and free any mbufs allocated to the 1584119917Swpaul * RX and TX lists. 1585119917Swpaul */ 1586119917Swpaulstatic void 1587119917Swpaulbfe_stop(struct bfe_softc *sc) 1588119917Swpaul{ 1589119917Swpaul struct ifnet *ifp; 1590119917Swpaul 1591136804Smtm BFE_LOCK_ASSERT(sc); 1592119917Swpaul 1593119917Swpaul untimeout(bfe_tick, sc, sc->bfe_stat_ch); 1594119917Swpaul 1595119917Swpaul ifp = &sc->arpcom.ac_if; 1596119917Swpaul 1597119917Swpaul bfe_chip_halt(sc); 1598126470Sjulian bfe_tx_ring_free(sc); 1599119917Swpaul bfe_rx_ring_free(sc); 1600119917Swpaul 1601119917Swpaul ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1602119917Swpaul} 1603