1275048Sbr/*-
2275048Sbr * Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com>
3275048Sbr * All rights reserved.
4275048Sbr *
5275048Sbr * This software was developed by SRI International and the University of
6275048Sbr * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
7275048Sbr * ("CTSRD"), as part of the DARPA CRASH research programme.
8275048Sbr *
9275048Sbr * Redistribution and use in source and binary forms, with or without
10275048Sbr * modification, are permitted provided that the following conditions
11275048Sbr * are met:
12275048Sbr * 1. Redistributions of source code must retain the above copyright
13275048Sbr *    notice, this list of conditions and the following disclaimer.
14275048Sbr * 2. Redistributions in binary form must reproduce the above copyright
15275048Sbr *    notice, this list of conditions and the following disclaimer in the
16275048Sbr *    documentation and/or other materials provided with the distribution.
17275048Sbr *
18275048Sbr * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19275048Sbr * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20275048Sbr * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21275048Sbr * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22275048Sbr * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23275048Sbr * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24275048Sbr * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25275048Sbr * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26275048Sbr * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27275048Sbr * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28275048Sbr * SUCH DAMAGE.
29275048Sbr *
30275048Sbr * $FreeBSD$
31275048Sbr */
32275048Sbr
33275048Sbr#define READ2(_sc, _reg) \
34275048Sbr	bus_read_2((_sc)->res[0], _reg)
35275048Sbr#define READ4(_sc, _reg) \
36275048Sbr	bus_read_4((_sc)->res[0], _reg)
37275048Sbr#define WRITE2(_sc, _reg, _val) \
38275048Sbr	bus_write_2((_sc)->res[0], _reg, _val)
39275048Sbr#define WRITE4(_sc, _reg, _val) \
40275048Sbr	bus_write_4((_sc)->res[0], _reg, _val)
41275048Sbr
42275049Sbr#define	PAGE_SHIFT		12
43275048Sbr#define	VRING_ALIGN		4096
44275048Sbr
45275048Sbr#define	VQ_ALLOC		0x01	/* set once we have a pfn */
46275048Sbr#define	VQ_MAX_DESCRIPTORS	512
47275048Sbr
48275048Sbrstruct vqueue_info {
49275048Sbr	uint16_t vq_qsize;	/* size of this queue (a power of 2) */
50275048Sbr	uint16_t vq_num;
51275048Sbr	uint16_t vq_flags;
52275048Sbr	uint16_t vq_last_avail;	/* a recent value of vq_avail->va_idx */
53275048Sbr	uint16_t vq_save_used;	/* saved vq_used->vu_idx; see vq_endchains */
54275048Sbr	uint32_t vq_pfn;	/* PFN of virt queue (not shifted!) */
55275048Sbr
56275048Sbr	volatile struct vring_desc *vq_desc;	/* descriptor array */
57275048Sbr	volatile struct vring_avail *vq_avail;	/* the "avail" ring */
58275048Sbr	volatile struct vring_used *vq_used;	/* the "used" ring */
59275048Sbr};
60275048Sbr
61275048Sbrint vq_ring_ready(struct vqueue_info *vq);
62275048Sbrint vq_has_descs(struct vqueue_info *vq);
63275048Sbrvoid * paddr_map(uint32_t offset, uint32_t phys, uint32_t size);
64275048Sbrvoid paddr_unmap(void *phys, uint32_t size);
65275048Sbrint vq_getchain(uint32_t beri_mem_offset, struct vqueue_info *vq,
66275048Sbr		struct iovec *iov, int n_iov, uint16_t *flags);
67275048Sbrvoid vq_relchain(struct vqueue_info *vq, struct iovec *iov, int n, uint32_t iolen);
68276710Sbrstruct iovec * getcopy(struct iovec *iov, int n);
69275048Sbr
70275647Sbrint setup_pio(device_t dev, char *name, device_t *pio_dev);
71275647Sbrint setup_offset(device_t dev, uint32_t *offset);
72