if_ath_tx_ht.c revision 298607
1/*-
2 * Copyright (c) 2011 Adrian Chadd, Xenion Pty Ltd.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer,
10 *    without modification.
11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12 *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13 *    redistribution must be conditioned upon including a substantially
14 *    similar Disclaimer requirement for further binary redistribution.
15 *
16 * NO WARRANTY
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27 * THE POSSIBILITY OF SUCH DAMAGES.
28 */
29
30#include <sys/cdefs.h>
31__FBSDID("$FreeBSD: head/sys/dev/ath/if_ath_tx_ht.c 298607 2016-04-26 01:34:21Z adrian $");
32
33#include "opt_inet.h"
34#include "opt_ath.h"
35#include "opt_wlan.h"
36
37#include <sys/param.h>
38#include <sys/systm.h>
39#include <sys/sysctl.h>
40#include <sys/mbuf.h>
41#include <sys/malloc.h>
42#include <sys/lock.h>
43#include <sys/mutex.h>
44#include <sys/kernel.h>
45#include <sys/socket.h>
46#include <sys/sockio.h>
47#include <sys/errno.h>
48#include <sys/callout.h>
49#include <sys/bus.h>
50#include <sys/endian.h>
51#include <sys/kthread.h>
52#include <sys/taskqueue.h>
53#include <sys/priv.h>
54
55#include <machine/bus.h>
56
57#include <net/if.h>
58#include <net/if_dl.h>
59#include <net/if_media.h>
60#include <net/if_types.h>
61#include <net/if_arp.h>
62#include <net/ethernet.h>
63#include <net/if_llc.h>
64
65#include <net80211/ieee80211_var.h>
66#include <net80211/ieee80211_regdomain.h>
67#ifdef IEEE80211_SUPPORT_SUPERG
68#include <net80211/ieee80211_superg.h>
69#endif
70#ifdef IEEE80211_SUPPORT_TDMA
71#include <net80211/ieee80211_tdma.h>
72#endif
73
74#include <net/bpf.h>
75
76#ifdef INET
77#include <netinet/in.h>
78#include <netinet/if_ether.h>
79#endif
80
81#include <dev/ath/if_athvar.h>
82#include <dev/ath/ath_hal/ah_devid.h>		/* XXX for softled */
83#include <dev/ath/ath_hal/ah_diagcodes.h>
84
85#ifdef ATH_TX99_DIAG
86#include <dev/ath/ath_tx99/ath_tx99.h>
87#endif
88
89#include <dev/ath/if_ath_tx.h>		/* XXX for some support functions */
90#include <dev/ath/if_ath_tx_ht.h>
91#include <dev/ath/if_athrate.h>
92#include <dev/ath/if_ath_debug.h>
93
94/*
95 * XXX net80211?
96 */
97#define	IEEE80211_AMPDU_SUBFRAME_DEFAULT		32
98
99#define	ATH_AGGR_DELIM_SZ	4	/* delimiter size */
100#define	ATH_AGGR_MINPLEN	256	/* in bytes, minimum packet length */
101/* number of delimiters for encryption padding */
102#define	ATH_AGGR_ENCRYPTDELIM	10
103
104/*
105 * returns delimiter padding required given the packet length
106 */
107#define	ATH_AGGR_GET_NDELIM(_len)					\
108	    (((((_len) + ATH_AGGR_DELIM_SZ) < ATH_AGGR_MINPLEN) ?	\
109	    (ATH_AGGR_MINPLEN - (_len) - ATH_AGGR_DELIM_SZ) : 0) >> 2)
110
111#define	PADBYTES(_len)		((4 - ((_len) % 4)) % 4)
112
113int ath_max_4ms_framelen[4][32] = {
114	[MCS_HT20] = {
115		3212,  6432,  9648,  12864,  19300,  25736,  28952,  32172,
116		6424,  12852, 19280, 25708,  38568,  51424,  57852,  64280,
117		9628,  19260, 28896, 38528,  57792,  65532,  65532,  65532,
118		12828, 25656, 38488, 51320,  65532,  65532,  65532,  65532,
119	},
120	[MCS_HT20_SGI] = {
121		3572,  7144,  10720,  14296,  21444,  28596,  32172,  35744,
122		7140,  14284, 21428,  28568,  42856,  57144,  64288,  65532,
123		10700, 21408, 32112,  42816,  64228,  65532,  65532,  65532,
124		14256, 28516, 42780,  57040,  65532,  65532,  65532,  65532,
125	},
126	[MCS_HT40] = {
127		6680,  13360,  20044,  26724,  40092,  53456,  60140,  65532,
128		13348, 26700,  40052,  53400,  65532,  65532,  65532,  65532,
129		20004, 40008,  60016,  65532,  65532,  65532,  65532,  65532,
130		26644, 53292,  65532,  65532,  65532,  65532,  65532,  65532,
131	},
132	[MCS_HT40_SGI] = {
133		7420,  14844,  22272,  29696,  44544,  59396,  65532,  65532,
134		14832, 29668,  44504,  59340,  65532,  65532,  65532,  65532,
135		22232, 44464,  65532,  65532,  65532,  65532,  65532,  65532,
136		29616, 59232,  65532,  65532,  65532,  65532,  65532,  65532,
137	}
138};
139
140/*
141 * XXX should be in net80211
142 */
143static int ieee80211_mpdudensity_map[] = {
144	0,		/* IEEE80211_HTCAP_MPDUDENSITY_NA */
145	25,		/* IEEE80211_HTCAP_MPDUDENSITY_025 */
146	50,		/* IEEE80211_HTCAP_MPDUDENSITY_05 */
147	100,		/* IEEE80211_HTCAP_MPDUDENSITY_1 */
148	200,		/* IEEE80211_HTCAP_MPDUDENSITY_2 */
149	400,		/* IEEE80211_HTCAP_MPDUDENSITY_4 */
150	800,		/* IEEE80211_HTCAP_MPDUDENSITY_8 */
151	1600,		/* IEEE80211_HTCAP_MPDUDENSITY_16 */
152};
153
154/*
155 * XXX should be in the HAL/net80211 ?
156 */
157#define	BITS_PER_BYTE		8
158#define	OFDM_PLCP_BITS		22
159#define	HT_RC_2_MCS(_rc)	((_rc) & 0x7f)
160#define	HT_RC_2_STREAMS(_rc)	((((_rc) & 0x78) >> 3) + 1)
161#define	L_STF			8
162#define	L_LTF			8
163#define	L_SIG			4
164#define	HT_SIG			8
165#define	HT_STF			4
166#define	HT_LTF(_ns)		(4 * (_ns))
167#define	SYMBOL_TIME(_ns)	((_ns) << 2)		// ns * 4 us
168#define	SYMBOL_TIME_HALFGI(_ns)	(((_ns) * 18 + 4) / 5)	// ns * 3.6 us
169#define	NUM_SYMBOLS_PER_USEC(_usec)	(_usec >> 2)
170#define	NUM_SYMBOLS_PER_USEC_HALFGI(_usec)	(((_usec*5)-4)/18)
171#define	IS_HT_RATE(_rate)	((_rate) & 0x80)
172
173const uint32_t bits_per_symbol[][2] = {
174    /* 20MHz 40MHz */
175    {    26,   54 },     //  0: BPSK
176    {    52,  108 },     //  1: QPSK 1/2
177    {    78,  162 },     //  2: QPSK 3/4
178    {   104,  216 },     //  3: 16-QAM 1/2
179    {   156,  324 },     //  4: 16-QAM 3/4
180    {   208,  432 },     //  5: 64-QAM 2/3
181    {   234,  486 },     //  6: 64-QAM 3/4
182    {   260,  540 },     //  7: 64-QAM 5/6
183    {    52,  108 },     //  8: BPSK
184    {   104,  216 },     //  9: QPSK 1/2
185    {   156,  324 },     // 10: QPSK 3/4
186    {   208,  432 },     // 11: 16-QAM 1/2
187    {   312,  648 },     // 12: 16-QAM 3/4
188    {   416,  864 },     // 13: 64-QAM 2/3
189    {   468,  972 },     // 14: 64-QAM 3/4
190    {   520, 1080 },     // 15: 64-QAM 5/6
191    {    78,  162 },     // 16: BPSK
192    {   156,  324 },     // 17: QPSK 1/2
193    {   234,  486 },     // 18: QPSK 3/4
194    {   312,  648 },     // 19: 16-QAM 1/2
195    {   468,  972 },     // 20: 16-QAM 3/4
196    {   624, 1296 },     // 21: 64-QAM 2/3
197    {   702, 1458 },     // 22: 64-QAM 3/4
198    {   780, 1620 },     // 23: 64-QAM 5/6
199    {   104,  216 },     // 24: BPSK
200    {   208,  432 },     // 25: QPSK 1/2
201    {   312,  648 },     // 26: QPSK 3/4
202    {   416,  864 },     // 27: 16-QAM 1/2
203    {   624, 1296 },     // 28: 16-QAM 3/4
204    {   832, 1728 },     // 29: 64-QAM 2/3
205    {   936, 1944 },     // 30: 64-QAM 3/4
206    {  1040, 2160 },     // 31: 64-QAM 5/6
207};
208
209/*
210 * Fill in the rate array information based on the current
211 * node configuration and the choices made by the rate
212 * selection code and ath_buf setup code.
213 *
214 * Later on, this may end up also being made by the
215 * rate control code, but for now it can live here.
216 *
217 * This needs to be called just before the packet is
218 * queued to the software queue or hardware queue,
219 * so all of the needed fields in bf_state are setup.
220 */
221void
222ath_tx_rate_fill_rcflags(struct ath_softc *sc, struct ath_buf *bf)
223{
224	struct ieee80211_node *ni = bf->bf_node;
225	struct ieee80211com *ic = ni->ni_ic;
226	const HAL_RATE_TABLE *rt = sc->sc_currates;
227	struct ath_rc_series *rc = bf->bf_state.bfs_rc;
228	uint8_t rate;
229	int i;
230
231	for (i = 0; i < ATH_RC_NUM; i++) {
232		rc[i].flags = 0;
233		if (rc[i].tries == 0)
234			continue;
235
236		rate = rt->info[rc[i].rix].rateCode;
237
238		/*
239		 * Only enable short preamble for legacy rates
240		 */
241		if ((! IS_HT_RATE(rate)) && bf->bf_state.bfs_shpream)
242			rate |= rt->info[rc[i].rix].shortPreamble;
243
244		/*
245		 * Save this, used by the TX and completion code
246		 */
247		rc[i].ratecode = rate;
248
249		if (bf->bf_state.bfs_txflags &
250		    (HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA))
251			rc[i].flags |= ATH_RC_RTSCTS_FLAG;
252
253		/* Only enable shortgi, 2040, dual-stream if HT is set */
254		if (IS_HT_RATE(rate)) {
255			rc[i].flags |= ATH_RC_HT_FLAG;
256
257			if (ni->ni_chw == 40)
258				rc[i].flags |= ATH_RC_CW40_FLAG;
259
260			if (ni->ni_chw == 40 &&
261			    ic->ic_htcaps & IEEE80211_HTCAP_SHORTGI40 &&
262			    ni->ni_htcap & IEEE80211_HTCAP_SHORTGI40)
263				rc[i].flags |= ATH_RC_SGI_FLAG;
264
265			if (ni->ni_chw == 20 &&
266			    ic->ic_htcaps & IEEE80211_HTCAP_SHORTGI20 &&
267			    ni->ni_htcap & IEEE80211_HTCAP_SHORTGI20)
268				rc[i].flags |= ATH_RC_SGI_FLAG;
269
270			/*
271			 * If we have STBC TX enabled and the receiver
272			 * can receive (at least) 1 stream STBC, AND it's
273			 * MCS 0-7, AND we have at least two chains enabled,
274			 * enable STBC.
275			 *
276			 * XXX TODO: .. and the rate is an 11n rate?
277			 */
278			if (ic->ic_htcaps & IEEE80211_HTCAP_TXSTBC &&
279			    ni->ni_vap->iv_flags_ht & IEEE80211_FHT_STBC_TX &&
280			    ni->ni_htcap & IEEE80211_HTCAP_RXSTBC_1STREAM &&
281			    (sc->sc_cur_txchainmask > 1) &&
282			    HT_RC_2_STREAMS(rate) == 1) {
283				rc[i].flags |= ATH_RC_STBC_FLAG;
284			}
285
286			/*
287			 * Dual / Triple stream rate?
288			 */
289			if (HT_RC_2_STREAMS(rate) == 2)
290				rc[i].flags |= ATH_RC_DS_FLAG;
291			else if (HT_RC_2_STREAMS(rate) == 3)
292				rc[i].flags |= ATH_RC_TS_FLAG;
293		}
294
295		/*
296		 * Calculate the maximum TX power cap for the current
297		 * node.
298		 */
299		rc[i].tx_power_cap = ieee80211_get_node_txpower(ni);
300
301		/*
302		 * Calculate the maximum 4ms frame length based
303		 * on the MCS rate, SGI and channel width flags.
304		 */
305		if ((rc[i].flags & ATH_RC_HT_FLAG) &&
306		    (HT_RC_2_MCS(rate) < 32)) {
307			int j;
308			if (rc[i].flags & ATH_RC_CW40_FLAG) {
309				if (rc[i].flags & ATH_RC_SGI_FLAG)
310					j = MCS_HT40_SGI;
311				else
312					j = MCS_HT40;
313			} else {
314				if (rc[i].flags & ATH_RC_SGI_FLAG)
315					j = MCS_HT20_SGI;
316				else
317					j = MCS_HT20;
318			}
319			rc[i].max4msframelen =
320			    ath_max_4ms_framelen[j][HT_RC_2_MCS(rate)];
321		} else
322			rc[i].max4msframelen = 0;
323		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
324		    "%s: i=%d, rate=0x%x, flags=0x%x, max4ms=%d\n",
325		    __func__, i, rate, rc[i].flags, rc[i].max4msframelen);
326	}
327}
328
329/*
330 * Return the number of delimiters to be added to
331 * meet the minimum required mpdudensity.
332 *
333 * Caller should make sure that the rate is HT.
334 *
335 * TODO: is this delimiter calculation supposed to be the
336 * total frame length, the hdr length, the data length (including
337 * delimiters, padding, CRC, etc) or ?
338 *
339 * TODO: this should ensure that the rate control information
340 * HAS been setup for the first rate.
341 *
342 * TODO: ensure this is only called for MCS rates.
343 *
344 * TODO: enforce MCS < 31
345 */
346static int
347ath_compute_num_delims(struct ath_softc *sc, struct ath_buf *first_bf,
348    uint16_t pktlen)
349{
350	const HAL_RATE_TABLE *rt = sc->sc_currates;
351	struct ieee80211_node *ni = first_bf->bf_node;
352	struct ieee80211vap *vap = ni->ni_vap;
353	int ndelim, mindelim = 0;
354	int mpdudensity;	 /* in 1/100'th of a microsecond */
355	uint8_t rc, rix, flags;
356	int width, half_gi;
357	uint32_t nsymbits, nsymbols;
358	uint16_t minlen;
359
360	/*
361	 * vap->iv_ampdu_density is a value, rather than the actual
362	 * density.
363	 */
364	if (vap->iv_ampdu_density > IEEE80211_HTCAP_MPDUDENSITY_16)
365		mpdudensity = 1600;		/* maximum density */
366	else
367		mpdudensity = ieee80211_mpdudensity_map[vap->iv_ampdu_density];
368
369	/* Select standard number of delimiters based on frame length */
370	ndelim = ATH_AGGR_GET_NDELIM(pktlen);
371
372	/*
373	 * If encryption is enabled, add extra delimiters to let the
374	 * crypto hardware catch up. This could be tuned per-MAC and
375	 * per-rate, but for now we'll simply assume encryption is
376	 * always enabled.
377	 *
378	 * Also note that the Atheros reference driver inserts two
379	 * delimiters by default for pre-AR9380 peers.  This will
380	 * include "that" required delimiter.
381	 */
382	ndelim += ATH_AGGR_ENCRYPTDELIM;
383
384	/*
385	 * For AR9380, there's a minimum number of delimeters
386	 * required when doing RTS.
387	 *
388	 * XXX TODO: this is only needed if (a) RTS/CTS is enabled, and
389	 * XXX (b) this is the first sub-frame in the aggregate.
390	 */
391	if (sc->sc_use_ent && (sc->sc_ent_cfg & AH_ENT_RTSCTS_DELIM_WAR)
392	    && ndelim < AH_FIRST_DESC_NDELIMS)
393		ndelim = AH_FIRST_DESC_NDELIMS;
394
395	/*
396	 * If sc_delim_min_pad is non-zero, enforce it as the minimum
397	 * pad delimiter count.
398	 */
399	if (sc->sc_delim_min_pad != 0)
400		ndelim = MAX(ndelim, sc->sc_delim_min_pad);
401
402	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
403	    "%s: pktlen=%d, ndelim=%d, mpdudensity=%d\n",
404	    __func__, pktlen, ndelim, mpdudensity);
405
406	/*
407	 * If the MPDU density is 0, we can return here.
408	 * Otherwise, we need to convert the desired mpdudensity
409	 * into a byte length, based on the rate in the subframe.
410	 */
411	if (mpdudensity == 0)
412		return ndelim;
413
414	/*
415	 * Convert desired mpdu density from microeconds to bytes based
416	 * on highest rate in rate series (i.e. first rate) to determine
417	 * required minimum length for subframe. Take into account
418	 * whether high rate is 20 or 40Mhz and half or full GI.
419	 */
420	rix = first_bf->bf_state.bfs_rc[0].rix;
421	rc = rt->info[rix].rateCode;
422	flags = first_bf->bf_state.bfs_rc[0].flags;
423	width = !! (flags & ATH_RC_CW40_FLAG);
424	half_gi = !! (flags & ATH_RC_SGI_FLAG);
425
426	/*
427	 * mpdudensity is in 1/100th of a usec, so divide by 100
428	 */
429	if (half_gi)
430		nsymbols = NUM_SYMBOLS_PER_USEC_HALFGI(mpdudensity);
431	else
432		nsymbols = NUM_SYMBOLS_PER_USEC(mpdudensity);
433	nsymbols /= 100;
434
435	if (nsymbols == 0)
436		nsymbols = 1;
437
438	nsymbits = bits_per_symbol[HT_RC_2_MCS(rc)][width];
439	minlen = (nsymbols * nsymbits) / BITS_PER_BYTE;
440
441	/*
442	 * Min length is the minimum frame length for the
443	 * required MPDU density.
444	 */
445	if (pktlen < minlen) {
446		mindelim = (minlen - pktlen) / ATH_AGGR_DELIM_SZ;
447		ndelim = MAX(mindelim, ndelim);
448	}
449
450	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
451	    "%s: pktlen=%d, minlen=%d, rix=%x, rc=%x, width=%d, hgi=%d, ndelim=%d\n",
452	    __func__, pktlen, minlen, rix, rc, width, half_gi, ndelim);
453
454	return ndelim;
455}
456
457/*
458 * Fetch the aggregation limit.
459 *
460 * It's the lowest of the four rate series 4ms frame length.
461 */
462static int
463ath_get_aggr_limit(struct ath_softc *sc, struct ath_buf *bf)
464{
465	int amin = ATH_AGGR_MAXSIZE;
466	int i;
467
468	if (sc->sc_aggr_limit > 0 && sc->sc_aggr_limit < ATH_AGGR_MAXSIZE)
469		amin = sc->sc_aggr_limit;
470
471	for (i = 0; i < ATH_RC_NUM; i++) {
472		if (bf->bf_state.bfs_rc[i].tries == 0)
473			continue;
474		amin = MIN(amin, bf->bf_state.bfs_rc[i].max4msframelen);
475	}
476
477	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: max frame len= %d\n",
478	    __func__, amin);
479
480	return amin;
481}
482
483/*
484 * Setup a 11n rate series structure
485 *
486 * This should be called for both legacy and MCS rates.
487 *
488 * This uses the rate series stuf from ath_tx_rate_fill_rcflags().
489 *
490 * It, along with ath_buf_set_rate, must be called -after- a burst
491 * or aggregate is setup.
492 */
493static void
494ath_rateseries_setup(struct ath_softc *sc, struct ieee80211_node *ni,
495    struct ath_buf *bf, HAL_11N_RATE_SERIES *series)
496{
497	struct ieee80211com *ic = ni->ni_ic;
498	struct ath_hal *ah = sc->sc_ah;
499	HAL_BOOL shortPreamble = AH_FALSE;
500	const HAL_RATE_TABLE *rt = sc->sc_currates;
501	int i;
502	int pktlen;
503	struct ath_rc_series *rc = bf->bf_state.bfs_rc;
504
505	if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
506	    (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE))
507		shortPreamble = AH_TRUE;
508
509	/*
510	 * If this is the first frame in an aggregate series,
511	 * use the aggregate length.
512	 */
513	if (bf->bf_state.bfs_aggr)
514		pktlen = bf->bf_state.bfs_al;
515	else
516		pktlen = bf->bf_state.bfs_pktlen;
517
518	/*
519	 * XXX TODO: modify this routine to use the bfs_rc[x].flags
520	 * XXX fields.
521	 */
522	memset(series, 0, sizeof(HAL_11N_RATE_SERIES) * 4);
523	for (i = 0; i < ATH_RC_NUM;  i++) {
524		/* Only set flags for actual TX attempts */
525		if (rc[i].tries == 0)
526			continue;
527
528		series[i].Tries = rc[i].tries;
529
530		/*
531		 * XXX TODO: When the NIC is capable of three stream TX,
532		 * transmit 1/2 stream rates on two streams.
533		 *
534		 * This reduces the power consumption of the NIC and
535		 * keeps it within the PCIe slot power limits.
536		 */
537		series[i].ChSel = sc->sc_cur_txchainmask;
538
539		/*
540		 * Setup rate and TX power cap for this series.
541		 */
542		series[i].Rate = rt->info[rc[i].rix].rateCode;
543		series[i].RateIndex = rc[i].rix;
544		series[i].tx_power_cap = rc[i].tx_power_cap;
545
546		/*
547		 * Enable RTS/CTS as appropriate.
548		 */
549		if (rc[i].flags & ATH_RC_RTSCTS_FLAG)
550			series[i].RateFlags |= HAL_RATESERIES_RTS_CTS;
551
552		/*
553		 * 11n rate? Update 11n flags.
554		 */
555		if (rc[i].flags & ATH_RC_HT_FLAG) {
556			if (rc[i].flags & ATH_RC_CW40_FLAG)
557				series[i].RateFlags |= HAL_RATESERIES_2040;
558
559			if (rc[i].flags & ATH_RC_SGI_FLAG)
560				series[i].RateFlags |= HAL_RATESERIES_HALFGI;
561
562			if (rc[i].flags & ATH_RC_STBC_FLAG)
563				series[i].RateFlags |= HAL_RATESERIES_STBC;
564		}
565
566		/*
567		 * TODO: If we're all doing 11n rates then we can set LDPC.
568		 * If we've been asked to /do/ LDPC but we are handed a
569		 * legacy rate, then we should complain.  Loudly.
570		 */
571
572		/*
573		 * PktDuration doesn't include slot, ACK, RTS, etc timing -
574		 * it's just the packet duration
575		 */
576		if (rc[i].flags & ATH_RC_HT_FLAG) {
577			series[i].PktDuration =
578			    ath_computedur_ht(pktlen
579				, series[i].Rate
580				, HT_RC_2_STREAMS(series[i].Rate)
581				, series[i].RateFlags & HAL_RATESERIES_2040
582				, series[i].RateFlags & HAL_RATESERIES_HALFGI);
583		} else {
584			if (shortPreamble)
585				series[i].Rate |=
586				    rt->info[rc[i].rix].shortPreamble;
587			series[i].PktDuration = ath_hal_computetxtime(ah,
588			    rt, pktlen, rc[i].rix, shortPreamble);
589		}
590	}
591}
592
593#ifdef	ATH_DEBUG
594static void
595ath_rateseries_print(struct ath_softc *sc, HAL_11N_RATE_SERIES *series)
596{
597	int i;
598	for (i = 0; i < ATH_RC_NUM; i++) {
599		device_printf(sc->sc_dev ,"series %d: rate %x; tries %d; "
600		    "pktDuration %d; chSel %d; txpowcap %d, rateFlags %x\n",
601		    i,
602		    series[i].Rate,
603		    series[i].Tries,
604		    series[i].PktDuration,
605		    series[i].ChSel,
606		    series[i].tx_power_cap,
607		    series[i].RateFlags);
608	}
609}
610#endif
611
612/*
613 * Setup the 11n rate scenario and burst duration for the given TX descriptor
614 * list.
615 *
616 * This isn't useful for sending beacon frames, which has different needs
617 * wrt what's passed into the rate scenario function.
618 */
619void
620ath_buf_set_rate(struct ath_softc *sc, struct ieee80211_node *ni,
621    struct ath_buf *bf)
622{
623	HAL_11N_RATE_SERIES series[4];
624	struct ath_desc *ds = bf->bf_desc;
625	struct ath_hal *ah = sc->sc_ah;
626	int is_pspoll = (bf->bf_state.bfs_atype == HAL_PKT_TYPE_PSPOLL);
627	int ctsrate = bf->bf_state.bfs_ctsrate;
628	int flags = bf->bf_state.bfs_txflags;
629
630	/* Setup rate scenario */
631	memset(&series, 0, sizeof(series));
632
633	ath_rateseries_setup(sc, ni, bf, series);
634
635#ifdef	ATH_DEBUG
636	if (sc->sc_debug & ATH_DEBUG_XMIT)
637		ath_rateseries_print(sc, series);
638#endif
639
640	/* Set rate scenario */
641	/*
642	 * Note: Don't allow hardware to override the duration on
643	 * ps-poll packets.
644	 */
645	ath_hal_set11nratescenario(ah, ds,
646	    !is_pspoll,	/* whether to override the duration or not */
647	    ctsrate,	/* rts/cts rate */
648	    series,	/* 11n rate series */
649	    4,		/* number of series */
650	    flags);
651
652	/* Set burst duration */
653	/*
654	 * This is only required when doing 11n burst, not aggregation
655	 * ie, if there's a second frame in a RIFS or A-MPDU burst
656	 * w/ >1 A-MPDU frame bursting back to back.
657	 * Normal A-MPDU doesn't do bursting -between- aggregates.
658	 *
659	 * .. and it's highly likely this won't ever be implemented
660	 */
661	//ath_hal_set11nburstduration(ah, ds, 8192);
662}
663
664/*
665 * Form an aggregate packet list.
666 *
667 * This function enforces the aggregate restrictions/requirements.
668 *
669 * These are:
670 *
671 * + The aggregate size maximum (64k for AR9160 and later, 8K for
672 *   AR5416 when doing RTS frame protection.)
673 * + Maximum number of sub-frames for an aggregate
674 * + The aggregate delimiter size, giving MACs time to do whatever is
675 *   needed before each frame
676 * + Enforce the BAW limit
677 *
678 * Each descriptor queued should have the DMA setup.
679 * The rate series, descriptor setup, linking, etc is all done
680 * externally. This routine simply chains them together.
681 * ath_tx_setds_11n() will take care of configuring the per-
682 * descriptor setup, and ath_buf_set_rate() will configure the
683 * rate control.
684 *
685 * The TID lock is required for the entirety of this function.
686 *
687 * If some code in another thread adds to the head of this
688 * list, very strange behaviour will occur. Since retransmission is the
689 * only reason this will occur, and this routine is designed to be called
690 * from within the scheduler task, it won't ever clash with the completion
691 * task.
692 *
693 * So if you want to call this from an upper layer context (eg, to direct-
694 * dispatch aggregate frames to the hardware), please keep this in mind.
695 */
696ATH_AGGR_STATUS
697ath_tx_form_aggr(struct ath_softc *sc, struct ath_node *an,
698    struct ath_tid *tid, ath_bufhead *bf_q)
699{
700	//struct ieee80211_node *ni = &an->an_node;
701	struct ath_buf *bf, *bf_first = NULL, *bf_prev = NULL;
702	int nframes = 0;
703	uint16_t aggr_limit = 0, al = 0, bpad = 0, al_delta, h_baw;
704	struct ieee80211_tx_ampdu *tap;
705	int status = ATH_AGGR_DONE;
706	int prev_frames = 0;	/* XXX for AR5416 burst, not done here */
707	int prev_al = 0;	/* XXX also for AR5416 burst */
708
709	ATH_TX_LOCK_ASSERT(sc);
710
711	tap = ath_tx_get_tx_tid(an, tid->tid);
712	if (tap == NULL) {
713		status = ATH_AGGR_ERROR;
714		goto finish;
715	}
716
717	h_baw = tap->txa_wnd / 2;
718
719	for (;;) {
720		bf = ATH_TID_FIRST(tid);
721		if (bf_first == NULL)
722			bf_first = bf;
723		if (bf == NULL) {
724			status = ATH_AGGR_DONE;
725			break;
726		} else {
727			/*
728			 * It's the first frame;
729			 * set the aggregation limit based on the
730			 * rate control decision that has been made.
731			 */
732			aggr_limit = ath_get_aggr_limit(sc, bf_first);
733		}
734
735		/* Set this early just so things don't get confused */
736		bf->bf_next = NULL;
737
738		/*
739		 * If the frame doesn't have a sequence number that we're
740		 * tracking in the BAW (eg NULL QOS data frame), we can't
741		 * aggregate it. Stop the aggregation process; the sender
742		 * can then TX what's in the list thus far and then
743		 * TX the frame individually.
744		 */
745		if (! bf->bf_state.bfs_dobaw) {
746			status = ATH_AGGR_NONAGGR;
747			break;
748		}
749
750		/*
751		 * If any of the rates are non-HT, this packet
752		 * can't be aggregated.
753		 * XXX TODO: add a bf_state flag which gets marked
754		 * if any active rate is non-HT.
755		 */
756
757		/*
758		 * do not exceed aggregation limit
759		 */
760		al_delta = ATH_AGGR_DELIM_SZ + bf->bf_state.bfs_pktlen;
761		if (nframes &&
762		    (aggr_limit < (al + bpad + al_delta + prev_al))) {
763			status = ATH_AGGR_LIMITED;
764			break;
765		}
766
767		/*
768		 * If RTS/CTS is set on the first frame, enforce
769		 * the RTS aggregate limit.
770		 */
771		if (bf_first->bf_state.bfs_txflags &
772		    (HAL_TXDESC_CTSENA | HAL_TXDESC_RTSENA)) {
773			if (nframes &&
774			   (sc->sc_rts_aggr_limit <
775			     (al + bpad + al_delta + prev_al))) {
776				status = ATH_AGGR_8K_LIMITED;
777				break;
778			}
779		}
780
781		/*
782		 * Do not exceed subframe limit.
783		 */
784		if ((nframes + prev_frames) >= MIN((h_baw),
785		    IEEE80211_AMPDU_SUBFRAME_DEFAULT)) {
786			status = ATH_AGGR_LIMITED;
787			break;
788		}
789
790		/*
791		 * If the current frame has an RTS/CTS configuration
792		 * that differs from the first frame, override the
793		 * subsequent frame with this config.
794		 */
795		if (bf != bf_first) {
796			bf->bf_state.bfs_txflags &=
797			    ~ (HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA);
798			bf->bf_state.bfs_txflags |=
799			    bf_first->bf_state.bfs_txflags &
800			    (HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA);
801		}
802
803		/*
804		 * If the packet has a sequence number, do not
805		 * step outside of the block-ack window.
806		 */
807		if (! BAW_WITHIN(tap->txa_start, tap->txa_wnd,
808		    SEQNO(bf->bf_state.bfs_seqno))) {
809			status = ATH_AGGR_BAW_CLOSED;
810			break;
811		}
812
813		/*
814		 * this packet is part of an aggregate.
815		 */
816		ATH_TID_REMOVE(tid, bf, bf_list);
817
818		/* The TID lock is required for the BAW update */
819		ath_tx_addto_baw(sc, an, tid, bf);
820		bf->bf_state.bfs_addedbaw = 1;
821
822		/*
823		 * XXX enforce ACK for aggregate frames (this needs to be
824		 * XXX handled more gracefully?
825		 */
826		if (bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) {
827			device_printf(sc->sc_dev,
828			    "%s: HAL_TXDESC_NOACK set for an aggregate frame?\n",
829			    __func__);
830			bf->bf_state.bfs_txflags &= (~HAL_TXDESC_NOACK);
831		}
832
833		/*
834		 * Add the now owned buffer (which isn't
835		 * on the software TXQ any longer) to our
836		 * aggregate frame list.
837		 */
838		TAILQ_INSERT_TAIL(bf_q, bf, bf_list);
839		nframes ++;
840
841		/* Completion handler */
842		bf->bf_comp = ath_tx_aggr_comp;
843
844		/*
845		 * add padding for previous frame to aggregation length
846		 */
847		al += bpad + al_delta;
848
849		/*
850		 * Calculate delimiters needed for the current frame
851		 */
852		bf->bf_state.bfs_ndelim =
853		    ath_compute_num_delims(sc, bf_first,
854		    bf->bf_state.bfs_pktlen);
855
856		/*
857		 * Calculate the padding needed from this set of delimiters,
858		 * used when calculating if the next frame will fit in
859		 * the aggregate.
860		 */
861		bpad = PADBYTES(al_delta) + (bf->bf_state.bfs_ndelim << 2);
862
863		/*
864		 * Chain the buffers together
865		 */
866		if (bf_prev)
867			bf_prev->bf_next = bf;
868		bf_prev = bf;
869
870		/*
871		 * If we're leaking frames, just return at this point;
872		 * we've queued a single frame and we don't want to add
873		 * any more.
874		 */
875		if (tid->an->an_leak_count) {
876			status = ATH_AGGR_LEAK_CLOSED;
877			break;
878		}
879
880#if 0
881		/*
882		 * terminate aggregation on a small packet boundary
883		 */
884		if (bf->bf_state.bfs_pktlen < ATH_AGGR_MINPLEN) {
885			status = ATH_AGGR_SHORTPKT;
886			break;
887		}
888#endif
889
890	}
891
892finish:
893	/*
894	 * Just in case the list was empty when we tried to
895	 * dequeue a packet ..
896	 */
897	if (bf_first) {
898		bf_first->bf_state.bfs_al = al;
899		bf_first->bf_state.bfs_nframes = nframes;
900	}
901	return status;
902}
903