ar5416_ani.c revision 203159
1185380Ssam/* 2187831Ssam * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3185380Ssam * Copyright (c) 2002-2008 Atheros Communications, Inc. 4185380Ssam * 5185380Ssam * Permission to use, copy, modify, and/or distribute this software for any 6185380Ssam * purpose with or without fee is hereby granted, provided that the above 7185380Ssam * copyright notice and this permission notice appear in all copies. 8185380Ssam * 9185380Ssam * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10185380Ssam * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11185380Ssam * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12185380Ssam * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13185380Ssam * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14185380Ssam * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15185380Ssam * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16185380Ssam * 17187831Ssam * $FreeBSD: head/sys/dev/ath/ath_hal/ar5416/ar5416_ani.c 203159 2010-01-29 10:10:14Z rpaulo $ 18185380Ssam */ 19185380Ssam#include "opt_ah.h" 20185380Ssam 21185380Ssam/* 22185380Ssam * XXX this is virtually the same code as for 5212; we reuse 23185380Ssam * storage in the 5212 state block; need to refactor. 24185380Ssam */ 25185380Ssam#include "ah.h" 26185380Ssam#include "ah_internal.h" 27185380Ssam#include "ah_desc.h" 28185380Ssam 29185380Ssam#include "ar5416/ar5416.h" 30185380Ssam#include "ar5416/ar5416reg.h" 31185380Ssam#include "ar5416/ar5416phy.h" 32185380Ssam 33185380Ssam/* 34185380Ssam * Anti noise immunity support. We track phy errors and react 35185380Ssam * to excessive errors by adjusting the noise immunity parameters. 36185380Ssam */ 37185380Ssam 38185380Ssam#define HAL_EP_RND(x, mul) \ 39185380Ssam ((((x)%(mul)) >= ((mul)/2)) ? ((x) + ((mul) - 1)) / (mul) : (x)/(mul)) 40185380Ssam#define BEACON_RSSI(ahp) \ 41185380Ssam HAL_EP_RND(ahp->ah_stats.ast_nodestats.ns_avgbrssi, \ 42185380Ssam HAL_RSSI_EP_MULTIPLIER) 43185380Ssam 44185380Ssam/* 45185380Ssam * ANI processing tunes radio parameters according to PHY errors 46185380Ssam * and related information. This is done for for noise and spur 47185380Ssam * immunity in all operating modes if the device indicates it's 48185380Ssam * capable at attach time. In addition, when there is a reference 49185380Ssam * rssi value (e.g. beacon frames from an ap in station mode) 50185380Ssam * further tuning is done. 51185380Ssam * 52185380Ssam * ANI_ENA indicates whether any ANI processing should be done; 53185380Ssam * this is specified at attach time. 54185380Ssam * 55185380Ssam * ANI_ENA_RSSI indicates whether rssi-based processing should 56185380Ssam * done, this is enabled based on operating mode and is meaningful 57185380Ssam * only if ANI_ENA is true. 58185380Ssam * 59185380Ssam * ANI parameters are typically controlled only by the hal. The 60185380Ssam * AniControl interface however permits manual tuning through the 61185380Ssam * diagnostic api. 62185380Ssam */ 63185380Ssam#define ANI_ENA(ah) \ 64185380Ssam (AH5212(ah)->ah_procPhyErr & HAL_ANI_ENA) 65185380Ssam#define ANI_ENA_RSSI(ah) \ 66185380Ssam (AH5212(ah)->ah_procPhyErr & HAL_RSSI_ANI_ENA) 67185380Ssam 68185380Ssam#define ah_mibStats ah_stats.ast_mibstats 69185380Ssam 70185380Ssamstatic void 71185380SsamenableAniMIBCounters(struct ath_hal *ah, const struct ar5212AniParams *params) 72185380Ssam{ 73185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 74185380Ssam 75185380Ssam HALDEBUG(ah, HAL_DEBUG_ANI, "%s: Enable mib counters: " 76185380Ssam "OfdmPhyErrBase 0x%x cckPhyErrBase 0x%x\n", 77185380Ssam __func__, params->ofdmPhyErrBase, params->cckPhyErrBase); 78185380Ssam 79185380Ssam OS_REG_WRITE(ah, AR_FILTOFDM, 0); 80185380Ssam OS_REG_WRITE(ah, AR_FILTCCK, 0); 81185380Ssam 82185380Ssam OS_REG_WRITE(ah, AR_PHYCNT1, params->ofdmPhyErrBase); 83185380Ssam OS_REG_WRITE(ah, AR_PHYCNT2, params->cckPhyErrBase); 84185380Ssam OS_REG_WRITE(ah, AR_PHY_ERR_MASK_1, AR_PHY_ERR_OFDM_TIMING); 85185380Ssam OS_REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING); 86185380Ssam 87185380Ssam ar5212UpdateMibCounters(ah, &ahp->ah_mibStats); /* save+clear counters*/ 88185380Ssam ar5212EnableMibCounters(ah); /* enable everything */ 89185380Ssam} 90185380Ssam 91185380Ssamstatic void 92185380SsamdisableAniMIBCounters(struct ath_hal *ah) 93185380Ssam{ 94185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 95185380Ssam 96185380Ssam HALDEBUG(ah, HAL_DEBUG_ANI, "Disable MIB counters\n"); 97185380Ssam 98185380Ssam ar5212UpdateMibCounters(ah, &ahp->ah_mibStats); /* save stats */ 99185380Ssam ar5212DisableMibCounters(ah); /* disable everything */ 100185380Ssam 101185380Ssam OS_REG_WRITE(ah, AR_PHY_ERR_MASK_1, 0); 102185380Ssam OS_REG_WRITE(ah, AR_PHY_ERR_MASK_2, 0); 103185380Ssam} 104185380Ssam 105185380Ssamstatic void 106185380SsamsetPhyErrBase(struct ath_hal *ah, struct ar5212AniParams *params) 107185380Ssam{ 108185380Ssam if (params->ofdmTrigHigh >= AR_PHY_COUNTMAX) { 109185380Ssam HALDEBUG(ah, HAL_DEBUG_ANY, 110185380Ssam "OFDM Trigger %d is too high for hw counters, using max\n", 111185380Ssam params->ofdmTrigHigh); 112185380Ssam params->ofdmPhyErrBase = 0; 113185380Ssam } else 114185380Ssam params->ofdmPhyErrBase = AR_PHY_COUNTMAX - params->ofdmTrigHigh; 115185380Ssam if (params->cckTrigHigh >= AR_PHY_COUNTMAX) { 116185380Ssam HALDEBUG(ah, HAL_DEBUG_ANY, 117185380Ssam "CCK Trigger %d is too high for hw counters, using max\n", 118185380Ssam params->cckTrigHigh); 119185380Ssam params->cckPhyErrBase = 0; 120185380Ssam } else 121185380Ssam params->cckPhyErrBase = AR_PHY_COUNTMAX - params->cckTrigHigh; 122185380Ssam} 123185380Ssam 124185380Ssam/* 125185380Ssam * Setup ANI handling. Sets all thresholds and reset the 126185380Ssam * channel statistics. Note that ar5416AniReset should be 127185380Ssam * called by ar5416Reset before anything else happens and 128185380Ssam * that's where we force initial settings. 129185380Ssam */ 130185380Ssamvoid 131185380Ssamar5416AniAttach(struct ath_hal *ah, const struct ar5212AniParams *params24, 132185380Ssam const struct ar5212AniParams *params5, HAL_BOOL enable) 133185380Ssam{ 134185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 135185380Ssam 136185380Ssam if (params24 != AH_NULL) { 137185380Ssam OS_MEMCPY(&ahp->ah_aniParams24, params24, sizeof(*params24)); 138185380Ssam setPhyErrBase(ah, &ahp->ah_aniParams24); 139185380Ssam } 140185380Ssam if (params5 != AH_NULL) { 141185380Ssam OS_MEMCPY(&ahp->ah_aniParams5, params5, sizeof(*params5)); 142185380Ssam setPhyErrBase(ah, &ahp->ah_aniParams5); 143185380Ssam } 144185380Ssam 145185380Ssam OS_MEMZERO(ahp->ah_ani, sizeof(ahp->ah_ani)); 146185380Ssam /* Enable MIB Counters */ 147185380Ssam enableAniMIBCounters(ah, &ahp->ah_aniParams24 /*XXX*/); 148185380Ssam 149185380Ssam if (enable) { /* Enable ani now */ 150185380Ssam HALASSERT(params24 != AH_NULL && params5 != AH_NULL); 151185380Ssam ahp->ah_procPhyErr |= HAL_ANI_ENA; 152185380Ssam } else { 153185380Ssam ahp->ah_procPhyErr &= ~HAL_ANI_ENA; 154185380Ssam } 155185380Ssam} 156185380Ssam 157185380Ssam/* 158185380Ssam * Cleanup any ANI state setup. 159185380Ssam */ 160185380Ssamvoid 161185380Ssamar5416AniDetach(struct ath_hal *ah) 162185380Ssam{ 163185380Ssam HALDEBUG(ah, HAL_DEBUG_ANI, "Detaching Ani\n"); 164185380Ssam disableAniMIBCounters(ah); 165185380Ssam} 166185380Ssam 167185380Ssam/* 168185380Ssam * Control Adaptive Noise Immunity Parameters 169185380Ssam */ 170185380SsamHAL_BOOL 171185380Ssamar5416AniControl(struct ath_hal *ah, HAL_ANI_CMD cmd, int param) 172185380Ssam{ 173185380Ssam typedef int TABLE[]; 174185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 175185380Ssam struct ar5212AniState *aniState = ahp->ah_curani; 176185380Ssam const struct ar5212AniParams *params = aniState->params; 177185380Ssam 178185380Ssam OS_MARK(ah, AH_MARK_ANI_CONTROL, cmd); 179185380Ssam 180185380Ssam switch (cmd) { 181185380Ssam case HAL_ANI_NOISE_IMMUNITY_LEVEL: { 182185380Ssam u_int level = param; 183185380Ssam 184185380Ssam if (level >= params->maxNoiseImmunityLevel) { 185185380Ssam HALDEBUG(ah, HAL_DEBUG_ANY, 186203159Srpaulo "%s: immunity level out of range (%u > %u)\n", 187185380Ssam __func__, level, params->maxNoiseImmunityLevel); 188185380Ssam return AH_FALSE; 189185380Ssam } 190185380Ssam 191185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ, 192185380Ssam AR_PHY_DESIRED_SZ_TOT_DES, params->totalSizeDesired[level]); 193185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1, 194185380Ssam AR_PHY_AGC_CTL1_COARSE_LOW, params->coarseLow[level]); 195185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1, 196185380Ssam AR_PHY_AGC_CTL1_COARSE_HIGH, params->coarseHigh[level]); 197185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG, 198185380Ssam AR_PHY_FIND_SIG_FIRPWR, params->firpwr[level]); 199185380Ssam 200185380Ssam if (level > aniState->noiseImmunityLevel) 201185380Ssam ahp->ah_stats.ast_ani_niup++; 202185380Ssam else if (level < aniState->noiseImmunityLevel) 203185380Ssam ahp->ah_stats.ast_ani_nidown++; 204185380Ssam aniState->noiseImmunityLevel = level; 205185380Ssam break; 206185380Ssam } 207185380Ssam case HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION: { 208185380Ssam static const TABLE m1ThreshLow = { 127, 50 }; 209185380Ssam static const TABLE m2ThreshLow = { 127, 40 }; 210185380Ssam static const TABLE m1Thresh = { 127, 0x4d }; 211185380Ssam static const TABLE m2Thresh = { 127, 0x40 }; 212185380Ssam static const TABLE m2CountThr = { 31, 16 }; 213185380Ssam static const TABLE m2CountThrLow = { 63, 48 }; 214185380Ssam u_int on = param ? 1 : 0; 215185380Ssam 216185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW, 217185380Ssam AR_PHY_SFCORR_LOW_M1_THRESH_LOW, m1ThreshLow[on]); 218185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW, 219185380Ssam AR_PHY_SFCORR_LOW_M2_THRESH_LOW, m2ThreshLow[on]); 220185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR, 221185380Ssam AR_PHY_SFCORR_M1_THRESH, m1Thresh[on]); 222185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR, 223185380Ssam AR_PHY_SFCORR_M2_THRESH, m2Thresh[on]); 224185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR, 225185380Ssam AR_PHY_SFCORR_M2COUNT_THR, m2CountThr[on]); 226185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW, 227185380Ssam AR_PHY_SFCORR_LOW_M2COUNT_THR_LOW, m2CountThrLow[on]); 228185380Ssam 229185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT, 230185380Ssam AR_PHY_SFCORR_EXT_M1_THRESH_LOW, m1ThreshLow[on]); 231185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT, 232185380Ssam AR_PHY_SFCORR_EXT_M2_THRESH_LOW, m2ThreshLow[on]); 233185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT, 234185380Ssam AR_PHY_SFCORR_EXT_M1_THRESH, m1Thresh[on]); 235185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT, 236185380Ssam AR_PHY_SFCORR_EXT_M2_THRESH, m2Thresh[on]); 237185380Ssam 238185380Ssam if (on) { 239185380Ssam OS_REG_SET_BIT(ah, AR_PHY_SFCORR_LOW, 240185380Ssam AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW); 241185380Ssam } else { 242185380Ssam OS_REG_CLR_BIT(ah, AR_PHY_SFCORR_LOW, 243185380Ssam AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW); 244185380Ssam } 245185380Ssam if (on) 246185380Ssam ahp->ah_stats.ast_ani_ofdmon++; 247185380Ssam else 248185380Ssam ahp->ah_stats.ast_ani_ofdmoff++; 249185380Ssam aniState->ofdmWeakSigDetectOff = !on; 250185380Ssam break; 251185380Ssam } 252185380Ssam case HAL_ANI_CCK_WEAK_SIGNAL_THR: { 253185380Ssam static const TABLE weakSigThrCck = { 8, 6 }; 254185380Ssam u_int high = param ? 1 : 0; 255185380Ssam 256185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_CCK_DETECT, 257185380Ssam AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK, weakSigThrCck[high]); 258185380Ssam if (high) 259185380Ssam ahp->ah_stats.ast_ani_cckhigh++; 260185380Ssam else 261185380Ssam ahp->ah_stats.ast_ani_ccklow++; 262185380Ssam aniState->cckWeakSigThreshold = high; 263185380Ssam break; 264185380Ssam } 265185380Ssam case HAL_ANI_FIRSTEP_LEVEL: { 266185380Ssam u_int level = param; 267185380Ssam 268185380Ssam if (level >= params->maxFirstepLevel) { 269185380Ssam HALDEBUG(ah, HAL_DEBUG_ANY, 270203159Srpaulo "%s: firstep level out of range (%u > %u)\n", 271185380Ssam __func__, level, params->maxFirstepLevel); 272185380Ssam return AH_FALSE; 273185380Ssam } 274185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG, 275185380Ssam AR_PHY_FIND_SIG_FIRSTEP, params->firstep[level]); 276185380Ssam if (level > aniState->firstepLevel) 277185380Ssam ahp->ah_stats.ast_ani_stepup++; 278185380Ssam else if (level < aniState->firstepLevel) 279185380Ssam ahp->ah_stats.ast_ani_stepdown++; 280185380Ssam aniState->firstepLevel = level; 281185380Ssam break; 282185380Ssam } 283185380Ssam case HAL_ANI_SPUR_IMMUNITY_LEVEL: { 284185380Ssam u_int level = param; 285185380Ssam 286185380Ssam if (level >= params->maxSpurImmunityLevel) { 287185380Ssam HALDEBUG(ah, HAL_DEBUG_ANY, 288203159Srpaulo "%s: spur immunity level out of range (%u > %u)\n", 289185380Ssam __func__, level, params->maxSpurImmunityLevel); 290185380Ssam return AH_FALSE; 291185380Ssam } 292185380Ssam OS_REG_RMW_FIELD(ah, AR_PHY_TIMING5, 293185380Ssam AR_PHY_TIMING5_CYCPWR_THR1, params->cycPwrThr1[level]); 294185380Ssam if (level > aniState->spurImmunityLevel) 295185380Ssam ahp->ah_stats.ast_ani_spurup++; 296185380Ssam else if (level < aniState->spurImmunityLevel) 297185380Ssam ahp->ah_stats.ast_ani_spurdown++; 298185380Ssam aniState->spurImmunityLevel = level; 299185380Ssam break; 300185380Ssam } 301185380Ssam case HAL_ANI_PRESENT: 302185380Ssam break; 303185380Ssam case HAL_ANI_MODE: 304185380Ssam if (param == 0) { 305185380Ssam ahp->ah_procPhyErr &= ~HAL_ANI_ENA; 306185380Ssam /* Turn off HW counters if we have them */ 307185380Ssam ar5416AniDetach(ah); 308185380Ssam ar5212SetRxFilter(ah, 309185380Ssam ar5212GetRxFilter(ah) &~ HAL_RX_FILTER_PHYERR); 310185380Ssam } else { /* normal/auto mode */ 311185380Ssam /* don't mess with state if already enabled */ 312185380Ssam if (ahp->ah_procPhyErr & HAL_ANI_ENA) 313185380Ssam break; 314185380Ssam ar5212SetRxFilter(ah, 315185380Ssam ar5212GetRxFilter(ah) &~ HAL_RX_FILTER_PHYERR); 316185380Ssam /* Enable MIB Counters */ 317185380Ssam enableAniMIBCounters(ah, ahp->ah_curani != AH_NULL ? 318185380Ssam ahp->ah_curani->params: &ahp->ah_aniParams24 /*XXX*/); 319185380Ssam ahp->ah_procPhyErr |= HAL_ANI_ENA; 320185380Ssam } 321185380Ssam break; 322185380Ssam#ifdef AH_PRIVATE_DIAG 323185380Ssam case HAL_ANI_PHYERR_RESET: 324185380Ssam ahp->ah_stats.ast_ani_ofdmerrs = 0; 325185380Ssam ahp->ah_stats.ast_ani_cckerrs = 0; 326185380Ssam break; 327185380Ssam#endif /* AH_PRIVATE_DIAG */ 328185380Ssam default: 329185380Ssam HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid cmd %u\n", 330185380Ssam __func__, cmd); 331185380Ssam return AH_FALSE; 332185380Ssam } 333185380Ssam return AH_TRUE; 334185380Ssam} 335185380Ssam 336185380Ssamstatic void 337185380Ssamar5416AniOfdmErrTrigger(struct ath_hal *ah) 338185380Ssam{ 339185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 340187831Ssam const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan; 341185380Ssam struct ar5212AniState *aniState; 342185380Ssam const struct ar5212AniParams *params; 343185380Ssam 344185380Ssam HALASSERT(chan != AH_NULL); 345185380Ssam 346185380Ssam if (!ANI_ENA(ah)) 347185380Ssam return; 348185380Ssam 349185380Ssam aniState = ahp->ah_curani; 350185380Ssam params = aniState->params; 351185380Ssam /* First, raise noise immunity level, up to max */ 352185380Ssam if (aniState->noiseImmunityLevel+1 < params->maxNoiseImmunityLevel) { 353185380Ssam ar5416AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL, 354185380Ssam aniState->noiseImmunityLevel + 1); 355185380Ssam return; 356185380Ssam } 357185380Ssam /* then, raise spur immunity level, up to max */ 358185380Ssam if (aniState->spurImmunityLevel+1 < params->maxSpurImmunityLevel) { 359185380Ssam ar5416AniControl(ah, HAL_ANI_SPUR_IMMUNITY_LEVEL, 360185380Ssam aniState->spurImmunityLevel + 1); 361185380Ssam return; 362185380Ssam } 363185380Ssam 364185380Ssam if (ANI_ENA_RSSI(ah)) { 365185380Ssam int32_t rssi = BEACON_RSSI(ahp); 366185380Ssam if (rssi > params->rssiThrHigh) { 367185380Ssam /* 368185380Ssam * Beacon rssi is high, can turn off ofdm 369185380Ssam * weak sig detect. 370185380Ssam */ 371185380Ssam if (!aniState->ofdmWeakSigDetectOff) { 372185380Ssam ar5416AniControl(ah, 373185380Ssam HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION, 374185380Ssam AH_FALSE); 375185380Ssam ar5416AniControl(ah, 376185380Ssam HAL_ANI_SPUR_IMMUNITY_LEVEL, 0); 377185380Ssam return; 378185380Ssam } 379185380Ssam /* 380185380Ssam * If weak sig detect is already off, as last resort, 381185380Ssam * raise firstep level 382185380Ssam */ 383185380Ssam if (aniState->firstepLevel+1 < params->maxFirstepLevel) { 384185380Ssam ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL, 385185380Ssam aniState->firstepLevel + 1); 386185380Ssam return; 387185380Ssam } 388185380Ssam } else if (rssi > params->rssiThrLow) { 389185380Ssam /* 390185380Ssam * Beacon rssi in mid range, need ofdm weak signal 391185380Ssam * detect, but we can raise firststepLevel. 392185380Ssam */ 393185380Ssam if (aniState->ofdmWeakSigDetectOff) 394185380Ssam ar5416AniControl(ah, 395185380Ssam HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION, 396185380Ssam AH_TRUE); 397185380Ssam if (aniState->firstepLevel+1 < params->maxFirstepLevel) 398185380Ssam ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL, 399185380Ssam aniState->firstepLevel + 1); 400185380Ssam return; 401185380Ssam } else { 402185380Ssam /* 403185380Ssam * Beacon rssi is low, if in 11b/g mode, turn off ofdm 404185380Ssam * weak signal detection and zero firstepLevel to 405185380Ssam * maximize CCK sensitivity 406185380Ssam */ 407187831Ssam if (IEEE80211_IS_CHAN_CCK(chan)) { 408185380Ssam if (!aniState->ofdmWeakSigDetectOff) 409185380Ssam ar5416AniControl(ah, 410185380Ssam HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION, 411185380Ssam AH_FALSE); 412185380Ssam if (aniState->firstepLevel > 0) 413185380Ssam ar5416AniControl(ah, 414185380Ssam HAL_ANI_FIRSTEP_LEVEL, 0); 415185380Ssam return; 416185380Ssam } 417185380Ssam } 418185380Ssam } 419185380Ssam} 420185380Ssam 421185380Ssamstatic void 422185380Ssamar5416AniCckErrTrigger(struct ath_hal *ah) 423185380Ssam{ 424185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 425187831Ssam const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan; 426185380Ssam struct ar5212AniState *aniState; 427185380Ssam const struct ar5212AniParams *params; 428185380Ssam 429185380Ssam HALASSERT(chan != AH_NULL); 430185380Ssam 431185380Ssam if (!ANI_ENA(ah)) 432185380Ssam return; 433185380Ssam 434185380Ssam /* first, raise noise immunity level, up to max */ 435185380Ssam aniState = ahp->ah_curani; 436185380Ssam params = aniState->params; 437185380Ssam if (aniState->noiseImmunityLevel+1 < params->maxNoiseImmunityLevel) { 438185380Ssam ar5416AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL, 439185380Ssam aniState->noiseImmunityLevel + 1); 440185380Ssam return; 441185380Ssam } 442185380Ssam 443185380Ssam if (ANI_ENA_RSSI(ah)) { 444185380Ssam int32_t rssi = BEACON_RSSI(ahp); 445185380Ssam if (rssi > params->rssiThrLow) { 446185380Ssam /* 447185380Ssam * Beacon signal in mid and high range, 448185380Ssam * raise firstep level. 449185380Ssam */ 450185380Ssam if (aniState->firstepLevel+1 < params->maxFirstepLevel) 451185380Ssam ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL, 452185380Ssam aniState->firstepLevel + 1); 453185380Ssam } else { 454185380Ssam /* 455185380Ssam * Beacon rssi is low, zero firstep level to maximize 456185380Ssam * CCK sensitivity in 11b/g mode. 457185380Ssam */ 458187831Ssam if (IEEE80211_IS_CHAN_CCK(chan)) { 459185380Ssam if (aniState->firstepLevel > 0) 460185380Ssam ar5416AniControl(ah, 461185380Ssam HAL_ANI_FIRSTEP_LEVEL, 0); 462185380Ssam } 463185380Ssam } 464185380Ssam } 465185380Ssam} 466185380Ssam 467185380Ssamstatic void 468185380Ssamar5416AniRestart(struct ath_hal *ah, struct ar5212AniState *aniState) 469185380Ssam{ 470185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 471185380Ssam const struct ar5212AniParams *params = aniState->params; 472185380Ssam 473185380Ssam aniState->listenTime = 0; 474185380Ssam /* 475185380Ssam * NB: these are written on reset based on the 476185380Ssam * ini so we must re-write them! 477185380Ssam */ 478185380Ssam HALDEBUG(ah, HAL_DEBUG_ANI, 479185380Ssam "%s: Writing ofdmbase=%u cckbase=%u\n", __func__, 480185380Ssam params->ofdmPhyErrBase, params->cckPhyErrBase); 481185380Ssam OS_REG_WRITE(ah, AR_PHY_ERR_1, params->ofdmPhyErrBase); 482185380Ssam OS_REG_WRITE(ah, AR_PHY_ERR_2, params->cckPhyErrBase); 483185380Ssam OS_REG_WRITE(ah, AR_PHY_ERR_MASK_1, AR_PHY_ERR_OFDM_TIMING); 484185380Ssam OS_REG_WRITE(ah, AR_PHY_ERR_MASK_1, AR_PHY_ERR_CCK_TIMING); 485185380Ssam 486185380Ssam /* Clear the mib counters and save them in the stats */ 487185380Ssam ar5212UpdateMibCounters(ah, &ahp->ah_mibStats); 488185380Ssam aniState->ofdmPhyErrCount = 0; 489185380Ssam aniState->cckPhyErrCount = 0; 490185380Ssam} 491185380Ssam 492185380Ssam/* 493185380Ssam * Restore/reset the ANI parameters and reset the statistics. 494185380Ssam * This routine must be called for every channel change. 495185380Ssam * 496185380Ssam * NOTE: This is where ah_curani is set; other ani code assumes 497185380Ssam * it is setup to reflect the current channel. 498185380Ssam */ 499185380Ssamvoid 500187831Ssamar5416AniReset(struct ath_hal *ah, const struct ieee80211_channel *chan, 501185380Ssam HAL_OPMODE opmode, int restore) 502185380Ssam{ 503185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 504187831Ssam HAL_CHANNEL_INTERNAL *ichan = ath_hal_checkchannel(ah, chan); 505187831Ssam /* XXX bounds check ic_devdata */ 506187831Ssam struct ar5212AniState *aniState = &ahp->ah_ani[chan->ic_devdata]; 507185380Ssam uint32_t rxfilter; 508185380Ssam 509187831Ssam if ((ichan->privFlags & CHANNEL_ANI_INIT) == 0) { 510187831Ssam OS_MEMZERO(aniState, sizeof(*aniState)); 511187831Ssam if (IEEE80211_IS_CHAN_2GHZ(chan)) 512187831Ssam aniState->params = &ahp->ah_aniParams24; 513187831Ssam else 514187831Ssam aniState->params = &ahp->ah_aniParams5; 515187831Ssam ichan->privFlags |= CHANNEL_ANI_INIT; 516187831Ssam HALASSERT((ichan->privFlags & CHANNEL_ANI_SETUP) == 0); 517187831Ssam } 518185380Ssam ahp->ah_curani = aniState; 519185380Ssam#if 0 520187831Ssam ath_hal_printf(ah,"%s: chan %u/0x%x restore %d opmode %u%s\n", 521187831Ssam __func__, chan->ic_freq, chan->ic_flags, restore, opmode, 522187831Ssam ichan->privFlags & CHANNEL_ANI_SETUP ? " setup" : ""); 523185380Ssam#else 524187831Ssam HALDEBUG(ah, HAL_DEBUG_ANI, "%s: chan %u/0x%x restore %d opmode %u%s\n", 525187831Ssam __func__, chan->ic_freq, chan->ic_flags, restore, opmode, 526187831Ssam ichan->privFlags & CHANNEL_ANI_SETUP ? " setup" : ""); 527185380Ssam#endif 528185380Ssam OS_MARK(ah, AH_MARK_ANI_RESET, opmode); 529185380Ssam 530185380Ssam /* 531185380Ssam * Turn off PHY error frame delivery while we futz with settings. 532185380Ssam */ 533185380Ssam rxfilter = ar5212GetRxFilter(ah); 534185380Ssam ar5212SetRxFilter(ah, rxfilter &~ HAL_RX_FILTER_PHYERR); 535185380Ssam /* 536185380Ssam * Automatic processing is done only in station mode right now. 537185380Ssam */ 538185380Ssam if (opmode == HAL_M_STA) 539185380Ssam ahp->ah_procPhyErr |= HAL_RSSI_ANI_ENA; 540185380Ssam else 541185380Ssam ahp->ah_procPhyErr &= ~HAL_RSSI_ANI_ENA; 542185380Ssam /* 543185380Ssam * Set all ani parameters. We either set them to initial 544185380Ssam * values or restore the previous ones for the channel. 545185380Ssam * XXX if ANI follows hardware, we don't care what mode we're 546185380Ssam * XXX in, we should keep the ani parameters 547185380Ssam */ 548187831Ssam if (restore && (ichan->privFlags & CHANNEL_ANI_SETUP)) { 549185380Ssam ar5416AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL, 550185380Ssam aniState->noiseImmunityLevel); 551185380Ssam ar5416AniControl(ah, HAL_ANI_SPUR_IMMUNITY_LEVEL, 552185380Ssam aniState->spurImmunityLevel); 553185380Ssam ar5416AniControl(ah, HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION, 554185380Ssam !aniState->ofdmWeakSigDetectOff); 555185380Ssam ar5416AniControl(ah, HAL_ANI_CCK_WEAK_SIGNAL_THR, 556185380Ssam aniState->cckWeakSigThreshold); 557185380Ssam ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL, 558185380Ssam aniState->firstepLevel); 559185380Ssam } else { 560185380Ssam ar5416AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL, 0); 561185380Ssam ar5416AniControl(ah, HAL_ANI_SPUR_IMMUNITY_LEVEL, 0); 562185380Ssam ar5416AniControl(ah, HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION, 563185380Ssam AH_TRUE); 564185380Ssam ar5416AniControl(ah, HAL_ANI_CCK_WEAK_SIGNAL_THR, AH_FALSE); 565185380Ssam ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL, 0); 566187831Ssam ichan->privFlags |= CHANNEL_ANI_SETUP; 567185380Ssam } 568185380Ssam ar5416AniRestart(ah, aniState); 569185380Ssam 570185380Ssam /* restore RX filter mask */ 571185380Ssam ar5212SetRxFilter(ah, rxfilter); 572185380Ssam} 573185380Ssam 574185380Ssam/* 575185380Ssam * Process a MIB interrupt. We may potentially be invoked because 576185380Ssam * any of the MIB counters overflow/trigger so don't assume we're 577185380Ssam * here because a PHY error counter triggered. 578185380Ssam */ 579185380Ssamvoid 580185380Ssamar5416ProcessMibIntr(struct ath_hal *ah, const HAL_NODE_STATS *stats) 581185380Ssam{ 582185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 583185380Ssam uint32_t phyCnt1, phyCnt2; 584185380Ssam 585185380Ssam HALDEBUG(ah, HAL_DEBUG_ANI, "%s: mibc 0x%x phyCnt1 0x%x phyCnt2 0x%x " 586185380Ssam "filtofdm 0x%x filtcck 0x%x\n", 587185380Ssam __func__, OS_REG_READ(ah, AR_MIBC), 588185380Ssam OS_REG_READ(ah, AR_PHYCNT1), OS_REG_READ(ah, AR_PHYCNT2), 589185380Ssam OS_REG_READ(ah, AR_FILTOFDM), OS_REG_READ(ah, AR_FILTCCK)); 590185380Ssam 591185380Ssam /* 592185380Ssam * First order of business is to clear whatever caused 593185380Ssam * the interrupt so we don't keep getting interrupted. 594185380Ssam * We have the usual mib counters that are reset-on-read 595185380Ssam * and the additional counters that appeared starting in 596185380Ssam * Hainan. We collect the mib counters and explicitly 597185380Ssam * zero additional counters we are not using. Anything 598185380Ssam * else is reset only if it caused the interrupt. 599185380Ssam */ 600185380Ssam /* NB: these are not reset-on-read */ 601185380Ssam phyCnt1 = OS_REG_READ(ah, AR_PHY_ERR_1); 602185380Ssam phyCnt2 = OS_REG_READ(ah, AR_PHY_ERR_2); 603185380Ssam /* not used, always reset them in case they are the cause */ 604185380Ssam OS_REG_WRITE(ah, AR_FILTOFDM, 0); 605185380Ssam OS_REG_WRITE(ah, AR_FILTCCK, 0); 606185380Ssam if ((OS_REG_READ(ah, AR_SLP_MIB_CTRL) & AR_SLP_MIB_PENDING) == 0) 607185380Ssam OS_REG_WRITE(ah, AR_SLP_MIB_CTRL, AR_SLP_MIB_CLEAR); 608185380Ssam 609185380Ssam /* Clear the mib counters and save them in the stats */ 610185380Ssam ar5212UpdateMibCounters(ah, &ahp->ah_mibStats); 611185380Ssam ahp->ah_stats.ast_nodestats = *stats; 612185380Ssam 613185380Ssam /* 614185380Ssam * Check for an ani stat hitting the trigger threshold. 615185380Ssam * When this happens we get a MIB interrupt and the top 616185380Ssam * 2 bits of the counter register will be 0b11, hence 617185380Ssam * the mask check of phyCnt?. 618185380Ssam */ 619185380Ssam if (((phyCnt1 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK) || 620185380Ssam ((phyCnt2 & AR_MIBCNT_INTRMASK) == AR_MIBCNT_INTRMASK)) { 621185380Ssam struct ar5212AniState *aniState = ahp->ah_curani; 622185380Ssam const struct ar5212AniParams *params = aniState->params; 623185380Ssam uint32_t ofdmPhyErrCnt, cckPhyErrCnt; 624185380Ssam 625185380Ssam ofdmPhyErrCnt = phyCnt1 - params->ofdmPhyErrBase; 626185380Ssam ahp->ah_stats.ast_ani_ofdmerrs += 627185380Ssam ofdmPhyErrCnt - aniState->ofdmPhyErrCount; 628185380Ssam aniState->ofdmPhyErrCount = ofdmPhyErrCnt; 629185380Ssam 630185380Ssam cckPhyErrCnt = phyCnt2 - params->cckPhyErrBase; 631185380Ssam ahp->ah_stats.ast_ani_cckerrs += 632185380Ssam cckPhyErrCnt - aniState->cckPhyErrCount; 633185380Ssam aniState->cckPhyErrCount = cckPhyErrCnt; 634185380Ssam 635185380Ssam /* 636185380Ssam * NB: figure out which counter triggered. If both 637185380Ssam * trigger we'll only deal with one as the processing 638185380Ssam * clobbers the error counter so the trigger threshold 639185380Ssam * check will never be true. 640185380Ssam */ 641185380Ssam if (aniState->ofdmPhyErrCount > params->ofdmTrigHigh) 642185380Ssam ar5416AniOfdmErrTrigger(ah); 643185380Ssam if (aniState->cckPhyErrCount > params->cckTrigHigh) 644185380Ssam ar5416AniCckErrTrigger(ah); 645185380Ssam /* NB: always restart to insure the h/w counters are reset */ 646185380Ssam ar5416AniRestart(ah, aniState); 647185380Ssam } 648185380Ssam} 649185380Ssam 650185380Ssamstatic void 651185380Ssamar5416AniLowerImmunity(struct ath_hal *ah) 652185380Ssam{ 653185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 654185380Ssam struct ar5212AniState *aniState; 655185380Ssam const struct ar5212AniParams *params; 656185380Ssam 657185380Ssam HALASSERT(ANI_ENA(ah)); 658185380Ssam 659185380Ssam aniState = ahp->ah_curani; 660185380Ssam params = aniState->params; 661185380Ssam if (ANI_ENA_RSSI(ah)) { 662185380Ssam int32_t rssi = BEACON_RSSI(ahp); 663185380Ssam if (rssi > params->rssiThrHigh) { 664185380Ssam /* 665185380Ssam * Beacon signal is high, leave ofdm weak signal 666185380Ssam * detection off or it may oscillate. Let it fall 667185380Ssam * through. 668185380Ssam */ 669185380Ssam } else if (rssi > params->rssiThrLow) { 670185380Ssam /* 671185380Ssam * Beacon rssi in mid range, turn on ofdm weak signal 672185380Ssam * detection or lower firstep level. 673185380Ssam */ 674185380Ssam if (aniState->ofdmWeakSigDetectOff) { 675185380Ssam ar5416AniControl(ah, 676185380Ssam HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION, 677185380Ssam AH_TRUE); 678185380Ssam return; 679185380Ssam } 680185380Ssam if (aniState->firstepLevel > 0) { 681185380Ssam ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL, 682185380Ssam aniState->firstepLevel - 1); 683185380Ssam return; 684185380Ssam } 685185380Ssam } else { 686185380Ssam /* 687185380Ssam * Beacon rssi is low, reduce firstep level. 688185380Ssam */ 689185380Ssam if (aniState->firstepLevel > 0) { 690185380Ssam ar5416AniControl(ah, HAL_ANI_FIRSTEP_LEVEL, 691185380Ssam aniState->firstepLevel - 1); 692185380Ssam return; 693185380Ssam } 694185380Ssam } 695185380Ssam } 696185380Ssam /* then lower spur immunity level, down to zero */ 697185380Ssam if (aniState->spurImmunityLevel > 0) { 698185380Ssam ar5416AniControl(ah, HAL_ANI_SPUR_IMMUNITY_LEVEL, 699185380Ssam aniState->spurImmunityLevel - 1); 700185380Ssam return; 701185380Ssam } 702185380Ssam /* 703185380Ssam * if all else fails, lower noise immunity level down to a min value 704185380Ssam * zero for now 705185380Ssam */ 706185380Ssam if (aniState->noiseImmunityLevel > 0) { 707185380Ssam ar5416AniControl(ah, HAL_ANI_NOISE_IMMUNITY_LEVEL, 708185380Ssam aniState->noiseImmunityLevel - 1); 709185380Ssam return; 710185380Ssam } 711185380Ssam} 712185380Ssam 713185380Ssam#define CLOCK_RATE 44000 /* XXX use mac_usec or similar */ 714185380Ssam/* convert HW counter values to ms using 11g clock rate, goo9d enough 715185380Ssam for 11a and Turbo */ 716185380Ssam 717185380Ssam/* 718185380Ssam * Return an approximation of the time spent ``listening'' by 719185380Ssam * deducting the cycles spent tx'ing and rx'ing from the total 720185380Ssam * cycle count since our last call. A return value <0 indicates 721185380Ssam * an invalid/inconsistent time. 722185380Ssam */ 723185380Ssamstatic int32_t 724185380Ssamar5416AniGetListenTime(struct ath_hal *ah) 725185380Ssam{ 726185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 727185380Ssam struct ar5212AniState *aniState; 728185380Ssam uint32_t txFrameCount, rxFrameCount, cycleCount; 729185380Ssam int32_t listenTime; 730185380Ssam 731185380Ssam txFrameCount = OS_REG_READ(ah, AR_TFCNT); 732185380Ssam rxFrameCount = OS_REG_READ(ah, AR_RFCNT); 733185380Ssam cycleCount = OS_REG_READ(ah, AR_CCCNT); 734185380Ssam 735185380Ssam aniState = ahp->ah_curani; 736185380Ssam if (aniState->cycleCount == 0 || aniState->cycleCount > cycleCount) { 737185380Ssam /* 738185380Ssam * Cycle counter wrap (or initial call); it's not possible 739185380Ssam * to accurately calculate a value because the registers 740185380Ssam * right shift rather than wrap--so punt and return 0. 741185380Ssam */ 742185380Ssam listenTime = 0; 743185380Ssam ahp->ah_stats.ast_ani_lzero++; 744185380Ssam } else { 745185380Ssam int32_t ccdelta = cycleCount - aniState->cycleCount; 746185380Ssam int32_t rfdelta = rxFrameCount - aniState->rxFrameCount; 747185380Ssam int32_t tfdelta = txFrameCount - aniState->txFrameCount; 748185380Ssam listenTime = (ccdelta - rfdelta - tfdelta) / CLOCK_RATE; 749185380Ssam } 750185380Ssam aniState->cycleCount = cycleCount; 751185380Ssam aniState->txFrameCount = txFrameCount; 752185380Ssam aniState->rxFrameCount = rxFrameCount; 753185380Ssam return listenTime; 754185380Ssam} 755185380Ssam 756185380Ssam/* 757185380Ssam * Update ani stats in preparation for listen time processing. 758185380Ssam */ 759185380Ssamstatic void 760185380SsamupdateMIBStats(struct ath_hal *ah, struct ar5212AniState *aniState) 761185380Ssam{ 762185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 763185380Ssam const struct ar5212AniParams *params = aniState->params; 764185380Ssam uint32_t phyCnt1, phyCnt2; 765185380Ssam int32_t ofdmPhyErrCnt, cckPhyErrCnt; 766185380Ssam 767185380Ssam /* Clear the mib counters and save them in the stats */ 768185380Ssam ar5212UpdateMibCounters(ah, &ahp->ah_mibStats); 769185380Ssam 770185380Ssam /* NB: these are not reset-on-read */ 771185380Ssam phyCnt1 = OS_REG_READ(ah, AR_PHY_ERR_1); 772185380Ssam phyCnt2 = OS_REG_READ(ah, AR_PHY_ERR_2); 773185380Ssam 774185380Ssam /* NB: these are spec'd to never roll-over */ 775185380Ssam ofdmPhyErrCnt = phyCnt1 - params->ofdmPhyErrBase; 776185380Ssam if (ofdmPhyErrCnt < 0) { 777185380Ssam HALDEBUG(ah, HAL_DEBUG_ANI, "OFDM phyErrCnt %d phyCnt1 0x%x\n", 778185380Ssam ofdmPhyErrCnt, phyCnt1); 779185380Ssam ofdmPhyErrCnt = AR_PHY_COUNTMAX; 780185380Ssam } 781185380Ssam ahp->ah_stats.ast_ani_ofdmerrs += 782185380Ssam ofdmPhyErrCnt - aniState->ofdmPhyErrCount; 783185380Ssam aniState->ofdmPhyErrCount = ofdmPhyErrCnt; 784185380Ssam 785185380Ssam cckPhyErrCnt = phyCnt2 - params->cckPhyErrBase; 786185380Ssam if (cckPhyErrCnt < 0) { 787185380Ssam HALDEBUG(ah, HAL_DEBUG_ANI, "CCK phyErrCnt %d phyCnt2 0x%x\n", 788185380Ssam cckPhyErrCnt, phyCnt2); 789185380Ssam cckPhyErrCnt = AR_PHY_COUNTMAX; 790185380Ssam } 791185380Ssam ahp->ah_stats.ast_ani_cckerrs += 792185380Ssam cckPhyErrCnt - aniState->cckPhyErrCount; 793185380Ssam aniState->cckPhyErrCount = cckPhyErrCnt; 794185380Ssam} 795185380Ssam 796185380Ssam/* 797185380Ssam * Do periodic processing. This routine is called from the 798185380Ssam * driver's rx interrupt handler after processing frames. 799185380Ssam */ 800185380Ssamvoid 801185380Ssamar5416AniPoll(struct ath_hal *ah, const HAL_NODE_STATS *stats, 802187831Ssam const struct ieee80211_channel *chan) 803185380Ssam{ 804185380Ssam struct ath_hal_5212 *ahp = AH5212(ah); 805185380Ssam struct ar5212AniState *aniState = ahp->ah_curani; 806185380Ssam const struct ar5212AniParams *params; 807185380Ssam int32_t listenTime; 808185380Ssam 809185380Ssam ahp->ah_stats.ast_nodestats.ns_avgbrssi = stats->ns_avgbrssi; 810185380Ssam 811185380Ssam /* XXX can aniState be null? */ 812185380Ssam if (aniState == AH_NULL) 813185380Ssam return; 814185380Ssam if (!ANI_ENA(ah)) 815185380Ssam return; 816185380Ssam 817185380Ssam listenTime = ar5416AniGetListenTime(ah); 818185380Ssam if (listenTime < 0) { 819185380Ssam ahp->ah_stats.ast_ani_lneg++; 820185380Ssam /* restart ANI period if listenTime is invalid */ 821185380Ssam ar5416AniRestart(ah, aniState); 822185380Ssam } 823185380Ssam /* XXX beware of overflow? */ 824185380Ssam aniState->listenTime += listenTime; 825185380Ssam 826185380Ssam OS_MARK(ah, AH_MARK_ANI_POLL, aniState->listenTime); 827185380Ssam 828185380Ssam params = aniState->params; 829185380Ssam if (aniState->listenTime > 5*params->period) { 830185380Ssam /* 831185380Ssam * Check to see if need to lower immunity if 832185380Ssam * 5 aniPeriods have passed 833185380Ssam */ 834185380Ssam updateMIBStats(ah, aniState); 835185380Ssam if (aniState->ofdmPhyErrCount <= aniState->listenTime * 836185380Ssam params->ofdmTrigLow/1000 && 837185380Ssam aniState->cckPhyErrCount <= aniState->listenTime * 838185380Ssam params->cckTrigLow/1000) 839185380Ssam ar5416AniLowerImmunity(ah); 840185380Ssam ar5416AniRestart(ah, aniState); 841185380Ssam } else if (aniState->listenTime > params->period) { 842185380Ssam updateMIBStats(ah, aniState); 843185380Ssam /* check to see if need to raise immunity */ 844185380Ssam if (aniState->ofdmPhyErrCount > aniState->listenTime * 845185380Ssam params->ofdmTrigHigh / 1000) { 846185380Ssam ar5416AniOfdmErrTrigger(ah); 847185380Ssam ar5416AniRestart(ah, aniState); 848185380Ssam } else if (aniState->cckPhyErrCount > aniState->listenTime * 849185380Ssam params->cckTrigHigh / 1000) { 850185380Ssam ar5416AniCckErrTrigger(ah); 851185380Ssam ar5416AniRestart(ah, aniState); 852185380Ssam } 853185380Ssam } 854185380Ssam} 855