1185377Ssam/*
2187831Ssam * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3185377Ssam * Copyright (c) 2002-2006 Atheros Communications, Inc.
4185377Ssam *
5185377Ssam * Permission to use, copy, modify, and/or distribute this software for any
6185377Ssam * purpose with or without fee is hereby granted, provided that the above
7185377Ssam * copyright notice and this permission notice appear in all copies.
8185377Ssam *
9185377Ssam * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10185377Ssam * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11185377Ssam * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12185377Ssam * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13185377Ssam * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14185377Ssam * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15185377Ssam * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16185377Ssam *
17187831Ssam * $FreeBSD$
18185377Ssam */
19185377Ssam#ifndef _ATH_AR5211_H_
20185377Ssam#define _ATH_AR5211_H_
21185377Ssam
22185377Ssam#include "ah_eeprom.h"
23185377Ssam
24185377Ssam#define	AR5211_MAGIC	0x19570405
25185377Ssam
26185377Ssam/* Classes for WME streams */
27185377Ssam#define	AC_BK	0
28185377Ssam#define	AC_BE	1
29185377Ssam#define	AC_VI	2
30185377Ssam#define	AC_VO	3
31185377Ssam
32185377Ssam/* DCU Transmit Filter macros */
33185377Ssam#define CALC_MMR(dcu, idx) \
34185377Ssam	( (4 * dcu) + (idx < 32 ? 0 : (idx < 64 ? 1 : (idx < 96 ? 2 : 3))) )
35185377Ssam#define TXBLK_FROM_MMR(mmr) \
36185377Ssam	(AR_D_TXBLK_BASE + ((mmr & 0x1f) << 6) + ((mmr & 0x20) >> 3))
37185377Ssam#define CALC_TXBLK_ADDR(dcu, idx)	(TXBLK_FROM_MMR(CALC_MMR(dcu, idx)))
38185377Ssam#define CALC_TXBLK_VALUE(idx)		(1 << (idx & 0x1f))
39185377Ssam
40185377Ssam/* MAC register values */
41185377Ssam
42185377Ssam#define INIT_INTERRUPT_MASK \
43185377Ssam	( AR_IMR_TXERR  | AR_IMR_TXOK | AR_IMR_RXORN | \
44185377Ssam	  AR_IMR_RXERR  | AR_IMR_RXOK | AR_IMR_TXURN | \
45185377Ssam	  AR_IMR_HIUERR )
46185377Ssam#define INIT_BEACON_CONTROL \
47185377Ssam	( (INIT_RESET_TSF << 24)  | (INIT_BEACON_EN << 23) | \
48185377Ssam	  (INIT_TIM_OFFSET << 16) | INIT_BEACON_PERIOD )
49185377Ssam
50185377Ssam#define INIT_CONFIG_STATUS	0x00000000
51185377Ssam#define INIT_RSSI_THR		0x00000700	/* Missed beacon counter initialized to 0x7 (max is 0xff) */
52185377Ssam#define INIT_IQCAL_LOG_COUNT_MAX	0xF
53185377Ssam#define INIT_BCON_CNTRL_REG	0x00000000
54185377Ssam
55185377Ssam#define INIT_BEACON_PERIOD	0xffff
56185377Ssam#define INIT_TIM_OFFSET		0
57185377Ssam#define INIT_BEACON_EN		0		/* this should be set by AP only when it's ready */
58185377Ssam#define INIT_RESET_TSF		0
59185377Ssam
60185377Ssam/*
61185377Ssam * Various fifo fill before Tx start, in 64-byte units
62185377Ssam * i.e. put the frame in the air while still DMAing
63185377Ssam */
64185377Ssam#define MIN_TX_FIFO_THRESHOLD	   0x1
65185377Ssam#define MAX_TX_FIFO_THRESHOLD	   ((IEEE80211_MAX_LEN / 64) + 1)
66185377Ssam#define INIT_TX_FIFO_THRESHOLD	  MIN_TX_FIFO_THRESHOLD
67185377Ssam
68185377Ssam/*
69185377Ssam * Gain support.
70185377Ssam */
71185377Ssamtypedef struct _gainOptStep {
72185377Ssam	int16_t	paramVal[4];
73185377Ssam	int32_t	stepGain;
74185377Ssam	int8_t	stepName[16];
75185377Ssam} GAIN_OPTIMIZATION_STEP;
76185377Ssam
77185377Ssamtypedef struct {
78185377Ssam	uint32_t	numStepsInLadder;
79185377Ssam	uint32_t	defaultStepNum;
80185377Ssam	GAIN_OPTIMIZATION_STEP optStep[10];
81185377Ssam} GAIN_OPTIMIZATION_LADDER;
82185377Ssam
83185377Ssamtypedef struct {
84185377Ssam	uint32_t	currStepNum;
85185377Ssam	uint32_t	currGain;
86185377Ssam	uint32_t	targetGain;
87185377Ssam	uint32_t	loTrig;
88185377Ssam	uint32_t	hiTrig;
89185377Ssam	uint32_t	active;
90185377Ssam	const GAIN_OPTIMIZATION_STEP *currStep;
91185377Ssam} GAIN_VALUES;
92185377Ssam
93185377Ssamenum {
94185377Ssam	RFGAIN_INACTIVE,
95185377Ssam	RFGAIN_READ_REQUESTED,
96185377Ssam	RFGAIN_NEED_CHANGE
97185377Ssam};
98185377Ssam
99185377Ssam/*
100185377Ssam * Header Info - general parameters and
101185377Ssam * values set for each chipset board solution
102185377Ssam * that are programmed every reset
103185377Ssam */
104185377Ssamstruct ath_hal_5211 {
105185377Ssam	struct ath_hal_private	ah_priv;	/* base class */
106185377Ssam
107185377Ssam	GAIN_VALUES	ah_gainValues;
108185377Ssam
109185377Ssam	uint8_t		ah_macaddr[IEEE80211_ADDR_LEN];
110185377Ssam	uint8_t		ah_bssid[IEEE80211_ADDR_LEN];
111185377Ssam
112185377Ssam	/*
113185377Ssam	 * Runtime state.
114185377Ssam	 */
115185377Ssam	uint32_t	ah_maskReg;		/* copy of AR_IMR */
116185377Ssam	uint32_t	ah_txOkInterruptMask;
117185377Ssam	uint32_t	ah_txErrInterruptMask;
118185377Ssam	uint32_t	ah_txDescInterruptMask;
119185377Ssam	uint32_t	ah_txEolInterruptMask;
120185377Ssam	uint32_t	ah_txUrnInterruptMask;
121185377Ssam	HAL_TX_QUEUE_INFO ah_txq[HAL_NUM_TX_QUEUES];
122185377Ssam	HAL_ANT_SETTING ah_diversityControl;	/* antenna setting */
123185377Ssam	uint32_t	ah_calibrationTime;
124185377Ssam	HAL_BOOL	ah_bIQCalibration;
125185377Ssam	int		ah_rfgainState;
126185377Ssam	uint32_t	ah_tx6PowerInHalfDbm;	/* power output for 6Mb tx */
127185377Ssam	uint32_t	ah_staId1Defaults;	/* STA_ID1 default settings */
128185377Ssam	uint32_t	ah_beaconInterval;
129185377Ssam	uint32_t	ah_rssiThr;		/* RSSI_THR settings */
130185377Ssam
131185377Ssam	u_int		ah_sifstime;		/* user-specified sifs time */
132185377Ssam	u_int		ah_slottime;		/* user-specified slot time */
133185377Ssam	u_int		ah_acktimeout;		/* user-specified ack timeout */
134185377Ssam	u_int		ah_ctstimeout;		/* user-specified cts timeout */
135185377Ssam	/*
136185377Ssam	 * RF Silent handling.
137185377Ssam	 */
138185377Ssam	uint32_t	ah_gpioSelect;		/* GPIO pin to use */
139185377Ssam	uint32_t	ah_polarity;		/* polarity to disable RF */
140185377Ssam	uint32_t	ah_gpioBit;		/* after init, prev value */
141185377Ssam};
142185377Ssam#define	AH5211(ah)	((struct ath_hal_5211 *)(ah))
143185377Ssam
144185377Ssamstruct ath_hal;
145185377Ssam
146185377Ssamextern	void ar5211Detach(struct ath_hal *);
147185377Ssam
148185377Ssamextern	HAL_BOOL ar5211Reset(struct ath_hal *, HAL_OPMODE,
149187831Ssam		struct ieee80211_channel *, HAL_BOOL bChannelChange,
150290612Sadrian		HAL_RESET_TYPE,
151187831Ssam		HAL_STATUS *);
152185377Ssamextern	HAL_BOOL ar5211PhyDisable(struct ath_hal *);
153185377Ssamextern	HAL_BOOL ar5211Disable(struct ath_hal *);
154187831Ssamextern	HAL_BOOL ar5211ChipReset(struct ath_hal *,
155187831Ssam		const struct ieee80211_channel *);
156187831Ssamextern	HAL_BOOL ar5211PerCalibration(struct ath_hal *, struct ieee80211_channel *, HAL_BOOL *);
157187831Ssamextern	HAL_BOOL ar5211PerCalibrationN(struct ath_hal *ah, struct ieee80211_channel *chan,
158185380Ssam		u_int chainMask, HAL_BOOL longCal, HAL_BOOL *isCalDone);
159187831Ssamextern	HAL_BOOL ar5211ResetCalValid(struct ath_hal *ah, const struct ieee80211_channel *);
160185377Ssamextern	HAL_BOOL ar5211SetTxPowerLimit(struct ath_hal *, uint32_t limit);
161187831Ssamextern	HAL_BOOL ar5211CalNoiseFloor(struct ath_hal *,
162187831Ssam		const struct ieee80211_channel *);
163185377Ssamextern	HAL_BOOL ar5211SetAntennaSwitchInternal(struct ath_hal *,
164187831Ssam		HAL_ANT_SETTING, const struct ieee80211_channel *);
165185377Ssamextern	int16_t ar5211GetNfAdjust(struct ath_hal *,
166185377Ssam		const HAL_CHANNEL_INTERNAL *);
167185377Ssamextern	HAL_BOOL ar5211ResetDma(struct ath_hal *, HAL_OPMODE);
168185377Ssamextern	void ar5211InitializeGainValues(struct ath_hal *);
169185377Ssamextern	HAL_RFGAIN ar5211GetRfgain(struct ath_hal *);
170185377Ssamextern	void ar5211SetPCUConfig(struct ath_hal *);
171185377Ssam
172185377Ssamextern  HAL_BOOL ar5211SetTxQueueProps(struct ath_hal *ah, int q,
173185377Ssam		const HAL_TXQ_INFO *qInfo);
174185377Ssamextern	HAL_BOOL ar5211GetTxQueueProps(struct ath_hal *ah, int q,
175185377Ssam		HAL_TXQ_INFO *qInfo);
176185377Ssamextern	int ar5211SetupTxQueue(struct ath_hal *ah, HAL_TX_QUEUE type,
177185377Ssam		const HAL_TXQ_INFO *qInfo);
178185377Ssamextern	HAL_BOOL ar5211ReleaseTxQueue(struct ath_hal *ah, u_int q);
179185377Ssamextern	HAL_BOOL ar5211ResetTxQueue(struct ath_hal *ah, u_int q);
180185377Ssamextern	uint32_t ar5211GetTxDP(struct ath_hal *, u_int);
181185377Ssamextern	HAL_BOOL ar5211SetTxDP(struct ath_hal *, u_int, uint32_t txdp);
182185377Ssamextern	HAL_BOOL ar5211UpdateTxTrigLevel(struct ath_hal *, HAL_BOOL);
183185377Ssamextern	HAL_BOOL ar5211StartTxDma(struct ath_hal *, u_int);
184185377Ssamextern	HAL_BOOL ar5211StopTxDma(struct ath_hal *, u_int);
185185377Ssamextern	uint32_t ar5211NumTxPending(struct ath_hal *, u_int qnum);
186185377Ssamextern	HAL_BOOL ar5211IsTxQueueStopped(struct ath_hal *, u_int);
187185377Ssamextern	HAL_BOOL ar5211GetTransmitFilterIndex(struct ath_hal *, uint32_t);
188185377Ssamextern	HAL_BOOL ar5211SetupTxDesc(struct ath_hal *, struct ath_desc *,
189185377Ssam		u_int pktLen, u_int hdrLen, HAL_PKT_TYPE type, u_int txPower,
190185377Ssam		u_int txRate0, u_int txTries0,
191185377Ssam		u_int keyIx, u_int antMode, u_int flags,
192185377Ssam		u_int rtsctsRate, u_int rtsctsDuration,
193185377Ssam                u_int compicvLen, u_int compivLen, u_int comp);
194185377Ssamextern	HAL_BOOL ar5211SetupXTxDesc(struct ath_hal *, struct ath_desc *,
195185377Ssam		u_int txRate1, u_int txRetries1,
196185377Ssam		u_int txRate2, u_int txRetries2,
197185377Ssam		u_int txRate3, u_int txRetries3);
198185377Ssamextern	HAL_BOOL ar5211FillTxDesc(struct ath_hal *, struct ath_desc *,
199239051Sadrian		HAL_DMA_ADDR *bufAddrList, uint32_t *segLenList,
200239051Sadrian		u_int descId, u_int qcuId, HAL_BOOL firstSeg, HAL_BOOL lastSeg,
201185377Ssam		const struct ath_desc *ds0);
202185377Ssamextern	HAL_STATUS ar5211ProcTxDesc(struct ath_hal *,
203185377Ssam		struct ath_desc *, struct ath_tx_status *);
204185377Ssamextern  void ar5211GetTxIntrQueue(struct ath_hal *ah, uint32_t *);
205185377Ssamextern  void ar5211IntrReqTxDesc(struct ath_hal *ah, struct ath_desc *);
206217621Sadrianextern	HAL_BOOL ar5211GetTxCompletionRates(struct ath_hal *ah,
207217621Sadrian		const struct ath_desc *ds0, int *rates, int *tries);
208238607Sadrianextern	void ar5211SetTxDescLink(struct ath_hal *ah, void *ds,
209238607Sadrian		uint32_t link);
210238607Sadrianextern	void ar5211GetTxDescLink(struct ath_hal *ah, void *ds,
211238607Sadrian		uint32_t *link);
212238607Sadrianextern	void ar5211GetTxDescLinkPtr(struct ath_hal *ah, void *ds,
213238607Sadrian		uint32_t **linkptr);
214185377Ssam
215238278Sadrianextern	uint32_t ar5211GetRxDP(struct ath_hal *, HAL_RX_QUEUE);
216238278Sadrianextern	void ar5211SetRxDP(struct ath_hal *, uint32_t rxdp, HAL_RX_QUEUE);
217185377Ssamextern	void ar5211EnableReceive(struct ath_hal *);
218185377Ssamextern	HAL_BOOL ar5211StopDmaReceive(struct ath_hal *);
219185377Ssamextern	void ar5211StartPcuReceive(struct ath_hal *);
220185377Ssamextern	void ar5211StopPcuReceive(struct ath_hal *);
221185377Ssamextern	void ar5211SetMulticastFilter(struct ath_hal *,
222185377Ssam		uint32_t filter0, uint32_t filter1);
223185377Ssamextern	HAL_BOOL ar5211ClrMulticastFilterIndex(struct ath_hal *, uint32_t);
224185377Ssamextern	HAL_BOOL ar5211SetMulticastFilterIndex(struct ath_hal *, uint32_t);
225185377Ssamextern	uint32_t ar5211GetRxFilter(struct ath_hal *);
226185377Ssamextern	void ar5211SetRxFilter(struct ath_hal *, uint32_t);
227185377Ssamextern	HAL_BOOL ar5211SetupRxDesc(struct ath_hal *, struct ath_desc *,
228185377Ssam		uint32_t, u_int flags);
229185377Ssamextern	HAL_STATUS ar5211ProcRxDesc(struct ath_hal *, struct ath_desc *,
230185377Ssam		uint32_t, struct ath_desc *, uint64_t,
231185377Ssam		struct ath_rx_status *);
232185377Ssam
233185377Ssamextern	void ar5211GetMacAddress(struct ath_hal *, uint8_t *);
234185377Ssamextern	HAL_BOOL ar5211SetMacAddress(struct ath_hal *ah, const uint8_t *);
235185377Ssamextern	void ar5211GetBssIdMask(struct ath_hal *, uint8_t *);
236185377Ssamextern	HAL_BOOL ar5211SetBssIdMask(struct ath_hal *, const uint8_t *);
237185377Ssamextern	HAL_BOOL ar5211EepromRead(struct ath_hal *, u_int off, uint16_t *data);
238185380Ssamextern	HAL_BOOL ar5211EepromWrite(struct ath_hal *, u_int off, uint16_t data);
239185380Ssamextern	HAL_BOOL ar5211SetRegulatoryDomain(struct ath_hal *,
240185380Ssam		uint16_t, HAL_STATUS *);
241185377Ssamextern	u_int ar5211GetWirelessModes(struct ath_hal *);
242185377Ssamextern	void ar5211EnableRfKill(struct ath_hal *);
243185377Ssamextern	uint32_t ar5211GpioGet(struct ath_hal *, uint32_t gpio);
244185377Ssamextern	void ar5211GpioSetIntr(struct ath_hal *, u_int, uint32_t ilevel);
245188974Ssamextern	HAL_BOOL ar5211GpioCfgOutput(struct ath_hal *, uint32_t gpio,
246188974Ssam		HAL_GPIO_MUX_TYPE);
247185377Ssamextern	HAL_BOOL ar5211GpioCfgInput(struct ath_hal *, uint32_t gpio);
248185377Ssamextern	HAL_BOOL ar5211GpioSet(struct ath_hal *, uint32_t gpio, uint32_t val);
249185377Ssamextern	void ar5211SetLedState(struct ath_hal *, HAL_LED_STATE);
250185377Ssamextern	u_int ar5211AntennaGet(struct ath_hal *);
251185377Ssamextern	void ar5211WriteAssocid(struct ath_hal *,
252185377Ssam		const uint8_t *bssid, uint16_t assocId);
253185377Ssamextern	uint64_t ar5211GetTsf64(struct ath_hal *);
254185377Ssamextern	uint32_t ar5211GetTsf32(struct ath_hal *);
255185377Ssamextern	void ar5211ResetTsf(struct ath_hal *);
256185377Ssamextern	uint32_t ar5211GetMaxTurboRate(struct ath_hal *);
257185377Ssamextern	uint32_t ar5211GetRandomSeed(struct ath_hal *);
258185377Ssamextern	HAL_BOOL ar5211DetectCardPresent(struct ath_hal *);
259185377Ssamextern	void ar5211UpdateMibCounters(struct ath_hal *, HAL_MIB_STATS *);
260185377Ssamextern	void ar5211EnableHwEncryption(struct ath_hal *);
261185377Ssamextern	void ar5211DisableHwEncryption(struct ath_hal *);
262185377Ssamextern	HAL_BOOL ar5211SetSlotTime(struct ath_hal *, u_int);
263185377Ssamextern	u_int ar5211GetSlotTime(struct ath_hal *);
264185377Ssamextern	HAL_BOOL ar5211SetAckTimeout(struct ath_hal *, u_int);
265185377Ssamextern	u_int ar5211GetAckTimeout(struct ath_hal *);
266185377Ssamextern	HAL_BOOL ar5211SetAckCTSRate(struct ath_hal *, u_int);
267185377Ssamextern	u_int ar5211GetAckCTSRate(struct ath_hal *);
268185377Ssamextern	HAL_BOOL ar5211SetCTSTimeout(struct ath_hal *, u_int);
269185377Ssamextern	u_int ar5211GetCTSTimeout(struct ath_hal *);
270185377Ssamextern	HAL_BOOL ar5211SetSifsTime(struct ath_hal *, u_int);
271185377Ssamextern	u_int ar5211GetSifsTime(struct ath_hal *);
272185377Ssamextern  HAL_BOOL ar5211SetDecompMask(struct ath_hal *, uint16_t, int);
273185377Ssamextern	void ar5211SetCoverageClass(struct ath_hal *, uint8_t, int);
274185377Ssamextern	uint32_t ar5211GetCurRssi(struct ath_hal *);
275185377Ssamextern	u_int ar5211GetDefAntenna(struct ath_hal *);
276185377Ssamextern	void ar5211SetDefAntenna(struct ath_hal *ah, u_int antenna);
277185377Ssamextern	HAL_ANT_SETTING ar5211GetAntennaSwitch(struct ath_hal *);
278185377Ssamextern	HAL_BOOL ar5211SetAntennaSwitch(struct ath_hal *, HAL_ANT_SETTING);
279185377Ssamextern	HAL_STATUS ar5211GetCapability(struct ath_hal *, HAL_CAPABILITY_TYPE,
280185377Ssam		uint32_t, uint32_t *);
281185377Ssamextern	HAL_BOOL ar5211SetCapability(struct ath_hal *, HAL_CAPABILITY_TYPE,
282185377Ssam		uint32_t, uint32_t, HAL_STATUS *);
283185377Ssamextern	HAL_BOOL ar5211GetDiagState(struct ath_hal *ah, int request,
284185377Ssam		const void *args, uint32_t argsize,
285185377Ssam		void **result, uint32_t *resultsize);
286234873Sadrianextern	uint32_t ar5211Get11nExtBusy(struct ath_hal *);
287234873Sadrianextern	HAL_BOOL ar5211GetMibCycleCounts(struct ath_hal *,
288234873Sadrian		HAL_SURVEY_SAMPLE *);
289247286Sadrianextern	void ar5211SetChainMasks(struct ath_hal *ah, uint32_t, uint32_t);
290247286Sadrian
291235206Sadrianextern	void ar5211EnableDfs(struct ath_hal *, HAL_PHYERR_PARAM *);
292235206Sadrianextern	void ar5211GetDfsThresh(struct ath_hal *, HAL_PHYERR_PARAM *);
293185377Ssam
294185377Ssamextern	u_int ar5211GetKeyCacheSize(struct ath_hal *);
295185377Ssamextern	HAL_BOOL ar5211IsKeyCacheEntryValid(struct ath_hal *, uint16_t);
296185377Ssamextern	HAL_BOOL ar5211ResetKeyCacheEntry(struct ath_hal *, uint16_t entry);
297185377Ssamextern	HAL_BOOL ar5211SetKeyCacheEntry(struct ath_hal *, uint16_t entry,
298185377Ssam                       const HAL_KEYVAL *, const uint8_t *mac,
299185377Ssam                       int xorKey);
300185377Ssamextern	HAL_BOOL ar5211SetKeyCacheEntryMac(struct ath_hal *,
301185377Ssam			uint16_t, const uint8_t *);
302185377Ssam
303185377Ssamextern	HAL_BOOL ar5211SetPowerMode(struct ath_hal *, uint32_t powerRequest,
304185377Ssam		int setChip);
305185377Ssamextern	HAL_POWER_MODE ar5211GetPowerMode(struct ath_hal *);
306185377Ssam
307185377Ssamextern	void ar5211SetBeaconTimers(struct ath_hal *,
308185377Ssam		const HAL_BEACON_TIMERS *);
309185377Ssamextern	void ar5211BeaconInit(struct ath_hal *, uint32_t, uint32_t);
310185377Ssamextern	void ar5211SetStaBeaconTimers(struct ath_hal *,
311185377Ssam		const HAL_BEACON_STATE *);
312185377Ssamextern	void ar5211ResetStaBeaconTimers(struct ath_hal *);
313225444Sadrianextern	uint64_t ar5211GetNextTBTT(struct ath_hal *);
314185377Ssam
315185377Ssamextern	HAL_BOOL ar5211IsInterruptPending(struct ath_hal *);
316185377Ssamextern	HAL_BOOL ar5211GetPendingInterrupts(struct ath_hal *, HAL_INT *);
317185377Ssamextern	HAL_INT ar5211GetInterrupts(struct ath_hal *);
318185377Ssamextern	HAL_INT ar5211SetInterrupts(struct ath_hal *, HAL_INT ints);
319185377Ssam
320185377Ssamextern	const HAL_RATE_TABLE *ar5211GetRateTable(struct ath_hal *, u_int mode);
321185377Ssam
322185377Ssamextern	HAL_BOOL ar5211AniControl(struct ath_hal *, HAL_ANI_CMD, int );
323217684Sadrianextern	void ar5211RxMonitor(struct ath_hal *, const HAL_NODE_STATS *,
324187831Ssam		const struct ieee80211_channel *);
325217684Sadrianextern	void ar5211AniPoll(struct ath_hal *, const struct ieee80211_channel *);
326185377Ssamextern	void ar5211MibEvent(struct ath_hal *, const HAL_NODE_STATS *);
327185377Ssam#endif /* _ATH_AR5211_H_ */
328