1185377Ssam/* 2185377Ssam * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3185377Ssam * Copyright (c) 2002-2008 Atheros Communications, Inc. 4185377Ssam * 5185377Ssam * Permission to use, copy, modify, and/or distribute this software for any 6185377Ssam * purpose with or without fee is hereby granted, provided that the above 7185377Ssam * copyright notice and this permission notice appear in all copies. 8185377Ssam * 9185377Ssam * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10185377Ssam * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11185377Ssam * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12185377Ssam * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13185377Ssam * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14185377Ssam * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15185377Ssam * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16185377Ssam * 17204644Srpaulo * $FreeBSD$ 18185377Ssam */ 19185377Ssam#ifndef _ATH_AH_EEPROM_H_ 20185377Ssam#define _ATH_AH_EEPROM_H_ 21185377Ssam 22185380Ssam#define AR_EEPROM_VER1 0x1000 /* Version 1.0; 5210 only */ 23185377Ssam/* 24185377Ssam * Version 3 EEPROMs are all 16K. 25185377Ssam * 3.1 adds turbo limit, antenna gain, 16 CTL's, 11g info, 26185377Ssam * and 2.4Ghz ob/db for B & G 27185377Ssam * 3.2 has more accurate pcdac intercepts and analog chip 28185377Ssam * calibration. 29185377Ssam * 3.3 adds ctl in-band limit, 32 ctl's, and frequency 30185377Ssam * expansion 31185377Ssam * 3.4 adds xr power, gainI, and 2.4 turbo params 32185377Ssam */ 33185377Ssam#define AR_EEPROM_VER3 0x3000 /* Version 3.0; start of 16k EEPROM */ 34185377Ssam#define AR_EEPROM_VER3_1 0x3001 /* Version 3.1 */ 35185377Ssam#define AR_EEPROM_VER3_2 0x3002 /* Version 3.2 */ 36185377Ssam#define AR_EEPROM_VER3_3 0x3003 /* Version 3.3 */ 37185377Ssam#define AR_EEPROM_VER3_4 0x3004 /* Version 3.4 */ 38185380Ssam#define AR_EEPROM_VER4 0x4000 /* Version 4.x */ 39185377Ssam#define AR_EEPROM_VER4_0 0x4000 /* Version 4.0 */ 40185377Ssam#define AR_EEPROM_VER4_1 0x4001 /* Version 4.0 */ 41185377Ssam#define AR_EEPROM_VER4_2 0x4002 /* Version 4.0 */ 42185377Ssam#define AR_EEPROM_VER4_3 0x4003 /* Version 4.0 */ 43185377Ssam#define AR_EEPROM_VER4_6 0x4006 /* Version 4.0 */ 44185377Ssam#define AR_EEPROM_VER4_7 0x3007 /* Version 4.7 */ 45185380Ssam#define AR_EEPROM_VER4_9 0x4009 /* EEPROM EAR futureproofing */ 46185380Ssam#define AR_EEPROM_VER5 0x5000 /* Version 5.x */ 47185380Ssam#define AR_EEPROM_VER5_0 0x5000 /* Adds new 2413 cal powers and added params */ 48185380Ssam#define AR_EEPROM_VER5_1 0x5001 /* Adds capability values */ 49185377Ssam#define AR_EEPROM_VER5_3 0x5003 /* Adds spur mitigation table */ 50185377Ssam#define AR_EEPROM_VER5_4 0x5004 51185377Ssam/* 52185377Ssam * Version 14 EEPROMs came in with AR5416. 53185377Ssam * 14.2 adds txFrameToPaOn, txFrameToDataStart, ht40PowerInc 54185377Ssam * 14.3 adds bswAtten, bswMargin, swSettle, and base OpFlags for HT20/40 55185377Ssam */ 56185380Ssam#define AR_EEPROM_VER14 0xE000 /* Version 14.x */ 57185380Ssam#define AR_EEPROM_VER14_1 0xE001 /* Adds 11n support */ 58185377Ssam#define AR_EEPROM_VER14_2 0xE002 59185377Ssam#define AR_EEPROM_VER14_3 0xE003 60185377Ssam#define AR_EEPROM_VER14_7 0xE007 61185377Ssam#define AR_EEPROM_VER14_9 0xE009 62185377Ssam#define AR_EEPROM_VER14_16 0xE010 63185377Ssam#define AR_EEPROM_VER14_17 0xE011 64185377Ssam#define AR_EEPROM_VER14_19 0xE013 65185377Ssam 66185377Ssamenum { 67185377Ssam AR_EEP_RFKILL, /* use ath_hal_eepromGetFlag */ 68185377Ssam AR_EEP_AMODE, /* use ath_hal_eepromGetFlag */ 69185377Ssam AR_EEP_BMODE, /* use ath_hal_eepromGetFlag */ 70185377Ssam AR_EEP_GMODE, /* use ath_hal_eepromGetFlag */ 71185377Ssam AR_EEP_TURBO5DISABLE, /* use ath_hal_eepromGetFlag */ 72185377Ssam AR_EEP_TURBO2DISABLE, /* use ath_hal_eepromGetFlag */ 73185377Ssam AR_EEP_ISTALON, /* use ath_hal_eepromGetFlag */ 74185377Ssam AR_EEP_32KHZCRYSTAL, /* use ath_hal_eepromGetFlag */ 75185377Ssam AR_EEP_MACADDR, /* uint8_t* */ 76185377Ssam AR_EEP_COMPRESS, /* use ath_hal_eepromGetFlag */ 77185377Ssam AR_EEP_FASTFRAME, /* use ath_hal_eepromGetFlag */ 78185377Ssam AR_EEP_AES, /* use ath_hal_eepromGetFlag */ 79185377Ssam AR_EEP_BURST, /* use ath_hal_eepromGetFlag */ 80185377Ssam AR_EEP_MAXQCU, /* uint16_t* */ 81185377Ssam AR_EEP_KCENTRIES, /* uint16_t* */ 82185380Ssam AR_EEP_NFTHRESH_5, /* int16_t* */ 83185380Ssam AR_EEP_NFTHRESH_2, /* int16_t* */ 84185377Ssam AR_EEP_REGDMN_0, /* uint16_t* */ 85185377Ssam AR_EEP_REGDMN_1, /* uint16_t* */ 86185377Ssam AR_EEP_OPCAP, /* uint16_t* */ 87185377Ssam AR_EEP_OPMODE, /* uint16_t* */ 88185377Ssam AR_EEP_RFSILENT, /* uint16_t* */ 89185377Ssam AR_EEP_OB_5, /* uint8_t* */ 90185377Ssam AR_EEP_DB_5, /* uint8_t* */ 91185377Ssam AR_EEP_OB_2, /* uint8_t* */ 92185377Ssam AR_EEP_DB_2, /* uint8_t* */ 93185377Ssam AR_EEP_TXMASK, /* uint8_t* */ 94185377Ssam AR_EEP_RXMASK, /* uint8_t* */ 95185377Ssam AR_EEP_RXGAIN_TYPE, /* uint8_t* */ 96185377Ssam AR_EEP_TXGAIN_TYPE, /* uint8_t* */ 97217623Sadrian AR_EEP_DAC_HPWR_5G, /* uint8_t* */ 98185377Ssam AR_EEP_OL_PWRCTRL, /* use ath_hal_eepromGetFlag */ 99185377Ssam AR_EEP_FSTCLK_5G, /* use ath_hal_eepromGetFlag */ 100185377Ssam AR_EEP_ANTGAINMAX_5, /* int8_t* */ 101185377Ssam AR_EEP_ANTGAINMAX_2, /* int8_t* */ 102185377Ssam AR_EEP_WRITEPROTECT, /* use ath_hal_eepromGetFlag */ 103219441Sadrian AR_EEP_PWR_TABLE_OFFSET,/* int8_t* */ 104222299Sadrian AR_EEP_PWDCLKIND, /* uint8_t* */ 105222299Sadrian AR_EEP_TEMPSENSE_SLOPE, /* int8_t* */ 106222299Sadrian AR_EEP_TEMPSENSE_SLOPE_PAL_ON, /* int8_t* */ 107224519Sadrian AR_EEP_FRAC_N_5G, /* uint8_t* */ 108239637Sadrian 109239637Sadrian /* New fields for AR9300 and later */ 110239637Sadrian AR_EEP_DRIVE_STRENGTH, 111239637Sadrian AR_EEP_PAPRD_ENABLED, 112185377Ssam}; 113185377Ssam 114185377Ssamtypedef struct { 115185377Ssam uint16_t rdEdge; 116185377Ssam uint16_t twice_rdEdgePower; 117185377Ssam HAL_BOOL flag; 118185377Ssam} RD_EDGES_POWER; 119185377Ssam 120185377Ssam/* XXX should probably be version-dependent */ 121185377Ssam#define SD_NO_CTL 0xf0 122185377Ssam#define NO_CTL 0xff 123185377Ssam#define CTL_MODE_M 0x0f 124185377Ssam#define CTL_11A 0 125185377Ssam#define CTL_11B 1 126185377Ssam#define CTL_11G 2 127185377Ssam#define CTL_TURBO 3 128185377Ssam#define CTL_108G 4 129185377Ssam#define CTL_2GHT20 5 130185377Ssam#define CTL_5GHT20 6 131185377Ssam#define CTL_2GHT40 7 132185377Ssam#define CTL_5GHT40 8 133185377Ssam 134239637Sadrian/* XXX must match what FCC/MKK/ETSI are defined as in ah_regdomain.h */ 135239637Sadrian#define HAL_REG_DMN_MASK 0xf0 136239637Sadrian#define HAL_REGDMN_FCC 0x10 137239637Sadrian#define HAL_REGDMN_MKK 0x40 138239637Sadrian#define HAL_REGDMN_ETSI 0x30 139239637Sadrian 140239637Sadrian#define is_reg_dmn_fcc(reg_dmn) \ 141239637Sadrian (((reg_dmn & HAL_REG_DMN_MASK) == HAL_REGDMN_FCC) ? 1 : 0) 142239637Sadrian#define is_reg_dmn_etsi(reg_dmn) \ 143239637Sadrian (((reg_dmn & HAL_REG_DMN_MASK) == HAL_REGDMN_ETSI) ? 1 : 0) 144239637Sadrian#define is_reg_dmn_mkk(reg_dmn) \ 145239637Sadrian (((reg_dmn & HAL_REG_DMN_MASK) == HAL_REGDMN_MKK) ? 1 : 0) 146239637Sadrian 147239637Sadrian#define AR_EEPROM_EEREGCAP_EN_FCC_MIDBAND 0x0040 148239637Sadrian#define AR_EEPROM_EEREGCAP_EN_KK_U1_EVEN 0x0080 149239637Sadrian#define AR_EEPROM_EEREGCAP_EN_KK_U2 0x0100 150239637Sadrian#define AR_EEPROM_EEREGCAP_EN_KK_MIDBAND 0x0200 151239637Sadrian#define AR_EEPROM_EEREGCAP_EN_KK_U1_ODD 0x0400 152239637Sadrian#define AR_EEPROM_EEREGCAP_EN_KK_NEW_11A 0x0800 153239637Sadrian 154239637Sadrian/* regulatory capabilities prior to eeprom version 4.0 */ 155239637Sadrian#define AR_EEPROM_EEREGCAP_EN_KK_U1_ODD_PRE4_0 0x4000 156239637Sadrian#define AR_EEPROM_EEREGCAP_EN_KK_NEW_11A_PRE4_0 0x8000 157239637Sadrian 158185377Ssam#define AR_NO_SPUR 0x8000 159185377Ssam 160185377Ssam/* XXX exposed to chip code */ 161185377Ssam#define MAX_RATE_POWER 63 162185377Ssam 163185380SsamHAL_STATUS ath_hal_v1EepromAttach(struct ath_hal *ah); 164185377SsamHAL_STATUS ath_hal_legacyEepromAttach(struct ath_hal *ah); 165185377SsamHAL_STATUS ath_hal_v14EepromAttach(struct ath_hal *ah); 166185380SsamHAL_STATUS ath_hal_v4kEepromAttach(struct ath_hal *ah); 167221888SadrianHAL_STATUS ath_hal_9287EepromAttach(struct ath_hal *ah); 168185377Ssam#endif /* _ATH_AH_EEPROM_H_ */ 169