amrreg.h revision 51974
1238104Sdes/*- 2238104Sdes * Copyright (c) 1999 Michael Smith 3238104Sdes * All rights reserved. 4238104Sdes * 5238104Sdes * Redistribution and use in source and binary forms, with or without 6238104Sdes * modification, are permitted provided that the following conditions 7238104Sdes * are met: 8238104Sdes * 1. Redistributions of source code must retain the above copyright 9238104Sdes * notice, this list of conditions and the following disclaimer. 10246827Sdes * 2. Redistributions in binary form must reproduce the above copyright 11238104Sdes * notice, this list of conditions and the following disclaimer in the 12238104Sdes * documentation and/or other materials provided with the distribution. 13238104Sdes * 14238104Sdes * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15238104Sdes * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16238104Sdes * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17238104Sdes * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18238104Sdes * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19238104Sdes * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20238104Sdes * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21238104Sdes * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22238104Sdes * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23238104Sdes * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24238104Sdes * SUCH DAMAGE. 25238104Sdes * 26238104Sdes * $FreeBSD: head/sys/dev/amr/amrreg.h 51974 1999-10-07 02:23:12Z msmith $ 27238104Sdes */ 28238104Sdes 29238104Sdes/* 30238104Sdes * Mailbox commands 31238104Sdes */ 32238104Sdes#define AMR_CMD_LREAD 0x01 33238104Sdes#define AMR_CMD_LWRITE 0x02 34238104Sdes#define AMR_CMD_ENQUIRY 0x05 35238104Sdes#define AMR_CMD_FLUSH 0x0a 36238104Sdes#define AMR_CMD_CONFIG 0xa1 37238104Sdes#define AMR_CONFIG_PRODINFO 0x0e 38238104Sdes#define AMR_CONFIG_ENQ3 0x0f 39238104Sdes#define AMR_CONFIG_ENQ3_SOLICITED_NOTIFY 0x01 40238104Sdes#define AMR_CONFIG_ENQ3_SOLICITED_FULL 0x02 41238104Sdes#define AMR_CONFIG_ENQ3_UNSOLICITED 0x03 42238104Sdes 43238104Sdes/* 44238104Sdes * Command results 45238104Sdes */ 46238104Sdes#define AMR_STATUS_SUCCESS 0x00 47238104Sdes#define AMR_STATUS_ABORTED 0x02 48238104Sdes#define AMR_STATUS_FAILED 0x80 49238104Sdes 50238104Sdes/* 51238104Sdes * Quartz doorbell registers 52238104Sdes */ 53238104Sdes#define AMR_QIDB 0x20 54238104Sdes#define AMR_QODB 0x2c 55238104Sdes#define AMR_QIDB_SUBMIT 0x00000001 /* mailbox ready for work */ 56238104Sdes#define AMR_QIDB_ACK 0x00000002 /* mailbox done */ 57238104Sdes#define AMR_QODB_READY 0x10001234 /* work ready to be processed */ 58238104Sdes 59238104Sdes/* 60238104Sdes * Standard I/O registers 61238104Sdes */ 62238104Sdes#define AMR_SCMD 0x10 /* command/ack register (write) */ 63238104Sdes#define AMR_SMBOX_BUSY 0x10 /* mailbox status (read) */ 64238104Sdes#define AMR_STOGGLE 0x11 /* interrupt enable bit here */ 65238104Sdes#define AMR_SMBOX_0 0x14 /* mailbox physical address low byte */ 66238104Sdes#define AMR_SMBOX_1 0x15 67238104Sdes#define AMR_SMBOX_2 0x16 68238104Sdes#define AMR_SMBOX_3 0x17 /* high byte */ 69238104Sdes#define AMR_SMBOX_ENABLE 0x18 /* atomic mailbox address enable */ 70238104Sdes#define AMR_SINTR 0x1a /* interrupt status */ 71238104Sdes 72238104Sdes/* 73238104Sdes * Standard I/O magic numbers 74238104Sdes */ 75238104Sdes#define AMR_SCMD_POST 0x10 /* -> SCMD to initiate action on mailbox */ 76238104Sdes#define AMR_SCMD_ACKINTR 0x08 /* -> SCMD to ack mailbox retrieved */ 77238104Sdes#define AMR_STOGL_IENABLE 0xc0 /* in STOGGLE */ 78238104Sdes#define AMR_SINTR_VALID 0x40 /* in SINTR */ 79238104Sdes#define AMR_SMBOX_BUSYFLAG 0x10 /* in SMBOX_BUSY */ 80238104Sdes#define AMR_SMBOX_ADDR 0x00 /* -> SMBOX_ENABLE */ 81238104Sdes 82238104Sdes/* 83238104Sdes * Old Enquiry results 84238104Sdes */ 85238104Sdes#define AMR_8LD_MAXDRIVES 8 86238104Sdes#define AMR_8LD_MAXCHAN 5 87238104Sdes#define AMR_8LD_MAXTARG 15 88238104Sdes#define AMR_8LD_MAXPHYSDRIVES (AMR_8LD_MAXCHAN * AMR_8LD_MAXTARG) 89238104Sdes 90238104Sdesstruct amr_adapter_info 91238104Sdes{ 92238104Sdes u_int8_t aa_maxio; 93238104Sdes u_int8_t aa_rebuild_rate; 94238104Sdes u_int8_t aa_maxtargchan; 95238104Sdes u_int8_t aa_channels; 96238104Sdes u_int8_t aa_firmware[4]; 97238104Sdes u_int16_t aa_flashage; 98238104Sdes u_int8_t aa_chipsetvalue; 99238104Sdes u_int8_t aa_memorysize; 100238104Sdes u_int8_t aa_cacheflush; 101238104Sdes u_int8_t aa_bios[4]; 102238104Sdes u_int8_t res1[7]; 103238104Sdes} __attribute__ ((packed)); 104238104Sdes 105246827Sdesstruct amr_logdrive_info 106238104Sdes{ 107238104Sdes u_int8_t al_numdrives; 108238104Sdes u_int8_t res1[3]; 109238104Sdes u_int32_t al_size[AMR_8LD_MAXDRIVES]; 110238104Sdes u_int8_t al_properties[AMR_8LD_MAXDRIVES]; 111238104Sdes u_int8_t al_state[AMR_8LD_MAXDRIVES]; 112238104Sdes} __attribute__ ((packed)); 113238104Sdes 114238104Sdesstruct amr_physdrive_info 115238104Sdes{ 116238104Sdes u_int8_t ap_state[AMR_8LD_MAXPHYSDRIVES]; 117238104Sdes u_int8_t res1; 118238104Sdes} __attribute__ ((packed)); 119238104Sdes 120238104Sdesstruct amr_enquiry 121238104Sdes{ 122238104Sdes struct amr_adapter_info ae_adapter; 123238104Sdes struct amr_logdrive_info ae_ldrv; 124238104Sdes struct amr_physdrive_info ae_pdrv; 125238104Sdes} __attribute__ ((packed)); 126238104Sdes 127238104Sdesstruct amr_prodinfo 128238104Sdes{ 129238104Sdes u_int32_t ap_size; /* current size in bytes (not including resvd) */ 130238104Sdes u_int32_t ap_configsig; /* default is 0x00282008, indicating 0x28 maximum 131238104Sdes * logical drives, 0x20 maximum stripes and 0x08 132238104Sdes * maximum spans */ 133238104Sdes u_int8_t ap_firmware[16]; /* printable identifiers */ 134238104Sdes u_int8_t ap_bios[16]; 135238104Sdes u_int8_t ap_product[80]; 136238104Sdes u_int8_t ap_maxio; /* maximum number of concurrent commands supported */ 137238104Sdes u_int8_t ap_nschan; /* number of SCSI channels present */ 138238104Sdes u_int8_t ap_fcloops; /* number of fibre loops present */ 139238104Sdes u_int8_t ap_memtype; /* memory type */ 140238104Sdes u_int32_t ap_signature; 141238104Sdes u_int16_t ap_memsize; /* onboard memory in MB */ 142238104Sdes u_int16_t ap_subsystem; /* subsystem identifier */ 143238104Sdes u_int16_t ap_subvendor; /* subsystem vendor ID */ 144238104Sdes u_int8_t ap_numnotifyctr; /* number of notify counters */ 145238104Sdes} __attribute__((packed)); 146238104Sdes 147238104Sdes#define AMR_MBOX_CMDSIZE 0x10 /* portion worth copying for controller */ 148238104Sdes 149238104Sdesstruct amr_mailbox 150238104Sdes{ 151238104Sdes u_int8_t mb_command; 152238104Sdes u_int8_t mb_ident; 153238104Sdes u_int16_t mb_blkcount; 154238104Sdes u_int32_t mb_lba; 155238104Sdes u_int32_t mb_physaddr; 156238104Sdes u_int8_t mb_drive; 157238104Sdes u_int8_t mb_nsgelem; 158238104Sdes u_int8_t res1; 159238104Sdes u_int8_t mb_busy; 160238104Sdes u_int8_t mb_nstatus; 161238104Sdes u_int8_t mb_status; 162238104Sdes u_int8_t mb_completed[46]; 163238104Sdes u_int8_t mb_poll; 164238104Sdes u_int8_t mb_ack; 165238104Sdes u_int8_t res2[16]; 166238104Sdes} __attribute__ ((packed)); 167246827Sdes 168238104Sdesstruct amr_mailbox64 169238104Sdes{ 170238104Sdes u_int32_t mb64_segment; /* for 64-bit controllers */ 171238104Sdes struct amr_mailbox mb; 172238104Sdes} __attribute__ ((packed)); 173238104Sdes 174238104Sdesstruct amr_mailbox_ioctl 175238104Sdes{ 176238104Sdes u_int8_t mb_command; 177238104Sdes u_int8_t mb_ident; 178238104Sdes u_int8_t mb_channel; 179238104Sdes u_int8_t mb_param; 180238104Sdes u_int8_t res1[4]; 181238104Sdes u_int32_t mb_physaddr; 182238104Sdes u_int8_t mb_drive; 183238104Sdes u_int8_t mb_nsgelem; 184238104Sdes u_int8_t res2; 185238104Sdes u_int8_t mb_busy; 186238104Sdes u_int8_t mb_nstatus; 187238104Sdes u_int8_t mb_completed[46]; 188238104Sdes u_int8_t mb_poll; 189238104Sdes u_int8_t mb_ack; 190238104Sdes u_int8_t res3[16]; 191238104Sdes} __attribute__ ((packed)); 192238104Sdes 193238104Sdesstruct amr_sgentry 194238104Sdes{ 195238104Sdes u_int32_t sg_addr; 196238104Sdes u_int32_t sg_count; 197238104Sdes} __attribute__ ((packed)); 198238104Sdes 199238104Sdes 200238104Sdes