amdtemp.c revision 254924 
1/*-
2 * Copyright (c) 2008, 2009 Rui Paulo <rpaulo@FreeBSD.org>
3 * Copyright (c) 2009 Norikatsu Shigemura <nork@FreeBSD.org>
4 * Copyright (c) 2009-2012 Jung-uk Kim <jkim@FreeBSD.org>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
25 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/*
30 * Driver for the AMD CPU on-die thermal sensors.
31 * Initially based on the k8temp Linux driver.
32 */
33
34#include <sys/cdefs.h>
35__FBSDID("$FreeBSD: head/sys/dev/amdtemp/amdtemp.c 254924 2013-08-26 17:38:36Z jmg $");
36
37#include <sys/param.h>
38#include <sys/bus.h>
39#include <sys/conf.h>
40#include <sys/kernel.h>
41#include <sys/module.h>
42#include <sys/sysctl.h>
43#include <sys/systm.h>
44
45#include <machine/cpufunc.h>
46#include <machine/md_var.h>
47#include <machine/specialreg.h>
48
49#include <dev/pci/pcivar.h>
50#include <x86/pci_cfgreg.h>
51
52typedef enum {
53	CORE0_SENSOR0,
54	CORE0_SENSOR1,
55	CORE1_SENSOR0,
56	CORE1_SENSOR1,
57	CORE0,
58	CORE1
59} amdsensor_t;
60
61struct amdtemp_softc {
62	device_t	sc_dev;
63	int		sc_ncores;
64	int		sc_ntemps;
65	int		sc_flags;
66#define	AMDTEMP_FLAG_CS_SWAP	0x01	/* ThermSenseCoreSel is inverted. */
67#define	AMDTEMP_FLAG_CT_10BIT	0x02	/* CurTmp is 10-bit wide. */
68#define	AMDTEMP_FLAG_ALT_OFFSET	0x04	/* CurTmp starts at -28C. */
69	int32_t		sc_offset;
70	int32_t		(*sc_gettemp)(device_t, amdsensor_t);
71	struct sysctl_oid *sc_sysctl_cpu[MAXCPU];
72	struct intr_config_hook sc_ich;
73};
74
75#define	VENDORID_AMD		0x1022
76#define	DEVICEID_AMD_MISC0F	0x1103
77#define	DEVICEID_AMD_MISC10	0x1203
78#define	DEVICEID_AMD_MISC11	0x1303
79#define	DEVICEID_AMD_MISC12	0x1403
80#define	DEVICEID_AMD_MISC14	0x1703
81#define	DEVICEID_AMD_MISC15	0x1603
82
83static struct amdtemp_product {
84	uint16_t	amdtemp_vendorid;
85	uint16_t	amdtemp_deviceid;
86} amdtemp_products[] = {
87	{ VENDORID_AMD,	DEVICEID_AMD_MISC0F },
88	{ VENDORID_AMD,	DEVICEID_AMD_MISC10 },
89	{ VENDORID_AMD,	DEVICEID_AMD_MISC11 },
90	{ VENDORID_AMD,	DEVICEID_AMD_MISC12 },
91	{ VENDORID_AMD,	DEVICEID_AMD_MISC14 },
92	{ VENDORID_AMD,	DEVICEID_AMD_MISC15 },
93	{ 0, 0 }
94};
95
96/*
97 * Reported Temperature Control Register
98 */
99#define	AMDTEMP_REPTMP_CTRL	0xa4
100
101/*
102 * Thermaltrip Status Register (Family 0Fh only)
103 */
104#define	AMDTEMP_THERMTP_STAT	0xe4
105#define	AMDTEMP_TTSR_SELCORE	0x04
106#define	AMDTEMP_TTSR_SELSENSOR	0x40
107
108/*
109 * DRAM Configuration High Register
110 */
111#define	AMDTEMP_DRAM_CONF_HIGH	0x94	/* Function 2 */
112#define	AMDTEMP_DRAM_MODE_DDR3	0x0100
113
114/*
115 * CPU Family/Model Register
116 */
117#define	AMDTEMP_CPUID		0xfc
118
119/*
120 * Device methods.
121 */
122static void 	amdtemp_identify(driver_t *driver, device_t parent);
123static int	amdtemp_probe(device_t dev);
124static int	amdtemp_attach(device_t dev);
125static void	amdtemp_intrhook(void *arg);
126static int	amdtemp_detach(device_t dev);
127static int 	amdtemp_match(device_t dev);
128static int32_t	amdtemp_gettemp0f(device_t dev, amdsensor_t sensor);
129static int32_t	amdtemp_gettemp(device_t dev, amdsensor_t sensor);
130static int	amdtemp_sysctl(SYSCTL_HANDLER_ARGS);
131
132static device_method_t amdtemp_methods[] = {
133	/* Device interface */
134	DEVMETHOD(device_identify,	amdtemp_identify),
135	DEVMETHOD(device_probe,		amdtemp_probe),
136	DEVMETHOD(device_attach,	amdtemp_attach),
137	DEVMETHOD(device_detach,	amdtemp_detach),
138
139	DEVMETHOD_END
140};
141
142static driver_t amdtemp_driver = {
143	"amdtemp",
144	amdtemp_methods,
145	sizeof(struct amdtemp_softc),
146};
147
148static devclass_t amdtemp_devclass;
149DRIVER_MODULE(amdtemp, hostb, amdtemp_driver, amdtemp_devclass, NULL, NULL);
150
151static int
152amdtemp_match(device_t dev)
153{
154	int i;
155	uint16_t vendor, devid;
156
157	vendor = pci_get_vendor(dev);
158	devid = pci_get_device(dev);
159
160	for (i = 0; amdtemp_products[i].amdtemp_vendorid != 0; i++) {
161		if (vendor == amdtemp_products[i].amdtemp_vendorid &&
162		    devid == amdtemp_products[i].amdtemp_deviceid)
163			return (1);
164	}
165
166	return (0);
167}
168
169static void
170amdtemp_identify(driver_t *driver, device_t parent)
171{
172	device_t child;
173
174	/* Make sure we're not being doubly invoked. */
175	if (device_find_child(parent, "amdtemp", -1) != NULL)
176		return;
177
178	if (amdtemp_match(parent)) {
179		child = device_add_child(parent, "amdtemp", -1);
180		if (child == NULL)
181			device_printf(parent, "add amdtemp child failed\n");
182	}
183}
184
185static int
186amdtemp_probe(device_t dev)
187{
188	uint32_t family, model;
189
190	if (resource_disabled("amdtemp", 0))
191		return (ENXIO);
192
193	family = CPUID_TO_FAMILY(cpu_id);
194	model = CPUID_TO_MODEL(cpu_id);
195
196	switch (family) {
197	case 0x0f:
198		if ((model == 0x04 && (cpu_id & CPUID_STEPPING) == 0) ||
199		    (model == 0x05 && (cpu_id & CPUID_STEPPING) <= 1))
200			return (ENXIO);
201		break;
202	case 0x10:
203	case 0x11:
204	case 0x12:
205	case 0x14:
206	case 0x15:
207		break;
208	default:
209		return (ENXIO);
210	}
211	device_set_desc(dev, "AMD CPU On-Die Thermal Sensors");
212
213	return (BUS_PROBE_GENERIC);
214}
215
216static int
217amdtemp_attach(device_t dev)
218{
219	char tn[32];
220	u_int regs[4];
221	struct amdtemp_softc *sc = device_get_softc(dev);
222	struct sysctl_ctx_list *sysctlctx;
223	struct sysctl_oid *sysctlnode;
224	uint32_t cpuid, family, model;
225	u_int bid;
226	int erratum319, unit;
227
228	erratum319 = 0;
229
230	/*
231	 * CPUID Register is available from Revision F.
232	 */
233	cpuid = cpu_id;
234	family = CPUID_TO_FAMILY(cpuid);
235	model = CPUID_TO_MODEL(cpuid);
236	if (family != 0x0f || model >= 0x40) {
237		cpuid = pci_read_config(dev, AMDTEMP_CPUID, 4);
238		family = CPUID_TO_FAMILY(cpuid);
239		model = CPUID_TO_MODEL(cpuid);
240	}
241
242	switch (family) {
243	case 0x0f:
244		/*
245		 * Thermaltrip Status Register
246		 *
247		 * - ThermSenseCoreSel
248		 *
249		 * Revision F & G:	0 - Core1, 1 - Core0
250		 * Other:		0 - Core0, 1 - Core1
251		 *
252		 * - CurTmp
253		 *
254		 * Revision G:		bits 23-14
255		 * Other:		bits 23-16
256		 *
257		 * XXX According to the BKDG, CurTmp, ThermSenseSel and
258		 * ThermSenseCoreSel bits were introduced in Revision F
259		 * but CurTmp seems working fine as early as Revision C.
260		 * However, it is not clear whether ThermSenseSel and/or
261		 * ThermSenseCoreSel work in undocumented cases as well.
262		 * In fact, the Linux driver suggests it may not work but
263		 * we just assume it does until we find otherwise.
264		 *
265		 * XXX According to Linux, CurTmp starts at -28C on
266		 * Socket AM2 Revision G processors, which is not
267		 * documented anywhere.
268		 */
269		if (model >= 0x40)
270			sc->sc_flags |= AMDTEMP_FLAG_CS_SWAP;
271		if (model >= 0x60 && model != 0xc1) {
272			do_cpuid(0x80000001, regs);
273			bid = (regs[1] >> 9) & 0x1f;
274			switch (model) {
275			case 0x68: /* Socket S1g1 */
276			case 0x6c:
277			case 0x7c:
278				break;
279			case 0x6b: /* Socket AM2 and ASB1 (2 cores) */
280				if (bid != 0x0b && bid != 0x0c)
281					sc->sc_flags |=
282					    AMDTEMP_FLAG_ALT_OFFSET;
283				break;
284			case 0x6f: /* Socket AM2 and ASB1 (1 core) */
285			case 0x7f:
286				if (bid != 0x07 && bid != 0x09 &&
287				    bid != 0x0c)
288					sc->sc_flags |=
289					    AMDTEMP_FLAG_ALT_OFFSET;
290				break;
291			default:
292				sc->sc_flags |= AMDTEMP_FLAG_ALT_OFFSET;
293			}
294			sc->sc_flags |= AMDTEMP_FLAG_CT_10BIT;
295		}
296
297		/*
298		 * There are two sensors per core.
299		 */
300		sc->sc_ntemps = 2;
301
302		sc->sc_gettemp = amdtemp_gettemp0f;
303		break;
304	case 0x10:
305		/*
306		 * Erratum 319 Inaccurate Temperature Measurement
307		 *
308		 * http://support.amd.com/us/Processor_TechDocs/41322.pdf
309		 */
310		do_cpuid(0x80000001, regs);
311		switch ((regs[1] >> 28) & 0xf) {
312		case 0:	/* Socket F */
313			erratum319 = 1;
314			break;
315		case 1:	/* Socket AM2+ or AM3 */
316			if ((pci_cfgregread(pci_get_bus(dev),
317			    pci_get_slot(dev), 2, AMDTEMP_DRAM_CONF_HIGH, 2) &
318			    AMDTEMP_DRAM_MODE_DDR3) != 0 || model > 0x04 ||
319			    (model == 0x04 && (cpuid & CPUID_STEPPING) >= 3))
320				break;
321			/* XXX 00100F42h (RB-C2) exists in both formats. */
322			erratum319 = 1;
323			break;
324		}
325		/* FALLTHROUGH */
326	case 0x11:
327	case 0x12:
328	case 0x14:
329	case 0x15:
330		/*
331		 * There is only one sensor per package.
332		 */
333		sc->sc_ntemps = 1;
334
335		sc->sc_gettemp = amdtemp_gettemp;
336		break;
337	}
338
339	/* Find number of cores per package. */
340	sc->sc_ncores = (amd_feature2 & AMDID2_CMP) != 0 ?
341	    (cpu_procinfo2 & AMDID_CMP_CORES) + 1 : 1;
342	if (sc->sc_ncores > MAXCPU)
343		return (ENXIO);
344
345	if (erratum319)
346		device_printf(dev,
347		    "Erratum 319: temperature measurement may be inaccurate\n");
348	if (bootverbose)
349		device_printf(dev, "Found %d cores and %d sensors.\n",
350		    sc->sc_ncores,
351		    sc->sc_ntemps > 1 ? sc->sc_ntemps * sc->sc_ncores : 1);
352
353	/*
354	 * dev.amdtemp.N tree.
355	 */
356	unit = device_get_unit(dev);
357	snprintf(tn, sizeof(tn), "dev.amdtemp.%d.sensor_offset", unit);
358	TUNABLE_INT_FETCH(tn, &sc->sc_offset);
359
360	sysctlctx = device_get_sysctl_ctx(dev);
361	SYSCTL_ADD_INT(sysctlctx,
362	    SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
363	    "sensor_offset", CTLFLAG_RW, &sc->sc_offset, 0,
364	    "Temperature sensor offset");
365	sysctlnode = SYSCTL_ADD_NODE(sysctlctx,
366	    SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
367	    "core0", CTLFLAG_RD, 0, "Core 0");
368
369	SYSCTL_ADD_PROC(sysctlctx,
370	    SYSCTL_CHILDREN(sysctlnode),
371	    OID_AUTO, "sensor0", CTLTYPE_INT | CTLFLAG_RD,
372	    dev, CORE0_SENSOR0, amdtemp_sysctl, "IK",
373	    "Core 0 / Sensor 0 temperature");
374
375	if (sc->sc_ntemps > 1) {
376		SYSCTL_ADD_PROC(sysctlctx,
377		    SYSCTL_CHILDREN(sysctlnode),
378		    OID_AUTO, "sensor1", CTLTYPE_INT | CTLFLAG_RD,
379		    dev, CORE0_SENSOR1, amdtemp_sysctl, "IK",
380		    "Core 0 / Sensor 1 temperature");
381
382		if (sc->sc_ncores > 1) {
383			sysctlnode = SYSCTL_ADD_NODE(sysctlctx,
384			    SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
385			    OID_AUTO, "core1", CTLFLAG_RD, 0, "Core 1");
386
387			SYSCTL_ADD_PROC(sysctlctx,
388			    SYSCTL_CHILDREN(sysctlnode),
389			    OID_AUTO, "sensor0", CTLTYPE_INT | CTLFLAG_RD,
390			    dev, CORE1_SENSOR0, amdtemp_sysctl, "IK",
391			    "Core 1 / Sensor 0 temperature");
392
393			SYSCTL_ADD_PROC(sysctlctx,
394			    SYSCTL_CHILDREN(sysctlnode),
395			    OID_AUTO, "sensor1", CTLTYPE_INT | CTLFLAG_RD,
396			    dev, CORE1_SENSOR1, amdtemp_sysctl, "IK",
397			    "Core 1 / Sensor 1 temperature");
398		}
399	}
400
401	/*
402	 * Try to create dev.cpu sysctl entries and setup intrhook function.
403	 * This is needed because the cpu driver may be loaded late on boot,
404	 * after us.
405	 */
406	amdtemp_intrhook(dev);
407	sc->sc_ich.ich_func = amdtemp_intrhook;
408	sc->sc_ich.ich_arg = dev;
409	if (config_intrhook_establish(&sc->sc_ich) != 0) {
410		device_printf(dev, "config_intrhook_establish failed!\n");
411		return (ENXIO);
412	}
413
414	return (0);
415}
416
417void
418amdtemp_intrhook(void *arg)
419{
420	struct amdtemp_softc *sc;
421	struct sysctl_ctx_list *sysctlctx;
422	device_t dev = (device_t)arg;
423	device_t acpi, cpu, nexus;
424	amdsensor_t sensor;
425	int i;
426
427	sc = device_get_softc(dev);
428
429	/*
430	 * dev.cpu.N.temperature.
431	 */
432	nexus = device_find_child(root_bus, "nexus", 0);
433	acpi = device_find_child(nexus, "acpi", 0);
434
435	for (i = 0; i < sc->sc_ncores; i++) {
436		if (sc->sc_sysctl_cpu[i] != NULL)
437			continue;
438		cpu = device_find_child(acpi, "cpu",
439		    device_get_unit(dev) * sc->sc_ncores + i);
440		if (cpu != NULL) {
441			sysctlctx = device_get_sysctl_ctx(cpu);
442
443			sensor = sc->sc_ntemps > 1 ?
444			    (i == 0 ? CORE0 : CORE1) : CORE0_SENSOR0;
445			sc->sc_sysctl_cpu[i] = SYSCTL_ADD_PROC(sysctlctx,
446			    SYSCTL_CHILDREN(device_get_sysctl_tree(cpu)),
447			    OID_AUTO, "temperature", CTLTYPE_INT | CTLFLAG_RD,
448			    dev, sensor, amdtemp_sysctl, "IK",
449			    "Current temparature");
450		}
451	}
452	if (sc->sc_ich.ich_arg != NULL)
453		config_intrhook_disestablish(&sc->sc_ich);
454}
455
456int
457amdtemp_detach(device_t dev)
458{
459	struct amdtemp_softc *sc = device_get_softc(dev);
460	int i;
461
462	for (i = 0; i < sc->sc_ncores; i++)
463		if (sc->sc_sysctl_cpu[i] != NULL)
464			sysctl_remove_oid(sc->sc_sysctl_cpu[i], 1, 0);
465
466	/* NewBus removes the dev.amdtemp.N tree by itself. */
467
468	return (0);
469}
470
471static int
472amdtemp_sysctl(SYSCTL_HANDLER_ARGS)
473{
474	device_t dev = (device_t)arg1;
475	struct amdtemp_softc *sc = device_get_softc(dev);
476	amdsensor_t sensor = (amdsensor_t)arg2;
477	int32_t auxtemp[2], temp;
478	int error;
479
480	switch (sensor) {
481	case CORE0:
482		auxtemp[0] = sc->sc_gettemp(dev, CORE0_SENSOR0);
483		auxtemp[1] = sc->sc_gettemp(dev, CORE0_SENSOR1);
484		temp = imax(auxtemp[0], auxtemp[1]);
485		break;
486	case CORE1:
487		auxtemp[0] = sc->sc_gettemp(dev, CORE1_SENSOR0);
488		auxtemp[1] = sc->sc_gettemp(dev, CORE1_SENSOR1);
489		temp = imax(auxtemp[0], auxtemp[1]);
490		break;
491	default:
492		temp = sc->sc_gettemp(dev, sensor);
493		break;
494	}
495	error = sysctl_handle_int(oidp, &temp, 0, req);
496
497	return (error);
498}
499
500#define	AMDTEMP_ZERO_C_TO_K	2732
501
502static int32_t
503amdtemp_gettemp0f(device_t dev, amdsensor_t sensor)
504{
505	struct amdtemp_softc *sc = device_get_softc(dev);
506	uint32_t mask, offset, temp;
507
508	/* Set Sensor/Core selector. */
509	temp = pci_read_config(dev, AMDTEMP_THERMTP_STAT, 1);
510	temp &= ~(AMDTEMP_TTSR_SELCORE | AMDTEMP_TTSR_SELSENSOR);
511	switch (sensor) {
512	case CORE0_SENSOR1:
513		temp |= AMDTEMP_TTSR_SELSENSOR;
514		/* FALLTHROUGH */
515	case CORE0_SENSOR0:
516	case CORE0:
517		if ((sc->sc_flags & AMDTEMP_FLAG_CS_SWAP) != 0)
518			temp |= AMDTEMP_TTSR_SELCORE;
519		break;
520	case CORE1_SENSOR1:
521		temp |= AMDTEMP_TTSR_SELSENSOR;
522		/* FALLTHROUGH */
523	case CORE1_SENSOR0:
524	case CORE1:
525		if ((sc->sc_flags & AMDTEMP_FLAG_CS_SWAP) == 0)
526			temp |= AMDTEMP_TTSR_SELCORE;
527		break;
528	}
529	pci_write_config(dev, AMDTEMP_THERMTP_STAT, temp, 1);
530
531	mask = (sc->sc_flags & AMDTEMP_FLAG_CT_10BIT) != 0 ? 0x3ff : 0x3fc;
532	offset = (sc->sc_flags & AMDTEMP_FLAG_ALT_OFFSET) != 0 ? 28 : 49;
533	temp = pci_read_config(dev, AMDTEMP_THERMTP_STAT, 4);
534	temp = ((temp >> 14) & mask) * 5 / 2;
535	temp += AMDTEMP_ZERO_C_TO_K + (sc->sc_offset - offset) * 10;
536
537	return (temp);
538}
539
540static int32_t
541amdtemp_gettemp(device_t dev, amdsensor_t sensor)
542{
543	struct amdtemp_softc *sc = device_get_softc(dev);
544	uint32_t temp;
545
546	temp = pci_read_config(dev, AMDTEMP_REPTMP_CTRL, 4);
547	temp = ((temp >> 21) & 0x7ff) * 5 / 4;
548	temp += AMDTEMP_ZERO_C_TO_K + sc->sc_offset * 10;
549
550	return (temp);
551}
552