altera_jtag_uart_cons.c revision 240518
1239676Srwatson/*- 2239676Srwatson * Copyright (c) 2011-2012 Robert N. M. Watson 3239676Srwatson * All rights reserved. 4239676Srwatson * 5239676Srwatson * This software was developed by SRI International and the University of 6239676Srwatson * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) 7239676Srwatson * ("CTSRD"), as part of the DARPA CRASH research programme. 8239676Srwatson * 9239676Srwatson * Redistribution and use in source and binary forms, with or without 10239676Srwatson * modification, are permitted provided that the following conditions 11239676Srwatson * are met: 12239676Srwatson * 1. Redistributions of source code must retain the above copyright 13239676Srwatson * notice, this list of conditions and the following disclaimer. 14239676Srwatson * 2. Redistributions in binary form must reproduce the above copyright 15239676Srwatson * notice, this list of conditions and the following disclaimer in the 16239676Srwatson * documentation and/or other materials provided with the distribution. 17239676Srwatson * 18239676Srwatson * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19239676Srwatson * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20239676Srwatson * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21239676Srwatson * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22239676Srwatson * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23239676Srwatson * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24239676Srwatson * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25239676Srwatson * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26239676Srwatson * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27239676Srwatson * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28239676Srwatson * SUCH DAMAGE. 29239676Srwatson */ 30239676Srwatson 31239676Srwatson#include <sys/cdefs.h> 32239676Srwatson__FBSDID("$FreeBSD: head/sys/dev/altera/jtag_uart/altera_jtag_uart_cons.c 240518 2012-09-14 21:28:56Z eadler $"); 33239676Srwatson 34239676Srwatson#include <sys/param.h> 35239676Srwatson#include <sys/cons.h> 36239676Srwatson#include <sys/endian.h> 37239676Srwatson#include <sys/kdb.h> 38239676Srwatson#include <sys/kernel.h> 39239676Srwatson#include <sys/lock.h> 40239676Srwatson#include <sys/mutex.h> 41239676Srwatson#include <sys/reboot.h> 42239676Srwatson#include <sys/systm.h> 43239676Srwatson#include <sys/tty.h> 44239676Srwatson 45239676Srwatson#include <ddb/ddb.h> 46239676Srwatson 47239676Srwatson#include <dev/altera/jtag_uart/altera_jtag_uart.h> 48239676Srwatson 49239676Srwatson/* 50239676Srwatson * One-byte buffer as we can't check whether the UART is readable without 51239676Srwatson * actually reading from it, synchronised by a spinlock; this lock also 52239676Srwatson * synchronises access to the I/O ports for non-atomic sequences. These 53239676Srwatson * symbols are public so that the TTY layer can use them when working on an 54239676Srwatson * instance of the UART that is also a low-level console. 55239676Srwatson */ 56239676Srwatsonchar aju_cons_buffer_data; 57239676Srwatsonint aju_cons_buffer_valid; 58239676Srwatsonint aju_cons_jtag_present; 59239676Srwatsonu_int aju_cons_jtag_missed; 60239676Srwatsonstruct mtx aju_cons_lock; 61239676Srwatson 62239676Srwatson/* 63239676Srwatson * Low-level console driver functions. 64239676Srwatson */ 65239676Srwatsonstatic cn_probe_t aju_cnprobe; 66239676Srwatsonstatic cn_init_t aju_cninit; 67239676Srwatsonstatic cn_term_t aju_cnterm; 68239676Srwatsonstatic cn_getc_t aju_cngetc; 69239676Srwatsonstatic cn_putc_t aju_cnputc; 70239676Srwatsonstatic cn_grab_t aju_cngrab; 71239676Srwatsonstatic cn_ungrab_t aju_cnungrab; 72239676Srwatson 73239676Srwatson/* 74239676Srwatson * JTAG sets the ALTERA_JTAG_UART_CONTROL_AC bit whenever it accesses the 75239676Srwatson * FIFO. This allows us to (sort of) tell when JTAG is present, so that we 76239676Srwatson * can adopt lossy, rather than blocking, behaviour when JTAG isn't there. 77239676Srwatson * When it is present, we do full flow control. This delay is how long we 78239676Srwatson * wait to see if JTAG has really disappeared when finding a full buffer and 79239676Srwatson * no AC bit set. 80239676Srwatson */ 81239676Srwatson#define ALTERA_JTAG_UART_AC_POLL_DELAY 10000 82239676Srwatson 83239676Srwatson/* 84239676Srwatson * I/O routines lifted from Deimos. This is not only MIPS-specific, but also 85240518Seadler * BERI-specific, as we're hard coding the address at which we expect to 86239676Srwatson * find the Altera JTAG UART and using it unconditionally. We use these 87239676Srwatson * low-level routines so that we can perform console I/O long before newbus 88239676Srwatson * has initialised and devices have attached. The TTY layer of the driver 89239676Srwatson * knows about this, and uses the console-layer spinlock instead of the 90239676Srwatson * TTY-layer lock to avoid confusion between layers for the console UART. 91239676Srwatson * 92239676Srwatson * XXXRW: The only place this inter-layer behaviour breaks down is if the 93239676Srwatson * low-level console is used for polled read while the TTY driver is also 94239676Srwatson * looking for input. Probably we should also share buffers between layers. 95239676Srwatson */ 96239676Srwatson#define MIPS_XKPHYS_UNCACHED_BASE 0x9000000000000000 97239676Srwatson 98239676Srwatsontypedef uint64_t paddr_t; 99239676Srwatsontypedef uint64_t vaddr_t; 100239676Srwatson 101239676Srwatsonstatic inline vaddr_t 102239676Srwatsonmips_phys_to_uncached(paddr_t phys) 103239676Srwatson{ 104239676Srwatson 105239676Srwatson return (phys | MIPS_XKPHYS_UNCACHED_BASE); 106239676Srwatson} 107239676Srwatson 108239676Srwatsonstatic inline uint32_t 109239676Srwatsonmips_ioread_uint32(vaddr_t vaddr) 110239676Srwatson{ 111239676Srwatson uint32_t v; 112239676Srwatson 113239676Srwatson __asm__ __volatile__ ("lw %0, 0(%1)" : "=r" (v) : "r" (vaddr)); 114239676Srwatson return (v); 115239676Srwatson} 116239676Srwatson 117239676Srwatsonstatic inline void 118239676Srwatsonmips_iowrite_uint32(vaddr_t vaddr, uint32_t v) 119239676Srwatson{ 120239676Srwatson 121239676Srwatson __asm__ __volatile__ ("sw %0, 0(%1)" : : "r" (v), "r" (vaddr)); 122239676Srwatson} 123239676Srwatson 124239676Srwatson/* 125239676Srwatson * Little-endian versions of 32-bit I/O routines. 126239676Srwatson */ 127239676Srwatsonstatic inline uint32_t 128239676Srwatsonmips_ioread_uint32le(vaddr_t vaddr) 129239676Srwatson{ 130239676Srwatson 131239676Srwatson return (le32toh(mips_ioread_uint32(vaddr))); 132239676Srwatson} 133239676Srwatson 134239676Srwatsonstatic inline void 135239676Srwatsonmips_iowrite_uint32le(vaddr_t vaddr, uint32_t v) 136239676Srwatson{ 137239676Srwatson 138239676Srwatson mips_iowrite_uint32(vaddr, htole32(v)); 139239676Srwatson} 140239676Srwatson 141239676Srwatson/* 142239676Srwatson * Low-level read and write register routines; the Altera UART is little 143239676Srwatson * endian, so we byte swap 32-bit reads and writes. 144239676Srwatson */ 145239676Srwatsonstatic inline uint32_t 146239676Srwatsonaju_cons_data_read(void) 147239676Srwatson{ 148239676Srwatson 149239676Srwatson return (mips_ioread_uint32le(mips_phys_to_uncached(BERI_UART_BASE + 150239676Srwatson ALTERA_JTAG_UART_DATA_OFF))); 151239676Srwatson} 152239676Srwatson 153239676Srwatsonstatic inline void 154239676Srwatsonaju_cons_data_write(uint32_t v) 155239676Srwatson{ 156239676Srwatson 157239676Srwatson mips_iowrite_uint32le(mips_phys_to_uncached(BERI_UART_BASE + 158239676Srwatson ALTERA_JTAG_UART_DATA_OFF), v); 159239676Srwatson} 160239676Srwatson 161239676Srwatsonstatic inline uint32_t 162239676Srwatsonaju_cons_control_read(void) 163239676Srwatson{ 164239676Srwatson 165239676Srwatson return (mips_ioread_uint32le(mips_phys_to_uncached(BERI_UART_BASE + 166239676Srwatson ALTERA_JTAG_UART_CONTROL_OFF))); 167239676Srwatson} 168239676Srwatson 169239676Srwatsonstatic inline void 170239676Srwatsonaju_cons_control_write(uint32_t v) 171239676Srwatson{ 172239676Srwatson 173239676Srwatson mips_iowrite_uint32le(mips_phys_to_uncached(BERI_UART_BASE + 174239676Srwatson ALTERA_JTAG_UART_CONTROL_OFF), v); 175239676Srwatson} 176239676Srwatson 177239676Srwatson/* 178239676Srwatson * Slightly higher-level routines aware of buffering and flow control. 179239676Srwatson */ 180239676Srwatsonstatic int 181239676Srwatsonaju_cons_readable(void) 182239676Srwatson{ 183239676Srwatson uint32_t v; 184239676Srwatson 185239676Srwatson AJU_CONSOLE_LOCK_ASSERT(); 186239676Srwatson 187239676Srwatson if (aju_cons_buffer_valid) 188239676Srwatson return (1); 189239676Srwatson v = aju_cons_data_read(); 190239676Srwatson if ((v & ALTERA_JTAG_UART_DATA_RVALID) != 0) { 191239676Srwatson aju_cons_buffer_valid = 1; 192239676Srwatson aju_cons_buffer_data = (v & ALTERA_JTAG_UART_DATA_DATA); 193239676Srwatson return (1); 194239676Srwatson } 195239676Srwatson return (0); 196239676Srwatson} 197239676Srwatson 198239676Srwatsonstatic void 199239676Srwatsonaju_cons_write(char ch) 200239676Srwatson{ 201239676Srwatson uint32_t v; 202239676Srwatson 203239676Srwatson AJU_CONSOLE_LOCK_ASSERT(); 204239676Srwatson 205239676Srwatson /* 206239676Srwatson * The flow control logic here is somewhat subtle: we want to wait for 207239676Srwatson * write buffer space only while JTAG is present. However, we can't 208239676Srwatson * directly ask if JTAG is present -- just whether it's been seen 209239676Srwatson * since we last cleared the ALTERA_JTAG_UART_CONTROL_AC bit. As 210239676Srwatson * such, implement a polling loop in which we both wait for space and 211239676Srwatson * try to decide whether JTAG has disappeared on us. We will have to 212239676Srwatson * wait one complete polling delay to detect that JTAG has gone away, 213239676Srwatson * but otherwise shouldn't wait any further once it has gone. And we 214239676Srwatson * had to wait for buffer space anyway, if it was there. 215239676Srwatson * 216239676Srwatson * If JTAG is spotted, reset the TTY-layer miss counter so console- 217239676Srwatson * layer clearing of the bit doesn't trigger a TTY-layer 218239676Srwatson * disconnection. 219239676Srwatson * 220239676Srwatson * XXXRW: The polling delay may require tuning. 221239676Srwatson */ 222239676Srwatson v = aju_cons_control_read(); 223239676Srwatson if (v & ALTERA_JTAG_UART_CONTROL_AC) { 224239676Srwatson aju_cons_jtag_present = 1; 225239676Srwatson aju_cons_jtag_missed = 0; 226239676Srwatson v &= ~ALTERA_JTAG_UART_CONTROL_AC; 227239676Srwatson aju_cons_control_write(v); 228239676Srwatson } 229239676Srwatson while ((v & ALTERA_JTAG_UART_CONTROL_WSPACE) == 0) { 230239676Srwatson if (!aju_cons_jtag_present) 231239676Srwatson return; 232239676Srwatson DELAY(ALTERA_JTAG_UART_AC_POLL_DELAY); 233239676Srwatson v = aju_cons_control_read(); 234239676Srwatson if (v & ALTERA_JTAG_UART_CONTROL_AC) { 235239676Srwatson aju_cons_jtag_present = 1; 236239676Srwatson v &= ~ALTERA_JTAG_UART_CONTROL_AC; 237239676Srwatson aju_cons_control_write(v); 238239676Srwatson } else 239239676Srwatson aju_cons_jtag_present = 0; 240239676Srwatson } 241239676Srwatson aju_cons_data_write(ch); 242239676Srwatson} 243239676Srwatson 244239676Srwatsonstatic char 245239676Srwatsonaju_cons_read(void) 246239676Srwatson{ 247239676Srwatson 248239676Srwatson AJU_CONSOLE_LOCK_ASSERT(); 249239676Srwatson 250239676Srwatson while (!aju_cons_readable()); 251239676Srwatson aju_cons_buffer_valid = 0; 252239676Srwatson return (aju_cons_buffer_data); 253239676Srwatson} 254239676Srwatson 255239676Srwatson/* 256239676Srwatson * Implementation of a FreeBSD low-level, polled console driver. 257239676Srwatson */ 258239676Srwatsonstatic void 259239676Srwatsonaju_cnprobe(struct consdev *cp) 260239676Srwatson{ 261239676Srwatson 262239676Srwatson sprintf(cp->cn_name, "%s%d", AJU_TTYNAME, 0); 263239676Srwatson cp->cn_pri = (boothowto & RB_SERIAL) ? CN_REMOTE : CN_NORMAL; 264239676Srwatson} 265239676Srwatson 266239676Srwatsonstatic void 267239676Srwatsonaju_cninit(struct consdev *cp) 268239676Srwatson{ 269239676Srwatson uint32_t v; 270239676Srwatson 271239676Srwatson AJU_CONSOLE_LOCK_INIT(); 272239676Srwatson 273239676Srwatson AJU_CONSOLE_LOCK(); 274239676Srwatson v = aju_cons_control_read(); 275239676Srwatson v &= ~ALTERA_JTAG_UART_CONTROL_AC; 276239676Srwatson aju_cons_control_write(v); 277239676Srwatson AJU_CONSOLE_UNLOCK(); 278239676Srwatson} 279239676Srwatson 280239676Srwatsonstatic void 281239676Srwatsonaju_cnterm(struct consdev *cp) 282239676Srwatson{ 283239676Srwatson 284239676Srwatson} 285239676Srwatson 286239676Srwatsonstatic int 287239676Srwatsonaju_cngetc(struct consdev *cp) 288239676Srwatson{ 289239676Srwatson int ret; 290239676Srwatson 291239676Srwatson AJU_CONSOLE_LOCK(); 292239676Srwatson ret = aju_cons_read(); 293239676Srwatson AJU_CONSOLE_UNLOCK(); 294239676Srwatson return (ret); 295239676Srwatson} 296239676Srwatson 297239676Srwatsonstatic void 298239676Srwatsonaju_cnputc(struct consdev *cp, int c) 299239676Srwatson{ 300239676Srwatson 301239676Srwatson AJU_CONSOLE_LOCK(); 302239676Srwatson aju_cons_write(c); 303239676Srwatson AJU_CONSOLE_UNLOCK(); 304239676Srwatson} 305239676Srwatson 306239676Srwatsonstatic void 307239676Srwatsonaju_cngrab(struct consdev *cp) 308239676Srwatson{ 309239676Srwatson 310239676Srwatson} 311239676Srwatson 312239676Srwatsonstatic void 313239676Srwatsonaju_cnungrab(struct consdev *cp) 314239676Srwatson{ 315239676Srwatson 316239676Srwatson} 317239676Srwatson 318239676SrwatsonCONSOLE_DRIVER(aju); 319