if_atse_fdt.c revision 256752
150472Speter/*- 238738Sbrian * Copyright (c) 2013 Bjoern A. Zeeb 375031Smurray * All rights reserved. 475031Smurray * 575031Smurray * This software was developed by SRI International and the University of 675031Smurray * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-11-C-0249) 740361Snate * ("MRC2"), as part of the DARPA MRC research programme. 8143462Sglebius * 9143462Sglebius * Redistribution and use in source and binary forms, with or without 1092099Srwatson * modification, are permitted provided that the following conditions 1192100Srwatson * are met: 1237Srgrimes * 1. Redistributions of source code must retain the above copyright 1337Srgrimes * notice, this list of conditions and the following disclaimer. 14103738Smarkm * 2. Redistributions in binary form must reproduce the above copyright 1551033Sn_hibma * notice, this list of conditions and the following disclaimer in the 16113902Sdes * documentation and/or other materials provided with the distribution. 1737Srgrimes * 1872580Sphk * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19237921Sbrueffer * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2072580Sphk * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2157065Srwatson * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 2285626Sasmodai * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2357065Srwatson * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2457065Srwatson * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2557065Srwatson * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2619473Spst * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2719473Spst * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2819473Spst * SUCH DAMAGE. 2919473Spst */ 3026549Sache 3126549Sache#include <sys/cdefs.h> 32194005Savg__FBSDID("$FreeBSD: head/sys/dev/altera/atse/if_atse_fdt.c 256752 2013-10-18 20:44:19Z brooks $"); 33 34#include <sys/param.h> 35#include <sys/bus.h> 36#include <sys/kernel.h> 37#include <sys/module.h> 38#include <sys/rman.h> 39#include <sys/socket.h> 40#include <sys/systm.h> 41 42#include <machine/bus.h> 43#include <machine/resource.h> 44 45#include <net/ethernet.h> 46#include <net/if.h> 47#include <net/if_media.h> 48 49#include <dev/mii/mii.h> 50#include <dev/mii/miivar.h> 51 52 53#include <dev/fdt/fdt_common.h> 54#include <dev/ofw/openfirm.h> 55#include <dev/ofw/ofw_bus.h> 56#include <dev/ofw/ofw_bus_subr.h> 57 58#include <dev/altera/atse/if_atsereg.h> 59 60/* "device miibus" required. See GENERIC if you get errors here. */ 61#include "miibus_if.h" 62 63static int 64atse_probe_fdt(device_t dev) 65{ 66 67 if (ofw_bus_is_compatible(dev, "altera,atse")) { 68 device_set_desc(dev, "Altera Triple-Speed Ethernet MegaCore"); 69 return (BUS_PROBE_DEFAULT); 70 } 71 return (ENXIO); 72} 73 74static int 75atse_attach_fdt(device_t dev) 76{ 77 struct atse_softc *sc; 78 int error; 79 80 sc = device_get_softc(dev); 81 sc->atse_dev = dev; 82 sc->atse_unit = device_get_unit(dev); 83 84 /* 85 * FDT has the list of our resources. Given we are using multiple 86 * memory regions and possibly multiple interrupts, we need to attach 87 * them in the order specified in .dts: 88 * MAC, RX and RXC FIFO, TX and TXC FIFO; RX INTR, TX INTR. 89 */ 90 91 /* MAC: Avalon-MM, atse management register region. */ 92 sc->atse_mem_rid = 0; 93 sc->atse_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 94 &sc->atse_mem_rid, RF_ACTIVE); 95 if (sc->atse_mem_res == NULL) { 96 device_printf(dev, "failed to map memory for ctrl region\n"); 97 error = ENXIO; 98 goto err; 99 } 100 if (bootverbose) 101 device_printf(sc->atse_dev, "MAC ctrl region at mem %p-%p\n", 102 (void *)rman_get_start(sc->atse_mem_res), 103 (void *)(rman_get_start(sc->atse_mem_res) + 104 rman_get_size(sc->atse_mem_res))); 105 106 /* 107 * RX and RXC FIFO memory regions. 108 * 0x00: 2 * 32bit FIFO data, 109 * 0x20: 8 * 32bit FIFO ctrl, Avalon-ST Sink to Avalon-MM R-Slave. 110 */ 111 sc->atse_rx_mem_rid = 1; 112 sc->atse_rx_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 113 &sc->atse_rx_mem_rid, RF_ACTIVE); 114 if (sc->atse_rx_mem_res == NULL) { 115 device_printf(dev, "failed to map memory for RX FIFO\n"); 116 error = ENXIO; 117 goto err; 118 } 119 if (bootverbose) 120 device_printf(sc->atse_dev, "RX FIFO at mem %p-%p\n", 121 (void *)rman_get_start(sc->atse_rx_mem_res), 122 (void *)(rman_get_start(sc->atse_rx_mem_res) + 123 rman_get_size(sc->atse_rx_mem_res))); 124 125 sc->atse_rxc_mem_rid = 2; 126 sc->atse_rxc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 127 &sc->atse_rxc_mem_rid, RF_ACTIVE); 128 if (sc->atse_rxc_mem_res == NULL) { 129 device_printf(dev, "failed to map memory for RXC FIFO\n"); 130 error = ENXIO; 131 goto err; 132 } 133 if (bootverbose) 134 device_printf(sc->atse_dev, "RXC FIFO at mem %p-%p\n", 135 (void *)rman_get_start(sc->atse_rxc_mem_res), 136 (void *)(rman_get_start(sc->atse_rxc_mem_res) + 137 rman_get_size(sc->atse_rxc_mem_res))); 138 139 /* 140 * TX and TXC FIFO memory regions. 141 * 0x00: 2 * 32bit FIFO data, 142 * 0x20: 8 * 32bit FIFO ctrl, Avalon-MM W-Slave to Avalon-ST Source. 143 */ 144 sc->atse_tx_mem_rid = 3; 145 sc->atse_tx_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 146 &sc->atse_tx_mem_rid, RF_ACTIVE); 147 if (sc->atse_tx_mem_res == NULL) { 148 device_printf(dev, "failed to map memory for TX FIFO\n"); 149 error = ENXIO; 150 goto err; 151 } 152 if (bootverbose) 153 device_printf(sc->atse_dev, "TX FIFO at mem %p-%p\n", 154 (void *)rman_get_start(sc->atse_tx_mem_res), 155 (void *)(rman_get_start(sc->atse_tx_mem_res) + 156 rman_get_size(sc->atse_tx_mem_res))); 157 158 sc->atse_txc_mem_rid = 4; 159 sc->atse_txc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 160 &sc->atse_txc_mem_rid, RF_ACTIVE); 161 if (sc->atse_txc_mem_res == NULL) { 162 device_printf(dev, "failed to map memory for TXC FIFO\n"); 163 error = ENXIO; 164 goto err; 165 } 166 if (bootverbose) 167 device_printf(sc->atse_dev, "TXC FIFO at mem %p-%p\n", 168 (void *)rman_get_start(sc->atse_txc_mem_res), 169 (void *)(rman_get_start(sc->atse_txc_mem_res) + 170 rman_get_size(sc->atse_txc_mem_res))); 171 172 /* (Optional) RX and TX IRQ. */ 173 sc->atse_rx_irq_rid = 0; 174 sc->atse_rx_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, 175 &sc->atse_rx_irq_rid, RF_ACTIVE | RF_SHAREABLE); 176 sc->atse_tx_irq_rid = 1; 177 sc->atse_tx_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, 178 &sc->atse_tx_irq_rid, RF_ACTIVE | RF_SHAREABLE); 179 180 error = atse_attach(dev); 181 if (error) 182 goto err; 183 184 return (0); 185 186err: 187 /* Cleanup. */ 188 atse_detach_resources(dev); 189 190 return (error); 191} 192 193static device_method_t atse_methods_fdt[] = { 194 /* Device interface */ 195 DEVMETHOD(device_probe, atse_probe_fdt), 196 DEVMETHOD(device_attach, atse_attach_fdt), 197 DEVMETHOD(device_detach, atse_detach_dev), 198 199 /* MII interface */ 200 DEVMETHOD(miibus_readreg, atse_miibus_readreg), 201 DEVMETHOD(miibus_writereg, atse_miibus_writereg), 202 DEVMETHOD(miibus_statchg, atse_miibus_statchg), 203 204 DEVMETHOD_END 205}; 206 207static driver_t atse_driver_fdt = { 208 "atse", 209 atse_methods_fdt, 210 sizeof(struct atse_softc) 211}; 212 213DRIVER_MODULE(atse, simplebus, atse_driver_fdt, atse_devclass, 0, 0); 214DRIVER_MODULE(miibus, atse, miibus_driver, miibus_devclass, 0, 0); 215 216/* end */ 217