aic7xxx_93cx6.c revision 50477
1/* 2 * Interface for the 93C66/56/46/26/06 serial eeprom parts. 3 * 4 * Copyright (c) 1995, 1996 Daniel M. Eischen 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice immediately at the beginning of the file, without modification, 12 * this list of conditions, and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. Absolutely no warranty of function or purpose is made by the author 17 * Daniel M. Eischen. 18 * 4. Modifications may be freely made to this file if the above conditions 19 * are met. 20 * 21 * $FreeBSD: head/sys/dev/aic7xxx/aic7xxx_93cx6.c 50477 1999-08-28 01:08:13Z peter $ 22 */ 23 24/* 25 * The instruction set of the 93C66/56/46/26/06 chips are as follows: 26 * 27 * Start OP * 28 * Function Bit Code Address** Data Description 29 * ------------------------------------------------------------------- 30 * READ 1 10 A5 - A0 Reads data stored in memory, 31 * starting at specified address 32 * EWEN 1 00 11XXXX Write enable must preceed 33 * all programming modes 34 * ERASE 1 11 A5 - A0 Erase register A5A4A3A2A1A0 35 * WRITE 1 01 A5 - A0 D15 - D0 Writes register 36 * ERAL 1 00 10XXXX Erase all registers 37 * WRAL 1 00 01XXXX D15 - D0 Writes to all registers 38 * EWDS 1 00 00XXXX Disables all programming 39 * instructions 40 * *Note: A value of X for address is a don't care condition. 41 * **Note: There are 8 address bits for the 93C56/66 chips unlike 42 * the 93C46/26/06 chips which have 6 address bits. 43 * 44 * The 93C46 has a four wire interface: clock, chip select, data in, and 45 * data out. In order to perform one of the above functions, you need 46 * to enable the chip select for a clock period (typically a minimum of 47 * 1 usec, with the clock high and low a minimum of 750 and 250 nsec 48 * respectively). While the chip select remains high, you can clock in 49 * the instructions (above) starting with the start bit, followed by the 50 * OP code, Address, and Data (if needed). For the READ instruction, the 51 * requested 16-bit register contents is read from the data out line but 52 * is preceded by an initial zero (leading 0, followed by 16-bits, MSB 53 * first). The clock cycling from low to high initiates the next data 54 * bit to be sent from the chip. 55 * 56 */ 57 58#include "opt_aic7xxx.h" 59 60#include <sys/param.h> 61#include <sys/systm.h> 62#include <machine/bus_memio.h> 63#include <machine/bus_pio.h> 64#include <machine/bus.h> 65#include <dev/aic7xxx/93cx6.h> 66 67/* 68 * Right now, we only have to read the SEEPROM. But we make it easier to 69 * add other 93Cx6 functions. 70 */ 71static struct seeprom_cmd { 72 unsigned char len; 73 unsigned char bits[3]; 74} seeprom_read = {3, {1, 1, 0}}; 75 76/* 77 * Wait for the SEERDY to go high; about 800 ns. 78 */ 79#define CLOCK_PULSE(sd, rdy) \ 80 while ((SEEPROM_STATUS_INB(sd) & rdy) == 0) { \ 81 ; /* Do nothing */ \ 82 } \ 83 (void)SEEPROM_INB(sd); /* Clear clock */ 84 85/* 86 * Read the serial EEPROM and returns 1 if successful and 0 if 87 * not successful. 88 */ 89int 90read_seeprom(sd, buf, start_addr, count) 91 struct seeprom_descriptor *sd; 92 u_int16_t *buf; 93 bus_size_t start_addr; 94 bus_size_t count; 95{ 96 int i = 0; 97 u_int k = 0; 98 u_int16_t v; 99 u_int8_t temp; 100 101 /* 102 * Read the requested registers of the seeprom. The loop 103 * will range from 0 to count-1. 104 */ 105 for (k = start_addr; k < count + start_addr; k++) { 106 /* Send chip select for one clock cycle. */ 107 temp = sd->sd_MS ^ sd->sd_CS; 108 SEEPROM_OUTB(sd, temp ^ sd->sd_CK); 109 CLOCK_PULSE(sd, sd->sd_RDY); 110 111 /* 112 * Now we're ready to send the read command followed by the 113 * address of the 16-bit register we want to read. 114 */ 115 for (i = 0; i < seeprom_read.len; i++) { 116 if (seeprom_read.bits[i] != 0) 117 temp ^= sd->sd_DO; 118 SEEPROM_OUTB(sd, temp); 119 CLOCK_PULSE(sd, sd->sd_RDY); 120 SEEPROM_OUTB(sd, temp ^ sd->sd_CK); 121 CLOCK_PULSE(sd, sd->sd_RDY); 122 if (seeprom_read.bits[i] != 0) 123 temp ^= sd->sd_DO; 124 } 125 /* Send the 6 or 8 bit address (MSB first, LSB last). */ 126 for (i = (sd->sd_chip - 1); i >= 0; i--) { 127 if ((k & (1 << i)) != 0) 128 temp ^= sd->sd_DO; 129 SEEPROM_OUTB(sd, temp); 130 CLOCK_PULSE(sd, sd->sd_RDY); 131 SEEPROM_OUTB(sd, temp ^ sd->sd_CK); 132 CLOCK_PULSE(sd, sd->sd_RDY); 133 if ((k & (1 << i)) != 0) 134 temp ^= sd->sd_DO; 135 } 136 137 /* 138 * Now read the 16 bit register. An initial 0 precedes the 139 * register contents which begins with bit 15 (MSB) and ends 140 * with bit 0 (LSB). The initial 0 will be shifted off the 141 * top of our word as we let the loop run from 0 to 16. 142 */ 143 v = 0; 144 for (i = 16; i >= 0; i--) { 145 SEEPROM_OUTB(sd, temp); 146 CLOCK_PULSE(sd, sd->sd_RDY); 147 v <<= 1; 148 if (SEEPROM_DATA_INB(sd) & sd->sd_DI) 149 v |= 1; 150 SEEPROM_OUTB(sd, temp ^ sd->sd_CK); 151 CLOCK_PULSE(sd, sd->sd_RDY); 152 } 153 154 buf[k - start_addr] = v; 155 156 /* Reset the chip select for the next command cycle. */ 157 temp = sd->sd_MS; 158 SEEPROM_OUTB(sd, temp); 159 CLOCK_PULSE(sd, sd->sd_RDY); 160 SEEPROM_OUTB(sd, temp ^ sd->sd_CK); 161 CLOCK_PULSE(sd, sd->sd_RDY); 162 SEEPROM_OUTB(sd, temp); 163 CLOCK_PULSE(sd, sd->sd_RDY); 164 } 165#ifdef AHC_DUMP_EEPROM 166 printf("\nSerial EEPROM:"); 167 for (k = 0; k < count; k = k + 1) { 168 if (((k % 8) == 0) && (k != 0)) { 169 printf ("\n "); 170 } 171 printf (" 0x%x", buf[k]); 172 } 173 printf ("\n"); 174#endif 175 return (1); 176} 177