ahci_pci.c revision 249346
1195534Sscottl/*- 2238805Smav * Copyright (c) 2009-2012 Alexander Motin <mav@FreeBSD.org> 3195534Sscottl * All rights reserved. 4195534Sscottl * 5195534Sscottl * Redistribution and use in source and binary forms, with or without 6195534Sscottl * modification, are permitted provided that the following conditions 7195534Sscottl * are met: 8195534Sscottl * 1. Redistributions of source code must retain the above copyright 9195534Sscottl * notice, this list of conditions and the following disclaimer, 10195534Sscottl * without modification, immediately at the beginning of the file. 11195534Sscottl * 2. Redistributions in binary form must reproduce the above copyright 12195534Sscottl * notice, this list of conditions and the following disclaimer in the 13195534Sscottl * documentation and/or other materials provided with the distribution. 14195534Sscottl * 15195534Sscottl * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16195534Sscottl * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17195534Sscottl * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18195534Sscottl * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19195534Sscottl * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20195534Sscottl * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21195534Sscottl * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22195534Sscottl * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23195534Sscottl * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24195534Sscottl * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25195534Sscottl */ 26195534Sscottl 27195534Sscottl#include <sys/cdefs.h> 28195534Sscottl__FBSDID("$FreeBSD: head/sys/dev/ahci/ahci.c 249346 2013-04-10 20:38:15Z mav $"); 29195534Sscottl 30195534Sscottl#include <sys/param.h> 31195534Sscottl#include <sys/module.h> 32195534Sscottl#include <sys/systm.h> 33195534Sscottl#include <sys/kernel.h> 34195534Sscottl#include <sys/bus.h> 35220576Smav#include <sys/conf.h> 36195534Sscottl#include <sys/endian.h> 37195534Sscottl#include <sys/malloc.h> 38195534Sscottl#include <sys/lock.h> 39195534Sscottl#include <sys/mutex.h> 40195534Sscottl#include <machine/stdarg.h> 41195534Sscottl#include <machine/resource.h> 42195534Sscottl#include <machine/bus.h> 43195534Sscottl#include <sys/rman.h> 44195534Sscottl#include <dev/pci/pcivar.h> 45195534Sscottl#include <dev/pci/pcireg.h> 46195534Sscottl#include "ahci.h" 47195534Sscottl 48195534Sscottl#include <cam/cam.h> 49195534Sscottl#include <cam/cam_ccb.h> 50195534Sscottl#include <cam/cam_sim.h> 51195534Sscottl#include <cam/cam_xpt_sim.h> 52195534Sscottl#include <cam/cam_debug.h> 53195534Sscottl 54195534Sscottl/* local prototypes */ 55195534Sscottlstatic int ahci_setup_interrupt(device_t dev); 56195534Sscottlstatic void ahci_intr(void *data); 57195534Sscottlstatic void ahci_intr_one(void *data); 58195534Sscottlstatic int ahci_suspend(device_t dev); 59195534Sscottlstatic int ahci_resume(device_t dev); 60208375Smavstatic int ahci_ch_init(device_t dev); 61208375Smavstatic int ahci_ch_deinit(device_t dev); 62195534Sscottlstatic int ahci_ch_suspend(device_t dev); 63195534Sscottlstatic int ahci_ch_resume(device_t dev); 64196656Smavstatic void ahci_ch_pm(void *arg); 65195534Sscottlstatic void ahci_ch_intr_locked(void *data); 66195534Sscottlstatic void ahci_ch_intr(void *data); 67195534Sscottlstatic int ahci_ctlr_reset(device_t dev); 68205422Smavstatic int ahci_ctlr_setup(device_t dev); 69195534Sscottlstatic void ahci_begin_transaction(device_t dev, union ccb *ccb); 70195534Sscottlstatic void ahci_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error); 71195534Sscottlstatic void ahci_execute_transaction(struct ahci_slot *slot); 72195534Sscottlstatic void ahci_timeout(struct ahci_slot *slot); 73195534Sscottlstatic void ahci_end_transaction(struct ahci_slot *slot, enum ahci_err_type et); 74199821Smavstatic int ahci_setup_fis(device_t dev, struct ahci_cmd_tab *ctp, union ccb *ccb, int tag); 75195534Sscottlstatic void ahci_dmainit(device_t dev); 76195534Sscottlstatic void ahci_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error); 77195534Sscottlstatic void ahci_dmafini(device_t dev); 78195534Sscottlstatic void ahci_slotsalloc(device_t dev); 79195534Sscottlstatic void ahci_slotsfree(device_t dev); 80195534Sscottlstatic void ahci_reset(device_t dev); 81203123Smavstatic void ahci_start(device_t dev, int fbs); 82195534Sscottlstatic void ahci_stop(device_t dev); 83195534Sscottlstatic void ahci_clo(device_t dev); 84195534Sscottlstatic void ahci_start_fr(device_t dev); 85195534Sscottlstatic void ahci_stop_fr(device_t dev); 86195534Sscottl 87195534Sscottlstatic int ahci_sata_connect(struct ahci_channel *ch); 88203108Smavstatic int ahci_sata_phy_reset(device_t dev); 89220576Smavstatic int ahci_wait_ready(device_t dev, int t, int t0); 90195534Sscottl 91220565Smavstatic void ahci_issue_recovery(device_t dev); 92195534Sscottlstatic void ahci_process_read_log(device_t dev, union ccb *ccb); 93220565Smavstatic void ahci_process_request_sense(device_t dev, union ccb *ccb); 94195534Sscottl 95195534Sscottlstatic void ahciaction(struct cam_sim *sim, union ccb *ccb); 96195534Sscottlstatic void ahcipoll(struct cam_sim *sim); 97195534Sscottl 98227293Sedstatic MALLOC_DEFINE(M_AHCI, "AHCI driver", "AHCI driver data buffers"); 99195534Sscottl 100199176Smavstatic struct { 101199176Smav uint32_t id; 102203030Smav uint8_t rev; 103199176Smav const char *name; 104199322Smav int quirks; 105199322Smav#define AHCI_Q_NOFORCE 1 106199322Smav#define AHCI_Q_NOPMP 2 107199322Smav#define AHCI_Q_NONCQ 4 108199322Smav#define AHCI_Q_1CH 8 109199322Smav#define AHCI_Q_2CH 16 110199322Smav#define AHCI_Q_4CH 32 111199322Smav#define AHCI_Q_EDGEIS 64 112203030Smav#define AHCI_Q_SATA2 128 113203123Smav#define AHCI_Q_NOBSYRES 256 114207499Smav#define AHCI_Q_NOAA 512 115218596Smav#define AHCI_Q_NOCOUNT 1024 116222304Smav#define AHCI_Q_ALTSIG 2048 117245875Smav#define AHCI_Q_NOMSI 4096 118199176Smav} ahci_ids[] = { 119245875Smav {0x43801002, 0x00, "ATI IXP600", AHCI_Q_NOMSI}, 120203030Smav {0x43901002, 0x00, "ATI IXP700", 0}, 121203030Smav {0x43911002, 0x00, "ATI IXP700", 0}, 122203030Smav {0x43921002, 0x00, "ATI IXP700", 0}, 123203030Smav {0x43931002, 0x00, "ATI IXP700", 0}, 124203030Smav {0x43941002, 0x00, "ATI IXP800", 0}, 125203030Smav {0x43951002, 0x00, "ATI IXP800", 0}, 126244146Smav {0x78001022, 0x00, "AMD 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AHCI_Q_NOAA}, 270207499Smav {0x0adb10de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 271207499Smav {0x0ab410de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 272207499Smav {0x0ab510de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 273207499Smav {0x0ab610de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 274207499Smav {0x0ab710de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 275207499Smav {0x0ab810de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 276207499Smav {0x0ab910de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 277207499Smav {0x0aba10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 278207499Smav {0x0abb10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 279207499Smav {0x0abc10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 280207499Smav {0x0abd10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 281207499Smav {0x0abe10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 282207499Smav {0x0abf10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 283207499Smav {0x0d8410de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 284224603Smav {0x0d8510de, 0x00, "NVIDIA MCP89", AHCI_Q_NOFORCE|AHCI_Q_NOAA}, 285207499Smav {0x0d8610de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 286207499Smav {0x0d8710de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 287207499Smav {0x0d8810de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 288207499Smav {0x0d8910de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 289207499Smav {0x0d8a10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 290207499Smav {0x0d8b10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 291207499Smav {0x0d8c10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 292207499Smav {0x0d8d10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 293207499Smav {0x0d8e10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 294207499Smav {0x0d8f10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 295208907Smav {0x33491106, 0x00, "VIA VT8251", AHCI_Q_NOPMP|AHCI_Q_NONCQ}, 296208907Smav {0x62871106, 0x00, "VIA VT8251", AHCI_Q_NOPMP|AHCI_Q_NONCQ}, 297203030Smav {0x11841039, 0x00, "SiS 966", 0}, 298203030Smav {0x11851039, 0x00, "SiS 968", 0}, 299203030Smav {0x01861039, 0x00, "SiS 968", 0}, 300203030Smav {0x00000000, 0x00, NULL, 0} 301199176Smav}; 302199176Smav 303220565Smav#define recovery_type spriv_field0 304220565Smav#define RECOVERY_NONE 0 305220565Smav#define RECOVERY_READ_LOG 1 306220565Smav#define RECOVERY_REQUEST_SENSE 2 307220565Smav#define recovery_slot spriv_field1 308220565Smav 309228200Smavstatic int force_ahci = 1; 310228200SmavTUNABLE_INT("hw.ahci.force", &force_ahci); 311228200Smav 312195534Sscottlstatic int 313195534Sscottlahci_probe(device_t dev) 314195534Sscottl{ 315199176Smav char buf[64]; 316199322Smav int i, valid = 0; 317199322Smav uint32_t devid = pci_get_devid(dev); 318203030Smav uint8_t revid = pci_get_revid(dev); 319199322Smav 320199322Smav /* Is this a possible AHCI candidate? */ 321199322Smav if (pci_get_class(dev) == PCIC_STORAGE && 322199322Smav pci_get_subclass(dev) == PCIS_STORAGE_SATA && 323199322Smav pci_get_progif(dev) == PCIP_STORAGE_SATA_AHCI_1_0) 324199322Smav valid = 1; 325199322Smav /* Is this a known AHCI chip? */ 326199322Smav for (i = 0; ahci_ids[i].id != 0; i++) { 327199322Smav if (ahci_ids[i].id == devid && 328203030Smav ahci_ids[i].rev <= revid && 329228200Smav (valid || (force_ahci == 1 && 330228200Smav !(ahci_ids[i].quirks & AHCI_Q_NOFORCE)))) { 331199717Smav /* Do not attach JMicrons with single PCI function. */ 332199717Smav if (pci_get_vendor(dev) == 0x197b && 333199717Smav (pci_read_config(dev, 0xdf, 1) & 0x40) == 0) 334199717Smav return (ENXIO); 335199322Smav snprintf(buf, sizeof(buf), "%s AHCI SATA controller", 336199322Smav ahci_ids[i].name); 337199322Smav device_set_desc_copy(dev, buf); 338199322Smav return (BUS_PROBE_VENDOR); 339199322Smav } 340199322Smav } 341199322Smav if (!valid) 342199322Smav return (ENXIO); 343199322Smav device_set_desc_copy(dev, "AHCI SATA controller"); 344199322Smav return (BUS_PROBE_VENDOR); 345199322Smav} 346199322Smav 347199322Smavstatic int 348199322Smavahci_ata_probe(device_t dev) 349199322Smav{ 350199322Smav char buf[64]; 351199176Smav int i; 352199176Smav uint32_t devid = pci_get_devid(dev); 353203030Smav uint8_t revid = pci_get_revid(dev); 354195534Sscottl 355199322Smav if ((intptr_t)device_get_ivars(dev) >= 0) 356199322Smav return (ENXIO); 357199176Smav /* Is this a known AHCI chip? */ 358199176Smav for (i = 0; ahci_ids[i].id != 0; i++) { 359203030Smav if (ahci_ids[i].id == devid && 360203030Smav ahci_ids[i].rev <= revid) { 361199176Smav snprintf(buf, sizeof(buf), "%s AHCI SATA controller", 362199176Smav ahci_ids[i].name); 363199176Smav device_set_desc_copy(dev, buf); 364199176Smav return (BUS_PROBE_VENDOR); 365199176Smav } 366199176Smav } 367199176Smav device_set_desc_copy(dev, "AHCI SATA controller"); 368195534Sscottl return (BUS_PROBE_VENDOR); 369195534Sscottl} 370195534Sscottl 371195534Sscottlstatic int 372195534Sscottlahci_attach(device_t dev) 373195534Sscottl{ 374195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 375195534Sscottl device_t child; 376199322Smav int error, unit, speed, i; 377199322Smav uint32_t devid = pci_get_devid(dev); 378203030Smav uint8_t revid = pci_get_revid(dev); 379196656Smav u_int32_t version; 380195534Sscottl 381195534Sscottl ctlr->dev = dev; 382199322Smav i = 0; 383203030Smav while (ahci_ids[i].id != 0 && 384203030Smav (ahci_ids[i].id != devid || 385203030Smav ahci_ids[i].rev > revid)) 386199322Smav i++; 387199322Smav ctlr->quirks = ahci_ids[i].quirks; 388196656Smav resource_int_value(device_get_name(dev), 389196656Smav device_get_unit(dev), "ccc", &ctlr->ccc); 390195534Sscottl /* if we have a memory BAR(5) we are likely on an AHCI part */ 391195534Sscottl ctlr->r_rid = PCIR_BAR(5); 392195534Sscottl if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 393195534Sscottl &ctlr->r_rid, RF_ACTIVE))) 394195534Sscottl return ENXIO; 395195534Sscottl /* Setup our own memory management for channels. */ 396208414Smav ctlr->sc_iomem.rm_start = rman_get_start(ctlr->r_mem); 397208414Smav ctlr->sc_iomem.rm_end = rman_get_end(ctlr->r_mem); 398195534Sscottl ctlr->sc_iomem.rm_type = RMAN_ARRAY; 399195534Sscottl ctlr->sc_iomem.rm_descr = "I/O memory addresses"; 400195534Sscottl if ((error = rman_init(&ctlr->sc_iomem)) != 0) { 401195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 402195534Sscottl return (error); 403195534Sscottl } 404195534Sscottl if ((error = rman_manage_region(&ctlr->sc_iomem, 405195534Sscottl rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) { 406195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 407195534Sscottl rman_fini(&ctlr->sc_iomem); 408195534Sscottl return (error); 409195534Sscottl } 410207511Smav pci_enable_busmaster(dev); 411195534Sscottl /* Reset controller */ 412195534Sscottl if ((error = ahci_ctlr_reset(dev)) != 0) { 413195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 414195534Sscottl rman_fini(&ctlr->sc_iomem); 415195534Sscottl return (error); 416195534Sscottl }; 417199322Smav /* Get the HW capabilities */ 418199322Smav version = ATA_INL(ctlr->r_mem, AHCI_VS); 419199322Smav ctlr->caps = ATA_INL(ctlr->r_mem, AHCI_CAP); 420240383Smav if (version >= 0x00010200) 421199322Smav ctlr->caps2 = ATA_INL(ctlr->r_mem, AHCI_CAP2); 422203108Smav if (ctlr->caps & AHCI_CAP_EMS) 423203108Smav ctlr->capsem = ATA_INL(ctlr->r_mem, AHCI_EM_CTL); 424195534Sscottl ctlr->ichannels = ATA_INL(ctlr->r_mem, AHCI_PI); 425222304Smav 426222304Smav /* Identify and set separate quirks for HBA and RAID f/w Marvells. */ 427222304Smav if ((ctlr->quirks & AHCI_Q_NOBSYRES) && 428222304Smav (ctlr->quirks & AHCI_Q_ALTSIG) && 429222304Smav (ctlr->caps & AHCI_CAP_SPM) == 0) 430222304Smav ctlr->quirks &= ~AHCI_Q_NOBSYRES; 431222304Smav 432199322Smav if (ctlr->quirks & AHCI_Q_1CH) { 433199322Smav ctlr->caps &= ~AHCI_CAP_NPMASK; 434199322Smav ctlr->ichannels &= 0x01; 435199322Smav } 436199322Smav if (ctlr->quirks & AHCI_Q_2CH) { 437199322Smav ctlr->caps &= ~AHCI_CAP_NPMASK; 438199322Smav ctlr->caps |= 1; 439199322Smav ctlr->ichannels &= 0x03; 440199322Smav } 441199322Smav if (ctlr->quirks & AHCI_Q_4CH) { 442199322Smav ctlr->caps &= ~AHCI_CAP_NPMASK; 443199322Smav ctlr->caps |= 3; 444199322Smav ctlr->ichannels &= 0x0f; 445199322Smav } 446195534Sscottl ctlr->channels = MAX(flsl(ctlr->ichannels), 447199322Smav (ctlr->caps & AHCI_CAP_NPMASK) + 1); 448199322Smav if (ctlr->quirks & AHCI_Q_NOPMP) 449199322Smav ctlr->caps &= ~AHCI_CAP_SPM; 450199322Smav if (ctlr->quirks & AHCI_Q_NONCQ) 451199322Smav ctlr->caps &= ~AHCI_CAP_SNCQ; 452205422Smav if ((ctlr->caps & AHCI_CAP_CCCS) == 0) 453205422Smav ctlr->ccc = 0; 454222039Smav ctlr->emloc = ATA_INL(ctlr->r_mem, AHCI_EM_LOC); 455249346Smav 456249346Smav /* Create controller-wide DMA tag. */ 457249346Smav if (bus_dma_tag_create(bus_get_dma_tag(dev), 0, 0, 458249346Smav (ctlr->caps & AHCI_CAP_64BIT) ? BUS_SPACE_MAXADDR : 459249346Smav BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 460249346Smav BUS_SPACE_MAXSIZE, BUS_SPACE_UNRESTRICTED, BUS_SPACE_MAXSIZE, 461249346Smav 0, NULL, NULL, &ctlr->dma_tag)) { 462249346Smav bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, 463249346Smav ctlr->r_mem); 464249346Smav rman_fini(&ctlr->sc_iomem); 465249346Smav return ENXIO; 466249346Smav } 467249346Smav 468205422Smav ahci_ctlr_setup(dev); 469195534Sscottl /* Setup interrupts. */ 470195534Sscottl if (ahci_setup_interrupt(dev)) { 471249346Smav bus_dma_tag_destroy(ctlr->dma_tag); 472195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 473195534Sscottl rman_fini(&ctlr->sc_iomem); 474195534Sscottl return ENXIO; 475195534Sscottl } 476195534Sscottl /* Announce HW capabilities. */ 477196656Smav speed = (ctlr->caps & AHCI_CAP_ISS) >> AHCI_CAP_ISS_SHIFT; 478195534Sscottl device_printf(dev, 479203123Smav "AHCI v%x.%02x with %d %sGbps ports, Port Multiplier %s%s\n", 480195534Sscottl ((version >> 20) & 0xf0) + ((version >> 16) & 0x0f), 481195534Sscottl ((version >> 4) & 0xf0) + (version & 0x0f), 482196656Smav (ctlr->caps & AHCI_CAP_NPMASK) + 1, 483195534Sscottl ((speed == 1) ? "1.5":((speed == 2) ? "3": 484195534Sscottl ((speed == 3) ? "6":"?"))), 485196656Smav (ctlr->caps & AHCI_CAP_SPM) ? 486203123Smav "supported" : "not supported", 487203123Smav (ctlr->caps & AHCI_CAP_FBSS) ? 488203123Smav " with FBS" : ""); 489195534Sscottl if (bootverbose) { 490195534Sscottl device_printf(dev, "Caps:%s%s%s%s%s%s%s%s %sGbps", 491196656Smav (ctlr->caps & AHCI_CAP_64BIT) ? " 64bit":"", 492196656Smav (ctlr->caps & AHCI_CAP_SNCQ) ? " NCQ":"", 493196656Smav (ctlr->caps & AHCI_CAP_SSNTF) ? " SNTF":"", 494196656Smav (ctlr->caps & AHCI_CAP_SMPS) ? " MPS":"", 495196656Smav (ctlr->caps & AHCI_CAP_SSS) ? " SS":"", 496196656Smav (ctlr->caps & AHCI_CAP_SALP) ? " ALP":"", 497196656Smav (ctlr->caps & AHCI_CAP_SAL) ? " AL":"", 498196656Smav (ctlr->caps & AHCI_CAP_SCLO) ? " CLO":"", 499195534Sscottl ((speed == 1) ? "1.5":((speed == 2) ? "3": 500195534Sscottl ((speed == 3) ? "6":"?")))); 501195534Sscottl printf("%s%s%s%s%s%s %dcmd%s%s%s %dports\n", 502196656Smav (ctlr->caps & AHCI_CAP_SAM) ? " AM":"", 503196656Smav (ctlr->caps & AHCI_CAP_SPM) ? " PM":"", 504196656Smav (ctlr->caps & AHCI_CAP_FBSS) ? " FBS":"", 505196656Smav (ctlr->caps & AHCI_CAP_PMD) ? " PMD":"", 506196656Smav (ctlr->caps & AHCI_CAP_SSC) ? " SSC":"", 507196656Smav (ctlr->caps & AHCI_CAP_PSC) ? " PSC":"", 508196656Smav ((ctlr->caps & AHCI_CAP_NCS) >> AHCI_CAP_NCS_SHIFT) + 1, 509196656Smav (ctlr->caps & AHCI_CAP_CCCS) ? " CCC":"", 510196656Smav (ctlr->caps & AHCI_CAP_EMS) ? " EM":"", 511196656Smav (ctlr->caps & AHCI_CAP_SXS) ? " eSATA":"", 512196656Smav (ctlr->caps & AHCI_CAP_NPMASK) + 1); 513195534Sscottl } 514240383Smav if (bootverbose && version >= 0x00010200) { 515196656Smav device_printf(dev, "Caps2:%s%s%s\n", 516196656Smav (ctlr->caps2 & AHCI_CAP2_APST) ? " APST":"", 517196656Smav (ctlr->caps2 & AHCI_CAP2_NVMP) ? " NVMP":"", 518196656Smav (ctlr->caps2 & AHCI_CAP2_BOH) ? " BOH":""); 519196656Smav } 520195534Sscottl /* Attach all channels on this controller */ 521195534Sscottl for (unit = 0; unit < ctlr->channels; unit++) { 522195534Sscottl child = device_add_child(dev, "ahcich", -1); 523227635Smav if (child == NULL) { 524195534Sscottl device_printf(dev, "failed to add channel device\n"); 525227635Smav continue; 526227635Smav } 527227635Smav device_set_ivars(child, (void *)(intptr_t)unit); 528227635Smav if ((ctlr->ichannels & (1 << unit)) == 0) 529227635Smav device_disable(child); 530195534Sscottl } 531238805Smav if (ctlr->caps & AHCI_CAP_EMS) { 532238805Smav child = device_add_child(dev, "ahciem", -1); 533238805Smav if (child == NULL) 534238805Smav device_printf(dev, "failed to add enclosure device\n"); 535238805Smav else 536238805Smav device_set_ivars(child, (void *)(intptr_t)-1); 537238805Smav } 538195534Sscottl bus_generic_attach(dev); 539195534Sscottl return 0; 540195534Sscottl} 541195534Sscottl 542195534Sscottlstatic int 543195534Sscottlahci_detach(device_t dev) 544195534Sscottl{ 545195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 546227701Shselasky int i; 547195534Sscottl 548195534Sscottl /* Detach & delete all children */ 549227849Shselasky device_delete_children(dev); 550227701Shselasky 551195534Sscottl /* Free interrupts. */ 552195534Sscottl for (i = 0; i < ctlr->numirqs; i++) { 553195534Sscottl if (ctlr->irqs[i].r_irq) { 554195534Sscottl bus_teardown_intr(dev, ctlr->irqs[i].r_irq, 555195534Sscottl ctlr->irqs[i].handle); 556195534Sscottl bus_release_resource(dev, SYS_RES_IRQ, 557195534Sscottl ctlr->irqs[i].r_irq_rid, ctlr->irqs[i].r_irq); 558195534Sscottl } 559195534Sscottl } 560195534Sscottl pci_release_msi(dev); 561249346Smav bus_dma_tag_destroy(ctlr->dma_tag); 562195534Sscottl /* Free memory. */ 563195534Sscottl rman_fini(&ctlr->sc_iomem); 564195534Sscottl if (ctlr->r_mem) 565195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 566195534Sscottl return (0); 567195534Sscottl} 568195534Sscottl 569195534Sscottlstatic int 570195534Sscottlahci_ctlr_reset(device_t dev) 571195534Sscottl{ 572195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 573195534Sscottl int timeout; 574195534Sscottl 575240693Sgavin if (pci_read_config(dev, PCIR_DEVVENDOR, 4) == 0x28298086 && 576195534Sscottl (pci_read_config(dev, 0x92, 1) & 0xfe) == 0x04) 577195534Sscottl pci_write_config(dev, 0x92, 0x01, 1); 578195534Sscottl /* Enable AHCI mode */ 579195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, AHCI_GHC_AE); 580195534Sscottl /* Reset AHCI controller */ 581195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, AHCI_GHC_AE|AHCI_GHC_HR); 582195534Sscottl for (timeout = 1000; timeout > 0; timeout--) { 583195534Sscottl DELAY(1000); 584195534Sscottl if ((ATA_INL(ctlr->r_mem, AHCI_GHC) & AHCI_GHC_HR) == 0) 585195534Sscottl break; 586195534Sscottl } 587195534Sscottl if (timeout == 0) { 588195534Sscottl device_printf(dev, "AHCI controller reset failure\n"); 589195534Sscottl return ENXIO; 590195534Sscottl } 591195534Sscottl /* Reenable AHCI mode */ 592195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, AHCI_GHC_AE); 593205422Smav return (0); 594205422Smav} 595205422Smav 596205422Smavstatic int 597205422Smavahci_ctlr_setup(device_t dev) 598205422Smav{ 599205422Smav struct ahci_controller *ctlr = device_get_softc(dev); 600195534Sscottl /* Clear interrupts */ 601195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_IS, ATA_INL(ctlr->r_mem, AHCI_IS)); 602196656Smav /* Configure CCC */ 603196656Smav if (ctlr->ccc) { 604196656Smav ATA_OUTL(ctlr->r_mem, AHCI_CCCP, ATA_INL(ctlr->r_mem, AHCI_PI)); 605196656Smav ATA_OUTL(ctlr->r_mem, AHCI_CCCC, 606196656Smav (ctlr->ccc << AHCI_CCCC_TV_SHIFT) | 607196656Smav (4 << AHCI_CCCC_CC_SHIFT) | 608196656Smav AHCI_CCCC_EN); 609196656Smav ctlr->cccv = (ATA_INL(ctlr->r_mem, AHCI_CCCC) & 610196656Smav AHCI_CCCC_INT_MASK) >> AHCI_CCCC_INT_SHIFT; 611196656Smav if (bootverbose) { 612196656Smav device_printf(dev, 613196656Smav "CCC with %dms/4cmd enabled on vector %d\n", 614196656Smav ctlr->ccc, ctlr->cccv); 615196656Smav } 616196656Smav } 617195534Sscottl /* Enable AHCI interrupts */ 618195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, 619195534Sscottl ATA_INL(ctlr->r_mem, AHCI_GHC) | AHCI_GHC_IE); 620195534Sscottl return (0); 621195534Sscottl} 622195534Sscottl 623195534Sscottlstatic int 624195534Sscottlahci_suspend(device_t dev) 625195534Sscottl{ 626195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 627195534Sscottl 628195534Sscottl bus_generic_suspend(dev); 629195534Sscottl /* Disable interupts, so the state change(s) doesn't trigger */ 630195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, 631195534Sscottl ATA_INL(ctlr->r_mem, AHCI_GHC) & (~AHCI_GHC_IE)); 632195534Sscottl return 0; 633195534Sscottl} 634195534Sscottl 635195534Sscottlstatic int 636195534Sscottlahci_resume(device_t dev) 637195534Sscottl{ 638195534Sscottl int res; 639195534Sscottl 640195534Sscottl if ((res = ahci_ctlr_reset(dev)) != 0) 641195534Sscottl return (res); 642205422Smav ahci_ctlr_setup(dev); 643195534Sscottl return (bus_generic_resume(dev)); 644195534Sscottl} 645195534Sscottl 646195534Sscottlstatic int 647195534Sscottlahci_setup_interrupt(device_t dev) 648195534Sscottl{ 649195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 650195534Sscottl int i, msi = 1; 651195534Sscottl 652195534Sscottl /* Process hints. */ 653245875Smav if (ctlr->quirks & AHCI_Q_NOMSI) 654245875Smav msi = 0; 655195534Sscottl resource_int_value(device_get_name(dev), 656195534Sscottl device_get_unit(dev), "msi", &msi); 657195534Sscottl if (msi < 0) 658195534Sscottl msi = 0; 659195534Sscottl else if (msi == 1) 660195534Sscottl msi = min(1, pci_msi_count(dev)); 661195534Sscottl else if (msi > 1) 662195534Sscottl msi = pci_msi_count(dev); 663195534Sscottl /* Allocate MSI if needed/present. */ 664195534Sscottl if (msi && pci_alloc_msi(dev, &msi) == 0) { 665195534Sscottl ctlr->numirqs = msi; 666195534Sscottl } else { 667195534Sscottl msi = 0; 668195534Sscottl ctlr->numirqs = 1; 669195534Sscottl } 670195534Sscottl /* Check for single MSI vector fallback. */ 671195534Sscottl if (ctlr->numirqs > 1 && 672195534Sscottl (ATA_INL(ctlr->r_mem, AHCI_GHC) & AHCI_GHC_MRSM) != 0) { 673195534Sscottl device_printf(dev, "Falling back to one MSI\n"); 674195534Sscottl ctlr->numirqs = 1; 675195534Sscottl } 676195534Sscottl /* Allocate all IRQs. */ 677195534Sscottl for (i = 0; i < ctlr->numirqs; i++) { 678195534Sscottl ctlr->irqs[i].ctlr = ctlr; 679195534Sscottl ctlr->irqs[i].r_irq_rid = i + (msi ? 1 : 0); 680196656Smav if (ctlr->numirqs == 1 || i >= ctlr->channels || 681196656Smav (ctlr->ccc && i == ctlr->cccv)) 682195534Sscottl ctlr->irqs[i].mode = AHCI_IRQ_MODE_ALL; 683195534Sscottl else if (i == ctlr->numirqs - 1) 684195534Sscottl ctlr->irqs[i].mode = AHCI_IRQ_MODE_AFTER; 685195534Sscottl else 686195534Sscottl ctlr->irqs[i].mode = AHCI_IRQ_MODE_ONE; 687195534Sscottl if (!(ctlr->irqs[i].r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 688195534Sscottl &ctlr->irqs[i].r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) { 689195534Sscottl device_printf(dev, "unable to map interrupt\n"); 690195534Sscottl return ENXIO; 691195534Sscottl } 692195534Sscottl if ((bus_setup_intr(dev, ctlr->irqs[i].r_irq, ATA_INTR_FLAGS, NULL, 693195534Sscottl (ctlr->irqs[i].mode == AHCI_IRQ_MODE_ONE) ? ahci_intr_one : ahci_intr, 694195534Sscottl &ctlr->irqs[i], &ctlr->irqs[i].handle))) { 695195534Sscottl /* SOS XXX release r_irq */ 696195534Sscottl device_printf(dev, "unable to setup interrupt\n"); 697195534Sscottl return ENXIO; 698195534Sscottl } 699202011Smav if (ctlr->numirqs > 1) { 700202011Smav bus_describe_intr(dev, ctlr->irqs[i].r_irq, 701202011Smav ctlr->irqs[i].handle, 702202011Smav ctlr->irqs[i].mode == AHCI_IRQ_MODE_ONE ? 703202011Smav "ch%d" : "%d", i); 704202011Smav } 705195534Sscottl } 706195534Sscottl return (0); 707195534Sscottl} 708195534Sscottl 709195534Sscottl/* 710195534Sscottl * Common case interrupt handler. 711195534Sscottl */ 712195534Sscottlstatic void 713195534Sscottlahci_intr(void *data) 714195534Sscottl{ 715195534Sscottl struct ahci_controller_irq *irq = data; 716195534Sscottl struct ahci_controller *ctlr = irq->ctlr; 717205422Smav u_int32_t is, ise = 0; 718195534Sscottl void *arg; 719195534Sscottl int unit; 720195534Sscottl 721196656Smav if (irq->mode == AHCI_IRQ_MODE_ALL) { 722195534Sscottl unit = 0; 723196656Smav if (ctlr->ccc) 724196656Smav is = ctlr->ichannels; 725196656Smav else 726196656Smav is = ATA_INL(ctlr->r_mem, AHCI_IS); 727196656Smav } else { /* AHCI_IRQ_MODE_AFTER */ 728195534Sscottl unit = irq->r_irq_rid - 1; 729196656Smav is = ATA_INL(ctlr->r_mem, AHCI_IS); 730196656Smav } 731205422Smav /* CCC interrupt is edge triggered. */ 732205422Smav if (ctlr->ccc) 733205422Smav ise = 1 << ctlr->cccv; 734200814Smav /* Some controllers have edge triggered IS. */ 735200814Smav if (ctlr->quirks & AHCI_Q_EDGEIS) 736205422Smav ise |= is; 737205422Smav if (ise != 0) 738205422Smav ATA_OUTL(ctlr->r_mem, AHCI_IS, ise); 739195534Sscottl for (; unit < ctlr->channels; unit++) { 740195534Sscottl if ((is & (1 << unit)) != 0 && 741195534Sscottl (arg = ctlr->interrupt[unit].argument)) { 742199322Smav ctlr->interrupt[unit].function(arg); 743195534Sscottl } 744195534Sscottl } 745200814Smav /* AHCI declares level triggered IS. */ 746200814Smav if (!(ctlr->quirks & AHCI_Q_EDGEIS)) 747200814Smav ATA_OUTL(ctlr->r_mem, AHCI_IS, is); 748195534Sscottl} 749195534Sscottl 750195534Sscottl/* 751195534Sscottl * Simplified interrupt handler for multivector MSI mode. 752195534Sscottl */ 753195534Sscottlstatic void 754195534Sscottlahci_intr_one(void *data) 755195534Sscottl{ 756195534Sscottl struct ahci_controller_irq *irq = data; 757195534Sscottl struct ahci_controller *ctlr = irq->ctlr; 758195534Sscottl void *arg; 759195534Sscottl int unit; 760195534Sscottl 761195534Sscottl unit = irq->r_irq_rid - 1; 762202011Smav /* Some controllers have edge triggered IS. */ 763202011Smav if (ctlr->quirks & AHCI_Q_EDGEIS) 764202011Smav ATA_OUTL(ctlr->r_mem, AHCI_IS, 1 << unit); 765195534Sscottl if ((arg = ctlr->interrupt[unit].argument)) 766195534Sscottl ctlr->interrupt[unit].function(arg); 767202011Smav /* AHCI declares level triggered IS. */ 768202011Smav if (!(ctlr->quirks & AHCI_Q_EDGEIS)) 769202011Smav ATA_OUTL(ctlr->r_mem, AHCI_IS, 1 << unit); 770195534Sscottl} 771195534Sscottl 772195534Sscottlstatic struct resource * 773195534Sscottlahci_alloc_resource(device_t dev, device_t child, int type, int *rid, 774195534Sscottl u_long start, u_long end, u_long count, u_int flags) 775195534Sscottl{ 776195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 777238805Smav struct resource *res; 778195534Sscottl long st; 779238805Smav int offset, size, unit; 780195534Sscottl 781238805Smav unit = (intptr_t)device_get_ivars(child); 782238805Smav res = NULL; 783195534Sscottl switch (type) { 784195534Sscottl case SYS_RES_MEMORY: 785238805Smav if (unit >= 0) { 786238805Smav offset = AHCI_OFFSET + (unit << 7); 787238805Smav size = 128; 788238805Smav } else if (*rid == 0) { 789238805Smav offset = AHCI_EM_CTL; 790238805Smav size = 4; 791238805Smav } else { 792238805Smav offset = (ctlr->emloc & 0xffff0000) >> 14; 793238805Smav size = (ctlr->emloc & 0x0000ffff) << 2; 794238805Smav if (*rid != 1) { 795238805Smav if (*rid == 2 && (ctlr->capsem & 796238805Smav (AHCI_EM_XMT | AHCI_EM_SMB)) == 0) 797238805Smav offset += size; 798238805Smav else 799238805Smav break; 800238805Smav } 801238805Smav } 802195534Sscottl st = rman_get_start(ctlr->r_mem); 803195534Sscottl res = rman_reserve_resource(&ctlr->sc_iomem, st + offset, 804238805Smav st + offset + size - 1, size, RF_ACTIVE, child); 805195534Sscottl if (res) { 806195534Sscottl bus_space_handle_t bsh; 807195534Sscottl bus_space_tag_t bst; 808195534Sscottl bsh = rman_get_bushandle(ctlr->r_mem); 809195534Sscottl bst = rman_get_bustag(ctlr->r_mem); 810195534Sscottl bus_space_subregion(bst, bsh, offset, 128, &bsh); 811195534Sscottl rman_set_bushandle(res, bsh); 812195534Sscottl rman_set_bustag(res, bst); 813195534Sscottl } 814195534Sscottl break; 815195534Sscottl case SYS_RES_IRQ: 816195534Sscottl if (*rid == ATA_IRQ_RID) 817195534Sscottl res = ctlr->irqs[0].r_irq; 818195534Sscottl break; 819195534Sscottl } 820195534Sscottl return (res); 821195534Sscottl} 822195534Sscottl 823195534Sscottlstatic int 824195534Sscottlahci_release_resource(device_t dev, device_t child, int type, int rid, 825195534Sscottl struct resource *r) 826195534Sscottl{ 827195534Sscottl 828195534Sscottl switch (type) { 829195534Sscottl case SYS_RES_MEMORY: 830195534Sscottl rman_release_resource(r); 831195534Sscottl return (0); 832195534Sscottl case SYS_RES_IRQ: 833195534Sscottl if (rid != ATA_IRQ_RID) 834195534Sscottl return ENOENT; 835195534Sscottl return (0); 836195534Sscottl } 837195534Sscottl return (EINVAL); 838195534Sscottl} 839195534Sscottl 840195534Sscottlstatic int 841195534Sscottlahci_setup_intr(device_t dev, device_t child, struct resource *irq, 842195534Sscottl int flags, driver_filter_t *filter, driver_intr_t *function, 843195534Sscottl void *argument, void **cookiep) 844195534Sscottl{ 845195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 846195534Sscottl int unit = (intptr_t)device_get_ivars(child); 847195534Sscottl 848195534Sscottl if (filter != NULL) { 849195534Sscottl printf("ahci.c: we cannot use a filter here\n"); 850195534Sscottl return (EINVAL); 851195534Sscottl } 852195534Sscottl ctlr->interrupt[unit].function = function; 853195534Sscottl ctlr->interrupt[unit].argument = argument; 854195534Sscottl return (0); 855195534Sscottl} 856195534Sscottl 857195534Sscottlstatic int 858195534Sscottlahci_teardown_intr(device_t dev, device_t child, struct resource *irq, 859195534Sscottl void *cookie) 860195534Sscottl{ 861195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 862195534Sscottl int unit = (intptr_t)device_get_ivars(child); 863195534Sscottl 864195534Sscottl ctlr->interrupt[unit].function = NULL; 865195534Sscottl ctlr->interrupt[unit].argument = NULL; 866195534Sscottl return (0); 867195534Sscottl} 868195534Sscottl 869195534Sscottlstatic int 870195534Sscottlahci_print_child(device_t dev, device_t child) 871195534Sscottl{ 872238805Smav int retval, channel; 873195534Sscottl 874195534Sscottl retval = bus_print_child_header(dev, child); 875238805Smav channel = (int)(intptr_t)device_get_ivars(child); 876238805Smav if (channel >= 0) 877238805Smav retval += printf(" at channel %d", channel); 878195534Sscottl retval += bus_print_child_footer(dev, child); 879195534Sscottl return (retval); 880195534Sscottl} 881195534Sscottl 882208410Smavstatic int 883208410Smavahci_child_location_str(device_t dev, device_t child, char *buf, 884208410Smav size_t buflen) 885208410Smav{ 886238805Smav int channel; 887208410Smav 888238805Smav channel = (int)(intptr_t)device_get_ivars(child); 889238805Smav if (channel >= 0) 890238805Smav snprintf(buf, buflen, "channel=%d", channel); 891208410Smav return (0); 892208410Smav} 893208410Smav 894249346Smavstatic bus_dma_tag_t 895249346Smavahci_get_dma_tag(device_t dev, device_t child) 896249346Smav{ 897249346Smav struct ahci_controller *ctlr = device_get_softc(dev); 898249346Smav 899249346Smav return (ctlr->dma_tag); 900249346Smav} 901249346Smav 902195534Sscottldevclass_t ahci_devclass; 903195534Sscottlstatic device_method_t ahci_methods[] = { 904195534Sscottl DEVMETHOD(device_probe, ahci_probe), 905195534Sscottl DEVMETHOD(device_attach, ahci_attach), 906195534Sscottl DEVMETHOD(device_detach, ahci_detach), 907195534Sscottl DEVMETHOD(device_suspend, ahci_suspend), 908195534Sscottl DEVMETHOD(device_resume, ahci_resume), 909195534Sscottl DEVMETHOD(bus_print_child, ahci_print_child), 910195534Sscottl DEVMETHOD(bus_alloc_resource, ahci_alloc_resource), 911195534Sscottl DEVMETHOD(bus_release_resource, ahci_release_resource), 912195534Sscottl DEVMETHOD(bus_setup_intr, ahci_setup_intr), 913195534Sscottl DEVMETHOD(bus_teardown_intr,ahci_teardown_intr), 914208410Smav DEVMETHOD(bus_child_location_str, ahci_child_location_str), 915249346Smav DEVMETHOD(bus_get_dma_tag, ahci_get_dma_tag), 916195534Sscottl { 0, 0 } 917195534Sscottl}; 918195534Sscottlstatic driver_t ahci_driver = { 919195534Sscottl "ahci", 920195534Sscottl ahci_methods, 921195534Sscottl sizeof(struct ahci_controller) 922195534Sscottl}; 923195534SscottlDRIVER_MODULE(ahci, pci, ahci_driver, ahci_devclass, 0, 0); 924199322Smavstatic device_method_t ahci_ata_methods[] = { 925199322Smav DEVMETHOD(device_probe, ahci_ata_probe), 926199322Smav DEVMETHOD(device_attach, ahci_attach), 927199322Smav DEVMETHOD(device_detach, ahci_detach), 928199322Smav DEVMETHOD(device_suspend, ahci_suspend), 929199322Smav DEVMETHOD(device_resume, ahci_resume), 930199322Smav DEVMETHOD(bus_print_child, ahci_print_child), 931199322Smav DEVMETHOD(bus_alloc_resource, ahci_alloc_resource), 932199322Smav DEVMETHOD(bus_release_resource, ahci_release_resource), 933199322Smav DEVMETHOD(bus_setup_intr, ahci_setup_intr), 934199322Smav DEVMETHOD(bus_teardown_intr,ahci_teardown_intr), 935208410Smav DEVMETHOD(bus_child_location_str, ahci_child_location_str), 936199322Smav { 0, 0 } 937199322Smav}; 938199322Smavstatic driver_t ahci_ata_driver = { 939199322Smav "ahci", 940199322Smav ahci_ata_methods, 941199322Smav sizeof(struct ahci_controller) 942199322Smav}; 943199322SmavDRIVER_MODULE(ahci, atapci, ahci_ata_driver, ahci_devclass, 0, 0); 944195534SscottlMODULE_VERSION(ahci, 1); 945195534SscottlMODULE_DEPEND(ahci, cam, 1, 1, 1); 946195534Sscottl 947195534Sscottlstatic int 948195534Sscottlahci_ch_probe(device_t dev) 949195534Sscottl{ 950195534Sscottl 951195534Sscottl device_set_desc_copy(dev, "AHCI channel"); 952195534Sscottl return (0); 953195534Sscottl} 954195534Sscottl 955195534Sscottlstatic int 956195534Sscottlahci_ch_attach(device_t dev) 957195534Sscottl{ 958195534Sscottl struct ahci_controller *ctlr = device_get_softc(device_get_parent(dev)); 959195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 960195534Sscottl struct cam_devq *devq; 961199821Smav int rid, error, i, sata_rev = 0; 962203123Smav u_int32_t version; 963195534Sscottl 964195534Sscottl ch->dev = dev; 965195534Sscottl ch->unit = (intptr_t)device_get_ivars(dev); 966196656Smav ch->caps = ctlr->caps; 967196656Smav ch->caps2 = ctlr->caps2; 968199322Smav ch->quirks = ctlr->quirks; 969215725Smav ch->numslots = ((ch->caps & AHCI_CAP_NCS) >> AHCI_CAP_NCS_SHIFT) + 1; 970196656Smav mtx_init(&ch->mtx, "AHCI channel lock", NULL, MTX_DEF); 971195534Sscottl resource_int_value(device_get_name(dev), 972195534Sscottl device_get_unit(dev), "pm_level", &ch->pm_level); 973196656Smav if (ch->pm_level > 3) 974196656Smav callout_init_mtx(&ch->pm_timer, &ch->mtx, 0); 975220576Smav callout_init_mtx(&ch->reset_timer, &ch->mtx, 0); 976195534Sscottl /* Limit speed for my onboard JMicron external port. 977195534Sscottl * It is not eSATA really. */ 978195534Sscottl if (pci_get_devid(ctlr->dev) == 0x2363197b && 979195534Sscottl pci_get_subvendor(ctlr->dev) == 0x1043 && 980195534Sscottl pci_get_subdevice(ctlr->dev) == 0x81e4 && 981195534Sscottl ch->unit == 0) 982199821Smav sata_rev = 1; 983203030Smav if (ch->quirks & AHCI_Q_SATA2) 984203030Smav sata_rev = 2; 985195534Sscottl resource_int_value(device_get_name(dev), 986199821Smav device_get_unit(dev), "sata_rev", &sata_rev); 987199821Smav for (i = 0; i < 16; i++) { 988199821Smav ch->user[i].revision = sata_rev; 989199821Smav ch->user[i].mode = 0; 990199821Smav ch->user[i].bytecount = 8192; 991199821Smav ch->user[i].tags = ch->numslots; 992207499Smav ch->user[i].caps = 0; 993199821Smav ch->curr[i] = ch->user[i]; 994207499Smav if (ch->pm_level) { 995207499Smav ch->user[i].caps = CTS_SATA_CAPS_H_PMREQ | 996207499Smav CTS_SATA_CAPS_H_APST | 997207499Smav CTS_SATA_CAPS_D_PMREQ | CTS_SATA_CAPS_D_APST; 998207499Smav } 999220602Smav ch->user[i].caps |= CTS_SATA_CAPS_H_DMAAA | 1000220602Smav CTS_SATA_CAPS_H_AN; 1001199821Smav } 1002238805Smav rid = 0; 1003195534Sscottl if (!(ch->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 1004195534Sscottl &rid, RF_ACTIVE))) 1005195534Sscottl return (ENXIO); 1006195534Sscottl ahci_dmainit(dev); 1007195534Sscottl ahci_slotsalloc(dev); 1008208375Smav ahci_ch_init(dev); 1009195534Sscottl mtx_lock(&ch->mtx); 1010195534Sscottl rid = ATA_IRQ_RID; 1011195534Sscottl if (!(ch->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 1012195534Sscottl &rid, RF_SHAREABLE | RF_ACTIVE))) { 1013195534Sscottl device_printf(dev, "Unable to map interrupt\n"); 1014208813Smav error = ENXIO; 1015208813Smav goto err0; 1016195534Sscottl } 1017195534Sscottl if ((bus_setup_intr(dev, ch->r_irq, ATA_INTR_FLAGS, NULL, 1018195534Sscottl ahci_ch_intr_locked, dev, &ch->ih))) { 1019195534Sscottl device_printf(dev, "Unable to setup interrupt\n"); 1020195534Sscottl error = ENXIO; 1021195534Sscottl goto err1; 1022195534Sscottl } 1023203123Smav ch->chcaps = ATA_INL(ch->r_mem, AHCI_P_CMD); 1024203123Smav version = ATA_INL(ctlr->r_mem, AHCI_VS); 1025240383Smav if (version < 0x00010200 && (ctlr->caps & AHCI_CAP_FBSS)) 1026203123Smav ch->chcaps |= AHCI_P_CMD_FBSCP; 1027203123Smav if (bootverbose) { 1028203123Smav device_printf(dev, "Caps:%s%s%s%s%s\n", 1029203123Smav (ch->chcaps & AHCI_P_CMD_HPCP) ? " HPCP":"", 1030203123Smav (ch->chcaps & AHCI_P_CMD_MPSP) ? " MPSP":"", 1031203123Smav (ch->chcaps & AHCI_P_CMD_CPD) ? " CPD":"", 1032203123Smav (ch->chcaps & AHCI_P_CMD_ESP) ? " ESP":"", 1033203123Smav (ch->chcaps & AHCI_P_CMD_FBSCP) ? " FBSCP":""); 1034203123Smav } 1035195534Sscottl /* Create the device queue for our SIM. */ 1036195534Sscottl devq = cam_simq_alloc(ch->numslots); 1037195534Sscottl if (devq == NULL) { 1038195534Sscottl device_printf(dev, "Unable to allocate simq\n"); 1039195534Sscottl error = ENOMEM; 1040195534Sscottl goto err1; 1041195534Sscottl } 1042195534Sscottl /* Construct SIM entry */ 1043195534Sscottl ch->sim = cam_sim_alloc(ahciaction, ahcipoll, "ahcich", ch, 1044199178Smav device_get_unit(dev), &ch->mtx, 1045199278Smav min(2, ch->numslots), 1046199278Smav (ch->caps & AHCI_CAP_SNCQ) ? ch->numslots : 0, 1047199278Smav devq); 1048195534Sscottl if (ch->sim == NULL) { 1049208813Smav cam_simq_free(devq); 1050195534Sscottl device_printf(dev, "unable to allocate sim\n"); 1051195534Sscottl error = ENOMEM; 1052208813Smav goto err1; 1053195534Sscottl } 1054195534Sscottl if (xpt_bus_register(ch->sim, dev, 0) != CAM_SUCCESS) { 1055195534Sscottl device_printf(dev, "unable to register xpt bus\n"); 1056195534Sscottl error = ENXIO; 1057195534Sscottl goto err2; 1058195534Sscottl } 1059195534Sscottl if (xpt_create_path(&ch->path, /*periph*/NULL, cam_sim_path(ch->sim), 1060195534Sscottl CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 1061195534Sscottl device_printf(dev, "unable to create path\n"); 1062195534Sscottl error = ENXIO; 1063195534Sscottl goto err3; 1064195534Sscottl } 1065196656Smav if (ch->pm_level > 3) { 1066196656Smav callout_reset(&ch->pm_timer, 1067196656Smav (ch->pm_level == 4) ? hz / 1000 : hz / 8, 1068196656Smav ahci_ch_pm, dev); 1069196656Smav } 1070195534Sscottl mtx_unlock(&ch->mtx); 1071195534Sscottl return (0); 1072195534Sscottl 1073195534Sscottlerr3: 1074195534Sscottl xpt_bus_deregister(cam_sim_path(ch->sim)); 1075195534Sscottlerr2: 1076195534Sscottl cam_sim_free(ch->sim, /*free_devq*/TRUE); 1077195534Sscottlerr1: 1078195534Sscottl bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 1079208813Smaverr0: 1080195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 1081195534Sscottl mtx_unlock(&ch->mtx); 1082214325Smav mtx_destroy(&ch->mtx); 1083195534Sscottl return (error); 1084195534Sscottl} 1085195534Sscottl 1086195534Sscottlstatic int 1087195534Sscottlahci_ch_detach(device_t dev) 1088195534Sscottl{ 1089195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1090195534Sscottl 1091195534Sscottl mtx_lock(&ch->mtx); 1092195534Sscottl xpt_async(AC_LOST_DEVICE, ch->path, NULL); 1093220576Smav /* Forget about reset. */ 1094220576Smav if (ch->resetting) { 1095220576Smav ch->resetting = 0; 1096220576Smav xpt_release_simq(ch->sim, TRUE); 1097220576Smav } 1098195534Sscottl xpt_free_path(ch->path); 1099195534Sscottl xpt_bus_deregister(cam_sim_path(ch->sim)); 1100195534Sscottl cam_sim_free(ch->sim, /*free_devq*/TRUE); 1101195534Sscottl mtx_unlock(&ch->mtx); 1102195534Sscottl 1103196656Smav if (ch->pm_level > 3) 1104196656Smav callout_drain(&ch->pm_timer); 1105220576Smav callout_drain(&ch->reset_timer); 1106195534Sscottl bus_teardown_intr(dev, ch->r_irq, ch->ih); 1107195534Sscottl bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 1108195534Sscottl 1109208375Smav ahci_ch_deinit(dev); 1110195534Sscottl ahci_slotsfree(dev); 1111195534Sscottl ahci_dmafini(dev); 1112195534Sscottl 1113195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 1114195534Sscottl mtx_destroy(&ch->mtx); 1115195534Sscottl return (0); 1116195534Sscottl} 1117195534Sscottl 1118195534Sscottlstatic int 1119208375Smavahci_ch_init(device_t dev) 1120195534Sscottl{ 1121195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1122208375Smav uint64_t work; 1123195534Sscottl 1124208375Smav /* Disable port interrupts */ 1125208375Smav ATA_OUTL(ch->r_mem, AHCI_P_IE, 0); 1126208375Smav /* Setup work areas */ 1127208375Smav work = ch->dma.work_bus + AHCI_CL_OFFSET; 1128208375Smav ATA_OUTL(ch->r_mem, AHCI_P_CLB, work & 0xffffffff); 1129208375Smav ATA_OUTL(ch->r_mem, AHCI_P_CLBU, work >> 32); 1130208375Smav work = ch->dma.rfis_bus; 1131208375Smav ATA_OUTL(ch->r_mem, AHCI_P_FB, work & 0xffffffff); 1132208375Smav ATA_OUTL(ch->r_mem, AHCI_P_FBU, work >> 32); 1133208375Smav /* Activate the channel and power/spin up device */ 1134208375Smav ATA_OUTL(ch->r_mem, AHCI_P_CMD, 1135208375Smav (AHCI_P_CMD_ACTIVE | AHCI_P_CMD_POD | AHCI_P_CMD_SUD | 1136208375Smav ((ch->pm_level == 2 || ch->pm_level == 3) ? AHCI_P_CMD_ALPE : 0) | 1137208375Smav ((ch->pm_level > 2) ? AHCI_P_CMD_ASP : 0 ))); 1138208375Smav ahci_start_fr(dev); 1139208375Smav ahci_start(dev, 1); 1140208375Smav return (0); 1141208375Smav} 1142208375Smav 1143208375Smavstatic int 1144208375Smavahci_ch_deinit(device_t dev) 1145208375Smav{ 1146208375Smav struct ahci_channel *ch = device_get_softc(dev); 1147208375Smav 1148195534Sscottl /* Disable port interrupts. */ 1149195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 0); 1150195534Sscottl /* Reset command register. */ 1151195534Sscottl ahci_stop(dev); 1152195534Sscottl ahci_stop_fr(dev); 1153195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, 0); 1154195534Sscottl /* Allow everything, including partial and slumber modes. */ 1155195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SCTL, 0); 1156195534Sscottl /* Request slumber mode transition and give some time to get there. */ 1157195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, AHCI_P_CMD_SLUMBER); 1158195534Sscottl DELAY(100); 1159195534Sscottl /* Disable PHY. */ 1160195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SCTL, ATA_SC_DET_DISABLE); 1161195534Sscottl return (0); 1162195534Sscottl} 1163195534Sscottl 1164195534Sscottlstatic int 1165208375Smavahci_ch_suspend(device_t dev) 1166208375Smav{ 1167208375Smav struct ahci_channel *ch = device_get_softc(dev); 1168208375Smav 1169208375Smav mtx_lock(&ch->mtx); 1170208375Smav xpt_freeze_simq(ch->sim, 1); 1171220576Smav /* Forget about reset. */ 1172220576Smav if (ch->resetting) { 1173220576Smav ch->resetting = 0; 1174220576Smav callout_stop(&ch->reset_timer); 1175220576Smav xpt_release_simq(ch->sim, TRUE); 1176220576Smav } 1177208375Smav while (ch->oslots) 1178208375Smav msleep(ch, &ch->mtx, PRIBIO, "ahcisusp", hz/100); 1179208375Smav ahci_ch_deinit(dev); 1180208375Smav mtx_unlock(&ch->mtx); 1181208375Smav return (0); 1182208375Smav} 1183208375Smav 1184208375Smavstatic int 1185195534Sscottlahci_ch_resume(device_t dev) 1186195534Sscottl{ 1187195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1188195534Sscottl 1189208375Smav mtx_lock(&ch->mtx); 1190208375Smav ahci_ch_init(dev); 1191208375Smav ahci_reset(dev); 1192208375Smav xpt_release_simq(ch->sim, TRUE); 1193208375Smav mtx_unlock(&ch->mtx); 1194195534Sscottl return (0); 1195195534Sscottl} 1196195534Sscottl 1197195534Sscottldevclass_t ahcich_devclass; 1198195534Sscottlstatic device_method_t ahcich_methods[] = { 1199195534Sscottl DEVMETHOD(device_probe, ahci_ch_probe), 1200195534Sscottl DEVMETHOD(device_attach, ahci_ch_attach), 1201195534Sscottl DEVMETHOD(device_detach, ahci_ch_detach), 1202195534Sscottl DEVMETHOD(device_suspend, ahci_ch_suspend), 1203195534Sscottl DEVMETHOD(device_resume, ahci_ch_resume), 1204195534Sscottl { 0, 0 } 1205195534Sscottl}; 1206195534Sscottlstatic driver_t ahcich_driver = { 1207195534Sscottl "ahcich", 1208195534Sscottl ahcich_methods, 1209195534Sscottl sizeof(struct ahci_channel) 1210195534Sscottl}; 1211199322SmavDRIVER_MODULE(ahcich, ahci, ahcich_driver, ahcich_devclass, 0, 0); 1212195534Sscottl 1213195534Sscottlstruct ahci_dc_cb_args { 1214195534Sscottl bus_addr_t maddr; 1215195534Sscottl int error; 1216195534Sscottl}; 1217195534Sscottl 1218195534Sscottlstatic void 1219195534Sscottlahci_dmainit(device_t dev) 1220195534Sscottl{ 1221195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1222195534Sscottl struct ahci_dc_cb_args dcba; 1223203123Smav size_t rfsize; 1224195534Sscottl 1225195534Sscottl /* Command area. */ 1226195534Sscottl if (bus_dma_tag_create(bus_get_dma_tag(dev), 1024, 0, 1227249346Smav BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 1228195534Sscottl NULL, NULL, AHCI_WORK_SIZE, 1, AHCI_WORK_SIZE, 1229195534Sscottl 0, NULL, NULL, &ch->dma.work_tag)) 1230195534Sscottl goto error; 1231248687Smav if (bus_dmamem_alloc(ch->dma.work_tag, (void **)&ch->dma.work, 1232248687Smav BUS_DMA_ZERO, &ch->dma.work_map)) 1233195534Sscottl goto error; 1234195534Sscottl if (bus_dmamap_load(ch->dma.work_tag, ch->dma.work_map, ch->dma.work, 1235195534Sscottl AHCI_WORK_SIZE, ahci_dmasetupc_cb, &dcba, 0) || dcba.error) { 1236195534Sscottl bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 1237195534Sscottl goto error; 1238195534Sscottl } 1239195534Sscottl ch->dma.work_bus = dcba.maddr; 1240195534Sscottl /* FIS receive area. */ 1241203123Smav if (ch->chcaps & AHCI_P_CMD_FBSCP) 1242203123Smav rfsize = 4096; 1243203123Smav else 1244203123Smav rfsize = 256; 1245203123Smav if (bus_dma_tag_create(bus_get_dma_tag(dev), rfsize, 0, 1246249346Smav BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 1247203123Smav NULL, NULL, rfsize, 1, rfsize, 1248195534Sscottl 0, NULL, NULL, &ch->dma.rfis_tag)) 1249195534Sscottl goto error; 1250195534Sscottl if (bus_dmamem_alloc(ch->dma.rfis_tag, (void **)&ch->dma.rfis, 0, 1251195534Sscottl &ch->dma.rfis_map)) 1252195534Sscottl goto error; 1253195534Sscottl if (bus_dmamap_load(ch->dma.rfis_tag, ch->dma.rfis_map, ch->dma.rfis, 1254203123Smav rfsize, ahci_dmasetupc_cb, &dcba, 0) || dcba.error) { 1255195534Sscottl bus_dmamem_free(ch->dma.rfis_tag, ch->dma.rfis, ch->dma.rfis_map); 1256195534Sscottl goto error; 1257195534Sscottl } 1258195534Sscottl ch->dma.rfis_bus = dcba.maddr; 1259195534Sscottl /* Data area. */ 1260195534Sscottl if (bus_dma_tag_create(bus_get_dma_tag(dev), 2, 0, 1261249346Smav BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 1262195534Sscottl NULL, NULL, 1263195534Sscottl AHCI_SG_ENTRIES * PAGE_SIZE * ch->numslots, 1264195534Sscottl AHCI_SG_ENTRIES, AHCI_PRD_MAX, 1265195534Sscottl 0, busdma_lock_mutex, &ch->mtx, &ch->dma.data_tag)) { 1266195534Sscottl goto error; 1267195534Sscottl } 1268195534Sscottl return; 1269195534Sscottl 1270195534Sscottlerror: 1271195534Sscottl device_printf(dev, "WARNING - DMA initialization failed\n"); 1272195534Sscottl ahci_dmafini(dev); 1273195534Sscottl} 1274195534Sscottl 1275195534Sscottlstatic void 1276195534Sscottlahci_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error) 1277195534Sscottl{ 1278195534Sscottl struct ahci_dc_cb_args *dcba = (struct ahci_dc_cb_args *)xsc; 1279195534Sscottl 1280195534Sscottl if (!(dcba->error = error)) 1281195534Sscottl dcba->maddr = segs[0].ds_addr; 1282195534Sscottl} 1283195534Sscottl 1284195534Sscottlstatic void 1285195534Sscottlahci_dmafini(device_t dev) 1286195534Sscottl{ 1287195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1288195534Sscottl 1289195534Sscottl if (ch->dma.data_tag) { 1290195534Sscottl bus_dma_tag_destroy(ch->dma.data_tag); 1291195534Sscottl ch->dma.data_tag = NULL; 1292195534Sscottl } 1293195534Sscottl if (ch->dma.rfis_bus) { 1294195534Sscottl bus_dmamap_unload(ch->dma.rfis_tag, ch->dma.rfis_map); 1295195534Sscottl bus_dmamem_free(ch->dma.rfis_tag, ch->dma.rfis, ch->dma.rfis_map); 1296195534Sscottl ch->dma.rfis_bus = 0; 1297195534Sscottl ch->dma.rfis_map = NULL; 1298195534Sscottl ch->dma.rfis = NULL; 1299195534Sscottl } 1300195534Sscottl if (ch->dma.work_bus) { 1301195534Sscottl bus_dmamap_unload(ch->dma.work_tag, ch->dma.work_map); 1302195534Sscottl bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 1303195534Sscottl ch->dma.work_bus = 0; 1304195534Sscottl ch->dma.work_map = NULL; 1305195534Sscottl ch->dma.work = NULL; 1306195534Sscottl } 1307195534Sscottl if (ch->dma.work_tag) { 1308195534Sscottl bus_dma_tag_destroy(ch->dma.work_tag); 1309195534Sscottl ch->dma.work_tag = NULL; 1310195534Sscottl } 1311195534Sscottl} 1312195534Sscottl 1313195534Sscottlstatic void 1314195534Sscottlahci_slotsalloc(device_t dev) 1315195534Sscottl{ 1316195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1317195534Sscottl int i; 1318195534Sscottl 1319195534Sscottl /* Alloc and setup command/dma slots */ 1320195534Sscottl bzero(ch->slot, sizeof(ch->slot)); 1321195534Sscottl for (i = 0; i < ch->numslots; i++) { 1322195534Sscottl struct ahci_slot *slot = &ch->slot[i]; 1323195534Sscottl 1324195534Sscottl slot->dev = dev; 1325195534Sscottl slot->slot = i; 1326195534Sscottl slot->state = AHCI_SLOT_EMPTY; 1327195534Sscottl slot->ccb = NULL; 1328195534Sscottl callout_init_mtx(&slot->timeout, &ch->mtx, 0); 1329195534Sscottl 1330195534Sscottl if (bus_dmamap_create(ch->dma.data_tag, 0, &slot->dma.data_map)) 1331195534Sscottl device_printf(ch->dev, "FAILURE - create data_map\n"); 1332195534Sscottl } 1333195534Sscottl} 1334195534Sscottl 1335195534Sscottlstatic void 1336195534Sscottlahci_slotsfree(device_t dev) 1337195534Sscottl{ 1338195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1339195534Sscottl int i; 1340195534Sscottl 1341195534Sscottl /* Free all dma slots */ 1342195534Sscottl for (i = 0; i < ch->numslots; i++) { 1343195534Sscottl struct ahci_slot *slot = &ch->slot[i]; 1344195534Sscottl 1345196656Smav callout_drain(&slot->timeout); 1346195534Sscottl if (slot->dma.data_map) { 1347195534Sscottl bus_dmamap_destroy(ch->dma.data_tag, slot->dma.data_map); 1348195534Sscottl slot->dma.data_map = NULL; 1349195534Sscottl } 1350195534Sscottl } 1351195534Sscottl} 1352195534Sscottl 1353220657Smavstatic int 1354198319Smavahci_phy_check_events(device_t dev, u_int32_t serr) 1355195534Sscottl{ 1356195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1357195534Sscottl 1358220657Smav if (((ch->pm_level == 0) && (serr & ATA_SE_PHY_CHANGED)) || 1359220657Smav ((ch->pm_level != 0 || ch->listening) && (serr & ATA_SE_EXCHANGED))) { 1360195534Sscottl u_int32_t status = ATA_INL(ch->r_mem, AHCI_P_SSTS); 1361203108Smav union ccb *ccb; 1362203108Smav 1363203165Smav if (bootverbose) { 1364220657Smav if ((status & ATA_SS_DET_MASK) != ATA_SS_DET_NO_DEVICE) 1365195534Sscottl device_printf(dev, "CONNECT requested\n"); 1366220657Smav else 1367195534Sscottl device_printf(dev, "DISCONNECT requested\n"); 1368195534Sscottl } 1369203165Smav ahci_reset(dev); 1370203108Smav if ((ccb = xpt_alloc_ccb_nowait()) == NULL) 1371220657Smav return (0); 1372203108Smav if (xpt_create_path(&ccb->ccb_h.path, NULL, 1373203108Smav cam_sim_path(ch->sim), 1374203108Smav CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 1375203108Smav xpt_free_ccb(ccb); 1376220657Smav return (0); 1377203108Smav } 1378203108Smav xpt_rescan(ccb); 1379220657Smav return (1); 1380195534Sscottl } 1381220657Smav return (0); 1382195534Sscottl} 1383195534Sscottl 1384195534Sscottlstatic void 1385220657Smavahci_cpd_check_events(device_t dev) 1386220657Smav{ 1387220657Smav struct ahci_channel *ch = device_get_softc(dev); 1388220657Smav u_int32_t status; 1389220657Smav union ccb *ccb; 1390220657Smav 1391220657Smav if (ch->pm_level == 0) 1392220657Smav return; 1393220657Smav 1394220657Smav status = ATA_INL(ch->r_mem, AHCI_P_CMD); 1395220657Smav if ((status & AHCI_P_CMD_CPD) == 0) 1396220657Smav return; 1397220657Smav 1398220657Smav if (bootverbose) { 1399220657Smav if (status & AHCI_P_CMD_CPS) { 1400220657Smav device_printf(dev, "COLD CONNECT requested\n"); 1401220657Smav } else 1402220657Smav device_printf(dev, "COLD DISCONNECT requested\n"); 1403220657Smav } 1404220657Smav ahci_reset(dev); 1405220657Smav if ((ccb = xpt_alloc_ccb_nowait()) == NULL) 1406220657Smav return; 1407220657Smav if (xpt_create_path(&ccb->ccb_h.path, NULL, cam_sim_path(ch->sim), 1408220657Smav CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 1409220657Smav xpt_free_ccb(ccb); 1410220657Smav return; 1411220657Smav } 1412220657Smav xpt_rescan(ccb); 1413220657Smav} 1414220657Smav 1415220657Smavstatic void 1416196907Smavahci_notify_events(device_t dev, u_int32_t status) 1417196656Smav{ 1418196656Smav struct ahci_channel *ch = device_get_softc(dev); 1419196656Smav struct cam_path *dpath; 1420196656Smav int i; 1421196656Smav 1422200196Smav if (ch->caps & AHCI_CAP_SSNTF) 1423200196Smav ATA_OUTL(ch->r_mem, AHCI_P_SNTF, status); 1424196656Smav if (bootverbose) 1425196656Smav device_printf(dev, "SNTF 0x%04x\n", status); 1426196656Smav for (i = 0; i < 16; i++) { 1427196656Smav if ((status & (1 << i)) == 0) 1428196656Smav continue; 1429196656Smav if (xpt_create_path(&dpath, NULL, 1430196656Smav xpt_path_path_id(ch->path), i, 0) == CAM_REQ_CMP) { 1431196656Smav xpt_async(AC_SCSI_AEN, dpath, NULL); 1432196656Smav xpt_free_path(dpath); 1433196656Smav } 1434196656Smav } 1435196656Smav} 1436196656Smav 1437196656Smavstatic void 1438195534Sscottlahci_ch_intr_locked(void *data) 1439195534Sscottl{ 1440195534Sscottl device_t dev = (device_t)data; 1441195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1442195534Sscottl 1443195534Sscottl mtx_lock(&ch->mtx); 1444235333Smav xpt_batch_start(ch->sim); 1445195534Sscottl ahci_ch_intr(data); 1446235333Smav xpt_batch_done(ch->sim); 1447195534Sscottl mtx_unlock(&ch->mtx); 1448195534Sscottl} 1449195534Sscottl 1450195534Sscottlstatic void 1451196656Smavahci_ch_pm(void *arg) 1452196656Smav{ 1453196656Smav device_t dev = (device_t)arg; 1454196656Smav struct ahci_channel *ch = device_get_softc(dev); 1455196656Smav uint32_t work; 1456196656Smav 1457196656Smav if (ch->numrslots != 0) 1458196656Smav return; 1459196656Smav work = ATA_INL(ch->r_mem, AHCI_P_CMD); 1460196656Smav if (ch->pm_level == 4) 1461196656Smav work |= AHCI_P_CMD_PARTIAL; 1462196656Smav else 1463196656Smav work |= AHCI_P_CMD_SLUMBER; 1464196656Smav ATA_OUTL(ch->r_mem, AHCI_P_CMD, work); 1465196656Smav} 1466196656Smav 1467196656Smavstatic void 1468195534Sscottlahci_ch_intr(void *data) 1469195534Sscottl{ 1470195534Sscottl device_t dev = (device_t)data; 1471195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1472248698Smav uint32_t istatus, cstatus, serr = 0, sntf = 0, ok, err; 1473195534Sscottl enum ahci_err_type et; 1474220657Smav int i, ccs, port, reset = 0; 1475195534Sscottl 1476195534Sscottl /* Read and clear interrupt statuses. */ 1477195534Sscottl istatus = ATA_INL(ch->r_mem, AHCI_P_IS); 1478196656Smav if (istatus == 0) 1479196656Smav return; 1480195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IS, istatus); 1481195534Sscottl /* Read command statuses. */ 1482248698Smav if (ch->numtslots != 0) 1483248698Smav cstatus = ATA_INL(ch->r_mem, AHCI_P_SACT); 1484248698Smav else 1485248698Smav cstatus = 0; 1486248698Smav if (ch->numrslots != ch->numtslots) 1487248698Smav cstatus |= ATA_INL(ch->r_mem, AHCI_P_CI); 1488248698Smav /* Read SNTF in one of possible ways. */ 1489248704Smav if ((istatus & AHCI_P_IX_SDB) && 1490248704Smav (ch->pm_present || ch->curr[0].atapi != 0)) { 1491200196Smav if (ch->caps & AHCI_CAP_SSNTF) 1492200196Smav sntf = ATA_INL(ch->r_mem, AHCI_P_SNTF); 1493203123Smav else if (ch->fbs_enabled) { 1494200196Smav u_int8_t *fis = ch->dma.rfis + 0x58; 1495200196Smav 1496203123Smav for (i = 0; i < 16; i++) { 1497203123Smav if (fis[1] & 0x80) { 1498203123Smav fis[1] &= 0x7f; 1499203123Smav sntf |= 1 << i; 1500203123Smav } 1501203123Smav fis += 256; 1502203123Smav } 1503203123Smav } else { 1504203123Smav u_int8_t *fis = ch->dma.rfis + 0x58; 1505203123Smav 1506200196Smav if (fis[1] & 0x80) 1507200196Smav sntf = (1 << (fis[1] & 0x0f)); 1508200196Smav } 1509200196Smav } 1510195534Sscottl /* Process PHY events */ 1511198319Smav if (istatus & (AHCI_P_IX_PC | AHCI_P_IX_PRC | AHCI_P_IX_OF | 1512198319Smav AHCI_P_IX_IF | AHCI_P_IX_HBD | AHCI_P_IX_HBF | AHCI_P_IX_TFE)) { 1513198319Smav serr = ATA_INL(ch->r_mem, AHCI_P_SERR); 1514198319Smav if (serr) { 1515198319Smav ATA_OUTL(ch->r_mem, AHCI_P_SERR, serr); 1516220657Smav reset = ahci_phy_check_events(dev, serr); 1517198319Smav } 1518198319Smav } 1519220657Smav /* Process cold presence detection events */ 1520220657Smav if ((istatus & AHCI_P_IX_CPD) && !reset) 1521220657Smav ahci_cpd_check_events(dev); 1522195534Sscottl /* Process command errors */ 1523198319Smav if (istatus & (AHCI_P_IX_OF | AHCI_P_IX_IF | 1524198319Smav AHCI_P_IX_HBD | AHCI_P_IX_HBF | AHCI_P_IX_TFE)) { 1525195534Sscottl ccs = (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CCS_MASK) 1526195534Sscottl >> AHCI_P_CMD_CCS_SHIFT; 1527203123Smav//device_printf(dev, "%s ERROR is %08x cs %08x ss %08x rs %08x tfd %02x serr %08x fbs %08x ccs %d\n", 1528203123Smav// __func__, istatus, cstatus, sstatus, ch->rslots, ATA_INL(ch->r_mem, AHCI_P_TFD), 1529203123Smav// serr, ATA_INL(ch->r_mem, AHCI_P_FBS), ccs); 1530203123Smav port = -1; 1531203123Smav if (ch->fbs_enabled) { 1532203123Smav uint32_t fbs = ATA_INL(ch->r_mem, AHCI_P_FBS); 1533203123Smav if (fbs & AHCI_P_FBS_SDE) { 1534203123Smav port = (fbs & AHCI_P_FBS_DWE) 1535203123Smav >> AHCI_P_FBS_DWE_SHIFT; 1536203123Smav } else { 1537203123Smav for (i = 0; i < 16; i++) { 1538203123Smav if (ch->numrslotspd[i] == 0) 1539203123Smav continue; 1540203123Smav if (port == -1) 1541203123Smav port = i; 1542203123Smav else if (port != i) { 1543203123Smav port = -2; 1544203123Smav break; 1545203123Smav } 1546203123Smav } 1547203123Smav } 1548203123Smav } 1549248698Smav err = ch->rslots & cstatus; 1550195534Sscottl } else { 1551195534Sscottl ccs = 0; 1552195534Sscottl err = 0; 1553203123Smav port = -1; 1554195534Sscottl } 1555195534Sscottl /* Complete all successfull commands. */ 1556248698Smav ok = ch->rslots & ~cstatus; 1557195534Sscottl for (i = 0; i < ch->numslots; i++) { 1558195534Sscottl if ((ok >> i) & 1) 1559195534Sscottl ahci_end_transaction(&ch->slot[i], AHCI_ERR_NONE); 1560195534Sscottl } 1561195534Sscottl /* On error, complete the rest of commands with error statuses. */ 1562195534Sscottl if (err) { 1563195534Sscottl if (ch->frozen) { 1564195534Sscottl union ccb *fccb = ch->frozen; 1565195534Sscottl ch->frozen = NULL; 1566195534Sscottl fccb->ccb_h.status = CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 1567198319Smav if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 1568198319Smav xpt_freeze_devq(fccb->ccb_h.path, 1); 1569198319Smav fccb->ccb_h.status |= CAM_DEV_QFRZN; 1570198319Smav } 1571195534Sscottl xpt_done(fccb); 1572195534Sscottl } 1573195534Sscottl for (i = 0; i < ch->numslots; i++) { 1574195534Sscottl /* XXX: reqests in loading state. */ 1575195534Sscottl if (((err >> i) & 1) == 0) 1576195534Sscottl continue; 1577203123Smav if (port >= 0 && 1578203123Smav ch->slot[i].ccb->ccb_h.target_id != port) 1579203123Smav continue; 1580198390Smav if (istatus & AHCI_P_IX_TFE) { 1581203123Smav if (port != -2) { 1582195534Sscottl /* Task File Error */ 1583203123Smav if (ch->numtslotspd[ 1584203123Smav ch->slot[i].ccb->ccb_h.target_id] == 0) { 1585195534Sscottl /* Untagged operation. */ 1586195534Sscottl if (i == ccs) 1587195534Sscottl et = AHCI_ERR_TFE; 1588195534Sscottl else 1589195534Sscottl et = AHCI_ERR_INNOCENT; 1590195534Sscottl } else { 1591195534Sscottl /* Tagged operation. */ 1592195534Sscottl et = AHCI_ERR_NCQ; 1593195534Sscottl } 1594203123Smav } else { 1595203123Smav et = AHCI_ERR_TFE; 1596203123Smav ch->fatalerr = 1; 1597203123Smav } 1598198390Smav } else if (istatus & AHCI_P_IX_IF) { 1599203123Smav if (ch->numtslots == 0 && i != ccs && port != -2) 1600198390Smav et = AHCI_ERR_INNOCENT; 1601198390Smav else 1602198390Smav et = AHCI_ERR_SATA; 1603195534Sscottl } else 1604195534Sscottl et = AHCI_ERR_INVALID; 1605195534Sscottl ahci_end_transaction(&ch->slot[i], et); 1606195534Sscottl } 1607203123Smav /* 1608203123Smav * We can't reinit port if there are some other 1609203123Smav * commands active, use resume to complete them. 1610203123Smav */ 1611220565Smav if (ch->rslots != 0 && !ch->recoverycmd) 1612203123Smav ATA_OUTL(ch->r_mem, AHCI_P_FBS, AHCI_P_FBS_EN | AHCI_P_FBS_DEC); 1613195534Sscottl } 1614196656Smav /* Process NOTIFY events */ 1615196907Smav if (sntf) 1616196907Smav ahci_notify_events(dev, sntf); 1617195534Sscottl} 1618195534Sscottl 1619195534Sscottl/* Must be called with channel locked. */ 1620195534Sscottlstatic int 1621195534Sscottlahci_check_collision(device_t dev, union ccb *ccb) 1622195534Sscottl{ 1623195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1624203123Smav int t = ccb->ccb_h.target_id; 1625195534Sscottl 1626195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1627195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1628199747Smav /* Tagged command while we have no supported tag free. */ 1629199747Smav if (((~ch->oslots) & (0xffffffff >> (32 - 1630203123Smav ch->curr[t].tags))) == 0) 1631199747Smav return (1); 1632203123Smav /* If we have FBS */ 1633203123Smav if (ch->fbs_enabled) { 1634203123Smav /* Tagged command while untagged are active. */ 1635203123Smav if (ch->numrslotspd[t] != 0 && ch->numtslotspd[t] == 0) 1636203123Smav return (1); 1637203123Smav } else { 1638203123Smav /* Tagged command while untagged are active. */ 1639203123Smav if (ch->numrslots != 0 && ch->numtslots == 0) 1640203123Smav return (1); 1641203123Smav /* Tagged command while tagged to other target is active. */ 1642203123Smav if (ch->numtslots != 0 && 1643203123Smav ch->taggedtarget != ccb->ccb_h.target_id) 1644203123Smav return (1); 1645203123Smav } 1646195534Sscottl } else { 1647203123Smav /* If we have FBS */ 1648203123Smav if (ch->fbs_enabled) { 1649203123Smav /* Untagged command while tagged are active. */ 1650203123Smav if (ch->numrslotspd[t] != 0 && ch->numtslotspd[t] != 0) 1651203123Smav return (1); 1652203123Smav } else { 1653203123Smav /* Untagged command while tagged are active. */ 1654203123Smav if (ch->numrslots != 0 && ch->numtslots != 0) 1655203123Smav return (1); 1656203123Smav } 1657195534Sscottl } 1658195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1659195534Sscottl (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) { 1660195534Sscottl /* Atomic command while anything active. */ 1661195534Sscottl if (ch->numrslots != 0) 1662195534Sscottl return (1); 1663195534Sscottl } 1664195534Sscottl /* We have some atomic command running. */ 1665195534Sscottl if (ch->aslots != 0) 1666195534Sscottl return (1); 1667195534Sscottl return (0); 1668195534Sscottl} 1669195534Sscottl 1670195534Sscottl/* Must be called with channel locked. */ 1671195534Sscottlstatic void 1672195534Sscottlahci_begin_transaction(device_t dev, union ccb *ccb) 1673195534Sscottl{ 1674195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1675195534Sscottl struct ahci_slot *slot; 1676199747Smav int tag, tags; 1677195534Sscottl 1678195534Sscottl /* Choose empty slot. */ 1679199747Smav tags = ch->numslots; 1680199747Smav if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1681199747Smav (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) 1682199747Smav tags = ch->curr[ccb->ccb_h.target_id].tags; 1683195534Sscottl tag = ch->lastslot; 1684199747Smav while (1) { 1685199747Smav if (tag >= tags) 1686195534Sscottl tag = 0; 1687199747Smav if (ch->slot[tag].state == AHCI_SLOT_EMPTY) 1688199747Smav break; 1689199747Smav tag++; 1690199747Smav }; 1691195534Sscottl ch->lastslot = tag; 1692195534Sscottl /* Occupy chosen slot. */ 1693195534Sscottl slot = &ch->slot[tag]; 1694195534Sscottl slot->ccb = ccb; 1695196656Smav /* Stop PM timer. */ 1696196656Smav if (ch->numrslots == 0 && ch->pm_level > 3) 1697196656Smav callout_stop(&ch->pm_timer); 1698195534Sscottl /* Update channel stats. */ 1699199747Smav ch->oslots |= (1 << slot->slot); 1700195534Sscottl ch->numrslots++; 1701203123Smav ch->numrslotspd[ccb->ccb_h.target_id]++; 1702195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1703195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1704195534Sscottl ch->numtslots++; 1705203123Smav ch->numtslotspd[ccb->ccb_h.target_id]++; 1706195534Sscottl ch->taggedtarget = ccb->ccb_h.target_id; 1707195534Sscottl } 1708195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1709195534Sscottl (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) 1710195534Sscottl ch->aslots |= (1 << slot->slot); 1711195534Sscottl slot->dma.nsegs = 0; 1712195534Sscottl if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 1713195534Sscottl slot->state = AHCI_SLOT_LOADING; 1714246713Skib bus_dmamap_load_ccb(ch->dma.data_tag, slot->dma.data_map, ccb, 1715246713Skib ahci_dmasetprd, slot, 0); 1716195534Sscottl } else 1717195534Sscottl ahci_execute_transaction(slot); 1718195534Sscottl} 1719195534Sscottl 1720195534Sscottl/* Locked by busdma engine. */ 1721195534Sscottlstatic void 1722195534Sscottlahci_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1723195534Sscottl{ 1724195534Sscottl struct ahci_slot *slot = arg; 1725195534Sscottl struct ahci_channel *ch = device_get_softc(slot->dev); 1726195534Sscottl struct ahci_cmd_tab *ctp; 1727195534Sscottl struct ahci_dma_prd *prd; 1728195534Sscottl int i; 1729195534Sscottl 1730195534Sscottl if (error) { 1731195534Sscottl device_printf(slot->dev, "DMA load error\n"); 1732195534Sscottl ahci_end_transaction(slot, AHCI_ERR_INVALID); 1733195534Sscottl return; 1734195534Sscottl } 1735195534Sscottl KASSERT(nsegs <= AHCI_SG_ENTRIES, ("too many DMA segment entries\n")); 1736195534Sscottl /* Get a piece of the workspace for this request */ 1737195534Sscottl ctp = (struct ahci_cmd_tab *) 1738195534Sscottl (ch->dma.work + AHCI_CT_OFFSET + (AHCI_CT_SIZE * slot->slot)); 1739195534Sscottl /* Fill S/G table */ 1740195534Sscottl prd = &ctp->prd_tab[0]; 1741195534Sscottl for (i = 0; i < nsegs; i++) { 1742195534Sscottl prd[i].dba = htole64(segs[i].ds_addr); 1743195534Sscottl prd[i].dbc = htole32((segs[i].ds_len - 1) & AHCI_PRD_MASK); 1744195534Sscottl } 1745195534Sscottl slot->dma.nsegs = nsegs; 1746195534Sscottl bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 1747195534Sscottl ((slot->ccb->ccb_h.flags & CAM_DIR_IN) ? 1748195534Sscottl BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE)); 1749195534Sscottl ahci_execute_transaction(slot); 1750195534Sscottl} 1751195534Sscottl 1752195534Sscottl/* Must be called with channel locked. */ 1753195534Sscottlstatic void 1754195534Sscottlahci_execute_transaction(struct ahci_slot *slot) 1755195534Sscottl{ 1756195534Sscottl device_t dev = slot->dev; 1757195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1758195534Sscottl struct ahci_cmd_tab *ctp; 1759195534Sscottl struct ahci_cmd_list *clp; 1760195534Sscottl union ccb *ccb = slot->ccb; 1761195534Sscottl int port = ccb->ccb_h.target_id & 0x0f; 1762222304Smav int fis_size, i, softreset; 1763203123Smav uint8_t *fis = ch->dma.rfis + 0x40; 1764203123Smav uint8_t val; 1765195534Sscottl 1766195534Sscottl /* Get a piece of the workspace for this request */ 1767195534Sscottl ctp = (struct ahci_cmd_tab *) 1768195534Sscottl (ch->dma.work + AHCI_CT_OFFSET + (AHCI_CT_SIZE * slot->slot)); 1769195534Sscottl /* Setup the FIS for this request */ 1770199821Smav if (!(fis_size = ahci_setup_fis(dev, ctp, ccb, slot->slot))) { 1771195534Sscottl device_printf(ch->dev, "Setting up SATA FIS failed\n"); 1772195534Sscottl ahci_end_transaction(slot, AHCI_ERR_INVALID); 1773195534Sscottl return; 1774195534Sscottl } 1775195534Sscottl /* Setup the command list entry */ 1776195534Sscottl clp = (struct ahci_cmd_list *) 1777195534Sscottl (ch->dma.work + AHCI_CL_OFFSET + (AHCI_CL_SIZE * slot->slot)); 1778214988Smav clp->cmd_flags = htole16( 1779214988Smav (ccb->ccb_h.flags & CAM_DIR_OUT ? AHCI_CMD_WRITE : 0) | 1780214988Smav (ccb->ccb_h.func_code == XPT_SCSI_IO ? 1781214988Smav (AHCI_CMD_ATAPI | AHCI_CMD_PREFETCH) : 0) | 1782214988Smav (fis_size / sizeof(u_int32_t)) | 1783214988Smav (port << 12)); 1784214988Smav clp->prd_length = htole16(slot->dma.nsegs); 1785195534Sscottl /* Special handling for Soft Reset command. */ 1786195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1787203123Smav (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL)) { 1788203123Smav if (ccb->ataio.cmd.control & ATA_A_RESET) { 1789222304Smav softreset = 1; 1790203123Smav /* Kick controller into sane state */ 1791203123Smav ahci_stop(dev); 1792203123Smav ahci_clo(dev); 1793203123Smav ahci_start(dev, 0); 1794203123Smav clp->cmd_flags |= AHCI_CMD_RESET | AHCI_CMD_CLR_BUSY; 1795203123Smav } else { 1796222304Smav softreset = 2; 1797203123Smav /* Prepare FIS receive area for check. */ 1798203123Smav for (i = 0; i < 20; i++) 1799203123Smav fis[i] = 0xff; 1800203123Smav } 1801222304Smav } else 1802222304Smav softreset = 0; 1803195534Sscottl clp->bytecount = 0; 1804195534Sscottl clp->cmd_table_phys = htole64(ch->dma.work_bus + AHCI_CT_OFFSET + 1805195534Sscottl (AHCI_CT_SIZE * slot->slot)); 1806195534Sscottl bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1807214988Smav BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1808195534Sscottl bus_dmamap_sync(ch->dma.rfis_tag, ch->dma.rfis_map, 1809195534Sscottl BUS_DMASYNC_PREREAD); 1810195534Sscottl /* Set ACTIVE bit for NCQ commands. */ 1811195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1812195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1813195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SACT, 1 << slot->slot); 1814195534Sscottl } 1815203123Smav /* If FBS is enabled, set PMP port. */ 1816203123Smav if (ch->fbs_enabled) { 1817203123Smav ATA_OUTL(ch->r_mem, AHCI_P_FBS, AHCI_P_FBS_EN | 1818203123Smav (port << AHCI_P_FBS_DEV_SHIFT)); 1819203123Smav } 1820195534Sscottl /* Issue command to the controller. */ 1821195534Sscottl slot->state = AHCI_SLOT_RUNNING; 1822195534Sscottl ch->rslots |= (1 << slot->slot); 1823195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CI, (1 << slot->slot)); 1824195534Sscottl /* Device reset commands doesn't interrupt. Poll them. */ 1825195534Sscottl if (ccb->ccb_h.func_code == XPT_ATA_IO && 1826222304Smav (ccb->ataio.cmd.command == ATA_DEVICE_RESET || softreset)) { 1827220777Smav int count, timeout = ccb->ccb_h.timeout * 100; 1828195534Sscottl enum ahci_err_type et = AHCI_ERR_NONE; 1829195534Sscottl 1830195534Sscottl for (count = 0; count < timeout; count++) { 1831220777Smav DELAY(10); 1832195534Sscottl if (!(ATA_INL(ch->r_mem, AHCI_P_CI) & (1 << slot->slot))) 1833195534Sscottl break; 1834222304Smav if ((ATA_INL(ch->r_mem, AHCI_P_TFD) & ATA_S_ERROR) && 1835222304Smav softreset != 1) { 1836222285Smav#if 0 1837195534Sscottl device_printf(ch->dev, 1838195534Sscottl "Poll error on slot %d, TFD: %04x\n", 1839195534Sscottl slot->slot, ATA_INL(ch->r_mem, AHCI_P_TFD)); 1840222285Smav#endif 1841195534Sscottl et = AHCI_ERR_TFE; 1842195534Sscottl break; 1843195534Sscottl } 1844198851Smav /* Workaround for ATI SB600/SB700 chipsets. */ 1845198851Smav if (ccb->ccb_h.target_id == 15 && 1846198851Smav pci_get_vendor(device_get_parent(dev)) == 0x1002 && 1847198851Smav (ATA_INL(ch->r_mem, AHCI_P_IS) & AHCI_P_IX_IPM)) { 1848198851Smav et = AHCI_ERR_TIMEOUT; 1849198851Smav break; 1850198851Smav } 1851195534Sscottl } 1852222304Smav 1853222304Smav /* Marvell controllers do not wait for readyness. */ 1854222304Smav if ((ch->quirks & AHCI_Q_NOBSYRES) && softreset == 2 && 1855222304Smav et == AHCI_ERR_NONE) { 1856222304Smav while ((val = fis[2]) & ATA_S_BUSY) { 1857222304Smav DELAY(10); 1858222304Smav if (count++ >= timeout) 1859222304Smav break; 1860222304Smav } 1861222304Smav } 1862222304Smav 1863195534Sscottl if (timeout && (count >= timeout)) { 1864222304Smav device_printf(dev, "Poll timeout on slot %d port %d\n", 1865222304Smav slot->slot, port); 1866203108Smav device_printf(dev, "is %08x cs %08x ss %08x " 1867224498Smav "rs %08x tfd %02x serr %08x cmd %08x\n", 1868203108Smav ATA_INL(ch->r_mem, AHCI_P_IS), 1869203108Smav ATA_INL(ch->r_mem, AHCI_P_CI), 1870203108Smav ATA_INL(ch->r_mem, AHCI_P_SACT), ch->rslots, 1871203108Smav ATA_INL(ch->r_mem, AHCI_P_TFD), 1872224498Smav ATA_INL(ch->r_mem, AHCI_P_SERR), 1873224498Smav ATA_INL(ch->r_mem, AHCI_P_CMD)); 1874195534Sscottl et = AHCI_ERR_TIMEOUT; 1875195534Sscottl } 1876222304Smav 1877203123Smav /* Kick controller into sane state and enable FBS. */ 1878222304Smav if (softreset == 2) 1879222285Smav ch->eslots |= (1 << slot->slot); 1880222285Smav ahci_end_transaction(slot, et); 1881195534Sscottl return; 1882195534Sscottl } 1883195534Sscottl /* Start command execution timeout */ 1884198319Smav callout_reset(&slot->timeout, (int)ccb->ccb_h.timeout * hz / 2000, 1885195534Sscottl (timeout_t*)ahci_timeout, slot); 1886195534Sscottl return; 1887195534Sscottl} 1888195534Sscottl 1889203873Smav/* Must be called with channel locked. */ 1890203873Smavstatic void 1891203873Smavahci_process_timeout(device_t dev) 1892203873Smav{ 1893203873Smav struct ahci_channel *ch = device_get_softc(dev); 1894203873Smav int i; 1895203873Smav 1896203873Smav mtx_assert(&ch->mtx, MA_OWNED); 1897203873Smav /* Handle the rest of commands. */ 1898203873Smav for (i = 0; i < ch->numslots; i++) { 1899203873Smav /* Do we have a running request on slot? */ 1900203873Smav if (ch->slot[i].state < AHCI_SLOT_RUNNING) 1901203873Smav continue; 1902203873Smav ahci_end_transaction(&ch->slot[i], AHCI_ERR_TIMEOUT); 1903203873Smav } 1904203873Smav} 1905203873Smav 1906203873Smav/* Must be called with channel locked. */ 1907203873Smavstatic void 1908203873Smavahci_rearm_timeout(device_t dev) 1909203873Smav{ 1910203873Smav struct ahci_channel *ch = device_get_softc(dev); 1911203873Smav int i; 1912203873Smav 1913203873Smav mtx_assert(&ch->mtx, MA_OWNED); 1914203873Smav for (i = 0; i < ch->numslots; i++) { 1915203873Smav struct ahci_slot *slot = &ch->slot[i]; 1916203873Smav 1917203873Smav /* Do we have a running request on slot? */ 1918203873Smav if (slot->state < AHCI_SLOT_RUNNING) 1919203873Smav continue; 1920203873Smav if ((ch->toslots & (1 << i)) == 0) 1921203873Smav continue; 1922203873Smav callout_reset(&slot->timeout, 1923203873Smav (int)slot->ccb->ccb_h.timeout * hz / 2000, 1924203873Smav (timeout_t*)ahci_timeout, slot); 1925203873Smav } 1926203873Smav} 1927203873Smav 1928195534Sscottl/* Locked by callout mechanism. */ 1929195534Sscottlstatic void 1930195534Sscottlahci_timeout(struct ahci_slot *slot) 1931195534Sscottl{ 1932195534Sscottl device_t dev = slot->dev; 1933195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1934198319Smav uint32_t sstatus; 1935198319Smav int ccs; 1936195534Sscottl int i; 1937195534Sscottl 1938196656Smav /* Check for stale timeout. */ 1939198319Smav if (slot->state < AHCI_SLOT_RUNNING) 1940196656Smav return; 1941196656Smav 1942198319Smav /* Check if slot was not being executed last time we checked. */ 1943198319Smav if (slot->state < AHCI_SLOT_EXECUTING) { 1944198319Smav /* Check if slot started executing. */ 1945198319Smav sstatus = ATA_INL(ch->r_mem, AHCI_P_SACT); 1946198319Smav ccs = (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CCS_MASK) 1947198319Smav >> AHCI_P_CMD_CCS_SHIFT; 1948203123Smav if ((sstatus & (1 << slot->slot)) != 0 || ccs == slot->slot || 1949224498Smav ch->fbs_enabled || ch->wrongccs) 1950198319Smav slot->state = AHCI_SLOT_EXECUTING; 1951224498Smav else if ((ch->rslots & (1 << ccs)) == 0) { 1952224498Smav ch->wrongccs = 1; 1953224498Smav slot->state = AHCI_SLOT_EXECUTING; 1954224498Smav } 1955198319Smav 1956198319Smav callout_reset(&slot->timeout, 1957198319Smav (int)slot->ccb->ccb_h.timeout * hz / 2000, 1958198319Smav (timeout_t*)ahci_timeout, slot); 1959198319Smav return; 1960198319Smav } 1961198319Smav 1962222304Smav device_printf(dev, "Timeout on slot %d port %d\n", 1963222304Smav slot->slot, slot->ccb->ccb_h.target_id & 0x0f); 1964224498Smav device_printf(dev, "is %08x cs %08x ss %08x rs %08x tfd %02x " 1965224498Smav "serr %08x cmd %08x\n", 1966198319Smav ATA_INL(ch->r_mem, AHCI_P_IS), ATA_INL(ch->r_mem, AHCI_P_CI), 1967198319Smav ATA_INL(ch->r_mem, AHCI_P_SACT), ch->rslots, 1968224498Smav ATA_INL(ch->r_mem, AHCI_P_TFD), ATA_INL(ch->r_mem, AHCI_P_SERR), 1969224498Smav ATA_INL(ch->r_mem, AHCI_P_CMD)); 1970195534Sscottl 1971197838Smav /* Handle frozen command. */ 1972195534Sscottl if (ch->frozen) { 1973195534Sscottl union ccb *fccb = ch->frozen; 1974195534Sscottl ch->frozen = NULL; 1975195534Sscottl fccb->ccb_h.status = CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 1976198319Smav if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 1977198319Smav xpt_freeze_devq(fccb->ccb_h.path, 1); 1978198319Smav fccb->ccb_h.status |= CAM_DEV_QFRZN; 1979198319Smav } 1980195534Sscottl xpt_done(fccb); 1981195534Sscottl } 1982224498Smav if (!ch->fbs_enabled && !ch->wrongccs) { 1983203873Smav /* Without FBS we know real timeout source. */ 1984203873Smav ch->fatalerr = 1; 1985203873Smav /* Handle command with timeout. */ 1986203873Smav ahci_end_transaction(&ch->slot[slot->slot], AHCI_ERR_TIMEOUT); 1987203873Smav /* Handle the rest of commands. */ 1988203873Smav for (i = 0; i < ch->numslots; i++) { 1989203873Smav /* Do we have a running request on slot? */ 1990203873Smav if (ch->slot[i].state < AHCI_SLOT_RUNNING) 1991203873Smav continue; 1992203873Smav ahci_end_transaction(&ch->slot[i], AHCI_ERR_INNOCENT); 1993203873Smav } 1994203873Smav } else { 1995203873Smav /* With FBS we wait for other commands timeout and pray. */ 1996203873Smav if (ch->toslots == 0) 1997203873Smav xpt_freeze_simq(ch->sim, 1); 1998203873Smav ch->toslots |= (1 << slot->slot); 1999203873Smav if ((ch->rslots & ~ch->toslots) == 0) 2000203873Smav ahci_process_timeout(dev); 2001203873Smav else 2002203873Smav device_printf(dev, " ... waiting for slots %08x\n", 2003203873Smav ch->rslots & ~ch->toslots); 2004195534Sscottl } 2005195534Sscottl} 2006195534Sscottl 2007195534Sscottl/* Must be called with channel locked. */ 2008195534Sscottlstatic void 2009195534Sscottlahci_end_transaction(struct ahci_slot *slot, enum ahci_err_type et) 2010195534Sscottl{ 2011195534Sscottl device_t dev = slot->dev; 2012195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2013195534Sscottl union ccb *ccb = slot->ccb; 2014214988Smav struct ahci_cmd_list *clp; 2015212732Smav int lastto; 2016222304Smav uint32_t sig; 2017195534Sscottl 2018195534Sscottl bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 2019214988Smav BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 2020214988Smav clp = (struct ahci_cmd_list *) 2021214988Smav (ch->dma.work + AHCI_CL_OFFSET + (AHCI_CL_SIZE * slot->slot)); 2022195534Sscottl /* Read result registers to the result struct 2023195534Sscottl * May be incorrect if several commands finished same time, 2024195534Sscottl * so read only when sure or have to. 2025195534Sscottl */ 2026195534Sscottl if (ccb->ccb_h.func_code == XPT_ATA_IO) { 2027195534Sscottl struct ata_res *res = &ccb->ataio.res; 2028195534Sscottl 2029195534Sscottl if ((et == AHCI_ERR_TFE) || 2030195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_NEEDRESULT)) { 2031195534Sscottl u_int8_t *fis = ch->dma.rfis + 0x40; 2032195534Sscottl 2033195534Sscottl bus_dmamap_sync(ch->dma.rfis_tag, ch->dma.rfis_map, 2034195534Sscottl BUS_DMASYNC_POSTREAD); 2035203123Smav if (ch->fbs_enabled) { 2036203123Smav fis += ccb->ccb_h.target_id * 256; 2037203123Smav res->status = fis[2]; 2038203123Smav res->error = fis[3]; 2039203123Smav } else { 2040203123Smav uint16_t tfd = ATA_INL(ch->r_mem, AHCI_P_TFD); 2041203123Smav 2042203123Smav res->status = tfd; 2043203123Smav res->error = tfd >> 8; 2044203123Smav } 2045195534Sscottl res->lba_low = fis[4]; 2046195534Sscottl res->lba_mid = fis[5]; 2047195534Sscottl res->lba_high = fis[6]; 2048195534Sscottl res->device = fis[7]; 2049195534Sscottl res->lba_low_exp = fis[8]; 2050195534Sscottl res->lba_mid_exp = fis[9]; 2051195534Sscottl res->lba_high_exp = fis[10]; 2052195534Sscottl res->sector_count = fis[12]; 2053195534Sscottl res->sector_count_exp = fis[13]; 2054222304Smav 2055222304Smav /* 2056222304Smav * Some weird controllers do not return signature in 2057222304Smav * FIS receive area. Read it from PxSIG register. 2058222304Smav */ 2059222304Smav if ((ch->quirks & AHCI_Q_ALTSIG) && 2060222304Smav (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) && 2061222304Smav (ccb->ataio.cmd.control & ATA_A_RESET) == 0) { 2062222304Smav sig = ATA_INL(ch->r_mem, AHCI_P_SIG); 2063222304Smav res->lba_high = sig >> 24; 2064222304Smav res->lba_mid = sig >> 16; 2065222304Smav res->lba_low = sig >> 8; 2066222304Smav res->sector_count = sig; 2067222304Smav } 2068195534Sscottl } else 2069195534Sscottl bzero(res, sizeof(*res)); 2070214988Smav if ((ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) == 0 && 2071218596Smav (ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 2072218596Smav (ch->quirks & AHCI_Q_NOCOUNT) == 0) { 2073214988Smav ccb->ataio.resid = 2074214988Smav ccb->ataio.dxfer_len - le32toh(clp->bytecount); 2075214988Smav } 2076214988Smav } else { 2077218596Smav if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 2078218596Smav (ch->quirks & AHCI_Q_NOCOUNT) == 0) { 2079214988Smav ccb->csio.resid = 2080214988Smav ccb->csio.dxfer_len - le32toh(clp->bytecount); 2081214988Smav } 2082195534Sscottl } 2083195534Sscottl if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 2084195534Sscottl bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 2085195534Sscottl (ccb->ccb_h.flags & CAM_DIR_IN) ? 2086195534Sscottl BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 2087195534Sscottl bus_dmamap_unload(ch->dma.data_tag, slot->dma.data_map); 2088195534Sscottl } 2089203123Smav if (et != AHCI_ERR_NONE) 2090203123Smav ch->eslots |= (1 << slot->slot); 2091198319Smav /* In case of error, freeze device for proper recovery. */ 2092220565Smav if ((et != AHCI_ERR_NONE) && (!ch->recoverycmd) && 2093198319Smav !(ccb->ccb_h.status & CAM_DEV_QFRZN)) { 2094198319Smav xpt_freeze_devq(ccb->ccb_h.path, 1); 2095198319Smav ccb->ccb_h.status |= CAM_DEV_QFRZN; 2096198319Smav } 2097195534Sscottl /* Set proper result status. */ 2098195534Sscottl ccb->ccb_h.status &= ~CAM_STATUS_MASK; 2099195534Sscottl switch (et) { 2100195534Sscottl case AHCI_ERR_NONE: 2101195534Sscottl ccb->ccb_h.status |= CAM_REQ_CMP; 2102195534Sscottl if (ccb->ccb_h.func_code == XPT_SCSI_IO) 2103195534Sscottl ccb->csio.scsi_status = SCSI_STATUS_OK; 2104195534Sscottl break; 2105195534Sscottl case AHCI_ERR_INVALID: 2106198851Smav ch->fatalerr = 1; 2107195534Sscottl ccb->ccb_h.status |= CAM_REQ_INVALID; 2108195534Sscottl break; 2109195534Sscottl case AHCI_ERR_INNOCENT: 2110195534Sscottl ccb->ccb_h.status |= CAM_REQUEUE_REQ; 2111195534Sscottl break; 2112195534Sscottl case AHCI_ERR_TFE: 2113198319Smav case AHCI_ERR_NCQ: 2114195534Sscottl if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 2115195534Sscottl ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR; 2116195534Sscottl ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 2117195534Sscottl } else { 2118195534Sscottl ccb->ccb_h.status |= CAM_ATA_STATUS_ERROR; 2119195534Sscottl } 2120195534Sscottl break; 2121195534Sscottl case AHCI_ERR_SATA: 2122198851Smav ch->fatalerr = 1; 2123220565Smav if (!ch->recoverycmd) { 2124198319Smav xpt_freeze_simq(ch->sim, 1); 2125198319Smav ccb->ccb_h.status &= ~CAM_STATUS_MASK; 2126198319Smav ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 2127198319Smav } 2128198319Smav ccb->ccb_h.status |= CAM_UNCOR_PARITY; 2129195534Sscottl break; 2130195534Sscottl case AHCI_ERR_TIMEOUT: 2131220565Smav if (!ch->recoverycmd) { 2132198319Smav xpt_freeze_simq(ch->sim, 1); 2133198319Smav ccb->ccb_h.status &= ~CAM_STATUS_MASK; 2134198319Smav ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 2135198319Smav } 2136195534Sscottl ccb->ccb_h.status |= CAM_CMD_TIMEOUT; 2137195534Sscottl break; 2138195534Sscottl default: 2139198851Smav ch->fatalerr = 1; 2140195534Sscottl ccb->ccb_h.status |= CAM_REQ_CMP_ERR; 2141195534Sscottl } 2142195534Sscottl /* Free slot. */ 2143199747Smav ch->oslots &= ~(1 << slot->slot); 2144195534Sscottl ch->rslots &= ~(1 << slot->slot); 2145195534Sscottl ch->aslots &= ~(1 << slot->slot); 2146195534Sscottl slot->state = AHCI_SLOT_EMPTY; 2147195534Sscottl slot->ccb = NULL; 2148195534Sscottl /* Update channel stats. */ 2149195534Sscottl ch->numrslots--; 2150203123Smav ch->numrslotspd[ccb->ccb_h.target_id]--; 2151195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 2152195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 2153195534Sscottl ch->numtslots--; 2154203123Smav ch->numtslotspd[ccb->ccb_h.target_id]--; 2155195534Sscottl } 2156212732Smav /* Cancel timeout state if request completed normally. */ 2157212732Smav if (et != AHCI_ERR_TIMEOUT) { 2158212732Smav lastto = (ch->toslots == (1 << slot->slot)); 2159212732Smav ch->toslots &= ~(1 << slot->slot); 2160212732Smav if (lastto) 2161212732Smav xpt_release_simq(ch->sim, TRUE); 2162212732Smav } 2163195534Sscottl /* If it was first request of reset sequence and there is no error, 2164195534Sscottl * proceed to second request. */ 2165195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 2166195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) && 2167195534Sscottl (ccb->ataio.cmd.control & ATA_A_RESET) && 2168195534Sscottl et == AHCI_ERR_NONE) { 2169195534Sscottl ccb->ataio.cmd.control &= ~ATA_A_RESET; 2170195534Sscottl ahci_begin_transaction(dev, ccb); 2171195534Sscottl return; 2172195534Sscottl } 2173198851Smav /* If it was our READ LOG command - process it. */ 2174220565Smav if (ccb->ccb_h.recovery_type == RECOVERY_READ_LOG) { 2175198851Smav ahci_process_read_log(dev, ccb); 2176220565Smav /* If it was our REQUEST SENSE command - process it. */ 2177220565Smav } else if (ccb->ccb_h.recovery_type == RECOVERY_REQUEST_SENSE) { 2178220565Smav ahci_process_request_sense(dev, ccb); 2179220565Smav /* If it was NCQ or ATAPI command error, put result on hold. */ 2180220565Smav } else if (et == AHCI_ERR_NCQ || 2181220565Smav ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_SCSI_STATUS_ERROR && 2182220565Smav (ccb->ccb_h.flags & CAM_DIS_AUTOSENSE) == 0)) { 2183195534Sscottl ch->hold[slot->slot] = ccb; 2184203123Smav ch->numhslots++; 2185198851Smav } else 2186195534Sscottl xpt_done(ccb); 2187198851Smav /* If we have no other active commands, ... */ 2188198851Smav if (ch->rslots == 0) { 2189198851Smav /* if there was fatal error - reset port. */ 2190203873Smav if (ch->toslots != 0 || ch->fatalerr) { 2191198851Smav ahci_reset(dev); 2192203123Smav } else { 2193203123Smav /* if we have slots in error, we can reinit port. */ 2194203123Smav if (ch->eslots != 0) { 2195203123Smav ahci_stop(dev); 2196222285Smav ahci_clo(dev); 2197203123Smav ahci_start(dev, 1); 2198203123Smav } 2199203123Smav /* if there commands on hold, we can do READ LOG. */ 2200220565Smav if (!ch->recoverycmd && ch->numhslots) 2201220565Smav ahci_issue_recovery(dev); 2202198851Smav } 2203203873Smav /* If all the rest of commands are in timeout - give them chance. */ 2204203873Smav } else if ((ch->rslots & ~ch->toslots) == 0 && 2205203873Smav et != AHCI_ERR_TIMEOUT) 2206203873Smav ahci_rearm_timeout(dev); 2207222285Smav /* Unfreeze frozen command. */ 2208222285Smav if (ch->frozen && !ahci_check_collision(dev, ch->frozen)) { 2209222285Smav union ccb *fccb = ch->frozen; 2210222285Smav ch->frozen = NULL; 2211222285Smav ahci_begin_transaction(dev, fccb); 2212222285Smav xpt_release_simq(ch->sim, TRUE); 2213222285Smav } 2214196656Smav /* Start PM timer. */ 2215207499Smav if (ch->numrslots == 0 && ch->pm_level > 3 && 2216207499Smav (ch->curr[ch->pm_present ? 15 : 0].caps & CTS_SATA_CAPS_D_PMREQ)) { 2217196656Smav callout_schedule(&ch->pm_timer, 2218196656Smav (ch->pm_level == 4) ? hz / 1000 : hz / 8); 2219196656Smav } 2220195534Sscottl} 2221195534Sscottl 2222195534Sscottlstatic void 2223220565Smavahci_issue_recovery(device_t dev) 2224195534Sscottl{ 2225195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2226195534Sscottl union ccb *ccb; 2227195534Sscottl struct ccb_ataio *ataio; 2228220565Smav struct ccb_scsiio *csio; 2229195534Sscottl int i; 2230195534Sscottl 2231220830Smav /* Find some held command. */ 2232195534Sscottl for (i = 0; i < ch->numslots; i++) { 2233195534Sscottl if (ch->hold[i]) 2234195534Sscottl break; 2235195534Sscottl } 2236195534Sscottl ccb = xpt_alloc_ccb_nowait(); 2237195534Sscottl if (ccb == NULL) { 2238220830Smav device_printf(dev, "Unable to allocate recovery command\n"); 2239220822Smavcompleteall: 2240220830Smav /* We can't do anything -- complete held commands. */ 2241220822Smav for (i = 0; i < ch->numslots; i++) { 2242220822Smav if (ch->hold[i] == NULL) 2243220822Smav continue; 2244220822Smav ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 2245220822Smav ch->hold[i]->ccb_h.status |= CAM_RESRC_UNAVAIL; 2246220822Smav xpt_done(ch->hold[i]); 2247220822Smav ch->hold[i] = NULL; 2248220822Smav ch->numhslots--; 2249220822Smav } 2250220822Smav ahci_reset(dev); 2251220822Smav return; 2252195534Sscottl } 2253195534Sscottl ccb->ccb_h = ch->hold[i]->ccb_h; /* Reuse old header. */ 2254220565Smav if (ccb->ccb_h.func_code == XPT_ATA_IO) { 2255220565Smav /* READ LOG */ 2256220565Smav ccb->ccb_h.recovery_type = RECOVERY_READ_LOG; 2257220565Smav ccb->ccb_h.func_code = XPT_ATA_IO; 2258220565Smav ccb->ccb_h.flags = CAM_DIR_IN; 2259220565Smav ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ 2260220565Smav ataio = &ccb->ataio; 2261220565Smav ataio->data_ptr = malloc(512, M_AHCI, M_NOWAIT); 2262220565Smav if (ataio->data_ptr == NULL) { 2263220565Smav xpt_free_ccb(ccb); 2264220822Smav device_printf(dev, 2265220830Smav "Unable to allocate memory for READ LOG command\n"); 2266220822Smav goto completeall; 2267220565Smav } 2268220565Smav ataio->dxfer_len = 512; 2269220565Smav bzero(&ataio->cmd, sizeof(ataio->cmd)); 2270220565Smav ataio->cmd.flags = CAM_ATAIO_48BIT; 2271220565Smav ataio->cmd.command = 0x2F; /* READ LOG EXT */ 2272220565Smav ataio->cmd.sector_count = 1; 2273220565Smav ataio->cmd.sector_count_exp = 0; 2274220565Smav ataio->cmd.lba_low = 0x10; 2275220565Smav ataio->cmd.lba_mid = 0; 2276220565Smav ataio->cmd.lba_mid_exp = 0; 2277220565Smav } else { 2278220565Smav /* REQUEST SENSE */ 2279220565Smav ccb->ccb_h.recovery_type = RECOVERY_REQUEST_SENSE; 2280220565Smav ccb->ccb_h.recovery_slot = i; 2281220565Smav ccb->ccb_h.func_code = XPT_SCSI_IO; 2282220565Smav ccb->ccb_h.flags = CAM_DIR_IN; 2283220565Smav ccb->ccb_h.status = 0; 2284220565Smav ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ 2285220565Smav csio = &ccb->csio; 2286220565Smav csio->data_ptr = (void *)&ch->hold[i]->csio.sense_data; 2287220565Smav csio->dxfer_len = ch->hold[i]->csio.sense_len; 2288220565Smav csio->cdb_len = 6; 2289220565Smav bzero(&csio->cdb_io, sizeof(csio->cdb_io)); 2290220565Smav csio->cdb_io.cdb_bytes[0] = 0x03; 2291220565Smav csio->cdb_io.cdb_bytes[4] = csio->dxfer_len; 2292195534Sscottl } 2293220565Smav /* Freeze SIM while doing recovery. */ 2294220822Smav ch->recoverycmd = 1; 2295198319Smav xpt_freeze_simq(ch->sim, 1); 2296195534Sscottl ahci_begin_transaction(dev, ccb); 2297195534Sscottl} 2298195534Sscottl 2299195534Sscottlstatic void 2300195534Sscottlahci_process_read_log(device_t dev, union ccb *ccb) 2301195534Sscottl{ 2302195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2303195534Sscottl uint8_t *data; 2304195534Sscottl struct ata_res *res; 2305195534Sscottl int i; 2306195534Sscottl 2307220565Smav ch->recoverycmd = 0; 2308195534Sscottl 2309195534Sscottl data = ccb->ataio.data_ptr; 2310195534Sscottl if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP && 2311195534Sscottl (data[0] & 0x80) == 0) { 2312195534Sscottl for (i = 0; i < ch->numslots; i++) { 2313195534Sscottl if (!ch->hold[i]) 2314195534Sscottl continue; 2315220565Smav if (ch->hold[i]->ccb_h.func_code != XPT_ATA_IO) 2316220565Smav continue; 2317195534Sscottl if ((data[0] & 0x1F) == i) { 2318195534Sscottl res = &ch->hold[i]->ataio.res; 2319195534Sscottl res->status = data[2]; 2320195534Sscottl res->error = data[3]; 2321195534Sscottl res->lba_low = data[4]; 2322195534Sscottl res->lba_mid = data[5]; 2323195534Sscottl res->lba_high = data[6]; 2324195534Sscottl res->device = data[7]; 2325195534Sscottl res->lba_low_exp = data[8]; 2326195534Sscottl res->lba_mid_exp = data[9]; 2327195534Sscottl res->lba_high_exp = data[10]; 2328195534Sscottl res->sector_count = data[12]; 2329195534Sscottl res->sector_count_exp = data[13]; 2330195534Sscottl } else { 2331195534Sscottl ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 2332195534Sscottl ch->hold[i]->ccb_h.status |= CAM_REQUEUE_REQ; 2333195534Sscottl } 2334195534Sscottl xpt_done(ch->hold[i]); 2335195534Sscottl ch->hold[i] = NULL; 2336203123Smav ch->numhslots--; 2337195534Sscottl } 2338195534Sscottl } else { 2339195534Sscottl if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) 2340195534Sscottl device_printf(dev, "Error while READ LOG EXT\n"); 2341195534Sscottl else if ((data[0] & 0x80) == 0) { 2342195534Sscottl device_printf(dev, "Non-queued command error in READ LOG EXT\n"); 2343195534Sscottl } 2344195534Sscottl for (i = 0; i < ch->numslots; i++) { 2345195534Sscottl if (!ch->hold[i]) 2346195534Sscottl continue; 2347220565Smav if (ch->hold[i]->ccb_h.func_code != XPT_ATA_IO) 2348220565Smav continue; 2349195534Sscottl xpt_done(ch->hold[i]); 2350195534Sscottl ch->hold[i] = NULL; 2351203123Smav ch->numhslots--; 2352195534Sscottl } 2353195534Sscottl } 2354195534Sscottl free(ccb->ataio.data_ptr, M_AHCI); 2355195534Sscottl xpt_free_ccb(ccb); 2356198319Smav xpt_release_simq(ch->sim, TRUE); 2357195534Sscottl} 2358195534Sscottl 2359195534Sscottlstatic void 2360220565Smavahci_process_request_sense(device_t dev, union ccb *ccb) 2361220565Smav{ 2362220565Smav struct ahci_channel *ch = device_get_softc(dev); 2363220565Smav int i; 2364220565Smav 2365220565Smav ch->recoverycmd = 0; 2366220565Smav 2367220565Smav i = ccb->ccb_h.recovery_slot; 2368220565Smav if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP) { 2369220565Smav ch->hold[i]->ccb_h.status |= CAM_AUTOSNS_VALID; 2370220565Smav } else { 2371220565Smav ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 2372220565Smav ch->hold[i]->ccb_h.status |= CAM_AUTOSENSE_FAIL; 2373220565Smav } 2374220565Smav xpt_done(ch->hold[i]); 2375220565Smav ch->hold[i] = NULL; 2376220565Smav ch->numhslots--; 2377220565Smav xpt_free_ccb(ccb); 2378220565Smav xpt_release_simq(ch->sim, TRUE); 2379220565Smav} 2380220565Smav 2381220565Smavstatic void 2382203123Smavahci_start(device_t dev, int fbs) 2383195534Sscottl{ 2384195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2385195534Sscottl u_int32_t cmd; 2386195534Sscottl 2387195534Sscottl /* Clear SATA error register */ 2388195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SERR, 0xFFFFFFFF); 2389195534Sscottl /* Clear any interrupts pending on this channel */ 2390195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IS, 0xFFFFFFFF); 2391203123Smav /* Configure FIS-based switching if supported. */ 2392203123Smav if (ch->chcaps & AHCI_P_CMD_FBSCP) { 2393203123Smav ch->fbs_enabled = (fbs && ch->pm_present) ? 1 : 0; 2394203123Smav ATA_OUTL(ch->r_mem, AHCI_P_FBS, 2395203123Smav ch->fbs_enabled ? AHCI_P_FBS_EN : 0); 2396203123Smav } 2397195534Sscottl /* Start operations on this channel */ 2398195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 2399207430Smav cmd &= ~AHCI_P_CMD_PMA; 2400195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd | AHCI_P_CMD_ST | 2401195534Sscottl (ch->pm_present ? AHCI_P_CMD_PMA : 0)); 2402195534Sscottl} 2403195534Sscottl 2404195534Sscottlstatic void 2405195534Sscottlahci_stop(device_t dev) 2406195534Sscottl{ 2407195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2408195534Sscottl u_int32_t cmd; 2409195534Sscottl int timeout; 2410195534Sscottl 2411195534Sscottl /* Kill all activity on this channel */ 2412195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 2413195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd & ~AHCI_P_CMD_ST); 2414195534Sscottl /* Wait for activity stop. */ 2415195534Sscottl timeout = 0; 2416195534Sscottl do { 2417220777Smav DELAY(10); 2418220777Smav if (timeout++ > 50000) { 2419195534Sscottl device_printf(dev, "stopping AHCI engine failed\n"); 2420195534Sscottl break; 2421195534Sscottl } 2422195534Sscottl } while (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CR); 2423203123Smav ch->eslots = 0; 2424195534Sscottl} 2425195534Sscottl 2426195534Sscottlstatic void 2427195534Sscottlahci_clo(device_t dev) 2428195534Sscottl{ 2429195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2430195534Sscottl u_int32_t cmd; 2431195534Sscottl int timeout; 2432195534Sscottl 2433195534Sscottl /* Issue Command List Override if supported */ 2434195534Sscottl if (ch->caps & AHCI_CAP_SCLO) { 2435195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 2436195534Sscottl cmd |= AHCI_P_CMD_CLO; 2437195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd); 2438195534Sscottl timeout = 0; 2439195534Sscottl do { 2440220777Smav DELAY(10); 2441220777Smav if (timeout++ > 50000) { 2442195534Sscottl device_printf(dev, "executing CLO failed\n"); 2443195534Sscottl break; 2444195534Sscottl } 2445195534Sscottl } while (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CLO); 2446195534Sscottl } 2447195534Sscottl} 2448195534Sscottl 2449195534Sscottlstatic void 2450195534Sscottlahci_stop_fr(device_t dev) 2451195534Sscottl{ 2452195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2453195534Sscottl u_int32_t cmd; 2454195534Sscottl int timeout; 2455195534Sscottl 2456195534Sscottl /* Kill all FIS reception on this channel */ 2457195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 2458195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd & ~AHCI_P_CMD_FRE); 2459195534Sscottl /* Wait for FIS reception stop. */ 2460195534Sscottl timeout = 0; 2461195534Sscottl do { 2462220777Smav DELAY(10); 2463220777Smav if (timeout++ > 50000) { 2464195534Sscottl device_printf(dev, "stopping AHCI FR engine failed\n"); 2465195534Sscottl break; 2466195534Sscottl } 2467195534Sscottl } while (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_FR); 2468195534Sscottl} 2469195534Sscottl 2470195534Sscottlstatic void 2471195534Sscottlahci_start_fr(device_t dev) 2472195534Sscottl{ 2473195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2474195534Sscottl u_int32_t cmd; 2475195534Sscottl 2476195534Sscottl /* Start FIS reception on this channel */ 2477195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 2478195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd | AHCI_P_CMD_FRE); 2479195534Sscottl} 2480195534Sscottl 2481195534Sscottlstatic int 2482220576Smavahci_wait_ready(device_t dev, int t, int t0) 2483195534Sscottl{ 2484195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2485195534Sscottl int timeout = 0; 2486195534Sscottl uint32_t val; 2487195534Sscottl 2488195534Sscottl while ((val = ATA_INL(ch->r_mem, AHCI_P_TFD)) & 2489195534Sscottl (ATA_S_BUSY | ATA_S_DRQ)) { 2490220576Smav if (timeout > t) { 2491220576Smav if (t != 0) { 2492220576Smav device_printf(dev, 2493220576Smav "AHCI reset: device not ready after %dms " 2494220576Smav "(tfd = %08x)\n", 2495220576Smav MAX(t, 0) + t0, val); 2496220576Smav } 2497195534Sscottl return (EBUSY); 2498195534Sscottl } 2499220576Smav DELAY(1000); 2500220576Smav timeout++; 2501220576Smav } 2502195534Sscottl if (bootverbose) 2503220576Smav device_printf(dev, "AHCI reset: device ready after %dms\n", 2504220576Smav timeout + t0); 2505195534Sscottl return (0); 2506195534Sscottl} 2507195534Sscottl 2508195534Sscottlstatic void 2509220576Smavahci_reset_to(void *arg) 2510220576Smav{ 2511220576Smav device_t dev = arg; 2512220576Smav struct ahci_channel *ch = device_get_softc(dev); 2513220576Smav 2514220576Smav if (ch->resetting == 0) 2515220576Smav return; 2516220576Smav ch->resetting--; 2517220576Smav if (ahci_wait_ready(dev, ch->resetting == 0 ? -1 : 0, 2518220576Smav (310 - ch->resetting) * 100) == 0) { 2519220576Smav ch->resetting = 0; 2520220777Smav ahci_start(dev, 1); 2521220576Smav xpt_release_simq(ch->sim, TRUE); 2522220576Smav return; 2523220576Smav } 2524220576Smav if (ch->resetting == 0) { 2525220576Smav ahci_clo(dev); 2526220576Smav ahci_start(dev, 1); 2527220576Smav xpt_release_simq(ch->sim, TRUE); 2528220576Smav return; 2529220576Smav } 2530220576Smav callout_schedule(&ch->reset_timer, hz / 10); 2531220576Smav} 2532220576Smav 2533220576Smavstatic void 2534195534Sscottlahci_reset(device_t dev) 2535195534Sscottl{ 2536195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2537196656Smav struct ahci_controller *ctlr = device_get_softc(device_get_parent(dev)); 2538195534Sscottl int i; 2539195534Sscottl 2540203108Smav xpt_freeze_simq(ch->sim, 1); 2541195534Sscottl if (bootverbose) 2542195534Sscottl device_printf(dev, "AHCI reset...\n"); 2543220576Smav /* Forget about previous reset. */ 2544220576Smav if (ch->resetting) { 2545220576Smav ch->resetting = 0; 2546220576Smav callout_stop(&ch->reset_timer); 2547220576Smav xpt_release_simq(ch->sim, TRUE); 2548220576Smav } 2549195534Sscottl /* Requeue freezed command. */ 2550195534Sscottl if (ch->frozen) { 2551195534Sscottl union ccb *fccb = ch->frozen; 2552195534Sscottl ch->frozen = NULL; 2553195534Sscottl fccb->ccb_h.status = CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 2554198319Smav if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 2555198319Smav xpt_freeze_devq(fccb->ccb_h.path, 1); 2556198319Smav fccb->ccb_h.status |= CAM_DEV_QFRZN; 2557198319Smav } 2558195534Sscottl xpt_done(fccb); 2559195534Sscottl } 2560195534Sscottl /* Kill the engine and requeue all running commands. */ 2561195534Sscottl ahci_stop(dev); 2562195534Sscottl for (i = 0; i < ch->numslots; i++) { 2563195534Sscottl /* Do we have a running request on slot? */ 2564195534Sscottl if (ch->slot[i].state < AHCI_SLOT_RUNNING) 2565195534Sscottl continue; 2566195534Sscottl /* XXX; Commands in loading state. */ 2567195534Sscottl ahci_end_transaction(&ch->slot[i], AHCI_ERR_INNOCENT); 2568195534Sscottl } 2569198851Smav for (i = 0; i < ch->numslots; i++) { 2570198851Smav if (!ch->hold[i]) 2571198851Smav continue; 2572198851Smav xpt_done(ch->hold[i]); 2573198851Smav ch->hold[i] = NULL; 2574203123Smav ch->numhslots--; 2575198851Smav } 2576203873Smav if (ch->toslots != 0) 2577203873Smav xpt_release_simq(ch->sim, TRUE); 2578203123Smav ch->eslots = 0; 2579203873Smav ch->toslots = 0; 2580224498Smav ch->wrongccs = 0; 2581198851Smav ch->fatalerr = 0; 2582198319Smav /* Tell the XPT about the event */ 2583198319Smav xpt_async(AC_BUS_RESET, ch->path, NULL); 2584195534Sscottl /* Disable port interrupts */ 2585195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 0); 2586195534Sscottl /* Reset and reconnect PHY, */ 2587203108Smav if (!ahci_sata_phy_reset(dev)) { 2588195534Sscottl if (bootverbose) 2589195534Sscottl device_printf(dev, 2590220576Smav "AHCI reset: device not found\n"); 2591195534Sscottl ch->devices = 0; 2592195534Sscottl /* Enable wanted port interrupts */ 2593195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 2594220657Smav (((ch->pm_level != 0) ? AHCI_P_IX_CPD | AHCI_P_IX_MP : 0) | 2595220657Smav AHCI_P_IX_PRC | AHCI_P_IX_PC)); 2596203108Smav xpt_release_simq(ch->sim, TRUE); 2597195534Sscottl return; 2598195534Sscottl } 2599220576Smav if (bootverbose) 2600220576Smav device_printf(dev, "AHCI reset: device found\n"); 2601195534Sscottl /* Wait for clearing busy status. */ 2602220576Smav if (ahci_wait_ready(dev, dumping ? 31000 : 0, 0)) { 2603220576Smav if (dumping) 2604220576Smav ahci_clo(dev); 2605220576Smav else 2606220576Smav ch->resetting = 310; 2607220576Smav } 2608195534Sscottl ch->devices = 1; 2609195534Sscottl /* Enable wanted port interrupts */ 2610195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 2611220657Smav (((ch->pm_level != 0) ? AHCI_P_IX_CPD | AHCI_P_IX_MP : 0) | 2612220657Smav AHCI_P_IX_TFE | AHCI_P_IX_HBF | 2613195534Sscottl AHCI_P_IX_HBD | AHCI_P_IX_IF | AHCI_P_IX_OF | 2614220657Smav ((ch->pm_level == 0) ? AHCI_P_IX_PRC : 0) | AHCI_P_IX_PC | 2615196656Smav AHCI_P_IX_DP | AHCI_P_IX_UF | (ctlr->ccc ? 0 : AHCI_P_IX_SDB) | 2616196656Smav AHCI_P_IX_DS | AHCI_P_IX_PS | (ctlr->ccc ? 0 : AHCI_P_IX_DHR))); 2617220576Smav if (ch->resetting) 2618220576Smav callout_reset(&ch->reset_timer, hz / 10, ahci_reset_to, dev); 2619220777Smav else { 2620220777Smav ahci_start(dev, 1); 2621220576Smav xpt_release_simq(ch->sim, TRUE); 2622220777Smav } 2623195534Sscottl} 2624195534Sscottl 2625195534Sscottlstatic int 2626199821Smavahci_setup_fis(device_t dev, struct ahci_cmd_tab *ctp, union ccb *ccb, int tag) 2627195534Sscottl{ 2628199821Smav struct ahci_channel *ch = device_get_softc(dev); 2629195534Sscottl u_int8_t *fis = &ctp->cfis[0]; 2630195534Sscottl 2631248687Smav bzero(ctp->cfis, 16); 2632195534Sscottl fis[0] = 0x27; /* host to device */ 2633195534Sscottl fis[1] = (ccb->ccb_h.target_id & 0x0f); 2634195534Sscottl if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 2635195534Sscottl fis[1] |= 0x80; 2636195534Sscottl fis[2] = ATA_PACKET_CMD; 2637199821Smav if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 2638199821Smav ch->curr[ccb->ccb_h.target_id].mode >= ATA_DMA) 2639195534Sscottl fis[3] = ATA_F_DMA; 2640195534Sscottl else { 2641195534Sscottl fis[5] = ccb->csio.dxfer_len; 2642195534Sscottl fis[6] = ccb->csio.dxfer_len >> 8; 2643195534Sscottl } 2644195534Sscottl fis[7] = ATA_D_LBA; 2645195534Sscottl fis[15] = ATA_A_4BIT; 2646195534Sscottl bcopy((ccb->ccb_h.flags & CAM_CDB_POINTER) ? 2647195534Sscottl ccb->csio.cdb_io.cdb_ptr : ccb->csio.cdb_io.cdb_bytes, 2648195534Sscottl ctp->acmd, ccb->csio.cdb_len); 2649248687Smav bzero(ctp->acmd + ccb->csio.cdb_len, 32 - ccb->csio.cdb_len); 2650195534Sscottl } else if ((ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) == 0) { 2651195534Sscottl fis[1] |= 0x80; 2652195534Sscottl fis[2] = ccb->ataio.cmd.command; 2653195534Sscottl fis[3] = ccb->ataio.cmd.features; 2654195534Sscottl fis[4] = ccb->ataio.cmd.lba_low; 2655195534Sscottl fis[5] = ccb->ataio.cmd.lba_mid; 2656195534Sscottl fis[6] = ccb->ataio.cmd.lba_high; 2657195534Sscottl fis[7] = ccb->ataio.cmd.device; 2658195534Sscottl fis[8] = ccb->ataio.cmd.lba_low_exp; 2659195534Sscottl fis[9] = ccb->ataio.cmd.lba_mid_exp; 2660195534Sscottl fis[10] = ccb->ataio.cmd.lba_high_exp; 2661195534Sscottl fis[11] = ccb->ataio.cmd.features_exp; 2662195534Sscottl if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { 2663195534Sscottl fis[12] = tag << 3; 2664195534Sscottl fis[13] = 0; 2665195534Sscottl } else { 2666195534Sscottl fis[12] = ccb->ataio.cmd.sector_count; 2667195534Sscottl fis[13] = ccb->ataio.cmd.sector_count_exp; 2668195534Sscottl } 2669195534Sscottl fis[15] = ATA_A_4BIT; 2670195534Sscottl } else { 2671195534Sscottl fis[15] = ccb->ataio.cmd.control; 2672195534Sscottl } 2673195534Sscottl return (20); 2674195534Sscottl} 2675195534Sscottl 2676195534Sscottlstatic int 2677195534Sscottlahci_sata_connect(struct ahci_channel *ch) 2678195534Sscottl{ 2679195534Sscottl u_int32_t status; 2680220829Smav int timeout, found = 0; 2681195534Sscottl 2682195534Sscottl /* Wait up to 100ms for "connect well" */ 2683220777Smav for (timeout = 0; timeout < 1000 ; timeout++) { 2684195534Sscottl status = ATA_INL(ch->r_mem, AHCI_P_SSTS); 2685220829Smav if ((status & ATA_SS_DET_MASK) != ATA_SS_DET_NO_DEVICE) 2686220829Smav found = 1; 2687195534Sscottl if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 2688195534Sscottl ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 2689195534Sscottl ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) 2690195534Sscottl break; 2691196656Smav if ((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_OFFLINE) { 2692196656Smav if (bootverbose) { 2693196656Smav device_printf(ch->dev, "SATA offline status=%08x\n", 2694196656Smav status); 2695196656Smav } 2696196656Smav return (0); 2697196656Smav } 2698220829Smav if (found == 0 && timeout >= 100) 2699220829Smav break; 2700220777Smav DELAY(100); 2701195534Sscottl } 2702220829Smav if (timeout >= 1000 || !found) { 2703195534Sscottl if (bootverbose) { 2704220829Smav device_printf(ch->dev, 2705220829Smav "SATA connect timeout time=%dus status=%08x\n", 2706220829Smav timeout * 100, status); 2707195534Sscottl } 2708195534Sscottl return (0); 2709195534Sscottl } 2710195534Sscottl if (bootverbose) { 2711220777Smav device_printf(ch->dev, "SATA connect time=%dus status=%08x\n", 2712220777Smav timeout * 100, status); 2713195534Sscottl } 2714195534Sscottl /* Clear SATA error register */ 2715195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SERR, 0xffffffff); 2716195534Sscottl return (1); 2717195534Sscottl} 2718195534Sscottl 2719195534Sscottlstatic int 2720203108Smavahci_sata_phy_reset(device_t dev) 2721195534Sscottl{ 2722195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2723199821Smav int sata_rev; 2724195534Sscottl uint32_t val; 2725195534Sscottl 2726220657Smav if (ch->listening) { 2727220657Smav val = ATA_INL(ch->r_mem, AHCI_P_CMD); 2728220657Smav val |= AHCI_P_CMD_SUD; 2729220657Smav ATA_OUTL(ch->r_mem, AHCI_P_CMD, val); 2730220657Smav ch->listening = 0; 2731220657Smav } 2732199821Smav sata_rev = ch->user[ch->pm_present ? 15 : 0].revision; 2733199821Smav if (sata_rev == 1) 2734195534Sscottl val = ATA_SC_SPD_SPEED_GEN1; 2735199821Smav else if (sata_rev == 2) 2736195534Sscottl val = ATA_SC_SPD_SPEED_GEN2; 2737199821Smav else if (sata_rev == 3) 2738195534Sscottl val = ATA_SC_SPD_SPEED_GEN3; 2739195534Sscottl else 2740195534Sscottl val = 0; 2741195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SCTL, 2742196656Smav ATA_SC_DET_RESET | val | 2743196656Smav ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER); 2744220777Smav DELAY(1000); 2745196656Smav ATA_OUTL(ch->r_mem, AHCI_P_SCTL, 2746195534Sscottl ATA_SC_DET_IDLE | val | ((ch->pm_level > 0) ? 0 : 2747195534Sscottl (ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER))); 2748203426Smav if (!ahci_sata_connect(ch)) { 2749220657Smav if (ch->caps & AHCI_CAP_SSS) { 2750220657Smav val = ATA_INL(ch->r_mem, AHCI_P_CMD); 2751220657Smav val &= ~AHCI_P_CMD_SUD; 2752220657Smav ATA_OUTL(ch->r_mem, AHCI_P_CMD, val); 2753220657Smav ch->listening = 1; 2754220657Smav } else if (ch->pm_level > 0) 2755203426Smav ATA_OUTL(ch->r_mem, AHCI_P_SCTL, ATA_SC_DET_DISABLE); 2756203426Smav return (0); 2757203426Smav } 2758203426Smav return (1); 2759195534Sscottl} 2760195534Sscottl 2761207430Smavstatic int 2762207430Smavahci_check_ids(device_t dev, union ccb *ccb) 2763207430Smav{ 2764207430Smav struct ahci_channel *ch = device_get_softc(dev); 2765207430Smav 2766207430Smav if (ccb->ccb_h.target_id > ((ch->caps & AHCI_CAP_SPM) ? 15 : 0)) { 2767207430Smav ccb->ccb_h.status = CAM_TID_INVALID; 2768207430Smav xpt_done(ccb); 2769207430Smav return (-1); 2770207430Smav } 2771207430Smav if (ccb->ccb_h.target_lun != 0) { 2772207430Smav ccb->ccb_h.status = CAM_LUN_INVALID; 2773207430Smav xpt_done(ccb); 2774207430Smav return (-1); 2775207430Smav } 2776207430Smav return (0); 2777207430Smav} 2778207430Smav 2779195534Sscottlstatic void 2780195534Sscottlahciaction(struct cam_sim *sim, union ccb *ccb) 2781195534Sscottl{ 2782210471Smav device_t dev, parent; 2783195534Sscottl struct ahci_channel *ch; 2784195534Sscottl 2785195534Sscottl CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("ahciaction func_code=%x\n", 2786195534Sscottl ccb->ccb_h.func_code)); 2787195534Sscottl 2788195534Sscottl ch = (struct ahci_channel *)cam_sim_softc(sim); 2789195534Sscottl dev = ch->dev; 2790195534Sscottl switch (ccb->ccb_h.func_code) { 2791195534Sscottl /* Common cases first */ 2792195534Sscottl case XPT_ATA_IO: /* Execute the requested I/O operation */ 2793195534Sscottl case XPT_SCSI_IO: 2794207430Smav if (ahci_check_ids(dev, ccb)) 2795207430Smav return; 2796207430Smav if (ch->devices == 0 || 2797207430Smav (ch->pm_present == 0 && 2798207430Smav ccb->ccb_h.target_id > 0 && ccb->ccb_h.target_id < 15)) { 2799195534Sscottl ccb->ccb_h.status = CAM_SEL_TIMEOUT; 2800195534Sscottl break; 2801195534Sscottl } 2802220565Smav ccb->ccb_h.recovery_type = RECOVERY_NONE; 2803195534Sscottl /* Check for command collision. */ 2804195534Sscottl if (ahci_check_collision(dev, ccb)) { 2805195534Sscottl /* Freeze command. */ 2806195534Sscottl ch->frozen = ccb; 2807195534Sscottl /* We have only one frozen slot, so freeze simq also. */ 2808195534Sscottl xpt_freeze_simq(ch->sim, 1); 2809195534Sscottl return; 2810195534Sscottl } 2811195534Sscottl ahci_begin_transaction(dev, ccb); 2812207430Smav return; 2813195534Sscottl case XPT_EN_LUN: /* Enable LUN as a target */ 2814195534Sscottl case XPT_TARGET_IO: /* Execute target I/O request */ 2815195534Sscottl case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */ 2816195534Sscottl case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/ 2817195534Sscottl case XPT_ABORT: /* Abort the specified CCB */ 2818195534Sscottl /* XXX Implement */ 2819195534Sscottl ccb->ccb_h.status = CAM_REQ_INVALID; 2820195534Sscottl break; 2821195534Sscottl case XPT_SET_TRAN_SETTINGS: 2822195534Sscottl { 2823195534Sscottl struct ccb_trans_settings *cts = &ccb->cts; 2824199747Smav struct ahci_device *d; 2825195534Sscottl 2826207430Smav if (ahci_check_ids(dev, ccb)) 2827207430Smav return; 2828199747Smav if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 2829199747Smav d = &ch->curr[ccb->ccb_h.target_id]; 2830199747Smav else 2831199747Smav d = &ch->user[ccb->ccb_h.target_id]; 2832199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_REVISION) 2833199747Smav d->revision = cts->xport_specific.sata.revision; 2834199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_MODE) 2835199747Smav d->mode = cts->xport_specific.sata.mode; 2836199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_BYTECOUNT) 2837199747Smav d->bytecount = min(8192, cts->xport_specific.sata.bytecount); 2838199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_TAGS) 2839199747Smav d->tags = min(ch->numslots, cts->xport_specific.sata.tags); 2840199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_PM) 2841195534Sscottl ch->pm_present = cts->xport_specific.sata.pm_present; 2842203376Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_ATAPI) 2843203376Smav d->atapi = cts->xport_specific.sata.atapi; 2844207499Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_CAPS) 2845207499Smav d->caps = cts->xport_specific.sata.caps; 2846195534Sscottl ccb->ccb_h.status = CAM_REQ_CMP; 2847195534Sscottl break; 2848195534Sscottl } 2849195534Sscottl case XPT_GET_TRAN_SETTINGS: 2850195534Sscottl /* Get default/user set transfer settings for the target */ 2851195534Sscottl { 2852195534Sscottl struct ccb_trans_settings *cts = &ccb->cts; 2853199747Smav struct ahci_device *d; 2854195534Sscottl uint32_t status; 2855195534Sscottl 2856207430Smav if (ahci_check_ids(dev, ccb)) 2857207430Smav return; 2858199747Smav if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 2859199747Smav d = &ch->curr[ccb->ccb_h.target_id]; 2860199747Smav else 2861199747Smav d = &ch->user[ccb->ccb_h.target_id]; 2862236666Smav cts->protocol = PROTO_UNSPECIFIED; 2863196656Smav cts->protocol_version = PROTO_VERSION_UNSPECIFIED; 2864195534Sscottl cts->transport = XPORT_SATA; 2865196656Smav cts->transport_version = XPORT_VERSION_UNSPECIFIED; 2866195534Sscottl cts->proto_specific.valid = 0; 2867195534Sscottl cts->xport_specific.sata.valid = 0; 2868199747Smav if (cts->type == CTS_TYPE_CURRENT_SETTINGS && 2869199747Smav (ccb->ccb_h.target_id == 15 || 2870199747Smav (ccb->ccb_h.target_id == 0 && !ch->pm_present))) { 2871195534Sscottl status = ATA_INL(ch->r_mem, AHCI_P_SSTS) & ATA_SS_SPD_MASK; 2872199747Smav if (status & 0x0f0) { 2873199747Smav cts->xport_specific.sata.revision = 2874199747Smav (status & 0x0f0) >> 4; 2875199747Smav cts->xport_specific.sata.valid |= 2876199747Smav CTS_SATA_VALID_REVISION; 2877199747Smav } 2878207499Smav cts->xport_specific.sata.caps = d->caps & CTS_SATA_CAPS_D; 2879207499Smav if (ch->pm_level) { 2880207499Smav if (ch->caps & (AHCI_CAP_PSC | AHCI_CAP_SSC)) 2881207499Smav cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_PMREQ; 2882207499Smav if (ch->caps2 & AHCI_CAP2_APST) 2883207499Smav cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_APST; 2884207499Smav } 2885207499Smav if ((ch->caps & AHCI_CAP_SNCQ) && 2886207499Smav (ch->quirks & AHCI_Q_NOAA) == 0) 2887207499Smav cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_DMAAA; 2888220602Smav cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_AN; 2889207499Smav cts->xport_specific.sata.caps &= 2890207499Smav ch->user[ccb->ccb_h.target_id].caps; 2891207499Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS; 2892195534Sscottl } else { 2893199747Smav cts->xport_specific.sata.revision = d->revision; 2894199747Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_REVISION; 2895207499Smav cts->xport_specific.sata.caps = d->caps; 2896207499Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS; 2897195534Sscottl } 2898199747Smav cts->xport_specific.sata.mode = d->mode; 2899199747Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_MODE; 2900199747Smav cts->xport_specific.sata.bytecount = d->bytecount; 2901199747Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_BYTECOUNT; 2902199747Smav cts->xport_specific.sata.pm_present = ch->pm_present; 2903195534Sscottl cts->xport_specific.sata.valid |= CTS_SATA_VALID_PM; 2904199747Smav cts->xport_specific.sata.tags = d->tags; 2905199747Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_TAGS; 2906203376Smav cts->xport_specific.sata.atapi = d->atapi; 2907203376Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_ATAPI; 2908195534Sscottl ccb->ccb_h.status = CAM_REQ_CMP; 2909195534Sscottl break; 2910195534Sscottl } 2911195534Sscottl case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 2912195534Sscottl case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 2913195534Sscottl ahci_reset(dev); 2914195534Sscottl ccb->ccb_h.status = CAM_REQ_CMP; 2915195534Sscottl break; 2916195534Sscottl case XPT_TERM_IO: /* Terminate the I/O process */ 2917195534Sscottl /* XXX Implement */ 2918195534Sscottl ccb->ccb_h.status = CAM_REQ_INVALID; 2919195534Sscottl break; 2920195534Sscottl case XPT_PATH_INQ: /* Path routing inquiry */ 2921195534Sscottl { 2922195534Sscottl struct ccb_pathinq *cpi = &ccb->cpi; 2923195534Sscottl 2924210471Smav parent = device_get_parent(dev); 2925195534Sscottl cpi->version_num = 1; /* XXX??? */ 2926199278Smav cpi->hba_inquiry = PI_SDTR_ABLE; 2927199278Smav if (ch->caps & AHCI_CAP_SNCQ) 2928199278Smav cpi->hba_inquiry |= PI_TAG_ABLE; 2929195534Sscottl if (ch->caps & AHCI_CAP_SPM) 2930195534Sscottl cpi->hba_inquiry |= PI_SATAPM; 2931195534Sscottl cpi->target_sprt = 0; 2932248522Skib cpi->hba_misc = PIM_SEQSCAN | PIM_UNMAPPED; 2933195534Sscottl cpi->hba_eng_cnt = 0; 2934195534Sscottl if (ch->caps & AHCI_CAP_SPM) 2935198322Smav cpi->max_target = 15; 2936195534Sscottl else 2937195534Sscottl cpi->max_target = 0; 2938195534Sscottl cpi->max_lun = 0; 2939195534Sscottl cpi->initiator_id = 0; 2940195534Sscottl cpi->bus_id = cam_sim_bus(sim); 2941195534Sscottl cpi->base_transfer_speed = 150000; 2942195534Sscottl strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 2943195534Sscottl strncpy(cpi->hba_vid, "AHCI", HBA_IDLEN); 2944195534Sscottl strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 2945195534Sscottl cpi->unit_number = cam_sim_unit(sim); 2946195534Sscottl cpi->transport = XPORT_SATA; 2947196656Smav cpi->transport_version = XPORT_VERSION_UNSPECIFIED; 2948236847Smav cpi->protocol = PROTO_ATA; 2949196656Smav cpi->protocol_version = PROTO_VERSION_UNSPECIFIED; 2950195534Sscottl cpi->maxio = MAXPHYS; 2951196777Smav /* ATI SB600 can't handle 256 sectors with FPDMA (NCQ). */ 2952210471Smav if (pci_get_devid(parent) == 0x43801002) 2953196796Smav cpi->maxio = min(cpi->maxio, 128 * 512); 2954210471Smav cpi->hba_vendor = pci_get_vendor(parent); 2955210471Smav cpi->hba_device = pci_get_device(parent); 2956210471Smav cpi->hba_subvendor = pci_get_subvendor(parent); 2957210471Smav cpi->hba_subdevice = pci_get_subdevice(parent); 2958195534Sscottl cpi->ccb_h.status = CAM_REQ_CMP; 2959195534Sscottl break; 2960195534Sscottl } 2961195534Sscottl default: 2962195534Sscottl ccb->ccb_h.status = CAM_REQ_INVALID; 2963195534Sscottl break; 2964195534Sscottl } 2965207430Smav xpt_done(ccb); 2966195534Sscottl} 2967195534Sscottl 2968195534Sscottlstatic void 2969195534Sscottlahcipoll(struct cam_sim *sim) 2970195534Sscottl{ 2971195534Sscottl struct ahci_channel *ch = (struct ahci_channel *)cam_sim_softc(sim); 2972195534Sscottl 2973195534Sscottl ahci_ch_intr(ch->dev); 2974220789Smav if (ch->resetting != 0 && 2975220789Smav (--ch->resetpolldiv <= 0 || !callout_pending(&ch->reset_timer))) { 2976220789Smav ch->resetpolldiv = 1000; 2977220789Smav ahci_reset_to(ch->dev); 2978220789Smav } 2979195534Sscottl} 2980