ahci_pci.c revision 245875
1195534Sscottl/*- 2238805Smav * Copyright (c) 2009-2012 Alexander Motin <mav@FreeBSD.org> 3195534Sscottl * All rights reserved. 4195534Sscottl * 5195534Sscottl * Redistribution and use in source and binary forms, with or without 6195534Sscottl * modification, are permitted provided that the following conditions 7195534Sscottl * are met: 8195534Sscottl * 1. Redistributions of source code must retain the above copyright 9195534Sscottl * notice, this list of conditions and the following disclaimer, 10195534Sscottl * without modification, immediately at the beginning of the file. 11195534Sscottl * 2. Redistributions in binary form must reproduce the above copyright 12195534Sscottl * notice, this list of conditions and the following disclaimer in the 13195534Sscottl * documentation and/or other materials provided with the distribution. 14195534Sscottl * 15195534Sscottl * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16195534Sscottl * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17195534Sscottl * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18195534Sscottl * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19195534Sscottl * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20195534Sscottl * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21195534Sscottl * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22195534Sscottl * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23195534Sscottl * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24195534Sscottl * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25195534Sscottl */ 26195534Sscottl 27195534Sscottl#include <sys/cdefs.h> 28195534Sscottl__FBSDID("$FreeBSD: head/sys/dev/ahci/ahci.c 245875 2013-01-24 09:33:43Z mav $"); 29195534Sscottl 30195534Sscottl#include <sys/param.h> 31195534Sscottl#include <sys/module.h> 32195534Sscottl#include <sys/systm.h> 33195534Sscottl#include <sys/kernel.h> 34195534Sscottl#include <sys/bus.h> 35220576Smav#include <sys/conf.h> 36195534Sscottl#include <sys/endian.h> 37195534Sscottl#include <sys/malloc.h> 38195534Sscottl#include <sys/lock.h> 39195534Sscottl#include <sys/mutex.h> 40195534Sscottl#include <machine/stdarg.h> 41195534Sscottl#include <machine/resource.h> 42195534Sscottl#include <machine/bus.h> 43195534Sscottl#include <sys/rman.h> 44195534Sscottl#include <dev/pci/pcivar.h> 45195534Sscottl#include <dev/pci/pcireg.h> 46195534Sscottl#include "ahci.h" 47195534Sscottl 48195534Sscottl#include <cam/cam.h> 49195534Sscottl#include <cam/cam_ccb.h> 50195534Sscottl#include <cam/cam_sim.h> 51195534Sscottl#include <cam/cam_xpt_sim.h> 52195534Sscottl#include <cam/cam_debug.h> 53195534Sscottl 54195534Sscottl/* local prototypes */ 55195534Sscottlstatic int ahci_setup_interrupt(device_t dev); 56195534Sscottlstatic void ahci_intr(void *data); 57195534Sscottlstatic void ahci_intr_one(void *data); 58195534Sscottlstatic int ahci_suspend(device_t dev); 59195534Sscottlstatic int ahci_resume(device_t dev); 60208375Smavstatic int ahci_ch_init(device_t dev); 61208375Smavstatic int ahci_ch_deinit(device_t dev); 62195534Sscottlstatic int ahci_ch_suspend(device_t dev); 63195534Sscottlstatic int ahci_ch_resume(device_t dev); 64196656Smavstatic void ahci_ch_pm(void *arg); 65195534Sscottlstatic void ahci_ch_intr_locked(void *data); 66195534Sscottlstatic void ahci_ch_intr(void *data); 67195534Sscottlstatic int ahci_ctlr_reset(device_t dev); 68205422Smavstatic int ahci_ctlr_setup(device_t dev); 69195534Sscottlstatic void ahci_begin_transaction(device_t dev, union ccb *ccb); 70195534Sscottlstatic void ahci_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error); 71195534Sscottlstatic void ahci_execute_transaction(struct ahci_slot *slot); 72195534Sscottlstatic void ahci_timeout(struct ahci_slot *slot); 73195534Sscottlstatic void ahci_end_transaction(struct ahci_slot *slot, enum ahci_err_type et); 74199821Smavstatic int ahci_setup_fis(device_t dev, struct ahci_cmd_tab *ctp, union ccb *ccb, int tag); 75195534Sscottlstatic void ahci_dmainit(device_t dev); 76195534Sscottlstatic void ahci_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error); 77195534Sscottlstatic void ahci_dmafini(device_t dev); 78195534Sscottlstatic void ahci_slotsalloc(device_t dev); 79195534Sscottlstatic void ahci_slotsfree(device_t dev); 80195534Sscottlstatic void ahci_reset(device_t dev); 81203123Smavstatic void ahci_start(device_t dev, int fbs); 82195534Sscottlstatic void ahci_stop(device_t dev); 83195534Sscottlstatic void ahci_clo(device_t dev); 84195534Sscottlstatic void ahci_start_fr(device_t dev); 85195534Sscottlstatic void ahci_stop_fr(device_t dev); 86195534Sscottl 87195534Sscottlstatic int ahci_sata_connect(struct ahci_channel *ch); 88203108Smavstatic int ahci_sata_phy_reset(device_t dev); 89220576Smavstatic int ahci_wait_ready(device_t dev, int t, int t0); 90195534Sscottl 91220565Smavstatic void ahci_issue_recovery(device_t dev); 92195534Sscottlstatic void ahci_process_read_log(device_t dev, union ccb *ccb); 93220565Smavstatic void ahci_process_request_sense(device_t dev, union ccb *ccb); 94195534Sscottl 95195534Sscottlstatic void ahciaction(struct cam_sim *sim, union ccb *ccb); 96195534Sscottlstatic void ahcipoll(struct cam_sim *sim); 97195534Sscottl 98227293Sedstatic MALLOC_DEFINE(M_AHCI, "AHCI driver", "AHCI driver data buffers"); 99195534Sscottl 100199176Smavstatic struct { 101199176Smav uint32_t id; 102203030Smav uint8_t rev; 103199176Smav const char *name; 104199322Smav int quirks; 105199322Smav#define AHCI_Q_NOFORCE 1 106199322Smav#define AHCI_Q_NOPMP 2 107199322Smav#define AHCI_Q_NONCQ 4 108199322Smav#define AHCI_Q_1CH 8 109199322Smav#define AHCI_Q_2CH 16 110199322Smav#define AHCI_Q_4CH 32 111199322Smav#define AHCI_Q_EDGEIS 64 112203030Smav#define AHCI_Q_SATA2 128 113203123Smav#define AHCI_Q_NOBSYRES 256 114207499Smav#define AHCI_Q_NOAA 512 115218596Smav#define AHCI_Q_NOCOUNT 1024 116222304Smav#define AHCI_Q_ALTSIG 2048 117245875Smav#define AHCI_Q_NOMSI 4096 118199176Smav} ahci_ids[] = { 119245875Smav {0x43801002, 0x00, "ATI IXP600", AHCI_Q_NOMSI}, 120203030Smav {0x43901002, 0x00, "ATI IXP700", 0}, 121203030Smav {0x43911002, 0x00, "ATI IXP700", 0}, 122203030Smav {0x43921002, 0x00, "ATI IXP700", 0}, 123203030Smav {0x43931002, 0x00, "ATI IXP700", 0}, 124203030Smav {0x43941002, 0x00, "ATI IXP800", 0}, 125203030Smav {0x43951002, 0x00, "ATI IXP800", 0}, 126244146Smav {0x78001022, 0x00, "AMD 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AHCI_Q_NOAA}, 270207499Smav {0x0adb10de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 271207499Smav {0x0ab410de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 272207499Smav {0x0ab510de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 273207499Smav {0x0ab610de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 274207499Smav {0x0ab710de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 275207499Smav {0x0ab810de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 276207499Smav {0x0ab910de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 277207499Smav {0x0aba10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 278207499Smav {0x0abb10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 279207499Smav {0x0abc10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 280207499Smav {0x0abd10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 281207499Smav {0x0abe10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 282207499Smav {0x0abf10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 283207499Smav {0x0d8410de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 284224603Smav {0x0d8510de, 0x00, "NVIDIA MCP89", AHCI_Q_NOFORCE|AHCI_Q_NOAA}, 285207499Smav {0x0d8610de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 286207499Smav {0x0d8710de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 287207499Smav {0x0d8810de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 288207499Smav {0x0d8910de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 289207499Smav {0x0d8a10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 290207499Smav {0x0d8b10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 291207499Smav {0x0d8c10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 292207499Smav {0x0d8d10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 293207499Smav {0x0d8e10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 294207499Smav {0x0d8f10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 295208907Smav {0x33491106, 0x00, "VIA VT8251", AHCI_Q_NOPMP|AHCI_Q_NONCQ}, 296208907Smav {0x62871106, 0x00, "VIA VT8251", AHCI_Q_NOPMP|AHCI_Q_NONCQ}, 297203030Smav {0x11841039, 0x00, "SiS 966", 0}, 298203030Smav {0x11851039, 0x00, "SiS 968", 0}, 299203030Smav {0x01861039, 0x00, "SiS 968", 0}, 300203030Smav {0x00000000, 0x00, NULL, 0} 301199176Smav}; 302199176Smav 303220565Smav#define recovery_type spriv_field0 304220565Smav#define RECOVERY_NONE 0 305220565Smav#define RECOVERY_READ_LOG 1 306220565Smav#define RECOVERY_REQUEST_SENSE 2 307220565Smav#define recovery_slot spriv_field1 308220565Smav 309228200Smavstatic int force_ahci = 1; 310228200SmavTUNABLE_INT("hw.ahci.force", &force_ahci); 311228200Smav 312195534Sscottlstatic int 313195534Sscottlahci_probe(device_t dev) 314195534Sscottl{ 315199176Smav char buf[64]; 316199322Smav int i, valid = 0; 317199322Smav uint32_t devid = pci_get_devid(dev); 318203030Smav uint8_t revid = pci_get_revid(dev); 319199322Smav 320199322Smav /* Is this a possible AHCI candidate? */ 321199322Smav if (pci_get_class(dev) == PCIC_STORAGE && 322199322Smav pci_get_subclass(dev) == PCIS_STORAGE_SATA && 323199322Smav pci_get_progif(dev) == PCIP_STORAGE_SATA_AHCI_1_0) 324199322Smav valid = 1; 325199322Smav /* Is this a known AHCI chip? */ 326199322Smav for (i = 0; ahci_ids[i].id != 0; i++) { 327199322Smav if (ahci_ids[i].id == devid && 328203030Smav ahci_ids[i].rev <= revid && 329228200Smav (valid || (force_ahci == 1 && 330228200Smav !(ahci_ids[i].quirks & AHCI_Q_NOFORCE)))) { 331199717Smav /* Do not attach JMicrons with single PCI function. */ 332199717Smav if (pci_get_vendor(dev) == 0x197b && 333199717Smav (pci_read_config(dev, 0xdf, 1) & 0x40) == 0) 334199717Smav return (ENXIO); 335199322Smav snprintf(buf, sizeof(buf), "%s AHCI SATA controller", 336199322Smav ahci_ids[i].name); 337199322Smav device_set_desc_copy(dev, buf); 338199322Smav return (BUS_PROBE_VENDOR); 339199322Smav } 340199322Smav } 341199322Smav if (!valid) 342199322Smav return (ENXIO); 343199322Smav device_set_desc_copy(dev, "AHCI SATA controller"); 344199322Smav return (BUS_PROBE_VENDOR); 345199322Smav} 346199322Smav 347199322Smavstatic int 348199322Smavahci_ata_probe(device_t dev) 349199322Smav{ 350199322Smav char buf[64]; 351199176Smav int i; 352199176Smav uint32_t devid = pci_get_devid(dev); 353203030Smav uint8_t revid = pci_get_revid(dev); 354195534Sscottl 355199322Smav if ((intptr_t)device_get_ivars(dev) >= 0) 356199322Smav return (ENXIO); 357199176Smav /* Is this a known AHCI chip? */ 358199176Smav for (i = 0; ahci_ids[i].id != 0; i++) { 359203030Smav if (ahci_ids[i].id == devid && 360203030Smav ahci_ids[i].rev <= revid) { 361199176Smav snprintf(buf, sizeof(buf), "%s AHCI SATA controller", 362199176Smav ahci_ids[i].name); 363199176Smav device_set_desc_copy(dev, buf); 364199176Smav return (BUS_PROBE_VENDOR); 365199176Smav } 366199176Smav } 367199176Smav device_set_desc_copy(dev, "AHCI SATA controller"); 368195534Sscottl return (BUS_PROBE_VENDOR); 369195534Sscottl} 370195534Sscottl 371195534Sscottlstatic int 372195534Sscottlahci_attach(device_t dev) 373195534Sscottl{ 374195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 375195534Sscottl device_t child; 376199322Smav int error, unit, speed, i; 377199322Smav uint32_t devid = pci_get_devid(dev); 378203030Smav uint8_t revid = pci_get_revid(dev); 379196656Smav u_int32_t version; 380195534Sscottl 381195534Sscottl ctlr->dev = dev; 382199322Smav i = 0; 383203030Smav while (ahci_ids[i].id != 0 && 384203030Smav (ahci_ids[i].id != devid || 385203030Smav ahci_ids[i].rev > revid)) 386199322Smav i++; 387199322Smav ctlr->quirks = ahci_ids[i].quirks; 388196656Smav resource_int_value(device_get_name(dev), 389196656Smav device_get_unit(dev), "ccc", &ctlr->ccc); 390195534Sscottl /* if we have a memory BAR(5) we are likely on an AHCI part */ 391195534Sscottl ctlr->r_rid = PCIR_BAR(5); 392195534Sscottl if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 393195534Sscottl &ctlr->r_rid, RF_ACTIVE))) 394195534Sscottl return ENXIO; 395195534Sscottl /* Setup our own memory management for channels. */ 396208414Smav ctlr->sc_iomem.rm_start = rman_get_start(ctlr->r_mem); 397208414Smav ctlr->sc_iomem.rm_end = rman_get_end(ctlr->r_mem); 398195534Sscottl ctlr->sc_iomem.rm_type = RMAN_ARRAY; 399195534Sscottl ctlr->sc_iomem.rm_descr = "I/O memory addresses"; 400195534Sscottl if ((error = rman_init(&ctlr->sc_iomem)) != 0) { 401195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 402195534Sscottl return (error); 403195534Sscottl } 404195534Sscottl if ((error = rman_manage_region(&ctlr->sc_iomem, 405195534Sscottl rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) { 406195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 407195534Sscottl rman_fini(&ctlr->sc_iomem); 408195534Sscottl return (error); 409195534Sscottl } 410207511Smav pci_enable_busmaster(dev); 411195534Sscottl /* Reset controller */ 412195534Sscottl if ((error = ahci_ctlr_reset(dev)) != 0) { 413195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 414195534Sscottl rman_fini(&ctlr->sc_iomem); 415195534Sscottl return (error); 416195534Sscottl }; 417199322Smav /* Get the HW capabilities */ 418199322Smav version = ATA_INL(ctlr->r_mem, AHCI_VS); 419199322Smav ctlr->caps = ATA_INL(ctlr->r_mem, AHCI_CAP); 420240383Smav if (version >= 0x00010200) 421199322Smav ctlr->caps2 = ATA_INL(ctlr->r_mem, AHCI_CAP2); 422203108Smav if (ctlr->caps & AHCI_CAP_EMS) 423203108Smav ctlr->capsem = ATA_INL(ctlr->r_mem, AHCI_EM_CTL); 424195534Sscottl ctlr->ichannels = ATA_INL(ctlr->r_mem, AHCI_PI); 425222304Smav 426222304Smav /* Identify and set separate quirks for HBA and RAID f/w Marvells. */ 427222304Smav if ((ctlr->quirks & AHCI_Q_NOBSYRES) && 428222304Smav (ctlr->quirks & AHCI_Q_ALTSIG) && 429222304Smav (ctlr->caps & AHCI_CAP_SPM) == 0) 430222304Smav ctlr->quirks &= ~AHCI_Q_NOBSYRES; 431222304Smav 432199322Smav if (ctlr->quirks & AHCI_Q_1CH) { 433199322Smav ctlr->caps &= ~AHCI_CAP_NPMASK; 434199322Smav ctlr->ichannels &= 0x01; 435199322Smav } 436199322Smav if (ctlr->quirks & AHCI_Q_2CH) { 437199322Smav ctlr->caps &= ~AHCI_CAP_NPMASK; 438199322Smav ctlr->caps |= 1; 439199322Smav ctlr->ichannels &= 0x03; 440199322Smav } 441199322Smav if (ctlr->quirks & AHCI_Q_4CH) { 442199322Smav ctlr->caps &= ~AHCI_CAP_NPMASK; 443199322Smav ctlr->caps |= 3; 444199322Smav ctlr->ichannels &= 0x0f; 445199322Smav } 446195534Sscottl ctlr->channels = MAX(flsl(ctlr->ichannels), 447199322Smav (ctlr->caps & AHCI_CAP_NPMASK) + 1); 448199322Smav if (ctlr->quirks & AHCI_Q_NOPMP) 449199322Smav ctlr->caps &= ~AHCI_CAP_SPM; 450199322Smav if (ctlr->quirks & AHCI_Q_NONCQ) 451199322Smav ctlr->caps &= ~AHCI_CAP_SNCQ; 452205422Smav if ((ctlr->caps & AHCI_CAP_CCCS) == 0) 453205422Smav ctlr->ccc = 0; 454222039Smav ctlr->emloc = ATA_INL(ctlr->r_mem, AHCI_EM_LOC); 455205422Smav ahci_ctlr_setup(dev); 456195534Sscottl /* Setup interrupts. */ 457195534Sscottl if (ahci_setup_interrupt(dev)) { 458195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 459195534Sscottl rman_fini(&ctlr->sc_iomem); 460195534Sscottl return ENXIO; 461195534Sscottl } 462195534Sscottl /* Announce HW capabilities. */ 463196656Smav speed = (ctlr->caps & AHCI_CAP_ISS) >> AHCI_CAP_ISS_SHIFT; 464195534Sscottl device_printf(dev, 465203123Smav "AHCI v%x.%02x with %d %sGbps ports, Port Multiplier %s%s\n", 466195534Sscottl ((version >> 20) & 0xf0) + ((version >> 16) & 0x0f), 467195534Sscottl ((version >> 4) & 0xf0) + (version & 0x0f), 468196656Smav (ctlr->caps & AHCI_CAP_NPMASK) + 1, 469195534Sscottl ((speed == 1) ? "1.5":((speed == 2) ? "3": 470195534Sscottl ((speed == 3) ? "6":"?"))), 471196656Smav (ctlr->caps & AHCI_CAP_SPM) ? 472203123Smav "supported" : "not supported", 473203123Smav (ctlr->caps & AHCI_CAP_FBSS) ? 474203123Smav " with FBS" : ""); 475195534Sscottl if (bootverbose) { 476195534Sscottl device_printf(dev, "Caps:%s%s%s%s%s%s%s%s %sGbps", 477196656Smav (ctlr->caps & AHCI_CAP_64BIT) ? " 64bit":"", 478196656Smav (ctlr->caps & AHCI_CAP_SNCQ) ? " NCQ":"", 479196656Smav (ctlr->caps & AHCI_CAP_SSNTF) ? " SNTF":"", 480196656Smav (ctlr->caps & AHCI_CAP_SMPS) ? " MPS":"", 481196656Smav (ctlr->caps & AHCI_CAP_SSS) ? " SS":"", 482196656Smav (ctlr->caps & AHCI_CAP_SALP) ? " ALP":"", 483196656Smav (ctlr->caps & AHCI_CAP_SAL) ? " AL":"", 484196656Smav (ctlr->caps & AHCI_CAP_SCLO) ? " CLO":"", 485195534Sscottl ((speed == 1) ? "1.5":((speed == 2) ? "3": 486195534Sscottl ((speed == 3) ? "6":"?")))); 487195534Sscottl printf("%s%s%s%s%s%s %dcmd%s%s%s %dports\n", 488196656Smav (ctlr->caps & AHCI_CAP_SAM) ? " AM":"", 489196656Smav (ctlr->caps & AHCI_CAP_SPM) ? " PM":"", 490196656Smav (ctlr->caps & AHCI_CAP_FBSS) ? " FBS":"", 491196656Smav (ctlr->caps & AHCI_CAP_PMD) ? " PMD":"", 492196656Smav (ctlr->caps & AHCI_CAP_SSC) ? " SSC":"", 493196656Smav (ctlr->caps & AHCI_CAP_PSC) ? " PSC":"", 494196656Smav ((ctlr->caps & AHCI_CAP_NCS) >> AHCI_CAP_NCS_SHIFT) + 1, 495196656Smav (ctlr->caps & AHCI_CAP_CCCS) ? " CCC":"", 496196656Smav (ctlr->caps & AHCI_CAP_EMS) ? " EM":"", 497196656Smav (ctlr->caps & AHCI_CAP_SXS) ? " eSATA":"", 498196656Smav (ctlr->caps & AHCI_CAP_NPMASK) + 1); 499195534Sscottl } 500240383Smav if (bootverbose && version >= 0x00010200) { 501196656Smav device_printf(dev, "Caps2:%s%s%s\n", 502196656Smav (ctlr->caps2 & AHCI_CAP2_APST) ? " APST":"", 503196656Smav (ctlr->caps2 & AHCI_CAP2_NVMP) ? " NVMP":"", 504196656Smav (ctlr->caps2 & AHCI_CAP2_BOH) ? " BOH":""); 505196656Smav } 506195534Sscottl /* Attach all channels on this controller */ 507195534Sscottl for (unit = 0; unit < ctlr->channels; unit++) { 508195534Sscottl child = device_add_child(dev, "ahcich", -1); 509227635Smav if (child == NULL) { 510195534Sscottl device_printf(dev, "failed to add channel device\n"); 511227635Smav continue; 512227635Smav } 513227635Smav device_set_ivars(child, (void *)(intptr_t)unit); 514227635Smav if ((ctlr->ichannels & (1 << unit)) == 0) 515227635Smav device_disable(child); 516195534Sscottl } 517238805Smav if (ctlr->caps & AHCI_CAP_EMS) { 518238805Smav child = device_add_child(dev, "ahciem", -1); 519238805Smav if (child == NULL) 520238805Smav device_printf(dev, "failed to add enclosure device\n"); 521238805Smav else 522238805Smav device_set_ivars(child, (void *)(intptr_t)-1); 523238805Smav } 524195534Sscottl bus_generic_attach(dev); 525195534Sscottl return 0; 526195534Sscottl} 527195534Sscottl 528195534Sscottlstatic int 529195534Sscottlahci_detach(device_t dev) 530195534Sscottl{ 531195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 532227701Shselasky int i; 533195534Sscottl 534195534Sscottl /* Detach & delete all children */ 535227849Shselasky device_delete_children(dev); 536227701Shselasky 537195534Sscottl /* Free interrupts. */ 538195534Sscottl for (i = 0; i < ctlr->numirqs; i++) { 539195534Sscottl if (ctlr->irqs[i].r_irq) { 540195534Sscottl bus_teardown_intr(dev, ctlr->irqs[i].r_irq, 541195534Sscottl ctlr->irqs[i].handle); 542195534Sscottl bus_release_resource(dev, SYS_RES_IRQ, 543195534Sscottl ctlr->irqs[i].r_irq_rid, ctlr->irqs[i].r_irq); 544195534Sscottl } 545195534Sscottl } 546195534Sscottl pci_release_msi(dev); 547195534Sscottl /* Free memory. */ 548195534Sscottl rman_fini(&ctlr->sc_iomem); 549195534Sscottl if (ctlr->r_mem) 550195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 551195534Sscottl return (0); 552195534Sscottl} 553195534Sscottl 554195534Sscottlstatic int 555195534Sscottlahci_ctlr_reset(device_t dev) 556195534Sscottl{ 557195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 558195534Sscottl int timeout; 559195534Sscottl 560240693Sgavin if (pci_read_config(dev, PCIR_DEVVENDOR, 4) == 0x28298086 && 561195534Sscottl (pci_read_config(dev, 0x92, 1) & 0xfe) == 0x04) 562195534Sscottl pci_write_config(dev, 0x92, 0x01, 1); 563195534Sscottl /* Enable AHCI mode */ 564195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, AHCI_GHC_AE); 565195534Sscottl /* Reset AHCI controller */ 566195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, AHCI_GHC_AE|AHCI_GHC_HR); 567195534Sscottl for (timeout = 1000; timeout > 0; timeout--) { 568195534Sscottl DELAY(1000); 569195534Sscottl if ((ATA_INL(ctlr->r_mem, AHCI_GHC) & AHCI_GHC_HR) == 0) 570195534Sscottl break; 571195534Sscottl } 572195534Sscottl if (timeout == 0) { 573195534Sscottl device_printf(dev, "AHCI controller reset failure\n"); 574195534Sscottl return ENXIO; 575195534Sscottl } 576195534Sscottl /* Reenable AHCI mode */ 577195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, AHCI_GHC_AE); 578205422Smav return (0); 579205422Smav} 580205422Smav 581205422Smavstatic int 582205422Smavahci_ctlr_setup(device_t dev) 583205422Smav{ 584205422Smav struct ahci_controller *ctlr = device_get_softc(dev); 585195534Sscottl /* Clear interrupts */ 586195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_IS, ATA_INL(ctlr->r_mem, AHCI_IS)); 587196656Smav /* Configure CCC */ 588196656Smav if (ctlr->ccc) { 589196656Smav ATA_OUTL(ctlr->r_mem, AHCI_CCCP, ATA_INL(ctlr->r_mem, AHCI_PI)); 590196656Smav ATA_OUTL(ctlr->r_mem, AHCI_CCCC, 591196656Smav (ctlr->ccc << AHCI_CCCC_TV_SHIFT) | 592196656Smav (4 << AHCI_CCCC_CC_SHIFT) | 593196656Smav AHCI_CCCC_EN); 594196656Smav ctlr->cccv = (ATA_INL(ctlr->r_mem, AHCI_CCCC) & 595196656Smav AHCI_CCCC_INT_MASK) >> AHCI_CCCC_INT_SHIFT; 596196656Smav if (bootverbose) { 597196656Smav device_printf(dev, 598196656Smav "CCC with %dms/4cmd enabled on vector %d\n", 599196656Smav ctlr->ccc, ctlr->cccv); 600196656Smav } 601196656Smav } 602195534Sscottl /* Enable AHCI interrupts */ 603195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, 604195534Sscottl ATA_INL(ctlr->r_mem, AHCI_GHC) | AHCI_GHC_IE); 605195534Sscottl return (0); 606195534Sscottl} 607195534Sscottl 608195534Sscottlstatic int 609195534Sscottlahci_suspend(device_t dev) 610195534Sscottl{ 611195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 612195534Sscottl 613195534Sscottl bus_generic_suspend(dev); 614195534Sscottl /* Disable interupts, so the state change(s) doesn't trigger */ 615195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, 616195534Sscottl ATA_INL(ctlr->r_mem, AHCI_GHC) & (~AHCI_GHC_IE)); 617195534Sscottl return 0; 618195534Sscottl} 619195534Sscottl 620195534Sscottlstatic int 621195534Sscottlahci_resume(device_t dev) 622195534Sscottl{ 623195534Sscottl int res; 624195534Sscottl 625195534Sscottl if ((res = ahci_ctlr_reset(dev)) != 0) 626195534Sscottl return (res); 627205422Smav ahci_ctlr_setup(dev); 628195534Sscottl return (bus_generic_resume(dev)); 629195534Sscottl} 630195534Sscottl 631195534Sscottlstatic int 632195534Sscottlahci_setup_interrupt(device_t dev) 633195534Sscottl{ 634195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 635195534Sscottl int i, msi = 1; 636195534Sscottl 637195534Sscottl /* Process hints. */ 638245875Smav if (ctlr->quirks & AHCI_Q_NOMSI) 639245875Smav msi = 0; 640195534Sscottl resource_int_value(device_get_name(dev), 641195534Sscottl device_get_unit(dev), "msi", &msi); 642195534Sscottl if (msi < 0) 643195534Sscottl msi = 0; 644195534Sscottl else if (msi == 1) 645195534Sscottl msi = min(1, pci_msi_count(dev)); 646195534Sscottl else if (msi > 1) 647195534Sscottl msi = pci_msi_count(dev); 648195534Sscottl /* Allocate MSI if needed/present. */ 649195534Sscottl if (msi && pci_alloc_msi(dev, &msi) == 0) { 650195534Sscottl ctlr->numirqs = msi; 651195534Sscottl } else { 652195534Sscottl msi = 0; 653195534Sscottl ctlr->numirqs = 1; 654195534Sscottl } 655195534Sscottl /* Check for single MSI vector fallback. */ 656195534Sscottl if (ctlr->numirqs > 1 && 657195534Sscottl (ATA_INL(ctlr->r_mem, AHCI_GHC) & AHCI_GHC_MRSM) != 0) { 658195534Sscottl device_printf(dev, "Falling back to one MSI\n"); 659195534Sscottl ctlr->numirqs = 1; 660195534Sscottl } 661195534Sscottl /* Allocate all IRQs. */ 662195534Sscottl for (i = 0; i < ctlr->numirqs; i++) { 663195534Sscottl ctlr->irqs[i].ctlr = ctlr; 664195534Sscottl ctlr->irqs[i].r_irq_rid = i + (msi ? 1 : 0); 665196656Smav if (ctlr->numirqs == 1 || i >= ctlr->channels || 666196656Smav (ctlr->ccc && i == ctlr->cccv)) 667195534Sscottl ctlr->irqs[i].mode = AHCI_IRQ_MODE_ALL; 668195534Sscottl else if (i == ctlr->numirqs - 1) 669195534Sscottl ctlr->irqs[i].mode = AHCI_IRQ_MODE_AFTER; 670195534Sscottl else 671195534Sscottl ctlr->irqs[i].mode = AHCI_IRQ_MODE_ONE; 672195534Sscottl if (!(ctlr->irqs[i].r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 673195534Sscottl &ctlr->irqs[i].r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) { 674195534Sscottl device_printf(dev, "unable to map interrupt\n"); 675195534Sscottl return ENXIO; 676195534Sscottl } 677195534Sscottl if ((bus_setup_intr(dev, ctlr->irqs[i].r_irq, ATA_INTR_FLAGS, NULL, 678195534Sscottl (ctlr->irqs[i].mode == AHCI_IRQ_MODE_ONE) ? ahci_intr_one : ahci_intr, 679195534Sscottl &ctlr->irqs[i], &ctlr->irqs[i].handle))) { 680195534Sscottl /* SOS XXX release r_irq */ 681195534Sscottl device_printf(dev, "unable to setup interrupt\n"); 682195534Sscottl return ENXIO; 683195534Sscottl } 684202011Smav if (ctlr->numirqs > 1) { 685202011Smav bus_describe_intr(dev, ctlr->irqs[i].r_irq, 686202011Smav ctlr->irqs[i].handle, 687202011Smav ctlr->irqs[i].mode == AHCI_IRQ_MODE_ONE ? 688202011Smav "ch%d" : "%d", i); 689202011Smav } 690195534Sscottl } 691195534Sscottl return (0); 692195534Sscottl} 693195534Sscottl 694195534Sscottl/* 695195534Sscottl * Common case interrupt handler. 696195534Sscottl */ 697195534Sscottlstatic void 698195534Sscottlahci_intr(void *data) 699195534Sscottl{ 700195534Sscottl struct ahci_controller_irq *irq = data; 701195534Sscottl struct ahci_controller *ctlr = irq->ctlr; 702205422Smav u_int32_t is, ise = 0; 703195534Sscottl void *arg; 704195534Sscottl int unit; 705195534Sscottl 706196656Smav if (irq->mode == AHCI_IRQ_MODE_ALL) { 707195534Sscottl unit = 0; 708196656Smav if (ctlr->ccc) 709196656Smav is = ctlr->ichannels; 710196656Smav else 711196656Smav is = ATA_INL(ctlr->r_mem, AHCI_IS); 712196656Smav } else { /* AHCI_IRQ_MODE_AFTER */ 713195534Sscottl unit = irq->r_irq_rid - 1; 714196656Smav is = ATA_INL(ctlr->r_mem, AHCI_IS); 715196656Smav } 716205422Smav /* CCC interrupt is edge triggered. */ 717205422Smav if (ctlr->ccc) 718205422Smav ise = 1 << ctlr->cccv; 719200814Smav /* Some controllers have edge triggered IS. */ 720200814Smav if (ctlr->quirks & AHCI_Q_EDGEIS) 721205422Smav ise |= is; 722205422Smav if (ise != 0) 723205422Smav ATA_OUTL(ctlr->r_mem, AHCI_IS, ise); 724195534Sscottl for (; unit < ctlr->channels; unit++) { 725195534Sscottl if ((is & (1 << unit)) != 0 && 726195534Sscottl (arg = ctlr->interrupt[unit].argument)) { 727199322Smav ctlr->interrupt[unit].function(arg); 728195534Sscottl } 729195534Sscottl } 730200814Smav /* AHCI declares level triggered IS. */ 731200814Smav if (!(ctlr->quirks & AHCI_Q_EDGEIS)) 732200814Smav ATA_OUTL(ctlr->r_mem, AHCI_IS, is); 733195534Sscottl} 734195534Sscottl 735195534Sscottl/* 736195534Sscottl * Simplified interrupt handler for multivector MSI mode. 737195534Sscottl */ 738195534Sscottlstatic void 739195534Sscottlahci_intr_one(void *data) 740195534Sscottl{ 741195534Sscottl struct ahci_controller_irq *irq = data; 742195534Sscottl struct ahci_controller *ctlr = irq->ctlr; 743195534Sscottl void *arg; 744195534Sscottl int unit; 745195534Sscottl 746195534Sscottl unit = irq->r_irq_rid - 1; 747202011Smav /* Some controllers have edge triggered IS. */ 748202011Smav if (ctlr->quirks & AHCI_Q_EDGEIS) 749202011Smav ATA_OUTL(ctlr->r_mem, AHCI_IS, 1 << unit); 750195534Sscottl if ((arg = ctlr->interrupt[unit].argument)) 751195534Sscottl ctlr->interrupt[unit].function(arg); 752202011Smav /* AHCI declares level triggered IS. */ 753202011Smav if (!(ctlr->quirks & AHCI_Q_EDGEIS)) 754202011Smav ATA_OUTL(ctlr->r_mem, AHCI_IS, 1 << unit); 755195534Sscottl} 756195534Sscottl 757195534Sscottlstatic struct resource * 758195534Sscottlahci_alloc_resource(device_t dev, device_t child, int type, int *rid, 759195534Sscottl u_long start, u_long end, u_long count, u_int flags) 760195534Sscottl{ 761195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 762238805Smav struct resource *res; 763195534Sscottl long st; 764238805Smav int offset, size, unit; 765195534Sscottl 766238805Smav unit = (intptr_t)device_get_ivars(child); 767238805Smav res = NULL; 768195534Sscottl switch (type) { 769195534Sscottl case SYS_RES_MEMORY: 770238805Smav if (unit >= 0) { 771238805Smav offset = AHCI_OFFSET + (unit << 7); 772238805Smav size = 128; 773238805Smav } else if (*rid == 0) { 774238805Smav offset = AHCI_EM_CTL; 775238805Smav size = 4; 776238805Smav } else { 777238805Smav offset = (ctlr->emloc & 0xffff0000) >> 14; 778238805Smav size = (ctlr->emloc & 0x0000ffff) << 2; 779238805Smav if (*rid != 1) { 780238805Smav if (*rid == 2 && (ctlr->capsem & 781238805Smav (AHCI_EM_XMT | AHCI_EM_SMB)) == 0) 782238805Smav offset += size; 783238805Smav else 784238805Smav break; 785238805Smav } 786238805Smav } 787195534Sscottl st = rman_get_start(ctlr->r_mem); 788195534Sscottl res = rman_reserve_resource(&ctlr->sc_iomem, st + offset, 789238805Smav st + offset + size - 1, size, RF_ACTIVE, child); 790195534Sscottl if (res) { 791195534Sscottl bus_space_handle_t bsh; 792195534Sscottl bus_space_tag_t bst; 793195534Sscottl bsh = rman_get_bushandle(ctlr->r_mem); 794195534Sscottl bst = rman_get_bustag(ctlr->r_mem); 795195534Sscottl bus_space_subregion(bst, bsh, offset, 128, &bsh); 796195534Sscottl rman_set_bushandle(res, bsh); 797195534Sscottl rman_set_bustag(res, bst); 798195534Sscottl } 799195534Sscottl break; 800195534Sscottl case SYS_RES_IRQ: 801195534Sscottl if (*rid == ATA_IRQ_RID) 802195534Sscottl res = ctlr->irqs[0].r_irq; 803195534Sscottl break; 804195534Sscottl } 805195534Sscottl return (res); 806195534Sscottl} 807195534Sscottl 808195534Sscottlstatic int 809195534Sscottlahci_release_resource(device_t dev, device_t child, int type, int rid, 810195534Sscottl struct resource *r) 811195534Sscottl{ 812195534Sscottl 813195534Sscottl switch (type) { 814195534Sscottl case SYS_RES_MEMORY: 815195534Sscottl rman_release_resource(r); 816195534Sscottl return (0); 817195534Sscottl case SYS_RES_IRQ: 818195534Sscottl if (rid != ATA_IRQ_RID) 819195534Sscottl return ENOENT; 820195534Sscottl return (0); 821195534Sscottl } 822195534Sscottl return (EINVAL); 823195534Sscottl} 824195534Sscottl 825195534Sscottlstatic int 826195534Sscottlahci_setup_intr(device_t dev, device_t child, struct resource *irq, 827195534Sscottl int flags, driver_filter_t *filter, driver_intr_t *function, 828195534Sscottl void *argument, void **cookiep) 829195534Sscottl{ 830195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 831195534Sscottl int unit = (intptr_t)device_get_ivars(child); 832195534Sscottl 833195534Sscottl if (filter != NULL) { 834195534Sscottl printf("ahci.c: we cannot use a filter here\n"); 835195534Sscottl return (EINVAL); 836195534Sscottl } 837195534Sscottl ctlr->interrupt[unit].function = function; 838195534Sscottl ctlr->interrupt[unit].argument = argument; 839195534Sscottl return (0); 840195534Sscottl} 841195534Sscottl 842195534Sscottlstatic int 843195534Sscottlahci_teardown_intr(device_t dev, device_t child, struct resource *irq, 844195534Sscottl void *cookie) 845195534Sscottl{ 846195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 847195534Sscottl int unit = (intptr_t)device_get_ivars(child); 848195534Sscottl 849195534Sscottl ctlr->interrupt[unit].function = NULL; 850195534Sscottl ctlr->interrupt[unit].argument = NULL; 851195534Sscottl return (0); 852195534Sscottl} 853195534Sscottl 854195534Sscottlstatic int 855195534Sscottlahci_print_child(device_t dev, device_t child) 856195534Sscottl{ 857238805Smav int retval, channel; 858195534Sscottl 859195534Sscottl retval = bus_print_child_header(dev, child); 860238805Smav channel = (int)(intptr_t)device_get_ivars(child); 861238805Smav if (channel >= 0) 862238805Smav retval += printf(" at channel %d", channel); 863195534Sscottl retval += bus_print_child_footer(dev, child); 864195534Sscottl return (retval); 865195534Sscottl} 866195534Sscottl 867208410Smavstatic int 868208410Smavahci_child_location_str(device_t dev, device_t child, char *buf, 869208410Smav size_t buflen) 870208410Smav{ 871238805Smav int channel; 872208410Smav 873238805Smav channel = (int)(intptr_t)device_get_ivars(child); 874238805Smav if (channel >= 0) 875238805Smav snprintf(buf, buflen, "channel=%d", channel); 876208410Smav return (0); 877208410Smav} 878208410Smav 879195534Sscottldevclass_t ahci_devclass; 880195534Sscottlstatic device_method_t ahci_methods[] = { 881195534Sscottl DEVMETHOD(device_probe, ahci_probe), 882195534Sscottl DEVMETHOD(device_attach, ahci_attach), 883195534Sscottl DEVMETHOD(device_detach, ahci_detach), 884195534Sscottl DEVMETHOD(device_suspend, ahci_suspend), 885195534Sscottl DEVMETHOD(device_resume, ahci_resume), 886195534Sscottl DEVMETHOD(bus_print_child, ahci_print_child), 887195534Sscottl DEVMETHOD(bus_alloc_resource, ahci_alloc_resource), 888195534Sscottl DEVMETHOD(bus_release_resource, ahci_release_resource), 889195534Sscottl DEVMETHOD(bus_setup_intr, ahci_setup_intr), 890195534Sscottl DEVMETHOD(bus_teardown_intr,ahci_teardown_intr), 891208410Smav DEVMETHOD(bus_child_location_str, ahci_child_location_str), 892195534Sscottl { 0, 0 } 893195534Sscottl}; 894195534Sscottlstatic driver_t ahci_driver = { 895195534Sscottl "ahci", 896195534Sscottl ahci_methods, 897195534Sscottl sizeof(struct ahci_controller) 898195534Sscottl}; 899195534SscottlDRIVER_MODULE(ahci, pci, ahci_driver, ahci_devclass, 0, 0); 900199322Smavstatic device_method_t ahci_ata_methods[] = { 901199322Smav DEVMETHOD(device_probe, ahci_ata_probe), 902199322Smav DEVMETHOD(device_attach, ahci_attach), 903199322Smav DEVMETHOD(device_detach, ahci_detach), 904199322Smav DEVMETHOD(device_suspend, ahci_suspend), 905199322Smav DEVMETHOD(device_resume, ahci_resume), 906199322Smav DEVMETHOD(bus_print_child, ahci_print_child), 907199322Smav DEVMETHOD(bus_alloc_resource, ahci_alloc_resource), 908199322Smav DEVMETHOD(bus_release_resource, ahci_release_resource), 909199322Smav DEVMETHOD(bus_setup_intr, ahci_setup_intr), 910199322Smav DEVMETHOD(bus_teardown_intr,ahci_teardown_intr), 911208410Smav DEVMETHOD(bus_child_location_str, ahci_child_location_str), 912199322Smav { 0, 0 } 913199322Smav}; 914199322Smavstatic driver_t ahci_ata_driver = { 915199322Smav "ahci", 916199322Smav ahci_ata_methods, 917199322Smav sizeof(struct ahci_controller) 918199322Smav}; 919199322SmavDRIVER_MODULE(ahci, atapci, ahci_ata_driver, ahci_devclass, 0, 0); 920195534SscottlMODULE_VERSION(ahci, 1); 921195534SscottlMODULE_DEPEND(ahci, cam, 1, 1, 1); 922195534Sscottl 923195534Sscottlstatic int 924195534Sscottlahci_ch_probe(device_t dev) 925195534Sscottl{ 926195534Sscottl 927195534Sscottl device_set_desc_copy(dev, "AHCI channel"); 928195534Sscottl return (0); 929195534Sscottl} 930195534Sscottl 931195534Sscottlstatic int 932195534Sscottlahci_ch_attach(device_t dev) 933195534Sscottl{ 934195534Sscottl struct ahci_controller *ctlr = device_get_softc(device_get_parent(dev)); 935195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 936195534Sscottl struct cam_devq *devq; 937199821Smav int rid, error, i, sata_rev = 0; 938203123Smav u_int32_t version; 939195534Sscottl 940195534Sscottl ch->dev = dev; 941195534Sscottl ch->unit = (intptr_t)device_get_ivars(dev); 942196656Smav ch->caps = ctlr->caps; 943196656Smav ch->caps2 = ctlr->caps2; 944199322Smav ch->quirks = ctlr->quirks; 945215725Smav ch->numslots = ((ch->caps & AHCI_CAP_NCS) >> AHCI_CAP_NCS_SHIFT) + 1; 946196656Smav mtx_init(&ch->mtx, "AHCI channel lock", NULL, MTX_DEF); 947195534Sscottl resource_int_value(device_get_name(dev), 948195534Sscottl device_get_unit(dev), "pm_level", &ch->pm_level); 949196656Smav if (ch->pm_level > 3) 950196656Smav callout_init_mtx(&ch->pm_timer, &ch->mtx, 0); 951220576Smav callout_init_mtx(&ch->reset_timer, &ch->mtx, 0); 952195534Sscottl /* Limit speed for my onboard JMicron external port. 953195534Sscottl * It is not eSATA really. */ 954195534Sscottl if (pci_get_devid(ctlr->dev) == 0x2363197b && 955195534Sscottl pci_get_subvendor(ctlr->dev) == 0x1043 && 956195534Sscottl pci_get_subdevice(ctlr->dev) == 0x81e4 && 957195534Sscottl ch->unit == 0) 958199821Smav sata_rev = 1; 959203030Smav if (ch->quirks & AHCI_Q_SATA2) 960203030Smav sata_rev = 2; 961195534Sscottl resource_int_value(device_get_name(dev), 962199821Smav device_get_unit(dev), "sata_rev", &sata_rev); 963199821Smav for (i = 0; i < 16; i++) { 964199821Smav ch->user[i].revision = sata_rev; 965199821Smav ch->user[i].mode = 0; 966199821Smav ch->user[i].bytecount = 8192; 967199821Smav ch->user[i].tags = ch->numslots; 968207499Smav ch->user[i].caps = 0; 969199821Smav ch->curr[i] = ch->user[i]; 970207499Smav if (ch->pm_level) { 971207499Smav ch->user[i].caps = CTS_SATA_CAPS_H_PMREQ | 972207499Smav CTS_SATA_CAPS_H_APST | 973207499Smav CTS_SATA_CAPS_D_PMREQ | CTS_SATA_CAPS_D_APST; 974207499Smav } 975220602Smav ch->user[i].caps |= CTS_SATA_CAPS_H_DMAAA | 976220602Smav CTS_SATA_CAPS_H_AN; 977199821Smav } 978238805Smav rid = 0; 979195534Sscottl if (!(ch->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 980195534Sscottl &rid, RF_ACTIVE))) 981195534Sscottl return (ENXIO); 982195534Sscottl ahci_dmainit(dev); 983195534Sscottl ahci_slotsalloc(dev); 984208375Smav ahci_ch_init(dev); 985195534Sscottl mtx_lock(&ch->mtx); 986195534Sscottl rid = ATA_IRQ_RID; 987195534Sscottl if (!(ch->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 988195534Sscottl &rid, RF_SHAREABLE | RF_ACTIVE))) { 989195534Sscottl device_printf(dev, "Unable to map interrupt\n"); 990208813Smav error = ENXIO; 991208813Smav goto err0; 992195534Sscottl } 993195534Sscottl if ((bus_setup_intr(dev, ch->r_irq, ATA_INTR_FLAGS, NULL, 994195534Sscottl ahci_ch_intr_locked, dev, &ch->ih))) { 995195534Sscottl device_printf(dev, "Unable to setup interrupt\n"); 996195534Sscottl error = ENXIO; 997195534Sscottl goto err1; 998195534Sscottl } 999203123Smav ch->chcaps = ATA_INL(ch->r_mem, AHCI_P_CMD); 1000203123Smav version = ATA_INL(ctlr->r_mem, AHCI_VS); 1001240383Smav if (version < 0x00010200 && (ctlr->caps & AHCI_CAP_FBSS)) 1002203123Smav ch->chcaps |= AHCI_P_CMD_FBSCP; 1003203123Smav if (bootverbose) { 1004203123Smav device_printf(dev, "Caps:%s%s%s%s%s\n", 1005203123Smav (ch->chcaps & AHCI_P_CMD_HPCP) ? " HPCP":"", 1006203123Smav (ch->chcaps & AHCI_P_CMD_MPSP) ? " MPSP":"", 1007203123Smav (ch->chcaps & AHCI_P_CMD_CPD) ? " CPD":"", 1008203123Smav (ch->chcaps & AHCI_P_CMD_ESP) ? " ESP":"", 1009203123Smav (ch->chcaps & AHCI_P_CMD_FBSCP) ? " FBSCP":""); 1010203123Smav } 1011195534Sscottl /* Create the device queue for our SIM. */ 1012195534Sscottl devq = cam_simq_alloc(ch->numslots); 1013195534Sscottl if (devq == NULL) { 1014195534Sscottl device_printf(dev, "Unable to allocate simq\n"); 1015195534Sscottl error = ENOMEM; 1016195534Sscottl goto err1; 1017195534Sscottl } 1018195534Sscottl /* Construct SIM entry */ 1019195534Sscottl ch->sim = cam_sim_alloc(ahciaction, ahcipoll, "ahcich", ch, 1020199178Smav device_get_unit(dev), &ch->mtx, 1021199278Smav min(2, ch->numslots), 1022199278Smav (ch->caps & AHCI_CAP_SNCQ) ? ch->numslots : 0, 1023199278Smav devq); 1024195534Sscottl if (ch->sim == NULL) { 1025208813Smav cam_simq_free(devq); 1026195534Sscottl device_printf(dev, "unable to allocate sim\n"); 1027195534Sscottl error = ENOMEM; 1028208813Smav goto err1; 1029195534Sscottl } 1030195534Sscottl if (xpt_bus_register(ch->sim, dev, 0) != CAM_SUCCESS) { 1031195534Sscottl device_printf(dev, "unable to register xpt bus\n"); 1032195534Sscottl error = ENXIO; 1033195534Sscottl goto err2; 1034195534Sscottl } 1035195534Sscottl if (xpt_create_path(&ch->path, /*periph*/NULL, cam_sim_path(ch->sim), 1036195534Sscottl CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 1037195534Sscottl device_printf(dev, "unable to create path\n"); 1038195534Sscottl error = ENXIO; 1039195534Sscottl goto err3; 1040195534Sscottl } 1041196656Smav if (ch->pm_level > 3) { 1042196656Smav callout_reset(&ch->pm_timer, 1043196656Smav (ch->pm_level == 4) ? hz / 1000 : hz / 8, 1044196656Smav ahci_ch_pm, dev); 1045196656Smav } 1046195534Sscottl mtx_unlock(&ch->mtx); 1047195534Sscottl return (0); 1048195534Sscottl 1049195534Sscottlerr3: 1050195534Sscottl xpt_bus_deregister(cam_sim_path(ch->sim)); 1051195534Sscottlerr2: 1052195534Sscottl cam_sim_free(ch->sim, /*free_devq*/TRUE); 1053195534Sscottlerr1: 1054195534Sscottl bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 1055208813Smaverr0: 1056195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 1057195534Sscottl mtx_unlock(&ch->mtx); 1058214325Smav mtx_destroy(&ch->mtx); 1059195534Sscottl return (error); 1060195534Sscottl} 1061195534Sscottl 1062195534Sscottlstatic int 1063195534Sscottlahci_ch_detach(device_t dev) 1064195534Sscottl{ 1065195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1066195534Sscottl 1067195534Sscottl mtx_lock(&ch->mtx); 1068195534Sscottl xpt_async(AC_LOST_DEVICE, ch->path, NULL); 1069220576Smav /* Forget about reset. */ 1070220576Smav if (ch->resetting) { 1071220576Smav ch->resetting = 0; 1072220576Smav xpt_release_simq(ch->sim, TRUE); 1073220576Smav } 1074195534Sscottl xpt_free_path(ch->path); 1075195534Sscottl xpt_bus_deregister(cam_sim_path(ch->sim)); 1076195534Sscottl cam_sim_free(ch->sim, /*free_devq*/TRUE); 1077195534Sscottl mtx_unlock(&ch->mtx); 1078195534Sscottl 1079196656Smav if (ch->pm_level > 3) 1080196656Smav callout_drain(&ch->pm_timer); 1081220576Smav callout_drain(&ch->reset_timer); 1082195534Sscottl bus_teardown_intr(dev, ch->r_irq, ch->ih); 1083195534Sscottl bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 1084195534Sscottl 1085208375Smav ahci_ch_deinit(dev); 1086195534Sscottl ahci_slotsfree(dev); 1087195534Sscottl ahci_dmafini(dev); 1088195534Sscottl 1089195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 1090195534Sscottl mtx_destroy(&ch->mtx); 1091195534Sscottl return (0); 1092195534Sscottl} 1093195534Sscottl 1094195534Sscottlstatic int 1095208375Smavahci_ch_init(device_t dev) 1096195534Sscottl{ 1097195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1098208375Smav uint64_t work; 1099195534Sscottl 1100208375Smav /* Disable port interrupts */ 1101208375Smav ATA_OUTL(ch->r_mem, AHCI_P_IE, 0); 1102208375Smav /* Setup work areas */ 1103208375Smav work = ch->dma.work_bus + AHCI_CL_OFFSET; 1104208375Smav ATA_OUTL(ch->r_mem, AHCI_P_CLB, work & 0xffffffff); 1105208375Smav ATA_OUTL(ch->r_mem, AHCI_P_CLBU, work >> 32); 1106208375Smav work = ch->dma.rfis_bus; 1107208375Smav ATA_OUTL(ch->r_mem, AHCI_P_FB, work & 0xffffffff); 1108208375Smav ATA_OUTL(ch->r_mem, AHCI_P_FBU, work >> 32); 1109208375Smav /* Activate the channel and power/spin up device */ 1110208375Smav ATA_OUTL(ch->r_mem, AHCI_P_CMD, 1111208375Smav (AHCI_P_CMD_ACTIVE | AHCI_P_CMD_POD | AHCI_P_CMD_SUD | 1112208375Smav ((ch->pm_level == 2 || ch->pm_level == 3) ? AHCI_P_CMD_ALPE : 0) | 1113208375Smav ((ch->pm_level > 2) ? AHCI_P_CMD_ASP : 0 ))); 1114208375Smav ahci_start_fr(dev); 1115208375Smav ahci_start(dev, 1); 1116208375Smav return (0); 1117208375Smav} 1118208375Smav 1119208375Smavstatic int 1120208375Smavahci_ch_deinit(device_t dev) 1121208375Smav{ 1122208375Smav struct ahci_channel *ch = device_get_softc(dev); 1123208375Smav 1124195534Sscottl /* Disable port interrupts. */ 1125195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 0); 1126195534Sscottl /* Reset command register. */ 1127195534Sscottl ahci_stop(dev); 1128195534Sscottl ahci_stop_fr(dev); 1129195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, 0); 1130195534Sscottl /* Allow everything, including partial and slumber modes. */ 1131195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SCTL, 0); 1132195534Sscottl /* Request slumber mode transition and give some time to get there. */ 1133195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, AHCI_P_CMD_SLUMBER); 1134195534Sscottl DELAY(100); 1135195534Sscottl /* Disable PHY. */ 1136195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SCTL, ATA_SC_DET_DISABLE); 1137195534Sscottl return (0); 1138195534Sscottl} 1139195534Sscottl 1140195534Sscottlstatic int 1141208375Smavahci_ch_suspend(device_t dev) 1142208375Smav{ 1143208375Smav struct ahci_channel *ch = device_get_softc(dev); 1144208375Smav 1145208375Smav mtx_lock(&ch->mtx); 1146208375Smav xpt_freeze_simq(ch->sim, 1); 1147220576Smav /* Forget about reset. */ 1148220576Smav if (ch->resetting) { 1149220576Smav ch->resetting = 0; 1150220576Smav callout_stop(&ch->reset_timer); 1151220576Smav xpt_release_simq(ch->sim, TRUE); 1152220576Smav } 1153208375Smav while (ch->oslots) 1154208375Smav msleep(ch, &ch->mtx, PRIBIO, "ahcisusp", hz/100); 1155208375Smav ahci_ch_deinit(dev); 1156208375Smav mtx_unlock(&ch->mtx); 1157208375Smav return (0); 1158208375Smav} 1159208375Smav 1160208375Smavstatic int 1161195534Sscottlahci_ch_resume(device_t dev) 1162195534Sscottl{ 1163195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1164195534Sscottl 1165208375Smav mtx_lock(&ch->mtx); 1166208375Smav ahci_ch_init(dev); 1167208375Smav ahci_reset(dev); 1168208375Smav xpt_release_simq(ch->sim, TRUE); 1169208375Smav mtx_unlock(&ch->mtx); 1170195534Sscottl return (0); 1171195534Sscottl} 1172195534Sscottl 1173195534Sscottldevclass_t ahcich_devclass; 1174195534Sscottlstatic device_method_t ahcich_methods[] = { 1175195534Sscottl DEVMETHOD(device_probe, ahci_ch_probe), 1176195534Sscottl DEVMETHOD(device_attach, ahci_ch_attach), 1177195534Sscottl DEVMETHOD(device_detach, ahci_ch_detach), 1178195534Sscottl DEVMETHOD(device_suspend, ahci_ch_suspend), 1179195534Sscottl DEVMETHOD(device_resume, ahci_ch_resume), 1180195534Sscottl { 0, 0 } 1181195534Sscottl}; 1182195534Sscottlstatic driver_t ahcich_driver = { 1183195534Sscottl "ahcich", 1184195534Sscottl ahcich_methods, 1185195534Sscottl sizeof(struct ahci_channel) 1186195534Sscottl}; 1187199322SmavDRIVER_MODULE(ahcich, ahci, ahcich_driver, ahcich_devclass, 0, 0); 1188195534Sscottl 1189195534Sscottlstruct ahci_dc_cb_args { 1190195534Sscottl bus_addr_t maddr; 1191195534Sscottl int error; 1192195534Sscottl}; 1193195534Sscottl 1194195534Sscottlstatic void 1195195534Sscottlahci_dmainit(device_t dev) 1196195534Sscottl{ 1197195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1198195534Sscottl struct ahci_dc_cb_args dcba; 1199203123Smav size_t rfsize; 1200195534Sscottl 1201195534Sscottl if (ch->caps & AHCI_CAP_64BIT) 1202195534Sscottl ch->dma.max_address = BUS_SPACE_MAXADDR; 1203195534Sscottl else 1204195534Sscottl ch->dma.max_address = BUS_SPACE_MAXADDR_32BIT; 1205195534Sscottl /* Command area. */ 1206195534Sscottl if (bus_dma_tag_create(bus_get_dma_tag(dev), 1024, 0, 1207195534Sscottl ch->dma.max_address, BUS_SPACE_MAXADDR, 1208195534Sscottl NULL, NULL, AHCI_WORK_SIZE, 1, AHCI_WORK_SIZE, 1209195534Sscottl 0, NULL, NULL, &ch->dma.work_tag)) 1210195534Sscottl goto error; 1211195534Sscottl if (bus_dmamem_alloc(ch->dma.work_tag, (void **)&ch->dma.work, 0, 1212195534Sscottl &ch->dma.work_map)) 1213195534Sscottl goto error; 1214195534Sscottl if (bus_dmamap_load(ch->dma.work_tag, ch->dma.work_map, ch->dma.work, 1215195534Sscottl AHCI_WORK_SIZE, ahci_dmasetupc_cb, &dcba, 0) || dcba.error) { 1216195534Sscottl bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 1217195534Sscottl goto error; 1218195534Sscottl } 1219195534Sscottl ch->dma.work_bus = dcba.maddr; 1220195534Sscottl /* FIS receive area. */ 1221203123Smav if (ch->chcaps & AHCI_P_CMD_FBSCP) 1222203123Smav rfsize = 4096; 1223203123Smav else 1224203123Smav rfsize = 256; 1225203123Smav if (bus_dma_tag_create(bus_get_dma_tag(dev), rfsize, 0, 1226195534Sscottl ch->dma.max_address, BUS_SPACE_MAXADDR, 1227203123Smav NULL, NULL, rfsize, 1, rfsize, 1228195534Sscottl 0, NULL, NULL, &ch->dma.rfis_tag)) 1229195534Sscottl goto error; 1230195534Sscottl if (bus_dmamem_alloc(ch->dma.rfis_tag, (void **)&ch->dma.rfis, 0, 1231195534Sscottl &ch->dma.rfis_map)) 1232195534Sscottl goto error; 1233195534Sscottl if (bus_dmamap_load(ch->dma.rfis_tag, ch->dma.rfis_map, ch->dma.rfis, 1234203123Smav rfsize, ahci_dmasetupc_cb, &dcba, 0) || dcba.error) { 1235195534Sscottl bus_dmamem_free(ch->dma.rfis_tag, ch->dma.rfis, ch->dma.rfis_map); 1236195534Sscottl goto error; 1237195534Sscottl } 1238195534Sscottl ch->dma.rfis_bus = dcba.maddr; 1239195534Sscottl /* Data area. */ 1240195534Sscottl if (bus_dma_tag_create(bus_get_dma_tag(dev), 2, 0, 1241195534Sscottl ch->dma.max_address, BUS_SPACE_MAXADDR, 1242195534Sscottl NULL, NULL, 1243195534Sscottl AHCI_SG_ENTRIES * PAGE_SIZE * ch->numslots, 1244195534Sscottl AHCI_SG_ENTRIES, AHCI_PRD_MAX, 1245195534Sscottl 0, busdma_lock_mutex, &ch->mtx, &ch->dma.data_tag)) { 1246195534Sscottl goto error; 1247195534Sscottl } 1248195534Sscottl return; 1249195534Sscottl 1250195534Sscottlerror: 1251195534Sscottl device_printf(dev, "WARNING - DMA initialization failed\n"); 1252195534Sscottl ahci_dmafini(dev); 1253195534Sscottl} 1254195534Sscottl 1255195534Sscottlstatic void 1256195534Sscottlahci_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error) 1257195534Sscottl{ 1258195534Sscottl struct ahci_dc_cb_args *dcba = (struct ahci_dc_cb_args *)xsc; 1259195534Sscottl 1260195534Sscottl if (!(dcba->error = error)) 1261195534Sscottl dcba->maddr = segs[0].ds_addr; 1262195534Sscottl} 1263195534Sscottl 1264195534Sscottlstatic void 1265195534Sscottlahci_dmafini(device_t dev) 1266195534Sscottl{ 1267195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1268195534Sscottl 1269195534Sscottl if (ch->dma.data_tag) { 1270195534Sscottl bus_dma_tag_destroy(ch->dma.data_tag); 1271195534Sscottl ch->dma.data_tag = NULL; 1272195534Sscottl } 1273195534Sscottl if (ch->dma.rfis_bus) { 1274195534Sscottl bus_dmamap_unload(ch->dma.rfis_tag, ch->dma.rfis_map); 1275195534Sscottl bus_dmamem_free(ch->dma.rfis_tag, ch->dma.rfis, ch->dma.rfis_map); 1276195534Sscottl ch->dma.rfis_bus = 0; 1277195534Sscottl ch->dma.rfis_map = NULL; 1278195534Sscottl ch->dma.rfis = NULL; 1279195534Sscottl } 1280195534Sscottl if (ch->dma.work_bus) { 1281195534Sscottl bus_dmamap_unload(ch->dma.work_tag, ch->dma.work_map); 1282195534Sscottl bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 1283195534Sscottl ch->dma.work_bus = 0; 1284195534Sscottl ch->dma.work_map = NULL; 1285195534Sscottl ch->dma.work = NULL; 1286195534Sscottl } 1287195534Sscottl if (ch->dma.work_tag) { 1288195534Sscottl bus_dma_tag_destroy(ch->dma.work_tag); 1289195534Sscottl ch->dma.work_tag = NULL; 1290195534Sscottl } 1291195534Sscottl} 1292195534Sscottl 1293195534Sscottlstatic void 1294195534Sscottlahci_slotsalloc(device_t dev) 1295195534Sscottl{ 1296195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1297195534Sscottl int i; 1298195534Sscottl 1299195534Sscottl /* Alloc and setup command/dma slots */ 1300195534Sscottl bzero(ch->slot, sizeof(ch->slot)); 1301195534Sscottl for (i = 0; i < ch->numslots; i++) { 1302195534Sscottl struct ahci_slot *slot = &ch->slot[i]; 1303195534Sscottl 1304195534Sscottl slot->dev = dev; 1305195534Sscottl slot->slot = i; 1306195534Sscottl slot->state = AHCI_SLOT_EMPTY; 1307195534Sscottl slot->ccb = NULL; 1308195534Sscottl callout_init_mtx(&slot->timeout, &ch->mtx, 0); 1309195534Sscottl 1310195534Sscottl if (bus_dmamap_create(ch->dma.data_tag, 0, &slot->dma.data_map)) 1311195534Sscottl device_printf(ch->dev, "FAILURE - create data_map\n"); 1312195534Sscottl } 1313195534Sscottl} 1314195534Sscottl 1315195534Sscottlstatic void 1316195534Sscottlahci_slotsfree(device_t dev) 1317195534Sscottl{ 1318195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1319195534Sscottl int i; 1320195534Sscottl 1321195534Sscottl /* Free all dma slots */ 1322195534Sscottl for (i = 0; i < ch->numslots; i++) { 1323195534Sscottl struct ahci_slot *slot = &ch->slot[i]; 1324195534Sscottl 1325196656Smav callout_drain(&slot->timeout); 1326195534Sscottl if (slot->dma.data_map) { 1327195534Sscottl bus_dmamap_destroy(ch->dma.data_tag, slot->dma.data_map); 1328195534Sscottl slot->dma.data_map = NULL; 1329195534Sscottl } 1330195534Sscottl } 1331195534Sscottl} 1332195534Sscottl 1333220657Smavstatic int 1334198319Smavahci_phy_check_events(device_t dev, u_int32_t serr) 1335195534Sscottl{ 1336195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1337195534Sscottl 1338220657Smav if (((ch->pm_level == 0) && (serr & ATA_SE_PHY_CHANGED)) || 1339220657Smav ((ch->pm_level != 0 || ch->listening) && (serr & ATA_SE_EXCHANGED))) { 1340195534Sscottl u_int32_t status = ATA_INL(ch->r_mem, AHCI_P_SSTS); 1341203108Smav union ccb *ccb; 1342203108Smav 1343203165Smav if (bootverbose) { 1344220657Smav if ((status & ATA_SS_DET_MASK) != ATA_SS_DET_NO_DEVICE) 1345195534Sscottl device_printf(dev, "CONNECT requested\n"); 1346220657Smav else 1347195534Sscottl device_printf(dev, "DISCONNECT requested\n"); 1348195534Sscottl } 1349203165Smav ahci_reset(dev); 1350203108Smav if ((ccb = xpt_alloc_ccb_nowait()) == NULL) 1351220657Smav return (0); 1352203108Smav if (xpt_create_path(&ccb->ccb_h.path, NULL, 1353203108Smav cam_sim_path(ch->sim), 1354203108Smav CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 1355203108Smav xpt_free_ccb(ccb); 1356220657Smav return (0); 1357203108Smav } 1358203108Smav xpt_rescan(ccb); 1359220657Smav return (1); 1360195534Sscottl } 1361220657Smav return (0); 1362195534Sscottl} 1363195534Sscottl 1364195534Sscottlstatic void 1365220657Smavahci_cpd_check_events(device_t dev) 1366220657Smav{ 1367220657Smav struct ahci_channel *ch = device_get_softc(dev); 1368220657Smav u_int32_t status; 1369220657Smav union ccb *ccb; 1370220657Smav 1371220657Smav if (ch->pm_level == 0) 1372220657Smav return; 1373220657Smav 1374220657Smav status = ATA_INL(ch->r_mem, AHCI_P_CMD); 1375220657Smav if ((status & AHCI_P_CMD_CPD) == 0) 1376220657Smav return; 1377220657Smav 1378220657Smav if (bootverbose) { 1379220657Smav if (status & AHCI_P_CMD_CPS) { 1380220657Smav device_printf(dev, "COLD CONNECT requested\n"); 1381220657Smav } else 1382220657Smav device_printf(dev, "COLD DISCONNECT requested\n"); 1383220657Smav } 1384220657Smav ahci_reset(dev); 1385220657Smav if ((ccb = xpt_alloc_ccb_nowait()) == NULL) 1386220657Smav return; 1387220657Smav if (xpt_create_path(&ccb->ccb_h.path, NULL, cam_sim_path(ch->sim), 1388220657Smav CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 1389220657Smav xpt_free_ccb(ccb); 1390220657Smav return; 1391220657Smav } 1392220657Smav xpt_rescan(ccb); 1393220657Smav} 1394220657Smav 1395220657Smavstatic void 1396196907Smavahci_notify_events(device_t dev, u_int32_t status) 1397196656Smav{ 1398196656Smav struct ahci_channel *ch = device_get_softc(dev); 1399196656Smav struct cam_path *dpath; 1400196656Smav int i; 1401196656Smav 1402200196Smav if (ch->caps & AHCI_CAP_SSNTF) 1403200196Smav ATA_OUTL(ch->r_mem, AHCI_P_SNTF, status); 1404196656Smav if (bootverbose) 1405196656Smav device_printf(dev, "SNTF 0x%04x\n", status); 1406196656Smav for (i = 0; i < 16; i++) { 1407196656Smav if ((status & (1 << i)) == 0) 1408196656Smav continue; 1409196656Smav if (xpt_create_path(&dpath, NULL, 1410196656Smav xpt_path_path_id(ch->path), i, 0) == CAM_REQ_CMP) { 1411196656Smav xpt_async(AC_SCSI_AEN, dpath, NULL); 1412196656Smav xpt_free_path(dpath); 1413196656Smav } 1414196656Smav } 1415196656Smav} 1416196656Smav 1417196656Smavstatic void 1418195534Sscottlahci_ch_intr_locked(void *data) 1419195534Sscottl{ 1420195534Sscottl device_t dev = (device_t)data; 1421195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1422195534Sscottl 1423195534Sscottl mtx_lock(&ch->mtx); 1424235333Smav xpt_batch_start(ch->sim); 1425195534Sscottl ahci_ch_intr(data); 1426235333Smav xpt_batch_done(ch->sim); 1427195534Sscottl mtx_unlock(&ch->mtx); 1428195534Sscottl} 1429195534Sscottl 1430195534Sscottlstatic void 1431196656Smavahci_ch_pm(void *arg) 1432196656Smav{ 1433196656Smav device_t dev = (device_t)arg; 1434196656Smav struct ahci_channel *ch = device_get_softc(dev); 1435196656Smav uint32_t work; 1436196656Smav 1437196656Smav if (ch->numrslots != 0) 1438196656Smav return; 1439196656Smav work = ATA_INL(ch->r_mem, AHCI_P_CMD); 1440196656Smav if (ch->pm_level == 4) 1441196656Smav work |= AHCI_P_CMD_PARTIAL; 1442196656Smav else 1443196656Smav work |= AHCI_P_CMD_SLUMBER; 1444196656Smav ATA_OUTL(ch->r_mem, AHCI_P_CMD, work); 1445196656Smav} 1446196656Smav 1447196656Smavstatic void 1448195534Sscottlahci_ch_intr(void *data) 1449195534Sscottl{ 1450195534Sscottl device_t dev = (device_t)data; 1451195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1452198319Smav uint32_t istatus, sstatus, cstatus, serr = 0, sntf = 0, ok, err; 1453195534Sscottl enum ahci_err_type et; 1454220657Smav int i, ccs, port, reset = 0; 1455195534Sscottl 1456195534Sscottl /* Read and clear interrupt statuses. */ 1457195534Sscottl istatus = ATA_INL(ch->r_mem, AHCI_P_IS); 1458196656Smav if (istatus == 0) 1459196656Smav return; 1460195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IS, istatus); 1461195534Sscottl /* Read command statuses. */ 1462196907Smav sstatus = ATA_INL(ch->r_mem, AHCI_P_SACT); 1463195534Sscottl cstatus = ATA_INL(ch->r_mem, AHCI_P_CI); 1464200196Smav if (istatus & AHCI_P_IX_SDB) { 1465200196Smav if (ch->caps & AHCI_CAP_SSNTF) 1466200196Smav sntf = ATA_INL(ch->r_mem, AHCI_P_SNTF); 1467203123Smav else if (ch->fbs_enabled) { 1468200196Smav u_int8_t *fis = ch->dma.rfis + 0x58; 1469200196Smav 1470203123Smav for (i = 0; i < 16; i++) { 1471203123Smav if (fis[1] & 0x80) { 1472203123Smav fis[1] &= 0x7f; 1473203123Smav sntf |= 1 << i; 1474203123Smav } 1475203123Smav fis += 256; 1476203123Smav } 1477203123Smav } else { 1478203123Smav u_int8_t *fis = ch->dma.rfis + 0x58; 1479203123Smav 1480200196Smav if (fis[1] & 0x80) 1481200196Smav sntf = (1 << (fis[1] & 0x0f)); 1482200196Smav } 1483200196Smav } 1484195534Sscottl /* Process PHY events */ 1485198319Smav if (istatus & (AHCI_P_IX_PC | AHCI_P_IX_PRC | AHCI_P_IX_OF | 1486198319Smav AHCI_P_IX_IF | AHCI_P_IX_HBD | AHCI_P_IX_HBF | AHCI_P_IX_TFE)) { 1487198319Smav serr = ATA_INL(ch->r_mem, AHCI_P_SERR); 1488198319Smav if (serr) { 1489198319Smav ATA_OUTL(ch->r_mem, AHCI_P_SERR, serr); 1490220657Smav reset = ahci_phy_check_events(dev, serr); 1491198319Smav } 1492198319Smav } 1493220657Smav /* Process cold presence detection events */ 1494220657Smav if ((istatus & AHCI_P_IX_CPD) && !reset) 1495220657Smav ahci_cpd_check_events(dev); 1496195534Sscottl /* Process command errors */ 1497198319Smav if (istatus & (AHCI_P_IX_OF | AHCI_P_IX_IF | 1498198319Smav AHCI_P_IX_HBD | AHCI_P_IX_HBF | AHCI_P_IX_TFE)) { 1499195534Sscottl ccs = (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CCS_MASK) 1500195534Sscottl >> AHCI_P_CMD_CCS_SHIFT; 1501203123Smav//device_printf(dev, "%s ERROR is %08x cs %08x ss %08x rs %08x tfd %02x serr %08x fbs %08x ccs %d\n", 1502203123Smav// __func__, istatus, cstatus, sstatus, ch->rslots, ATA_INL(ch->r_mem, AHCI_P_TFD), 1503203123Smav// serr, ATA_INL(ch->r_mem, AHCI_P_FBS), ccs); 1504203123Smav port = -1; 1505203123Smav if (ch->fbs_enabled) { 1506203123Smav uint32_t fbs = ATA_INL(ch->r_mem, AHCI_P_FBS); 1507203123Smav if (fbs & AHCI_P_FBS_SDE) { 1508203123Smav port = (fbs & AHCI_P_FBS_DWE) 1509203123Smav >> AHCI_P_FBS_DWE_SHIFT; 1510203123Smav } else { 1511203123Smav for (i = 0; i < 16; i++) { 1512203123Smav if (ch->numrslotspd[i] == 0) 1513203123Smav continue; 1514203123Smav if (port == -1) 1515203123Smav port = i; 1516203123Smav else if (port != i) { 1517203123Smav port = -2; 1518203123Smav break; 1519203123Smav } 1520203123Smav } 1521203123Smav } 1522203123Smav } 1523196656Smav err = ch->rslots & (cstatus | sstatus); 1524195534Sscottl } else { 1525195534Sscottl ccs = 0; 1526195534Sscottl err = 0; 1527203123Smav port = -1; 1528195534Sscottl } 1529195534Sscottl /* Complete all successfull commands. */ 1530196656Smav ok = ch->rslots & ~(cstatus | sstatus); 1531195534Sscottl for (i = 0; i < ch->numslots; i++) { 1532195534Sscottl if ((ok >> i) & 1) 1533195534Sscottl ahci_end_transaction(&ch->slot[i], AHCI_ERR_NONE); 1534195534Sscottl } 1535195534Sscottl /* On error, complete the rest of commands with error statuses. */ 1536195534Sscottl if (err) { 1537195534Sscottl if (ch->frozen) { 1538195534Sscottl union ccb *fccb = ch->frozen; 1539195534Sscottl ch->frozen = NULL; 1540195534Sscottl fccb->ccb_h.status = CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 1541198319Smav if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 1542198319Smav xpt_freeze_devq(fccb->ccb_h.path, 1); 1543198319Smav fccb->ccb_h.status |= CAM_DEV_QFRZN; 1544198319Smav } 1545195534Sscottl xpt_done(fccb); 1546195534Sscottl } 1547195534Sscottl for (i = 0; i < ch->numslots; i++) { 1548195534Sscottl /* XXX: reqests in loading state. */ 1549195534Sscottl if (((err >> i) & 1) == 0) 1550195534Sscottl continue; 1551203123Smav if (port >= 0 && 1552203123Smav ch->slot[i].ccb->ccb_h.target_id != port) 1553203123Smav continue; 1554198390Smav if (istatus & AHCI_P_IX_TFE) { 1555203123Smav if (port != -2) { 1556195534Sscottl /* Task File Error */ 1557203123Smav if (ch->numtslotspd[ 1558203123Smav ch->slot[i].ccb->ccb_h.target_id] == 0) { 1559195534Sscottl /* Untagged operation. */ 1560195534Sscottl if (i == ccs) 1561195534Sscottl et = AHCI_ERR_TFE; 1562195534Sscottl else 1563195534Sscottl et = AHCI_ERR_INNOCENT; 1564195534Sscottl } else { 1565195534Sscottl /* Tagged operation. */ 1566195534Sscottl et = AHCI_ERR_NCQ; 1567195534Sscottl } 1568203123Smav } else { 1569203123Smav et = AHCI_ERR_TFE; 1570203123Smav ch->fatalerr = 1; 1571203123Smav } 1572198390Smav } else if (istatus & AHCI_P_IX_IF) { 1573203123Smav if (ch->numtslots == 0 && i != ccs && port != -2) 1574198390Smav et = AHCI_ERR_INNOCENT; 1575198390Smav else 1576198390Smav et = AHCI_ERR_SATA; 1577195534Sscottl } else 1578195534Sscottl et = AHCI_ERR_INVALID; 1579195534Sscottl ahci_end_transaction(&ch->slot[i], et); 1580195534Sscottl } 1581203123Smav /* 1582203123Smav * We can't reinit port if there are some other 1583203123Smav * commands active, use resume to complete them. 1584203123Smav */ 1585220565Smav if (ch->rslots != 0 && !ch->recoverycmd) 1586203123Smav ATA_OUTL(ch->r_mem, AHCI_P_FBS, AHCI_P_FBS_EN | AHCI_P_FBS_DEC); 1587195534Sscottl } 1588196656Smav /* Process NOTIFY events */ 1589196907Smav if (sntf) 1590196907Smav ahci_notify_events(dev, sntf); 1591195534Sscottl} 1592195534Sscottl 1593195534Sscottl/* Must be called with channel locked. */ 1594195534Sscottlstatic int 1595195534Sscottlahci_check_collision(device_t dev, union ccb *ccb) 1596195534Sscottl{ 1597195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1598203123Smav int t = ccb->ccb_h.target_id; 1599195534Sscottl 1600195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1601195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1602199747Smav /* Tagged command while we have no supported tag free. */ 1603199747Smav if (((~ch->oslots) & (0xffffffff >> (32 - 1604203123Smav ch->curr[t].tags))) == 0) 1605199747Smav return (1); 1606203123Smav /* If we have FBS */ 1607203123Smav if (ch->fbs_enabled) { 1608203123Smav /* Tagged command while untagged are active. */ 1609203123Smav if (ch->numrslotspd[t] != 0 && ch->numtslotspd[t] == 0) 1610203123Smav return (1); 1611203123Smav } else { 1612203123Smav /* Tagged command while untagged are active. */ 1613203123Smav if (ch->numrslots != 0 && ch->numtslots == 0) 1614203123Smav return (1); 1615203123Smav /* Tagged command while tagged to other target is active. */ 1616203123Smav if (ch->numtslots != 0 && 1617203123Smav ch->taggedtarget != ccb->ccb_h.target_id) 1618203123Smav return (1); 1619203123Smav } 1620195534Sscottl } else { 1621203123Smav /* If we have FBS */ 1622203123Smav if (ch->fbs_enabled) { 1623203123Smav /* Untagged command while tagged are active. */ 1624203123Smav if (ch->numrslotspd[t] != 0 && ch->numtslotspd[t] != 0) 1625203123Smav return (1); 1626203123Smav } else { 1627203123Smav /* Untagged command while tagged are active. */ 1628203123Smav if (ch->numrslots != 0 && ch->numtslots != 0) 1629203123Smav return (1); 1630203123Smav } 1631195534Sscottl } 1632195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1633195534Sscottl (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) { 1634195534Sscottl /* Atomic command while anything active. */ 1635195534Sscottl if (ch->numrslots != 0) 1636195534Sscottl return (1); 1637195534Sscottl } 1638195534Sscottl /* We have some atomic command running. */ 1639195534Sscottl if (ch->aslots != 0) 1640195534Sscottl return (1); 1641195534Sscottl return (0); 1642195534Sscottl} 1643195534Sscottl 1644195534Sscottl/* Must be called with channel locked. */ 1645195534Sscottlstatic void 1646195534Sscottlahci_begin_transaction(device_t dev, union ccb *ccb) 1647195534Sscottl{ 1648195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1649195534Sscottl struct ahci_slot *slot; 1650199747Smav int tag, tags; 1651195534Sscottl 1652195534Sscottl /* Choose empty slot. */ 1653199747Smav tags = ch->numslots; 1654199747Smav if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1655199747Smav (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) 1656199747Smav tags = ch->curr[ccb->ccb_h.target_id].tags; 1657195534Sscottl tag = ch->lastslot; 1658199747Smav while (1) { 1659199747Smav if (tag >= tags) 1660195534Sscottl tag = 0; 1661199747Smav if (ch->slot[tag].state == AHCI_SLOT_EMPTY) 1662199747Smav break; 1663199747Smav tag++; 1664199747Smav }; 1665195534Sscottl ch->lastslot = tag; 1666195534Sscottl /* Occupy chosen slot. */ 1667195534Sscottl slot = &ch->slot[tag]; 1668195534Sscottl slot->ccb = ccb; 1669196656Smav /* Stop PM timer. */ 1670196656Smav if (ch->numrslots == 0 && ch->pm_level > 3) 1671196656Smav callout_stop(&ch->pm_timer); 1672195534Sscottl /* Update channel stats. */ 1673199747Smav ch->oslots |= (1 << slot->slot); 1674195534Sscottl ch->numrslots++; 1675203123Smav ch->numrslotspd[ccb->ccb_h.target_id]++; 1676195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1677195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1678195534Sscottl ch->numtslots++; 1679203123Smav ch->numtslotspd[ccb->ccb_h.target_id]++; 1680195534Sscottl ch->taggedtarget = ccb->ccb_h.target_id; 1681195534Sscottl } 1682195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1683195534Sscottl (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) 1684195534Sscottl ch->aslots |= (1 << slot->slot); 1685195534Sscottl slot->dma.nsegs = 0; 1686195534Sscottl /* If request moves data, setup and load SG list */ 1687195534Sscottl if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 1688195534Sscottl void *buf; 1689195534Sscottl bus_size_t size; 1690195534Sscottl 1691195534Sscottl slot->state = AHCI_SLOT_LOADING; 1692195534Sscottl if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1693195534Sscottl buf = ccb->ataio.data_ptr; 1694195534Sscottl size = ccb->ataio.dxfer_len; 1695195534Sscottl } else { 1696195534Sscottl buf = ccb->csio.data_ptr; 1697195534Sscottl size = ccb->csio.dxfer_len; 1698195534Sscottl } 1699195534Sscottl bus_dmamap_load(ch->dma.data_tag, slot->dma.data_map, 1700195534Sscottl buf, size, ahci_dmasetprd, slot, 0); 1701195534Sscottl } else 1702195534Sscottl ahci_execute_transaction(slot); 1703195534Sscottl} 1704195534Sscottl 1705195534Sscottl/* Locked by busdma engine. */ 1706195534Sscottlstatic void 1707195534Sscottlahci_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1708195534Sscottl{ 1709195534Sscottl struct ahci_slot *slot = arg; 1710195534Sscottl struct ahci_channel *ch = device_get_softc(slot->dev); 1711195534Sscottl struct ahci_cmd_tab *ctp; 1712195534Sscottl struct ahci_dma_prd *prd; 1713195534Sscottl int i; 1714195534Sscottl 1715195534Sscottl if (error) { 1716195534Sscottl device_printf(slot->dev, "DMA load error\n"); 1717195534Sscottl ahci_end_transaction(slot, AHCI_ERR_INVALID); 1718195534Sscottl return; 1719195534Sscottl } 1720195534Sscottl KASSERT(nsegs <= AHCI_SG_ENTRIES, ("too many DMA segment entries\n")); 1721195534Sscottl /* Get a piece of the workspace for this request */ 1722195534Sscottl ctp = (struct ahci_cmd_tab *) 1723195534Sscottl (ch->dma.work + AHCI_CT_OFFSET + (AHCI_CT_SIZE * slot->slot)); 1724195534Sscottl /* Fill S/G table */ 1725195534Sscottl prd = &ctp->prd_tab[0]; 1726195534Sscottl for (i = 0; i < nsegs; i++) { 1727195534Sscottl prd[i].dba = htole64(segs[i].ds_addr); 1728195534Sscottl prd[i].dbc = htole32((segs[i].ds_len - 1) & AHCI_PRD_MASK); 1729195534Sscottl } 1730195534Sscottl slot->dma.nsegs = nsegs; 1731195534Sscottl bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 1732195534Sscottl ((slot->ccb->ccb_h.flags & CAM_DIR_IN) ? 1733195534Sscottl BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE)); 1734195534Sscottl ahci_execute_transaction(slot); 1735195534Sscottl} 1736195534Sscottl 1737195534Sscottl/* Must be called with channel locked. */ 1738195534Sscottlstatic void 1739195534Sscottlahci_execute_transaction(struct ahci_slot *slot) 1740195534Sscottl{ 1741195534Sscottl device_t dev = slot->dev; 1742195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1743195534Sscottl struct ahci_cmd_tab *ctp; 1744195534Sscottl struct ahci_cmd_list *clp; 1745195534Sscottl union ccb *ccb = slot->ccb; 1746195534Sscottl int port = ccb->ccb_h.target_id & 0x0f; 1747222304Smav int fis_size, i, softreset; 1748203123Smav uint8_t *fis = ch->dma.rfis + 0x40; 1749203123Smav uint8_t val; 1750195534Sscottl 1751195534Sscottl /* Get a piece of the workspace for this request */ 1752195534Sscottl ctp = (struct ahci_cmd_tab *) 1753195534Sscottl (ch->dma.work + AHCI_CT_OFFSET + (AHCI_CT_SIZE * slot->slot)); 1754195534Sscottl /* Setup the FIS for this request */ 1755199821Smav if (!(fis_size = ahci_setup_fis(dev, ctp, ccb, slot->slot))) { 1756195534Sscottl device_printf(ch->dev, "Setting up SATA FIS failed\n"); 1757195534Sscottl ahci_end_transaction(slot, AHCI_ERR_INVALID); 1758195534Sscottl return; 1759195534Sscottl } 1760195534Sscottl /* Setup the command list entry */ 1761195534Sscottl clp = (struct ahci_cmd_list *) 1762195534Sscottl (ch->dma.work + AHCI_CL_OFFSET + (AHCI_CL_SIZE * slot->slot)); 1763214988Smav clp->cmd_flags = htole16( 1764214988Smav (ccb->ccb_h.flags & CAM_DIR_OUT ? AHCI_CMD_WRITE : 0) | 1765214988Smav (ccb->ccb_h.func_code == XPT_SCSI_IO ? 1766214988Smav (AHCI_CMD_ATAPI | AHCI_CMD_PREFETCH) : 0) | 1767214988Smav (fis_size / sizeof(u_int32_t)) | 1768214988Smav (port << 12)); 1769214988Smav clp->prd_length = htole16(slot->dma.nsegs); 1770195534Sscottl /* Special handling for Soft Reset command. */ 1771195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1772203123Smav (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL)) { 1773203123Smav if (ccb->ataio.cmd.control & ATA_A_RESET) { 1774222304Smav softreset = 1; 1775203123Smav /* Kick controller into sane state */ 1776203123Smav ahci_stop(dev); 1777203123Smav ahci_clo(dev); 1778203123Smav ahci_start(dev, 0); 1779203123Smav clp->cmd_flags |= AHCI_CMD_RESET | AHCI_CMD_CLR_BUSY; 1780203123Smav } else { 1781222304Smav softreset = 2; 1782203123Smav /* Prepare FIS receive area for check. */ 1783203123Smav for (i = 0; i < 20; i++) 1784203123Smav fis[i] = 0xff; 1785203123Smav } 1786222304Smav } else 1787222304Smav softreset = 0; 1788195534Sscottl clp->bytecount = 0; 1789195534Sscottl clp->cmd_table_phys = htole64(ch->dma.work_bus + AHCI_CT_OFFSET + 1790195534Sscottl (AHCI_CT_SIZE * slot->slot)); 1791195534Sscottl bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1792214988Smav BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1793195534Sscottl bus_dmamap_sync(ch->dma.rfis_tag, ch->dma.rfis_map, 1794195534Sscottl BUS_DMASYNC_PREREAD); 1795195534Sscottl /* Set ACTIVE bit for NCQ commands. */ 1796195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1797195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1798195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SACT, 1 << slot->slot); 1799195534Sscottl } 1800203123Smav /* If FBS is enabled, set PMP port. */ 1801203123Smav if (ch->fbs_enabled) { 1802203123Smav ATA_OUTL(ch->r_mem, AHCI_P_FBS, AHCI_P_FBS_EN | 1803203123Smav (port << AHCI_P_FBS_DEV_SHIFT)); 1804203123Smav } 1805195534Sscottl /* Issue command to the controller. */ 1806195534Sscottl slot->state = AHCI_SLOT_RUNNING; 1807195534Sscottl ch->rslots |= (1 << slot->slot); 1808195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CI, (1 << slot->slot)); 1809195534Sscottl /* Device reset commands doesn't interrupt. Poll them. */ 1810195534Sscottl if (ccb->ccb_h.func_code == XPT_ATA_IO && 1811222304Smav (ccb->ataio.cmd.command == ATA_DEVICE_RESET || softreset)) { 1812220777Smav int count, timeout = ccb->ccb_h.timeout * 100; 1813195534Sscottl enum ahci_err_type et = AHCI_ERR_NONE; 1814195534Sscottl 1815195534Sscottl for (count = 0; count < timeout; count++) { 1816220777Smav DELAY(10); 1817195534Sscottl if (!(ATA_INL(ch->r_mem, AHCI_P_CI) & (1 << slot->slot))) 1818195534Sscottl break; 1819222304Smav if ((ATA_INL(ch->r_mem, AHCI_P_TFD) & ATA_S_ERROR) && 1820222304Smav softreset != 1) { 1821222285Smav#if 0 1822195534Sscottl device_printf(ch->dev, 1823195534Sscottl "Poll error on slot %d, TFD: %04x\n", 1824195534Sscottl slot->slot, ATA_INL(ch->r_mem, AHCI_P_TFD)); 1825222285Smav#endif 1826195534Sscottl et = AHCI_ERR_TFE; 1827195534Sscottl break; 1828195534Sscottl } 1829198851Smav /* Workaround for ATI SB600/SB700 chipsets. */ 1830198851Smav if (ccb->ccb_h.target_id == 15 && 1831198851Smav pci_get_vendor(device_get_parent(dev)) == 0x1002 && 1832198851Smav (ATA_INL(ch->r_mem, AHCI_P_IS) & AHCI_P_IX_IPM)) { 1833198851Smav et = AHCI_ERR_TIMEOUT; 1834198851Smav break; 1835198851Smav } 1836195534Sscottl } 1837222304Smav 1838222304Smav /* Marvell controllers do not wait for readyness. */ 1839222304Smav if ((ch->quirks & AHCI_Q_NOBSYRES) && softreset == 2 && 1840222304Smav et == AHCI_ERR_NONE) { 1841222304Smav while ((val = fis[2]) & ATA_S_BUSY) { 1842222304Smav DELAY(10); 1843222304Smav if (count++ >= timeout) 1844222304Smav break; 1845222304Smav } 1846222304Smav } 1847222304Smav 1848195534Sscottl if (timeout && (count >= timeout)) { 1849222304Smav device_printf(dev, "Poll timeout on slot %d port %d\n", 1850222304Smav slot->slot, port); 1851203108Smav device_printf(dev, "is %08x cs %08x ss %08x " 1852224498Smav "rs %08x tfd %02x serr %08x cmd %08x\n", 1853203108Smav ATA_INL(ch->r_mem, AHCI_P_IS), 1854203108Smav ATA_INL(ch->r_mem, AHCI_P_CI), 1855203108Smav ATA_INL(ch->r_mem, AHCI_P_SACT), ch->rslots, 1856203108Smav ATA_INL(ch->r_mem, AHCI_P_TFD), 1857224498Smav ATA_INL(ch->r_mem, AHCI_P_SERR), 1858224498Smav ATA_INL(ch->r_mem, AHCI_P_CMD)); 1859195534Sscottl et = AHCI_ERR_TIMEOUT; 1860195534Sscottl } 1861222304Smav 1862203123Smav /* Kick controller into sane state and enable FBS. */ 1863222304Smav if (softreset == 2) 1864222285Smav ch->eslots |= (1 << slot->slot); 1865222285Smav ahci_end_transaction(slot, et); 1866195534Sscottl return; 1867195534Sscottl } 1868195534Sscottl /* Start command execution timeout */ 1869198319Smav callout_reset(&slot->timeout, (int)ccb->ccb_h.timeout * hz / 2000, 1870195534Sscottl (timeout_t*)ahci_timeout, slot); 1871195534Sscottl return; 1872195534Sscottl} 1873195534Sscottl 1874203873Smav/* Must be called with channel locked. */ 1875203873Smavstatic void 1876203873Smavahci_process_timeout(device_t dev) 1877203873Smav{ 1878203873Smav struct ahci_channel *ch = device_get_softc(dev); 1879203873Smav int i; 1880203873Smav 1881203873Smav mtx_assert(&ch->mtx, MA_OWNED); 1882203873Smav /* Handle the rest of commands. */ 1883203873Smav for (i = 0; i < ch->numslots; i++) { 1884203873Smav /* Do we have a running request on slot? */ 1885203873Smav if (ch->slot[i].state < AHCI_SLOT_RUNNING) 1886203873Smav continue; 1887203873Smav ahci_end_transaction(&ch->slot[i], AHCI_ERR_TIMEOUT); 1888203873Smav } 1889203873Smav} 1890203873Smav 1891203873Smav/* Must be called with channel locked. */ 1892203873Smavstatic void 1893203873Smavahci_rearm_timeout(device_t dev) 1894203873Smav{ 1895203873Smav struct ahci_channel *ch = device_get_softc(dev); 1896203873Smav int i; 1897203873Smav 1898203873Smav mtx_assert(&ch->mtx, MA_OWNED); 1899203873Smav for (i = 0; i < ch->numslots; i++) { 1900203873Smav struct ahci_slot *slot = &ch->slot[i]; 1901203873Smav 1902203873Smav /* Do we have a running request on slot? */ 1903203873Smav if (slot->state < AHCI_SLOT_RUNNING) 1904203873Smav continue; 1905203873Smav if ((ch->toslots & (1 << i)) == 0) 1906203873Smav continue; 1907203873Smav callout_reset(&slot->timeout, 1908203873Smav (int)slot->ccb->ccb_h.timeout * hz / 2000, 1909203873Smav (timeout_t*)ahci_timeout, slot); 1910203873Smav } 1911203873Smav} 1912203873Smav 1913195534Sscottl/* Locked by callout mechanism. */ 1914195534Sscottlstatic void 1915195534Sscottlahci_timeout(struct ahci_slot *slot) 1916195534Sscottl{ 1917195534Sscottl device_t dev = slot->dev; 1918195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1919198319Smav uint32_t sstatus; 1920198319Smav int ccs; 1921195534Sscottl int i; 1922195534Sscottl 1923196656Smav /* Check for stale timeout. */ 1924198319Smav if (slot->state < AHCI_SLOT_RUNNING) 1925196656Smav return; 1926196656Smav 1927198319Smav /* Check if slot was not being executed last time we checked. */ 1928198319Smav if (slot->state < AHCI_SLOT_EXECUTING) { 1929198319Smav /* Check if slot started executing. */ 1930198319Smav sstatus = ATA_INL(ch->r_mem, AHCI_P_SACT); 1931198319Smav ccs = (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CCS_MASK) 1932198319Smav >> AHCI_P_CMD_CCS_SHIFT; 1933203123Smav if ((sstatus & (1 << slot->slot)) != 0 || ccs == slot->slot || 1934224498Smav ch->fbs_enabled || ch->wrongccs) 1935198319Smav slot->state = AHCI_SLOT_EXECUTING; 1936224498Smav else if ((ch->rslots & (1 << ccs)) == 0) { 1937224498Smav ch->wrongccs = 1; 1938224498Smav slot->state = AHCI_SLOT_EXECUTING; 1939224498Smav } 1940198319Smav 1941198319Smav callout_reset(&slot->timeout, 1942198319Smav (int)slot->ccb->ccb_h.timeout * hz / 2000, 1943198319Smav (timeout_t*)ahci_timeout, slot); 1944198319Smav return; 1945198319Smav } 1946198319Smav 1947222304Smav device_printf(dev, "Timeout on slot %d port %d\n", 1948222304Smav slot->slot, slot->ccb->ccb_h.target_id & 0x0f); 1949224498Smav device_printf(dev, "is %08x cs %08x ss %08x rs %08x tfd %02x " 1950224498Smav "serr %08x cmd %08x\n", 1951198319Smav ATA_INL(ch->r_mem, AHCI_P_IS), ATA_INL(ch->r_mem, AHCI_P_CI), 1952198319Smav ATA_INL(ch->r_mem, AHCI_P_SACT), ch->rslots, 1953224498Smav ATA_INL(ch->r_mem, AHCI_P_TFD), ATA_INL(ch->r_mem, AHCI_P_SERR), 1954224498Smav ATA_INL(ch->r_mem, AHCI_P_CMD)); 1955195534Sscottl 1956197838Smav /* Handle frozen command. */ 1957195534Sscottl if (ch->frozen) { 1958195534Sscottl union ccb *fccb = ch->frozen; 1959195534Sscottl ch->frozen = NULL; 1960195534Sscottl fccb->ccb_h.status = CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 1961198319Smav if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 1962198319Smav xpt_freeze_devq(fccb->ccb_h.path, 1); 1963198319Smav fccb->ccb_h.status |= CAM_DEV_QFRZN; 1964198319Smav } 1965195534Sscottl xpt_done(fccb); 1966195534Sscottl } 1967224498Smav if (!ch->fbs_enabled && !ch->wrongccs) { 1968203873Smav /* Without FBS we know real timeout source. */ 1969203873Smav ch->fatalerr = 1; 1970203873Smav /* Handle command with timeout. */ 1971203873Smav ahci_end_transaction(&ch->slot[slot->slot], AHCI_ERR_TIMEOUT); 1972203873Smav /* Handle the rest of commands. */ 1973203873Smav for (i = 0; i < ch->numslots; i++) { 1974203873Smav /* Do we have a running request on slot? */ 1975203873Smav if (ch->slot[i].state < AHCI_SLOT_RUNNING) 1976203873Smav continue; 1977203873Smav ahci_end_transaction(&ch->slot[i], AHCI_ERR_INNOCENT); 1978203873Smav } 1979203873Smav } else { 1980203873Smav /* With FBS we wait for other commands timeout and pray. */ 1981203873Smav if (ch->toslots == 0) 1982203873Smav xpt_freeze_simq(ch->sim, 1); 1983203873Smav ch->toslots |= (1 << slot->slot); 1984203873Smav if ((ch->rslots & ~ch->toslots) == 0) 1985203873Smav ahci_process_timeout(dev); 1986203873Smav else 1987203873Smav device_printf(dev, " ... waiting for slots %08x\n", 1988203873Smav ch->rslots & ~ch->toslots); 1989195534Sscottl } 1990195534Sscottl} 1991195534Sscottl 1992195534Sscottl/* Must be called with channel locked. */ 1993195534Sscottlstatic void 1994195534Sscottlahci_end_transaction(struct ahci_slot *slot, enum ahci_err_type et) 1995195534Sscottl{ 1996195534Sscottl device_t dev = slot->dev; 1997195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1998195534Sscottl union ccb *ccb = slot->ccb; 1999214988Smav struct ahci_cmd_list *clp; 2000212732Smav int lastto; 2001222304Smav uint32_t sig; 2002195534Sscottl 2003195534Sscottl bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 2004214988Smav BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 2005214988Smav clp = (struct ahci_cmd_list *) 2006214988Smav (ch->dma.work + AHCI_CL_OFFSET + (AHCI_CL_SIZE * slot->slot)); 2007195534Sscottl /* Read result registers to the result struct 2008195534Sscottl * May be incorrect if several commands finished same time, 2009195534Sscottl * so read only when sure or have to. 2010195534Sscottl */ 2011195534Sscottl if (ccb->ccb_h.func_code == XPT_ATA_IO) { 2012195534Sscottl struct ata_res *res = &ccb->ataio.res; 2013195534Sscottl 2014195534Sscottl if ((et == AHCI_ERR_TFE) || 2015195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_NEEDRESULT)) { 2016195534Sscottl u_int8_t *fis = ch->dma.rfis + 0x40; 2017195534Sscottl 2018195534Sscottl bus_dmamap_sync(ch->dma.rfis_tag, ch->dma.rfis_map, 2019195534Sscottl BUS_DMASYNC_POSTREAD); 2020203123Smav if (ch->fbs_enabled) { 2021203123Smav fis += ccb->ccb_h.target_id * 256; 2022203123Smav res->status = fis[2]; 2023203123Smav res->error = fis[3]; 2024203123Smav } else { 2025203123Smav uint16_t tfd = ATA_INL(ch->r_mem, AHCI_P_TFD); 2026203123Smav 2027203123Smav res->status = tfd; 2028203123Smav res->error = tfd >> 8; 2029203123Smav } 2030195534Sscottl res->lba_low = fis[4]; 2031195534Sscottl res->lba_mid = fis[5]; 2032195534Sscottl res->lba_high = fis[6]; 2033195534Sscottl res->device = fis[7]; 2034195534Sscottl res->lba_low_exp = fis[8]; 2035195534Sscottl res->lba_mid_exp = fis[9]; 2036195534Sscottl res->lba_high_exp = fis[10]; 2037195534Sscottl res->sector_count = fis[12]; 2038195534Sscottl res->sector_count_exp = fis[13]; 2039222304Smav 2040222304Smav /* 2041222304Smav * Some weird controllers do not return signature in 2042222304Smav * FIS receive area. Read it from PxSIG register. 2043222304Smav */ 2044222304Smav if ((ch->quirks & AHCI_Q_ALTSIG) && 2045222304Smav (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) && 2046222304Smav (ccb->ataio.cmd.control & ATA_A_RESET) == 0) { 2047222304Smav sig = ATA_INL(ch->r_mem, AHCI_P_SIG); 2048222304Smav res->lba_high = sig >> 24; 2049222304Smav res->lba_mid = sig >> 16; 2050222304Smav res->lba_low = sig >> 8; 2051222304Smav res->sector_count = sig; 2052222304Smav } 2053195534Sscottl } else 2054195534Sscottl bzero(res, sizeof(*res)); 2055214988Smav if ((ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) == 0 && 2056218596Smav (ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 2057218596Smav (ch->quirks & AHCI_Q_NOCOUNT) == 0) { 2058214988Smav ccb->ataio.resid = 2059214988Smav ccb->ataio.dxfer_len - le32toh(clp->bytecount); 2060214988Smav } 2061214988Smav } else { 2062218596Smav if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 2063218596Smav (ch->quirks & AHCI_Q_NOCOUNT) == 0) { 2064214988Smav ccb->csio.resid = 2065214988Smav ccb->csio.dxfer_len - le32toh(clp->bytecount); 2066214988Smav } 2067195534Sscottl } 2068195534Sscottl if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 2069195534Sscottl bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 2070195534Sscottl (ccb->ccb_h.flags & CAM_DIR_IN) ? 2071195534Sscottl BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 2072195534Sscottl bus_dmamap_unload(ch->dma.data_tag, slot->dma.data_map); 2073195534Sscottl } 2074203123Smav if (et != AHCI_ERR_NONE) 2075203123Smav ch->eslots |= (1 << slot->slot); 2076198319Smav /* In case of error, freeze device for proper recovery. */ 2077220565Smav if ((et != AHCI_ERR_NONE) && (!ch->recoverycmd) && 2078198319Smav !(ccb->ccb_h.status & CAM_DEV_QFRZN)) { 2079198319Smav xpt_freeze_devq(ccb->ccb_h.path, 1); 2080198319Smav ccb->ccb_h.status |= CAM_DEV_QFRZN; 2081198319Smav } 2082195534Sscottl /* Set proper result status. */ 2083195534Sscottl ccb->ccb_h.status &= ~CAM_STATUS_MASK; 2084195534Sscottl switch (et) { 2085195534Sscottl case AHCI_ERR_NONE: 2086195534Sscottl ccb->ccb_h.status |= CAM_REQ_CMP; 2087195534Sscottl if (ccb->ccb_h.func_code == XPT_SCSI_IO) 2088195534Sscottl ccb->csio.scsi_status = SCSI_STATUS_OK; 2089195534Sscottl break; 2090195534Sscottl case AHCI_ERR_INVALID: 2091198851Smav ch->fatalerr = 1; 2092195534Sscottl ccb->ccb_h.status |= CAM_REQ_INVALID; 2093195534Sscottl break; 2094195534Sscottl case AHCI_ERR_INNOCENT: 2095195534Sscottl ccb->ccb_h.status |= CAM_REQUEUE_REQ; 2096195534Sscottl break; 2097195534Sscottl case AHCI_ERR_TFE: 2098198319Smav case AHCI_ERR_NCQ: 2099195534Sscottl if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 2100195534Sscottl ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR; 2101195534Sscottl ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 2102195534Sscottl } else { 2103195534Sscottl ccb->ccb_h.status |= CAM_ATA_STATUS_ERROR; 2104195534Sscottl } 2105195534Sscottl break; 2106195534Sscottl case AHCI_ERR_SATA: 2107198851Smav ch->fatalerr = 1; 2108220565Smav if (!ch->recoverycmd) { 2109198319Smav xpt_freeze_simq(ch->sim, 1); 2110198319Smav ccb->ccb_h.status &= ~CAM_STATUS_MASK; 2111198319Smav ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 2112198319Smav } 2113198319Smav ccb->ccb_h.status |= CAM_UNCOR_PARITY; 2114195534Sscottl break; 2115195534Sscottl case AHCI_ERR_TIMEOUT: 2116220565Smav if (!ch->recoverycmd) { 2117198319Smav xpt_freeze_simq(ch->sim, 1); 2118198319Smav ccb->ccb_h.status &= ~CAM_STATUS_MASK; 2119198319Smav ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 2120198319Smav } 2121195534Sscottl ccb->ccb_h.status |= CAM_CMD_TIMEOUT; 2122195534Sscottl break; 2123195534Sscottl default: 2124198851Smav ch->fatalerr = 1; 2125195534Sscottl ccb->ccb_h.status |= CAM_REQ_CMP_ERR; 2126195534Sscottl } 2127195534Sscottl /* Free slot. */ 2128199747Smav ch->oslots &= ~(1 << slot->slot); 2129195534Sscottl ch->rslots &= ~(1 << slot->slot); 2130195534Sscottl ch->aslots &= ~(1 << slot->slot); 2131195534Sscottl slot->state = AHCI_SLOT_EMPTY; 2132195534Sscottl slot->ccb = NULL; 2133195534Sscottl /* Update channel stats. */ 2134195534Sscottl ch->numrslots--; 2135203123Smav ch->numrslotspd[ccb->ccb_h.target_id]--; 2136195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 2137195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 2138195534Sscottl ch->numtslots--; 2139203123Smav ch->numtslotspd[ccb->ccb_h.target_id]--; 2140195534Sscottl } 2141212732Smav /* Cancel timeout state if request completed normally. */ 2142212732Smav if (et != AHCI_ERR_TIMEOUT) { 2143212732Smav lastto = (ch->toslots == (1 << slot->slot)); 2144212732Smav ch->toslots &= ~(1 << slot->slot); 2145212732Smav if (lastto) 2146212732Smav xpt_release_simq(ch->sim, TRUE); 2147212732Smav } 2148195534Sscottl /* If it was first request of reset sequence and there is no error, 2149195534Sscottl * proceed to second request. */ 2150195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 2151195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) && 2152195534Sscottl (ccb->ataio.cmd.control & ATA_A_RESET) && 2153195534Sscottl et == AHCI_ERR_NONE) { 2154195534Sscottl ccb->ataio.cmd.control &= ~ATA_A_RESET; 2155195534Sscottl ahci_begin_transaction(dev, ccb); 2156195534Sscottl return; 2157195534Sscottl } 2158198851Smav /* If it was our READ LOG command - process it. */ 2159220565Smav if (ccb->ccb_h.recovery_type == RECOVERY_READ_LOG) { 2160198851Smav ahci_process_read_log(dev, ccb); 2161220565Smav /* If it was our REQUEST SENSE command - process it. */ 2162220565Smav } else if (ccb->ccb_h.recovery_type == RECOVERY_REQUEST_SENSE) { 2163220565Smav ahci_process_request_sense(dev, ccb); 2164220565Smav /* If it was NCQ or ATAPI command error, put result on hold. */ 2165220565Smav } else if (et == AHCI_ERR_NCQ || 2166220565Smav ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_SCSI_STATUS_ERROR && 2167220565Smav (ccb->ccb_h.flags & CAM_DIS_AUTOSENSE) == 0)) { 2168195534Sscottl ch->hold[slot->slot] = ccb; 2169203123Smav ch->numhslots++; 2170198851Smav } else 2171195534Sscottl xpt_done(ccb); 2172198851Smav /* If we have no other active commands, ... */ 2173198851Smav if (ch->rslots == 0) { 2174198851Smav /* if there was fatal error - reset port. */ 2175203873Smav if (ch->toslots != 0 || ch->fatalerr) { 2176198851Smav ahci_reset(dev); 2177203123Smav } else { 2178203123Smav /* if we have slots in error, we can reinit port. */ 2179203123Smav if (ch->eslots != 0) { 2180203123Smav ahci_stop(dev); 2181222285Smav ahci_clo(dev); 2182203123Smav ahci_start(dev, 1); 2183203123Smav } 2184203123Smav /* if there commands on hold, we can do READ LOG. */ 2185220565Smav if (!ch->recoverycmd && ch->numhslots) 2186220565Smav ahci_issue_recovery(dev); 2187198851Smav } 2188203873Smav /* If all the rest of commands are in timeout - give them chance. */ 2189203873Smav } else if ((ch->rslots & ~ch->toslots) == 0 && 2190203873Smav et != AHCI_ERR_TIMEOUT) 2191203873Smav ahci_rearm_timeout(dev); 2192222285Smav /* Unfreeze frozen command. */ 2193222285Smav if (ch->frozen && !ahci_check_collision(dev, ch->frozen)) { 2194222285Smav union ccb *fccb = ch->frozen; 2195222285Smav ch->frozen = NULL; 2196222285Smav ahci_begin_transaction(dev, fccb); 2197222285Smav xpt_release_simq(ch->sim, TRUE); 2198222285Smav } 2199196656Smav /* Start PM timer. */ 2200207499Smav if (ch->numrslots == 0 && ch->pm_level > 3 && 2201207499Smav (ch->curr[ch->pm_present ? 15 : 0].caps & CTS_SATA_CAPS_D_PMREQ)) { 2202196656Smav callout_schedule(&ch->pm_timer, 2203196656Smav (ch->pm_level == 4) ? hz / 1000 : hz / 8); 2204196656Smav } 2205195534Sscottl} 2206195534Sscottl 2207195534Sscottlstatic void 2208220565Smavahci_issue_recovery(device_t dev) 2209195534Sscottl{ 2210195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2211195534Sscottl union ccb *ccb; 2212195534Sscottl struct ccb_ataio *ataio; 2213220565Smav struct ccb_scsiio *csio; 2214195534Sscottl int i; 2215195534Sscottl 2216220830Smav /* Find some held command. */ 2217195534Sscottl for (i = 0; i < ch->numslots; i++) { 2218195534Sscottl if (ch->hold[i]) 2219195534Sscottl break; 2220195534Sscottl } 2221195534Sscottl ccb = xpt_alloc_ccb_nowait(); 2222195534Sscottl if (ccb == NULL) { 2223220830Smav device_printf(dev, "Unable to allocate recovery command\n"); 2224220822Smavcompleteall: 2225220830Smav /* We can't do anything -- complete held commands. */ 2226220822Smav for (i = 0; i < ch->numslots; i++) { 2227220822Smav if (ch->hold[i] == NULL) 2228220822Smav continue; 2229220822Smav ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 2230220822Smav ch->hold[i]->ccb_h.status |= CAM_RESRC_UNAVAIL; 2231220822Smav xpt_done(ch->hold[i]); 2232220822Smav ch->hold[i] = NULL; 2233220822Smav ch->numhslots--; 2234220822Smav } 2235220822Smav ahci_reset(dev); 2236220822Smav return; 2237195534Sscottl } 2238195534Sscottl ccb->ccb_h = ch->hold[i]->ccb_h; /* Reuse old header. */ 2239220565Smav if (ccb->ccb_h.func_code == XPT_ATA_IO) { 2240220565Smav /* READ LOG */ 2241220565Smav ccb->ccb_h.recovery_type = RECOVERY_READ_LOG; 2242220565Smav ccb->ccb_h.func_code = XPT_ATA_IO; 2243220565Smav ccb->ccb_h.flags = CAM_DIR_IN; 2244220565Smav ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ 2245220565Smav ataio = &ccb->ataio; 2246220565Smav ataio->data_ptr = malloc(512, M_AHCI, M_NOWAIT); 2247220565Smav if (ataio->data_ptr == NULL) { 2248220565Smav xpt_free_ccb(ccb); 2249220822Smav device_printf(dev, 2250220830Smav "Unable to allocate memory for READ LOG command\n"); 2251220822Smav goto completeall; 2252220565Smav } 2253220565Smav ataio->dxfer_len = 512; 2254220565Smav bzero(&ataio->cmd, sizeof(ataio->cmd)); 2255220565Smav ataio->cmd.flags = CAM_ATAIO_48BIT; 2256220565Smav ataio->cmd.command = 0x2F; /* READ LOG EXT */ 2257220565Smav ataio->cmd.sector_count = 1; 2258220565Smav ataio->cmd.sector_count_exp = 0; 2259220565Smav ataio->cmd.lba_low = 0x10; 2260220565Smav ataio->cmd.lba_mid = 0; 2261220565Smav ataio->cmd.lba_mid_exp = 0; 2262220565Smav } else { 2263220565Smav /* REQUEST SENSE */ 2264220565Smav ccb->ccb_h.recovery_type = RECOVERY_REQUEST_SENSE; 2265220565Smav ccb->ccb_h.recovery_slot = i; 2266220565Smav ccb->ccb_h.func_code = XPT_SCSI_IO; 2267220565Smav ccb->ccb_h.flags = CAM_DIR_IN; 2268220565Smav ccb->ccb_h.status = 0; 2269220565Smav ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ 2270220565Smav csio = &ccb->csio; 2271220565Smav csio->data_ptr = (void *)&ch->hold[i]->csio.sense_data; 2272220565Smav csio->dxfer_len = ch->hold[i]->csio.sense_len; 2273220565Smav csio->cdb_len = 6; 2274220565Smav bzero(&csio->cdb_io, sizeof(csio->cdb_io)); 2275220565Smav csio->cdb_io.cdb_bytes[0] = 0x03; 2276220565Smav csio->cdb_io.cdb_bytes[4] = csio->dxfer_len; 2277195534Sscottl } 2278220565Smav /* Freeze SIM while doing recovery. */ 2279220822Smav ch->recoverycmd = 1; 2280198319Smav xpt_freeze_simq(ch->sim, 1); 2281195534Sscottl ahci_begin_transaction(dev, ccb); 2282195534Sscottl} 2283195534Sscottl 2284195534Sscottlstatic void 2285195534Sscottlahci_process_read_log(device_t dev, union ccb *ccb) 2286195534Sscottl{ 2287195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2288195534Sscottl uint8_t *data; 2289195534Sscottl struct ata_res *res; 2290195534Sscottl int i; 2291195534Sscottl 2292220565Smav ch->recoverycmd = 0; 2293195534Sscottl 2294195534Sscottl data = ccb->ataio.data_ptr; 2295195534Sscottl if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP && 2296195534Sscottl (data[0] & 0x80) == 0) { 2297195534Sscottl for (i = 0; i < ch->numslots; i++) { 2298195534Sscottl if (!ch->hold[i]) 2299195534Sscottl continue; 2300220565Smav if (ch->hold[i]->ccb_h.func_code != XPT_ATA_IO) 2301220565Smav continue; 2302195534Sscottl if ((data[0] & 0x1F) == i) { 2303195534Sscottl res = &ch->hold[i]->ataio.res; 2304195534Sscottl res->status = data[2]; 2305195534Sscottl res->error = data[3]; 2306195534Sscottl res->lba_low = data[4]; 2307195534Sscottl res->lba_mid = data[5]; 2308195534Sscottl res->lba_high = data[6]; 2309195534Sscottl res->device = data[7]; 2310195534Sscottl res->lba_low_exp = data[8]; 2311195534Sscottl res->lba_mid_exp = data[9]; 2312195534Sscottl res->lba_high_exp = data[10]; 2313195534Sscottl res->sector_count = data[12]; 2314195534Sscottl res->sector_count_exp = data[13]; 2315195534Sscottl } else { 2316195534Sscottl ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 2317195534Sscottl ch->hold[i]->ccb_h.status |= CAM_REQUEUE_REQ; 2318195534Sscottl } 2319195534Sscottl xpt_done(ch->hold[i]); 2320195534Sscottl ch->hold[i] = NULL; 2321203123Smav ch->numhslots--; 2322195534Sscottl } 2323195534Sscottl } else { 2324195534Sscottl if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) 2325195534Sscottl device_printf(dev, "Error while READ LOG EXT\n"); 2326195534Sscottl else if ((data[0] & 0x80) == 0) { 2327195534Sscottl device_printf(dev, "Non-queued command error in READ LOG EXT\n"); 2328195534Sscottl } 2329195534Sscottl for (i = 0; i < ch->numslots; i++) { 2330195534Sscottl if (!ch->hold[i]) 2331195534Sscottl continue; 2332220565Smav if (ch->hold[i]->ccb_h.func_code != XPT_ATA_IO) 2333220565Smav continue; 2334195534Sscottl xpt_done(ch->hold[i]); 2335195534Sscottl ch->hold[i] = NULL; 2336203123Smav ch->numhslots--; 2337195534Sscottl } 2338195534Sscottl } 2339195534Sscottl free(ccb->ataio.data_ptr, M_AHCI); 2340195534Sscottl xpt_free_ccb(ccb); 2341198319Smav xpt_release_simq(ch->sim, TRUE); 2342195534Sscottl} 2343195534Sscottl 2344195534Sscottlstatic void 2345220565Smavahci_process_request_sense(device_t dev, union ccb *ccb) 2346220565Smav{ 2347220565Smav struct ahci_channel *ch = device_get_softc(dev); 2348220565Smav int i; 2349220565Smav 2350220565Smav ch->recoverycmd = 0; 2351220565Smav 2352220565Smav i = ccb->ccb_h.recovery_slot; 2353220565Smav if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP) { 2354220565Smav ch->hold[i]->ccb_h.status |= CAM_AUTOSNS_VALID; 2355220565Smav } else { 2356220565Smav ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 2357220565Smav ch->hold[i]->ccb_h.status |= CAM_AUTOSENSE_FAIL; 2358220565Smav } 2359220565Smav xpt_done(ch->hold[i]); 2360220565Smav ch->hold[i] = NULL; 2361220565Smav ch->numhslots--; 2362220565Smav xpt_free_ccb(ccb); 2363220565Smav xpt_release_simq(ch->sim, TRUE); 2364220565Smav} 2365220565Smav 2366220565Smavstatic void 2367203123Smavahci_start(device_t dev, int fbs) 2368195534Sscottl{ 2369195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2370195534Sscottl u_int32_t cmd; 2371195534Sscottl 2372195534Sscottl /* Clear SATA error register */ 2373195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SERR, 0xFFFFFFFF); 2374195534Sscottl /* Clear any interrupts pending on this channel */ 2375195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IS, 0xFFFFFFFF); 2376203123Smav /* Configure FIS-based switching if supported. */ 2377203123Smav if (ch->chcaps & AHCI_P_CMD_FBSCP) { 2378203123Smav ch->fbs_enabled = (fbs && ch->pm_present) ? 1 : 0; 2379203123Smav ATA_OUTL(ch->r_mem, AHCI_P_FBS, 2380203123Smav ch->fbs_enabled ? AHCI_P_FBS_EN : 0); 2381203123Smav } 2382195534Sscottl /* Start operations on this channel */ 2383195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 2384207430Smav cmd &= ~AHCI_P_CMD_PMA; 2385195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd | AHCI_P_CMD_ST | 2386195534Sscottl (ch->pm_present ? AHCI_P_CMD_PMA : 0)); 2387195534Sscottl} 2388195534Sscottl 2389195534Sscottlstatic void 2390195534Sscottlahci_stop(device_t dev) 2391195534Sscottl{ 2392195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2393195534Sscottl u_int32_t cmd; 2394195534Sscottl int timeout; 2395195534Sscottl 2396195534Sscottl /* Kill all activity on this channel */ 2397195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 2398195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd & ~AHCI_P_CMD_ST); 2399195534Sscottl /* Wait for activity stop. */ 2400195534Sscottl timeout = 0; 2401195534Sscottl do { 2402220777Smav DELAY(10); 2403220777Smav if (timeout++ > 50000) { 2404195534Sscottl device_printf(dev, "stopping AHCI engine failed\n"); 2405195534Sscottl break; 2406195534Sscottl } 2407195534Sscottl } while (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CR); 2408203123Smav ch->eslots = 0; 2409195534Sscottl} 2410195534Sscottl 2411195534Sscottlstatic void 2412195534Sscottlahci_clo(device_t dev) 2413195534Sscottl{ 2414195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2415195534Sscottl u_int32_t cmd; 2416195534Sscottl int timeout; 2417195534Sscottl 2418195534Sscottl /* Issue Command List Override if supported */ 2419195534Sscottl if (ch->caps & AHCI_CAP_SCLO) { 2420195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 2421195534Sscottl cmd |= AHCI_P_CMD_CLO; 2422195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd); 2423195534Sscottl timeout = 0; 2424195534Sscottl do { 2425220777Smav DELAY(10); 2426220777Smav if (timeout++ > 50000) { 2427195534Sscottl device_printf(dev, "executing CLO failed\n"); 2428195534Sscottl break; 2429195534Sscottl } 2430195534Sscottl } while (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CLO); 2431195534Sscottl } 2432195534Sscottl} 2433195534Sscottl 2434195534Sscottlstatic void 2435195534Sscottlahci_stop_fr(device_t dev) 2436195534Sscottl{ 2437195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2438195534Sscottl u_int32_t cmd; 2439195534Sscottl int timeout; 2440195534Sscottl 2441195534Sscottl /* Kill all FIS reception on this channel */ 2442195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 2443195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd & ~AHCI_P_CMD_FRE); 2444195534Sscottl /* Wait for FIS reception stop. */ 2445195534Sscottl timeout = 0; 2446195534Sscottl do { 2447220777Smav DELAY(10); 2448220777Smav if (timeout++ > 50000) { 2449195534Sscottl device_printf(dev, "stopping AHCI FR engine failed\n"); 2450195534Sscottl break; 2451195534Sscottl } 2452195534Sscottl } while (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_FR); 2453195534Sscottl} 2454195534Sscottl 2455195534Sscottlstatic void 2456195534Sscottlahci_start_fr(device_t dev) 2457195534Sscottl{ 2458195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2459195534Sscottl u_int32_t cmd; 2460195534Sscottl 2461195534Sscottl /* Start FIS reception on this channel */ 2462195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 2463195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd | AHCI_P_CMD_FRE); 2464195534Sscottl} 2465195534Sscottl 2466195534Sscottlstatic int 2467220576Smavahci_wait_ready(device_t dev, int t, int t0) 2468195534Sscottl{ 2469195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2470195534Sscottl int timeout = 0; 2471195534Sscottl uint32_t val; 2472195534Sscottl 2473195534Sscottl while ((val = ATA_INL(ch->r_mem, AHCI_P_TFD)) & 2474195534Sscottl (ATA_S_BUSY | ATA_S_DRQ)) { 2475220576Smav if (timeout > t) { 2476220576Smav if (t != 0) { 2477220576Smav device_printf(dev, 2478220576Smav "AHCI reset: device not ready after %dms " 2479220576Smav "(tfd = %08x)\n", 2480220576Smav MAX(t, 0) + t0, val); 2481220576Smav } 2482195534Sscottl return (EBUSY); 2483195534Sscottl } 2484220576Smav DELAY(1000); 2485220576Smav timeout++; 2486220576Smav } 2487195534Sscottl if (bootverbose) 2488220576Smav device_printf(dev, "AHCI reset: device ready after %dms\n", 2489220576Smav timeout + t0); 2490195534Sscottl return (0); 2491195534Sscottl} 2492195534Sscottl 2493195534Sscottlstatic void 2494220576Smavahci_reset_to(void *arg) 2495220576Smav{ 2496220576Smav device_t dev = arg; 2497220576Smav struct ahci_channel *ch = device_get_softc(dev); 2498220576Smav 2499220576Smav if (ch->resetting == 0) 2500220576Smav return; 2501220576Smav ch->resetting--; 2502220576Smav if (ahci_wait_ready(dev, ch->resetting == 0 ? -1 : 0, 2503220576Smav (310 - ch->resetting) * 100) == 0) { 2504220576Smav ch->resetting = 0; 2505220777Smav ahci_start(dev, 1); 2506220576Smav xpt_release_simq(ch->sim, TRUE); 2507220576Smav return; 2508220576Smav } 2509220576Smav if (ch->resetting == 0) { 2510220576Smav ahci_clo(dev); 2511220576Smav ahci_start(dev, 1); 2512220576Smav xpt_release_simq(ch->sim, TRUE); 2513220576Smav return; 2514220576Smav } 2515220576Smav callout_schedule(&ch->reset_timer, hz / 10); 2516220576Smav} 2517220576Smav 2518220576Smavstatic void 2519195534Sscottlahci_reset(device_t dev) 2520195534Sscottl{ 2521195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2522196656Smav struct ahci_controller *ctlr = device_get_softc(device_get_parent(dev)); 2523195534Sscottl int i; 2524195534Sscottl 2525203108Smav xpt_freeze_simq(ch->sim, 1); 2526195534Sscottl if (bootverbose) 2527195534Sscottl device_printf(dev, "AHCI reset...\n"); 2528220576Smav /* Forget about previous reset. */ 2529220576Smav if (ch->resetting) { 2530220576Smav ch->resetting = 0; 2531220576Smav callout_stop(&ch->reset_timer); 2532220576Smav xpt_release_simq(ch->sim, TRUE); 2533220576Smav } 2534195534Sscottl /* Requeue freezed command. */ 2535195534Sscottl if (ch->frozen) { 2536195534Sscottl union ccb *fccb = ch->frozen; 2537195534Sscottl ch->frozen = NULL; 2538195534Sscottl fccb->ccb_h.status = CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 2539198319Smav if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 2540198319Smav xpt_freeze_devq(fccb->ccb_h.path, 1); 2541198319Smav fccb->ccb_h.status |= CAM_DEV_QFRZN; 2542198319Smav } 2543195534Sscottl xpt_done(fccb); 2544195534Sscottl } 2545195534Sscottl /* Kill the engine and requeue all running commands. */ 2546195534Sscottl ahci_stop(dev); 2547195534Sscottl for (i = 0; i < ch->numslots; i++) { 2548195534Sscottl /* Do we have a running request on slot? */ 2549195534Sscottl if (ch->slot[i].state < AHCI_SLOT_RUNNING) 2550195534Sscottl continue; 2551195534Sscottl /* XXX; Commands in loading state. */ 2552195534Sscottl ahci_end_transaction(&ch->slot[i], AHCI_ERR_INNOCENT); 2553195534Sscottl } 2554198851Smav for (i = 0; i < ch->numslots; i++) { 2555198851Smav if (!ch->hold[i]) 2556198851Smav continue; 2557198851Smav xpt_done(ch->hold[i]); 2558198851Smav ch->hold[i] = NULL; 2559203123Smav ch->numhslots--; 2560198851Smav } 2561203873Smav if (ch->toslots != 0) 2562203873Smav xpt_release_simq(ch->sim, TRUE); 2563203123Smav ch->eslots = 0; 2564203873Smav ch->toslots = 0; 2565224498Smav ch->wrongccs = 0; 2566198851Smav ch->fatalerr = 0; 2567198319Smav /* Tell the XPT about the event */ 2568198319Smav xpt_async(AC_BUS_RESET, ch->path, NULL); 2569195534Sscottl /* Disable port interrupts */ 2570195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 0); 2571195534Sscottl /* Reset and reconnect PHY, */ 2572203108Smav if (!ahci_sata_phy_reset(dev)) { 2573195534Sscottl if (bootverbose) 2574195534Sscottl device_printf(dev, 2575220576Smav "AHCI reset: device not found\n"); 2576195534Sscottl ch->devices = 0; 2577195534Sscottl /* Enable wanted port interrupts */ 2578195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 2579220657Smav (((ch->pm_level != 0) ? AHCI_P_IX_CPD | AHCI_P_IX_MP : 0) | 2580220657Smav AHCI_P_IX_PRC | AHCI_P_IX_PC)); 2581203108Smav xpt_release_simq(ch->sim, TRUE); 2582195534Sscottl return; 2583195534Sscottl } 2584220576Smav if (bootverbose) 2585220576Smav device_printf(dev, "AHCI reset: device found\n"); 2586195534Sscottl /* Wait for clearing busy status. */ 2587220576Smav if (ahci_wait_ready(dev, dumping ? 31000 : 0, 0)) { 2588220576Smav if (dumping) 2589220576Smav ahci_clo(dev); 2590220576Smav else 2591220576Smav ch->resetting = 310; 2592220576Smav } 2593195534Sscottl ch->devices = 1; 2594195534Sscottl /* Enable wanted port interrupts */ 2595195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 2596220657Smav (((ch->pm_level != 0) ? AHCI_P_IX_CPD | AHCI_P_IX_MP : 0) | 2597220657Smav AHCI_P_IX_TFE | AHCI_P_IX_HBF | 2598195534Sscottl AHCI_P_IX_HBD | AHCI_P_IX_IF | AHCI_P_IX_OF | 2599220657Smav ((ch->pm_level == 0) ? AHCI_P_IX_PRC : 0) | AHCI_P_IX_PC | 2600196656Smav AHCI_P_IX_DP | AHCI_P_IX_UF | (ctlr->ccc ? 0 : AHCI_P_IX_SDB) | 2601196656Smav AHCI_P_IX_DS | AHCI_P_IX_PS | (ctlr->ccc ? 0 : AHCI_P_IX_DHR))); 2602220576Smav if (ch->resetting) 2603220576Smav callout_reset(&ch->reset_timer, hz / 10, ahci_reset_to, dev); 2604220777Smav else { 2605220777Smav ahci_start(dev, 1); 2606220576Smav xpt_release_simq(ch->sim, TRUE); 2607220777Smav } 2608195534Sscottl} 2609195534Sscottl 2610195534Sscottlstatic int 2611199821Smavahci_setup_fis(device_t dev, struct ahci_cmd_tab *ctp, union ccb *ccb, int tag) 2612195534Sscottl{ 2613199821Smav struct ahci_channel *ch = device_get_softc(dev); 2614195534Sscottl u_int8_t *fis = &ctp->cfis[0]; 2615195534Sscottl 2616195534Sscottl bzero(ctp->cfis, 64); 2617195534Sscottl fis[0] = 0x27; /* host to device */ 2618195534Sscottl fis[1] = (ccb->ccb_h.target_id & 0x0f); 2619195534Sscottl if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 2620195534Sscottl fis[1] |= 0x80; 2621195534Sscottl fis[2] = ATA_PACKET_CMD; 2622199821Smav if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 2623199821Smav ch->curr[ccb->ccb_h.target_id].mode >= ATA_DMA) 2624195534Sscottl fis[3] = ATA_F_DMA; 2625195534Sscottl else { 2626195534Sscottl fis[5] = ccb->csio.dxfer_len; 2627195534Sscottl fis[6] = ccb->csio.dxfer_len >> 8; 2628195534Sscottl } 2629195534Sscottl fis[7] = ATA_D_LBA; 2630195534Sscottl fis[15] = ATA_A_4BIT; 2631195534Sscottl bzero(ctp->acmd, 32); 2632195534Sscottl bcopy((ccb->ccb_h.flags & CAM_CDB_POINTER) ? 2633195534Sscottl ccb->csio.cdb_io.cdb_ptr : ccb->csio.cdb_io.cdb_bytes, 2634195534Sscottl ctp->acmd, ccb->csio.cdb_len); 2635195534Sscottl } else if ((ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) == 0) { 2636195534Sscottl fis[1] |= 0x80; 2637195534Sscottl fis[2] = ccb->ataio.cmd.command; 2638195534Sscottl fis[3] = ccb->ataio.cmd.features; 2639195534Sscottl fis[4] = ccb->ataio.cmd.lba_low; 2640195534Sscottl fis[5] = ccb->ataio.cmd.lba_mid; 2641195534Sscottl fis[6] = ccb->ataio.cmd.lba_high; 2642195534Sscottl fis[7] = ccb->ataio.cmd.device; 2643195534Sscottl fis[8] = ccb->ataio.cmd.lba_low_exp; 2644195534Sscottl fis[9] = ccb->ataio.cmd.lba_mid_exp; 2645195534Sscottl fis[10] = ccb->ataio.cmd.lba_high_exp; 2646195534Sscottl fis[11] = ccb->ataio.cmd.features_exp; 2647195534Sscottl if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { 2648195534Sscottl fis[12] = tag << 3; 2649195534Sscottl fis[13] = 0; 2650195534Sscottl } else { 2651195534Sscottl fis[12] = ccb->ataio.cmd.sector_count; 2652195534Sscottl fis[13] = ccb->ataio.cmd.sector_count_exp; 2653195534Sscottl } 2654195534Sscottl fis[15] = ATA_A_4BIT; 2655195534Sscottl } else { 2656195534Sscottl fis[15] = ccb->ataio.cmd.control; 2657195534Sscottl } 2658195534Sscottl return (20); 2659195534Sscottl} 2660195534Sscottl 2661195534Sscottlstatic int 2662195534Sscottlahci_sata_connect(struct ahci_channel *ch) 2663195534Sscottl{ 2664195534Sscottl u_int32_t status; 2665220829Smav int timeout, found = 0; 2666195534Sscottl 2667195534Sscottl /* Wait up to 100ms for "connect well" */ 2668220777Smav for (timeout = 0; timeout < 1000 ; timeout++) { 2669195534Sscottl status = ATA_INL(ch->r_mem, AHCI_P_SSTS); 2670220829Smav if ((status & ATA_SS_DET_MASK) != ATA_SS_DET_NO_DEVICE) 2671220829Smav found = 1; 2672195534Sscottl if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 2673195534Sscottl ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 2674195534Sscottl ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) 2675195534Sscottl break; 2676196656Smav if ((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_OFFLINE) { 2677196656Smav if (bootverbose) { 2678196656Smav device_printf(ch->dev, "SATA offline status=%08x\n", 2679196656Smav status); 2680196656Smav } 2681196656Smav return (0); 2682196656Smav } 2683220829Smav if (found == 0 && timeout >= 100) 2684220829Smav break; 2685220777Smav DELAY(100); 2686195534Sscottl } 2687220829Smav if (timeout >= 1000 || !found) { 2688195534Sscottl if (bootverbose) { 2689220829Smav device_printf(ch->dev, 2690220829Smav "SATA connect timeout time=%dus status=%08x\n", 2691220829Smav timeout * 100, status); 2692195534Sscottl } 2693195534Sscottl return (0); 2694195534Sscottl } 2695195534Sscottl if (bootverbose) { 2696220777Smav device_printf(ch->dev, "SATA connect time=%dus status=%08x\n", 2697220777Smav timeout * 100, status); 2698195534Sscottl } 2699195534Sscottl /* Clear SATA error register */ 2700195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SERR, 0xffffffff); 2701195534Sscottl return (1); 2702195534Sscottl} 2703195534Sscottl 2704195534Sscottlstatic int 2705203108Smavahci_sata_phy_reset(device_t dev) 2706195534Sscottl{ 2707195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2708199821Smav int sata_rev; 2709195534Sscottl uint32_t val; 2710195534Sscottl 2711220657Smav if (ch->listening) { 2712220657Smav val = ATA_INL(ch->r_mem, AHCI_P_CMD); 2713220657Smav val |= AHCI_P_CMD_SUD; 2714220657Smav ATA_OUTL(ch->r_mem, AHCI_P_CMD, val); 2715220657Smav ch->listening = 0; 2716220657Smav } 2717199821Smav sata_rev = ch->user[ch->pm_present ? 15 : 0].revision; 2718199821Smav if (sata_rev == 1) 2719195534Sscottl val = ATA_SC_SPD_SPEED_GEN1; 2720199821Smav else if (sata_rev == 2) 2721195534Sscottl val = ATA_SC_SPD_SPEED_GEN2; 2722199821Smav else if (sata_rev == 3) 2723195534Sscottl val = ATA_SC_SPD_SPEED_GEN3; 2724195534Sscottl else 2725195534Sscottl val = 0; 2726195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SCTL, 2727196656Smav ATA_SC_DET_RESET | val | 2728196656Smav ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER); 2729220777Smav DELAY(1000); 2730196656Smav ATA_OUTL(ch->r_mem, AHCI_P_SCTL, 2731195534Sscottl ATA_SC_DET_IDLE | val | ((ch->pm_level > 0) ? 0 : 2732195534Sscottl (ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER))); 2733203426Smav if (!ahci_sata_connect(ch)) { 2734220657Smav if (ch->caps & AHCI_CAP_SSS) { 2735220657Smav val = ATA_INL(ch->r_mem, AHCI_P_CMD); 2736220657Smav val &= ~AHCI_P_CMD_SUD; 2737220657Smav ATA_OUTL(ch->r_mem, AHCI_P_CMD, val); 2738220657Smav ch->listening = 1; 2739220657Smav } else if (ch->pm_level > 0) 2740203426Smav ATA_OUTL(ch->r_mem, AHCI_P_SCTL, ATA_SC_DET_DISABLE); 2741203426Smav return (0); 2742203426Smav } 2743203426Smav return (1); 2744195534Sscottl} 2745195534Sscottl 2746207430Smavstatic int 2747207430Smavahci_check_ids(device_t dev, union ccb *ccb) 2748207430Smav{ 2749207430Smav struct ahci_channel *ch = device_get_softc(dev); 2750207430Smav 2751207430Smav if (ccb->ccb_h.target_id > ((ch->caps & AHCI_CAP_SPM) ? 15 : 0)) { 2752207430Smav ccb->ccb_h.status = CAM_TID_INVALID; 2753207430Smav xpt_done(ccb); 2754207430Smav return (-1); 2755207430Smav } 2756207430Smav if (ccb->ccb_h.target_lun != 0) { 2757207430Smav ccb->ccb_h.status = CAM_LUN_INVALID; 2758207430Smav xpt_done(ccb); 2759207430Smav return (-1); 2760207430Smav } 2761207430Smav return (0); 2762207430Smav} 2763207430Smav 2764195534Sscottlstatic void 2765195534Sscottlahciaction(struct cam_sim *sim, union ccb *ccb) 2766195534Sscottl{ 2767210471Smav device_t dev, parent; 2768195534Sscottl struct ahci_channel *ch; 2769195534Sscottl 2770195534Sscottl CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("ahciaction func_code=%x\n", 2771195534Sscottl ccb->ccb_h.func_code)); 2772195534Sscottl 2773195534Sscottl ch = (struct ahci_channel *)cam_sim_softc(sim); 2774195534Sscottl dev = ch->dev; 2775195534Sscottl switch (ccb->ccb_h.func_code) { 2776195534Sscottl /* Common cases first */ 2777195534Sscottl case XPT_ATA_IO: /* Execute the requested I/O operation */ 2778195534Sscottl case XPT_SCSI_IO: 2779207430Smav if (ahci_check_ids(dev, ccb)) 2780207430Smav return; 2781207430Smav if (ch->devices == 0 || 2782207430Smav (ch->pm_present == 0 && 2783207430Smav ccb->ccb_h.target_id > 0 && ccb->ccb_h.target_id < 15)) { 2784195534Sscottl ccb->ccb_h.status = CAM_SEL_TIMEOUT; 2785195534Sscottl break; 2786195534Sscottl } 2787220565Smav ccb->ccb_h.recovery_type = RECOVERY_NONE; 2788195534Sscottl /* Check for command collision. */ 2789195534Sscottl if (ahci_check_collision(dev, ccb)) { 2790195534Sscottl /* Freeze command. */ 2791195534Sscottl ch->frozen = ccb; 2792195534Sscottl /* We have only one frozen slot, so freeze simq also. */ 2793195534Sscottl xpt_freeze_simq(ch->sim, 1); 2794195534Sscottl return; 2795195534Sscottl } 2796195534Sscottl ahci_begin_transaction(dev, ccb); 2797207430Smav return; 2798195534Sscottl case XPT_EN_LUN: /* Enable LUN as a target */ 2799195534Sscottl case XPT_TARGET_IO: /* Execute target I/O request */ 2800195534Sscottl case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */ 2801195534Sscottl case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/ 2802195534Sscottl case XPT_ABORT: /* Abort the specified CCB */ 2803195534Sscottl /* XXX Implement */ 2804195534Sscottl ccb->ccb_h.status = CAM_REQ_INVALID; 2805195534Sscottl break; 2806195534Sscottl case XPT_SET_TRAN_SETTINGS: 2807195534Sscottl { 2808195534Sscottl struct ccb_trans_settings *cts = &ccb->cts; 2809199747Smav struct ahci_device *d; 2810195534Sscottl 2811207430Smav if (ahci_check_ids(dev, ccb)) 2812207430Smav return; 2813199747Smav if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 2814199747Smav d = &ch->curr[ccb->ccb_h.target_id]; 2815199747Smav else 2816199747Smav d = &ch->user[ccb->ccb_h.target_id]; 2817199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_REVISION) 2818199747Smav d->revision = cts->xport_specific.sata.revision; 2819199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_MODE) 2820199747Smav d->mode = cts->xport_specific.sata.mode; 2821199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_BYTECOUNT) 2822199747Smav d->bytecount = min(8192, cts->xport_specific.sata.bytecount); 2823199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_TAGS) 2824199747Smav d->tags = min(ch->numslots, cts->xport_specific.sata.tags); 2825199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_PM) 2826195534Sscottl ch->pm_present = cts->xport_specific.sata.pm_present; 2827203376Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_ATAPI) 2828203376Smav d->atapi = cts->xport_specific.sata.atapi; 2829207499Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_CAPS) 2830207499Smav d->caps = cts->xport_specific.sata.caps; 2831195534Sscottl ccb->ccb_h.status = CAM_REQ_CMP; 2832195534Sscottl break; 2833195534Sscottl } 2834195534Sscottl case XPT_GET_TRAN_SETTINGS: 2835195534Sscottl /* Get default/user set transfer settings for the target */ 2836195534Sscottl { 2837195534Sscottl struct ccb_trans_settings *cts = &ccb->cts; 2838199747Smav struct ahci_device *d; 2839195534Sscottl uint32_t status; 2840195534Sscottl 2841207430Smav if (ahci_check_ids(dev, ccb)) 2842207430Smav return; 2843199747Smav if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 2844199747Smav d = &ch->curr[ccb->ccb_h.target_id]; 2845199747Smav else 2846199747Smav d = &ch->user[ccb->ccb_h.target_id]; 2847236666Smav cts->protocol = PROTO_UNSPECIFIED; 2848196656Smav cts->protocol_version = PROTO_VERSION_UNSPECIFIED; 2849195534Sscottl cts->transport = XPORT_SATA; 2850196656Smav cts->transport_version = XPORT_VERSION_UNSPECIFIED; 2851195534Sscottl cts->proto_specific.valid = 0; 2852195534Sscottl cts->xport_specific.sata.valid = 0; 2853199747Smav if (cts->type == CTS_TYPE_CURRENT_SETTINGS && 2854199747Smav (ccb->ccb_h.target_id == 15 || 2855199747Smav (ccb->ccb_h.target_id == 0 && !ch->pm_present))) { 2856195534Sscottl status = ATA_INL(ch->r_mem, AHCI_P_SSTS) & ATA_SS_SPD_MASK; 2857199747Smav if (status & 0x0f0) { 2858199747Smav cts->xport_specific.sata.revision = 2859199747Smav (status & 0x0f0) >> 4; 2860199747Smav cts->xport_specific.sata.valid |= 2861199747Smav CTS_SATA_VALID_REVISION; 2862199747Smav } 2863207499Smav cts->xport_specific.sata.caps = d->caps & CTS_SATA_CAPS_D; 2864207499Smav if (ch->pm_level) { 2865207499Smav if (ch->caps & (AHCI_CAP_PSC | AHCI_CAP_SSC)) 2866207499Smav cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_PMREQ; 2867207499Smav if (ch->caps2 & AHCI_CAP2_APST) 2868207499Smav cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_APST; 2869207499Smav } 2870207499Smav if ((ch->caps & AHCI_CAP_SNCQ) && 2871207499Smav (ch->quirks & AHCI_Q_NOAA) == 0) 2872207499Smav cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_DMAAA; 2873220602Smav cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_AN; 2874207499Smav cts->xport_specific.sata.caps &= 2875207499Smav ch->user[ccb->ccb_h.target_id].caps; 2876207499Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS; 2877195534Sscottl } else { 2878199747Smav cts->xport_specific.sata.revision = d->revision; 2879199747Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_REVISION; 2880207499Smav cts->xport_specific.sata.caps = d->caps; 2881207499Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS; 2882195534Sscottl } 2883199747Smav cts->xport_specific.sata.mode = d->mode; 2884199747Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_MODE; 2885199747Smav cts->xport_specific.sata.bytecount = d->bytecount; 2886199747Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_BYTECOUNT; 2887199747Smav cts->xport_specific.sata.pm_present = ch->pm_present; 2888195534Sscottl cts->xport_specific.sata.valid |= CTS_SATA_VALID_PM; 2889199747Smav cts->xport_specific.sata.tags = d->tags; 2890199747Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_TAGS; 2891203376Smav cts->xport_specific.sata.atapi = d->atapi; 2892203376Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_ATAPI; 2893195534Sscottl ccb->ccb_h.status = CAM_REQ_CMP; 2894195534Sscottl break; 2895195534Sscottl } 2896195534Sscottl case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 2897195534Sscottl case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 2898195534Sscottl ahci_reset(dev); 2899195534Sscottl ccb->ccb_h.status = CAM_REQ_CMP; 2900195534Sscottl break; 2901195534Sscottl case XPT_TERM_IO: /* Terminate the I/O process */ 2902195534Sscottl /* XXX Implement */ 2903195534Sscottl ccb->ccb_h.status = CAM_REQ_INVALID; 2904195534Sscottl break; 2905195534Sscottl case XPT_PATH_INQ: /* Path routing inquiry */ 2906195534Sscottl { 2907195534Sscottl struct ccb_pathinq *cpi = &ccb->cpi; 2908195534Sscottl 2909210471Smav parent = device_get_parent(dev); 2910195534Sscottl cpi->version_num = 1; /* XXX??? */ 2911199278Smav cpi->hba_inquiry = PI_SDTR_ABLE; 2912199278Smav if (ch->caps & AHCI_CAP_SNCQ) 2913199278Smav cpi->hba_inquiry |= PI_TAG_ABLE; 2914195534Sscottl if (ch->caps & AHCI_CAP_SPM) 2915195534Sscottl cpi->hba_inquiry |= PI_SATAPM; 2916195534Sscottl cpi->target_sprt = 0; 2917195534Sscottl cpi->hba_misc = PIM_SEQSCAN; 2918195534Sscottl cpi->hba_eng_cnt = 0; 2919195534Sscottl if (ch->caps & AHCI_CAP_SPM) 2920198322Smav cpi->max_target = 15; 2921195534Sscottl else 2922195534Sscottl cpi->max_target = 0; 2923195534Sscottl cpi->max_lun = 0; 2924195534Sscottl cpi->initiator_id = 0; 2925195534Sscottl cpi->bus_id = cam_sim_bus(sim); 2926195534Sscottl cpi->base_transfer_speed = 150000; 2927195534Sscottl strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 2928195534Sscottl strncpy(cpi->hba_vid, "AHCI", HBA_IDLEN); 2929195534Sscottl strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 2930195534Sscottl cpi->unit_number = cam_sim_unit(sim); 2931195534Sscottl cpi->transport = XPORT_SATA; 2932196656Smav cpi->transport_version = XPORT_VERSION_UNSPECIFIED; 2933236847Smav cpi->protocol = PROTO_ATA; 2934196656Smav cpi->protocol_version = PROTO_VERSION_UNSPECIFIED; 2935195534Sscottl cpi->maxio = MAXPHYS; 2936196777Smav /* ATI SB600 can't handle 256 sectors with FPDMA (NCQ). */ 2937210471Smav if (pci_get_devid(parent) == 0x43801002) 2938196796Smav cpi->maxio = min(cpi->maxio, 128 * 512); 2939210471Smav cpi->hba_vendor = pci_get_vendor(parent); 2940210471Smav cpi->hba_device = pci_get_device(parent); 2941210471Smav cpi->hba_subvendor = pci_get_subvendor(parent); 2942210471Smav cpi->hba_subdevice = pci_get_subdevice(parent); 2943195534Sscottl cpi->ccb_h.status = CAM_REQ_CMP; 2944195534Sscottl break; 2945195534Sscottl } 2946195534Sscottl default: 2947195534Sscottl ccb->ccb_h.status = CAM_REQ_INVALID; 2948195534Sscottl break; 2949195534Sscottl } 2950207430Smav xpt_done(ccb); 2951195534Sscottl} 2952195534Sscottl 2953195534Sscottlstatic void 2954195534Sscottlahcipoll(struct cam_sim *sim) 2955195534Sscottl{ 2956195534Sscottl struct ahci_channel *ch = (struct ahci_channel *)cam_sim_softc(sim); 2957195534Sscottl 2958195534Sscottl ahci_ch_intr(ch->dev); 2959220789Smav if (ch->resetting != 0 && 2960220789Smav (--ch->resetpolldiv <= 0 || !callout_pending(&ch->reset_timer))) { 2961220789Smav ch->resetpolldiv = 1000; 2962220789Smav ahci_reset_to(ch->dev); 2963220789Smav } 2964195534Sscottl} 2965