ahci_pci.c revision 228200
1195534Sscottl/*- 2195534Sscottl * Copyright (c) 2009 Alexander Motin <mav@FreeBSD.org> 3195534Sscottl * All rights reserved. 4195534Sscottl * 5195534Sscottl * Redistribution and use in source and binary forms, with or without 6195534Sscottl * modification, are permitted provided that the following conditions 7195534Sscottl * are met: 8195534Sscottl * 1. Redistributions of source code must retain the above copyright 9195534Sscottl * notice, this list of conditions and the following disclaimer, 10195534Sscottl * without modification, immediately at the beginning of the file. 11195534Sscottl * 2. Redistributions in binary form must reproduce the above copyright 12195534Sscottl * notice, this list of conditions and the following disclaimer in the 13195534Sscottl * documentation and/or other materials provided with the distribution. 14195534Sscottl * 15195534Sscottl * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16195534Sscottl * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17195534Sscottl * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18195534Sscottl * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19195534Sscottl * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20195534Sscottl * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21195534Sscottl * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22195534Sscottl * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23195534Sscottl * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24195534Sscottl * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25195534Sscottl */ 26195534Sscottl 27195534Sscottl#include <sys/cdefs.h> 28195534Sscottl__FBSDID("$FreeBSD: head/sys/dev/ahci/ahci.c 228200 2011-12-02 12:52:33Z mav $"); 29195534Sscottl 30195534Sscottl#include <sys/param.h> 31195534Sscottl#include <sys/module.h> 32195534Sscottl#include <sys/systm.h> 33195534Sscottl#include <sys/kernel.h> 34195534Sscottl#include <sys/ata.h> 35195534Sscottl#include <sys/bus.h> 36220576Smav#include <sys/conf.h> 37195534Sscottl#include <sys/endian.h> 38195534Sscottl#include <sys/malloc.h> 39195534Sscottl#include <sys/lock.h> 40195534Sscottl#include <sys/mutex.h> 41195534Sscottl#include <sys/sema.h> 42195534Sscottl#include <sys/taskqueue.h> 43195534Sscottl#include <vm/uma.h> 44195534Sscottl#include <machine/stdarg.h> 45195534Sscottl#include <machine/resource.h> 46195534Sscottl#include <machine/bus.h> 47195534Sscottl#include <sys/rman.h> 48222039Smav#include <dev/led/led.h> 49195534Sscottl#include <dev/pci/pcivar.h> 50195534Sscottl#include <dev/pci/pcireg.h> 51195534Sscottl#include "ahci.h" 52195534Sscottl 53195534Sscottl#include <cam/cam.h> 54195534Sscottl#include <cam/cam_ccb.h> 55195534Sscottl#include <cam/cam_sim.h> 56195534Sscottl#include <cam/cam_xpt_sim.h> 57195534Sscottl#include <cam/cam_debug.h> 58195534Sscottl 59195534Sscottl/* local prototypes */ 60195534Sscottlstatic int ahci_setup_interrupt(device_t dev); 61195534Sscottlstatic void ahci_intr(void *data); 62195534Sscottlstatic void ahci_intr_one(void *data); 63195534Sscottlstatic int ahci_suspend(device_t dev); 64195534Sscottlstatic int ahci_resume(device_t dev); 65208375Smavstatic int ahci_ch_init(device_t dev); 66208375Smavstatic int ahci_ch_deinit(device_t dev); 67195534Sscottlstatic int ahci_ch_suspend(device_t dev); 68195534Sscottlstatic int ahci_ch_resume(device_t dev); 69196656Smavstatic void ahci_ch_pm(void *arg); 70195534Sscottlstatic void ahci_ch_intr_locked(void *data); 71195534Sscottlstatic void ahci_ch_intr(void *data); 72222039Smavstatic void ahci_ch_led(void *priv, int onoff); 73195534Sscottlstatic int ahci_ctlr_reset(device_t dev); 74205422Smavstatic int ahci_ctlr_setup(device_t dev); 75195534Sscottlstatic void ahci_begin_transaction(device_t dev, union ccb *ccb); 76195534Sscottlstatic void ahci_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error); 77195534Sscottlstatic void ahci_execute_transaction(struct ahci_slot *slot); 78195534Sscottlstatic void ahci_timeout(struct ahci_slot *slot); 79195534Sscottlstatic void ahci_end_transaction(struct ahci_slot *slot, enum ahci_err_type et); 80199821Smavstatic int ahci_setup_fis(device_t dev, struct ahci_cmd_tab *ctp, union ccb *ccb, int tag); 81195534Sscottlstatic void ahci_dmainit(device_t dev); 82195534Sscottlstatic void ahci_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error); 83195534Sscottlstatic void ahci_dmafini(device_t dev); 84195534Sscottlstatic void ahci_slotsalloc(device_t dev); 85195534Sscottlstatic void ahci_slotsfree(device_t dev); 86195534Sscottlstatic void ahci_reset(device_t dev); 87203123Smavstatic void ahci_start(device_t dev, int fbs); 88195534Sscottlstatic void ahci_stop(device_t dev); 89195534Sscottlstatic void ahci_clo(device_t dev); 90195534Sscottlstatic void ahci_start_fr(device_t dev); 91195534Sscottlstatic void ahci_stop_fr(device_t dev); 92195534Sscottl 93195534Sscottlstatic int ahci_sata_connect(struct ahci_channel *ch); 94203108Smavstatic int ahci_sata_phy_reset(device_t dev); 95220576Smavstatic int ahci_wait_ready(device_t dev, int t, int t0); 96195534Sscottl 97220565Smavstatic void ahci_issue_recovery(device_t dev); 98195534Sscottlstatic void ahci_process_read_log(device_t dev, union ccb *ccb); 99220565Smavstatic void ahci_process_request_sense(device_t dev, union ccb *ccb); 100195534Sscottl 101195534Sscottlstatic void ahciaction(struct cam_sim *sim, union ccb *ccb); 102195534Sscottlstatic void ahcipoll(struct cam_sim *sim); 103195534Sscottl 104227293Sedstatic MALLOC_DEFINE(M_AHCI, "AHCI driver", "AHCI driver data buffers"); 105195534Sscottl 106199176Smavstatic struct { 107199176Smav uint32_t id; 108203030Smav uint8_t rev; 109199176Smav const char *name; 110199322Smav int quirks; 111199322Smav#define AHCI_Q_NOFORCE 1 112199322Smav#define AHCI_Q_NOPMP 2 113199322Smav#define AHCI_Q_NONCQ 4 114199322Smav#define AHCI_Q_1CH 8 115199322Smav#define AHCI_Q_2CH 16 116199322Smav#define AHCI_Q_4CH 32 117199322Smav#define AHCI_Q_EDGEIS 64 118203030Smav#define AHCI_Q_SATA2 128 119203123Smav#define AHCI_Q_NOBSYRES 256 120207499Smav#define AHCI_Q_NOAA 512 121218596Smav#define AHCI_Q_NOCOUNT 1024 122222304Smav#define AHCI_Q_ALTSIG 2048 123199176Smav} ahci_ids[] = { 124203030Smav {0x43801002, 0x00, "ATI IXP600", 0}, 125203030Smav {0x43901002, 0x00, "ATI IXP700", 0}, 126203030Smav {0x43911002, 0x00, "ATI IXP700", 0}, 127203030Smav {0x43921002, 0x00, "ATI IXP700", 0}, 128203030Smav {0x43931002, 0x00, "ATI IXP700", 0}, 129203030Smav {0x43941002, 0x00, "ATI IXP800", 0}, 130203030Smav {0x43951002, 0x00, "ATI IXP800", 0}, 131225140Smav {0x06121b21, 0x00, "ASMedia ASM1061", 0}, 132203030Smav {0x26528086, 0x00, "Intel ICH6", AHCI_Q_NOFORCE}, 133203030Smav {0x26538086, 0x00, "Intel ICH6M", AHCI_Q_NOFORCE}, 134203030Smav {0x26818086, 0x00, "Intel ESB2", 0}, 135203030Smav {0x26828086, 0x00, "Intel ESB2", 0}, 136203030Smav {0x26838086, 0x00, "Intel ESB2", 0}, 137203030Smav {0x27c18086, 0x00, "Intel ICH7", 0}, 138203030Smav {0x27c38086, 0x00, "Intel ICH7", 0}, 139203030Smav {0x27c58086, 0x00, "Intel ICH7M", 0}, 140203030Smav {0x27c68086, 0x00, "Intel ICH7M", 0}, 141203030Smav {0x28218086, 0x00, "Intel ICH8", 0}, 142203030Smav {0x28228086, 0x00, "Intel ICH8", 0}, 143203030Smav {0x28248086, 0x00, "Intel ICH8", 0}, 144203030Smav {0x28298086, 0x00, "Intel ICH8M", 0}, 145203030Smav {0x282a8086, 0x00, "Intel ICH8M", 0}, 146203030Smav {0x29228086, 0x00, "Intel ICH9", 0}, 147203030Smav {0x29238086, 0x00, "Intel ICH9", 0}, 148203030Smav {0x29248086, 0x00, "Intel ICH9", 0}, 149203030Smav {0x29258086, 0x00, "Intel ICH9", 0}, 150203030Smav {0x29278086, 0x00, "Intel ICH9", 0}, 151203030Smav {0x29298086, 0x00, "Intel ICH9M", 0}, 152203030Smav {0x292a8086, 0x00, "Intel ICH9M", 0}, 153203030Smav {0x292b8086, 0x00, "Intel ICH9M", 0}, 154203030Smav {0x292c8086, 0x00, "Intel ICH9M", 0}, 155203030Smav {0x292f8086, 0x00, "Intel ICH9M", 0}, 156203030Smav {0x294d8086, 0x00, "Intel ICH9", 0}, 157203030Smav {0x294e8086, 0x00, "Intel ICH9M", 0}, 158203030Smav {0x3a058086, 0x00, "Intel ICH10", 0}, 159203030Smav {0x3a228086, 0x00, "Intel ICH10", 0}, 160203030Smav {0x3a258086, 0x00, "Intel ICH10", 0}, 161211922Smav {0x3b228086, 0x00, "Intel 5 Series/3400 Series", 0}, 162211922Smav {0x3b238086, 0x00, "Intel 5 Series/3400 Series", 0}, 163211922Smav {0x3b258086, 0x00, "Intel 5 Series/3400 Series", 0}, 164211922Smav {0x3b298086, 0x00, "Intel 5 Series/3400 Series", 0}, 165211922Smav {0x3b2c8086, 0x00, "Intel 5 Series/3400 Series", 0}, 166211922Smav {0x3b2f8086, 0x00, "Intel 5 Series/3400 Series", 0}, 167211922Smav {0x1c028086, 0x00, "Intel Cougar Point", 0}, 168211922Smav {0x1c038086, 0x00, "Intel Cougar Point", 0}, 169211922Smav {0x1c048086, 0x00, "Intel Cougar Point", 0}, 170211922Smav {0x1c058086, 0x00, "Intel Cougar Point", 0}, 171218605Smav {0x1d028086, 0x00, "Intel Patsburg", 0}, 172218605Smav {0x1d048086, 0x00, "Intel Patsburg", 0}, 173218605Smav {0x1d068086, 0x00, "Intel Patsburg", 0}, 174221789Sjfv {0x1e028086, 0x00, "Intel Panther Point", 0}, 175221789Sjfv {0x1e038086, 0x00, "Intel Panther Point", 0}, 176221789Sjfv {0x1e048086, 0x00, "Intel Panther Point", 0}, 177221789Sjfv {0x1e058086, 0x00, "Intel Panther Point", 0}, 178221789Sjfv {0x1e068086, 0x00, "Intel Panther Point", 0}, 179221789Sjfv {0x1e078086, 0x00, "Intel Panther Point", 0}, 180221789Sjfv {0x1e0e8086, 0x00, "Intel Panther Point", 0}, 181221789Sjfv {0x1e0f8086, 0x00, "Intel Panther Point", 0}, 182221789Sjfv {0x23238086, 0x00, "Intel DH89xxCC", 0}, 183203030Smav {0x2361197b, 0x00, "JMicron JMB361", AHCI_Q_NOFORCE}, 184203030Smav {0x2363197b, 0x00, "JMicron JMB363", AHCI_Q_NOFORCE}, 185203030Smav {0x2365197b, 0x00, "JMicron JMB365", AHCI_Q_NOFORCE}, 186203030Smav {0x2366197b, 0x00, "JMicron JMB366", AHCI_Q_NOFORCE}, 187203030Smav {0x2368197b, 0x00, "JMicron JMB368", AHCI_Q_NOFORCE}, 188218596Smav {0x611111ab, 0x00, "Marvell 88SX6111", AHCI_Q_NOFORCE | AHCI_Q_1CH | 189218596Smav AHCI_Q_EDGEIS}, 190218596Smav {0x612111ab, 0x00, "Marvell 88SX6121", AHCI_Q_NOFORCE | AHCI_Q_2CH | 191218596Smav AHCI_Q_EDGEIS | AHCI_Q_NONCQ | AHCI_Q_NOCOUNT}, 192218596Smav {0x614111ab, 0x00, "Marvell 88SX6141", AHCI_Q_NOFORCE | AHCI_Q_4CH | 193218596Smav AHCI_Q_EDGEIS | AHCI_Q_NONCQ | AHCI_Q_NOCOUNT}, 194218596Smav {0x614511ab, 0x00, "Marvell 88SX6145", AHCI_Q_NOFORCE | AHCI_Q_4CH | 195218596Smav AHCI_Q_EDGEIS | AHCI_Q_NONCQ | AHCI_Q_NOCOUNT}, 196220413Smav {0x91201b4b, 0x00, "Marvell 88SE912x", AHCI_Q_EDGEIS|AHCI_Q_NOBSYRES}, 197222304Smav {0x91231b4b, 0x11, "Marvell 88SE912x", AHCI_Q_NOBSYRES|AHCI_Q_ALTSIG}, 198203123Smav {0x91231b4b, 0x00, "Marvell 88SE912x", AHCI_Q_EDGEIS|AHCI_Q_SATA2|AHCI_Q_NOBSYRES}, 199223699Smav {0x91251b4b, 0x00, "Marvell 88SE9125", AHCI_Q_NOBSYRES}, 200225789Smav {0x91281b4b, 0x00, "Marvell 88SE9128", AHCI_Q_NOBSYRES|AHCI_Q_ALTSIG}, 201222306Smav {0x91721b4b, 0x00, "Marvell 88SE9172", AHCI_Q_NOBSYRES}, 202221504Smav {0x91821b4b, 0x00, "Marvell 88SE9182", AHCI_Q_NOBSYRES}, 203216309Smav {0x06201103, 0x00, "HighPoint RocketRAID 620", AHCI_Q_NOBSYRES}, 204216309Smav {0x06201b4b, 0x00, "HighPoint RocketRAID 620", AHCI_Q_NOBSYRES}, 205216309Smav {0x06221103, 0x00, "HighPoint RocketRAID 622", AHCI_Q_NOBSYRES}, 206216309Smav {0x06221b4b, 0x00, "HighPoint RocketRAID 622", AHCI_Q_NOBSYRES}, 207217245Smav {0x06401103, 0x00, "HighPoint RocketRAID 640", AHCI_Q_NOBSYRES}, 208219341Smav {0x06401b4b, 0x00, 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AHCI_Q_NOAA}, 271207499Smav {0x0d8710de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 272207499Smav {0x0d8810de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 273207499Smav {0x0d8910de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 274207499Smav {0x0d8a10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 275207499Smav {0x0d8b10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 276207499Smav {0x0d8c10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 277207499Smav {0x0d8d10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 278207499Smav {0x0d8e10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 279207499Smav {0x0d8f10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 280208907Smav {0x33491106, 0x00, "VIA VT8251", AHCI_Q_NOPMP|AHCI_Q_NONCQ}, 281208907Smav {0x62871106, 0x00, "VIA VT8251", AHCI_Q_NOPMP|AHCI_Q_NONCQ}, 282203030Smav {0x11841039, 0x00, "SiS 966", 0}, 283203030Smav {0x11851039, 0x00, "SiS 968", 0}, 284203030Smav {0x01861039, 0x00, "SiS 968", 0}, 285203030Smav {0x00000000, 0x00, NULL, 0} 286199176Smav}; 287199176Smav 288220565Smav#define recovery_type spriv_field0 289220565Smav#define RECOVERY_NONE 0 290220565Smav#define RECOVERY_READ_LOG 1 291220565Smav#define RECOVERY_REQUEST_SENSE 2 292220565Smav#define recovery_slot spriv_field1 293220565Smav 294228200Smavstatic int force_ahci = 1; 295228200SmavTUNABLE_INT("hw.ahci.force", &force_ahci); 296228200Smav 297195534Sscottlstatic int 298195534Sscottlahci_probe(device_t dev) 299195534Sscottl{ 300199176Smav char buf[64]; 301199322Smav int i, valid = 0; 302199322Smav uint32_t devid = pci_get_devid(dev); 303203030Smav uint8_t revid = pci_get_revid(dev); 304199322Smav 305199322Smav /* Is this a possible AHCI candidate? */ 306199322Smav if (pci_get_class(dev) == PCIC_STORAGE && 307199322Smav pci_get_subclass(dev) == PCIS_STORAGE_SATA && 308199322Smav pci_get_progif(dev) == PCIP_STORAGE_SATA_AHCI_1_0) 309199322Smav valid = 1; 310199322Smav /* Is this a known AHCI chip? */ 311199322Smav for (i = 0; ahci_ids[i].id != 0; i++) { 312199322Smav if (ahci_ids[i].id == devid && 313203030Smav ahci_ids[i].rev <= revid && 314228200Smav (valid || (force_ahci == 1 && 315228200Smav !(ahci_ids[i].quirks & AHCI_Q_NOFORCE)))) { 316199717Smav /* Do not attach JMicrons with single PCI function. */ 317199717Smav if (pci_get_vendor(dev) == 0x197b && 318199717Smav (pci_read_config(dev, 0xdf, 1) & 0x40) == 0) 319199717Smav return (ENXIO); 320199322Smav snprintf(buf, sizeof(buf), "%s AHCI SATA controller", 321199322Smav ahci_ids[i].name); 322199322Smav device_set_desc_copy(dev, buf); 323199322Smav return (BUS_PROBE_VENDOR); 324199322Smav } 325199322Smav } 326199322Smav if (!valid) 327199322Smav return (ENXIO); 328199322Smav device_set_desc_copy(dev, "AHCI SATA controller"); 329199322Smav return (BUS_PROBE_VENDOR); 330199322Smav} 331199322Smav 332199322Smavstatic int 333199322Smavahci_ata_probe(device_t dev) 334199322Smav{ 335199322Smav char buf[64]; 336199176Smav int i; 337199176Smav uint32_t devid = pci_get_devid(dev); 338203030Smav uint8_t revid = pci_get_revid(dev); 339195534Sscottl 340199322Smav if ((intptr_t)device_get_ivars(dev) >= 0) 341199322Smav return (ENXIO); 342199176Smav /* Is this a known AHCI chip? */ 343199176Smav for (i = 0; ahci_ids[i].id != 0; i++) { 344203030Smav if (ahci_ids[i].id == devid && 345203030Smav ahci_ids[i].rev <= revid) { 346199176Smav snprintf(buf, sizeof(buf), "%s AHCI SATA controller", 347199176Smav ahci_ids[i].name); 348199176Smav device_set_desc_copy(dev, buf); 349199176Smav return (BUS_PROBE_VENDOR); 350199176Smav } 351199176Smav } 352199176Smav device_set_desc_copy(dev, "AHCI SATA controller"); 353195534Sscottl return (BUS_PROBE_VENDOR); 354195534Sscottl} 355195534Sscottl 356195534Sscottlstatic int 357195534Sscottlahci_attach(device_t dev) 358195534Sscottl{ 359195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 360195534Sscottl device_t child; 361199322Smav int error, unit, speed, i; 362199322Smav uint32_t devid = pci_get_devid(dev); 363203030Smav uint8_t revid = pci_get_revid(dev); 364196656Smav u_int32_t version; 365195534Sscottl 366195534Sscottl ctlr->dev = dev; 367199322Smav i = 0; 368203030Smav while (ahci_ids[i].id != 0 && 369203030Smav (ahci_ids[i].id != devid || 370203030Smav ahci_ids[i].rev > revid)) 371199322Smav i++; 372199322Smav ctlr->quirks = ahci_ids[i].quirks; 373196656Smav resource_int_value(device_get_name(dev), 374196656Smav device_get_unit(dev), "ccc", &ctlr->ccc); 375195534Sscottl /* if we have a memory BAR(5) we are likely on an AHCI part */ 376195534Sscottl ctlr->r_rid = PCIR_BAR(5); 377195534Sscottl if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 378195534Sscottl &ctlr->r_rid, RF_ACTIVE))) 379195534Sscottl return ENXIO; 380195534Sscottl /* Setup our own memory management for channels. */ 381208414Smav ctlr->sc_iomem.rm_start = rman_get_start(ctlr->r_mem); 382208414Smav ctlr->sc_iomem.rm_end = rman_get_end(ctlr->r_mem); 383195534Sscottl ctlr->sc_iomem.rm_type = RMAN_ARRAY; 384195534Sscottl ctlr->sc_iomem.rm_descr = "I/O memory addresses"; 385195534Sscottl if ((error = rman_init(&ctlr->sc_iomem)) != 0) { 386195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 387195534Sscottl return (error); 388195534Sscottl } 389195534Sscottl if ((error = rman_manage_region(&ctlr->sc_iomem, 390195534Sscottl rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) { 391195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 392195534Sscottl rman_fini(&ctlr->sc_iomem); 393195534Sscottl return (error); 394195534Sscottl } 395207511Smav pci_enable_busmaster(dev); 396195534Sscottl /* Reset controller */ 397195534Sscottl if ((error = ahci_ctlr_reset(dev)) != 0) { 398195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 399195534Sscottl rman_fini(&ctlr->sc_iomem); 400195534Sscottl return (error); 401195534Sscottl }; 402199322Smav /* Get the HW capabilities */ 403199322Smav version = ATA_INL(ctlr->r_mem, AHCI_VS); 404199322Smav ctlr->caps = ATA_INL(ctlr->r_mem, AHCI_CAP); 405199322Smav if (version >= 0x00010020) 406199322Smav ctlr->caps2 = ATA_INL(ctlr->r_mem, AHCI_CAP2); 407203108Smav if (ctlr->caps & AHCI_CAP_EMS) 408203108Smav ctlr->capsem = ATA_INL(ctlr->r_mem, AHCI_EM_CTL); 409195534Sscottl ctlr->ichannels = ATA_INL(ctlr->r_mem, AHCI_PI); 410222304Smav 411222304Smav /* Identify and set separate quirks for HBA and RAID f/w Marvells. */ 412222304Smav if ((ctlr->quirks & AHCI_Q_NOBSYRES) && 413222304Smav (ctlr->quirks & AHCI_Q_ALTSIG) && 414222304Smav (ctlr->caps & AHCI_CAP_SPM) == 0) 415222304Smav ctlr->quirks &= ~AHCI_Q_NOBSYRES; 416222304Smav 417199322Smav if (ctlr->quirks & AHCI_Q_1CH) { 418199322Smav ctlr->caps &= ~AHCI_CAP_NPMASK; 419199322Smav ctlr->ichannels &= 0x01; 420199322Smav } 421199322Smav if (ctlr->quirks & AHCI_Q_2CH) { 422199322Smav ctlr->caps &= ~AHCI_CAP_NPMASK; 423199322Smav ctlr->caps |= 1; 424199322Smav ctlr->ichannels &= 0x03; 425199322Smav } 426199322Smav if (ctlr->quirks & AHCI_Q_4CH) { 427199322Smav ctlr->caps &= ~AHCI_CAP_NPMASK; 428199322Smav ctlr->caps |= 3; 429199322Smav ctlr->ichannels &= 0x0f; 430199322Smav } 431195534Sscottl ctlr->channels = MAX(flsl(ctlr->ichannels), 432199322Smav (ctlr->caps & AHCI_CAP_NPMASK) + 1); 433199322Smav if (ctlr->quirks & AHCI_Q_NOPMP) 434199322Smav ctlr->caps &= ~AHCI_CAP_SPM; 435199322Smav if (ctlr->quirks & AHCI_Q_NONCQ) 436199322Smav ctlr->caps &= ~AHCI_CAP_SNCQ; 437205422Smav if ((ctlr->caps & AHCI_CAP_CCCS) == 0) 438205422Smav ctlr->ccc = 0; 439222039Smav mtx_init(&ctlr->em_mtx, "AHCI EM lock", NULL, MTX_DEF); 440222039Smav ctlr->emloc = ATA_INL(ctlr->r_mem, AHCI_EM_LOC); 441205422Smav ahci_ctlr_setup(dev); 442195534Sscottl /* Setup interrupts. */ 443195534Sscottl if (ahci_setup_interrupt(dev)) { 444195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 445195534Sscottl rman_fini(&ctlr->sc_iomem); 446195534Sscottl return ENXIO; 447195534Sscottl } 448195534Sscottl /* Announce HW capabilities. */ 449196656Smav speed = (ctlr->caps & AHCI_CAP_ISS) >> AHCI_CAP_ISS_SHIFT; 450195534Sscottl device_printf(dev, 451203123Smav "AHCI v%x.%02x with %d %sGbps ports, Port Multiplier %s%s\n", 452195534Sscottl ((version >> 20) & 0xf0) + ((version >> 16) & 0x0f), 453195534Sscottl ((version >> 4) & 0xf0) + (version & 0x0f), 454196656Smav (ctlr->caps & AHCI_CAP_NPMASK) + 1, 455195534Sscottl ((speed == 1) ? "1.5":((speed == 2) ? "3": 456195534Sscottl ((speed == 3) ? "6":"?"))), 457196656Smav (ctlr->caps & AHCI_CAP_SPM) ? 458203123Smav "supported" : "not supported", 459203123Smav (ctlr->caps & AHCI_CAP_FBSS) ? 460203123Smav " with FBS" : ""); 461195534Sscottl if (bootverbose) { 462195534Sscottl device_printf(dev, "Caps:%s%s%s%s%s%s%s%s %sGbps", 463196656Smav (ctlr->caps & AHCI_CAP_64BIT) ? " 64bit":"", 464196656Smav (ctlr->caps & AHCI_CAP_SNCQ) ? " NCQ":"", 465196656Smav (ctlr->caps & AHCI_CAP_SSNTF) ? " SNTF":"", 466196656Smav (ctlr->caps & AHCI_CAP_SMPS) ? " MPS":"", 467196656Smav (ctlr->caps & AHCI_CAP_SSS) ? " SS":"", 468196656Smav (ctlr->caps & AHCI_CAP_SALP) ? " ALP":"", 469196656Smav (ctlr->caps & AHCI_CAP_SAL) ? " AL":"", 470196656Smav (ctlr->caps & AHCI_CAP_SCLO) ? " CLO":"", 471195534Sscottl ((speed == 1) ? "1.5":((speed == 2) ? "3": 472195534Sscottl ((speed == 3) ? "6":"?")))); 473195534Sscottl printf("%s%s%s%s%s%s %dcmd%s%s%s %dports\n", 474196656Smav (ctlr->caps & AHCI_CAP_SAM) ? " AM":"", 475196656Smav (ctlr->caps & AHCI_CAP_SPM) ? " PM":"", 476196656Smav (ctlr->caps & AHCI_CAP_FBSS) ? " FBS":"", 477196656Smav (ctlr->caps & AHCI_CAP_PMD) ? " PMD":"", 478196656Smav (ctlr->caps & AHCI_CAP_SSC) ? " SSC":"", 479196656Smav (ctlr->caps & AHCI_CAP_PSC) ? " PSC":"", 480196656Smav ((ctlr->caps & AHCI_CAP_NCS) >> AHCI_CAP_NCS_SHIFT) + 1, 481196656Smav (ctlr->caps & AHCI_CAP_CCCS) ? " CCC":"", 482196656Smav (ctlr->caps & AHCI_CAP_EMS) ? " EM":"", 483196656Smav (ctlr->caps & AHCI_CAP_SXS) ? " eSATA":"", 484196656Smav (ctlr->caps & AHCI_CAP_NPMASK) + 1); 485195534Sscottl } 486196656Smav if (bootverbose && version >= 0x00010020) { 487196656Smav device_printf(dev, "Caps2:%s%s%s\n", 488196656Smav (ctlr->caps2 & AHCI_CAP2_APST) ? " APST":"", 489196656Smav (ctlr->caps2 & AHCI_CAP2_NVMP) ? " NVMP":"", 490196656Smav (ctlr->caps2 & AHCI_CAP2_BOH) ? " BOH":""); 491196656Smav } 492203108Smav if (bootverbose && (ctlr->caps & AHCI_CAP_EMS)) { 493203123Smav device_printf(dev, "EM Caps:%s%s%s%s%s%s%s%s\n", 494203108Smav (ctlr->capsem & AHCI_EM_PM) ? " PM":"", 495203108Smav (ctlr->capsem & AHCI_EM_ALHD) ? " ALHD":"", 496203108Smav (ctlr->capsem & AHCI_EM_XMT) ? " XMT":"", 497203108Smav (ctlr->capsem & AHCI_EM_SMB) ? " SMB":"", 498203108Smav (ctlr->capsem & AHCI_EM_SGPIO) ? " SGPIO":"", 499203108Smav (ctlr->capsem & AHCI_EM_SES2) ? " SES-2":"", 500203108Smav (ctlr->capsem & AHCI_EM_SAFTE) ? " SAF-TE":"", 501203108Smav (ctlr->capsem & AHCI_EM_LED) ? " LED":""); 502203108Smav } 503195534Sscottl /* Attach all channels on this controller */ 504195534Sscottl for (unit = 0; unit < ctlr->channels; unit++) { 505195534Sscottl child = device_add_child(dev, "ahcich", -1); 506227635Smav if (child == NULL) { 507195534Sscottl device_printf(dev, "failed to add channel device\n"); 508227635Smav continue; 509227635Smav } 510227635Smav device_set_ivars(child, (void *)(intptr_t)unit); 511227635Smav if ((ctlr->ichannels & (1 << unit)) == 0) 512227635Smav device_disable(child); 513195534Sscottl } 514195534Sscottl bus_generic_attach(dev); 515195534Sscottl return 0; 516195534Sscottl} 517195534Sscottl 518195534Sscottlstatic int 519195534Sscottlahci_detach(device_t dev) 520195534Sscottl{ 521195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 522227701Shselasky int i; 523195534Sscottl 524195534Sscottl /* Detach & delete all children */ 525227849Shselasky device_delete_children(dev); 526227701Shselasky 527195534Sscottl /* Free interrupts. */ 528195534Sscottl for (i = 0; i < ctlr->numirqs; i++) { 529195534Sscottl if (ctlr->irqs[i].r_irq) { 530195534Sscottl bus_teardown_intr(dev, ctlr->irqs[i].r_irq, 531195534Sscottl ctlr->irqs[i].handle); 532195534Sscottl bus_release_resource(dev, SYS_RES_IRQ, 533195534Sscottl ctlr->irqs[i].r_irq_rid, ctlr->irqs[i].r_irq); 534195534Sscottl } 535195534Sscottl } 536195534Sscottl pci_release_msi(dev); 537195534Sscottl /* Free memory. */ 538195534Sscottl rman_fini(&ctlr->sc_iomem); 539195534Sscottl if (ctlr->r_mem) 540195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 541222039Smav mtx_destroy(&ctlr->em_mtx); 542195534Sscottl return (0); 543195534Sscottl} 544195534Sscottl 545195534Sscottlstatic int 546195534Sscottlahci_ctlr_reset(device_t dev) 547195534Sscottl{ 548195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 549195534Sscottl int timeout; 550195534Sscottl 551195534Sscottl if (pci_read_config(dev, 0x00, 4) == 0x28298086 && 552195534Sscottl (pci_read_config(dev, 0x92, 1) & 0xfe) == 0x04) 553195534Sscottl pci_write_config(dev, 0x92, 0x01, 1); 554195534Sscottl /* Enable AHCI mode */ 555195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, AHCI_GHC_AE); 556195534Sscottl /* Reset AHCI controller */ 557195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, AHCI_GHC_AE|AHCI_GHC_HR); 558195534Sscottl for (timeout = 1000; timeout > 0; timeout--) { 559195534Sscottl DELAY(1000); 560195534Sscottl if ((ATA_INL(ctlr->r_mem, AHCI_GHC) & AHCI_GHC_HR) == 0) 561195534Sscottl break; 562195534Sscottl } 563195534Sscottl if (timeout == 0) { 564195534Sscottl device_printf(dev, "AHCI controller reset failure\n"); 565195534Sscottl return ENXIO; 566195534Sscottl } 567195534Sscottl /* Reenable AHCI mode */ 568195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, AHCI_GHC_AE); 569205422Smav return (0); 570205422Smav} 571205422Smav 572205422Smavstatic int 573205422Smavahci_ctlr_setup(device_t dev) 574205422Smav{ 575205422Smav struct ahci_controller *ctlr = device_get_softc(dev); 576195534Sscottl /* Clear interrupts */ 577195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_IS, ATA_INL(ctlr->r_mem, AHCI_IS)); 578196656Smav /* Configure CCC */ 579196656Smav if (ctlr->ccc) { 580196656Smav ATA_OUTL(ctlr->r_mem, AHCI_CCCP, ATA_INL(ctlr->r_mem, AHCI_PI)); 581196656Smav ATA_OUTL(ctlr->r_mem, AHCI_CCCC, 582196656Smav (ctlr->ccc << AHCI_CCCC_TV_SHIFT) | 583196656Smav (4 << AHCI_CCCC_CC_SHIFT) | 584196656Smav AHCI_CCCC_EN); 585196656Smav ctlr->cccv = (ATA_INL(ctlr->r_mem, AHCI_CCCC) & 586196656Smav AHCI_CCCC_INT_MASK) >> AHCI_CCCC_INT_SHIFT; 587196656Smav if (bootverbose) { 588196656Smav device_printf(dev, 589196656Smav "CCC with %dms/4cmd enabled on vector %d\n", 590196656Smav ctlr->ccc, ctlr->cccv); 591196656Smav } 592196656Smav } 593195534Sscottl /* Enable AHCI interrupts */ 594195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, 595195534Sscottl ATA_INL(ctlr->r_mem, AHCI_GHC) | AHCI_GHC_IE); 596195534Sscottl return (0); 597195534Sscottl} 598195534Sscottl 599195534Sscottlstatic int 600195534Sscottlahci_suspend(device_t dev) 601195534Sscottl{ 602195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 603195534Sscottl 604195534Sscottl bus_generic_suspend(dev); 605195534Sscottl /* Disable interupts, so the state change(s) doesn't trigger */ 606195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, 607195534Sscottl ATA_INL(ctlr->r_mem, AHCI_GHC) & (~AHCI_GHC_IE)); 608195534Sscottl return 0; 609195534Sscottl} 610195534Sscottl 611195534Sscottlstatic int 612195534Sscottlahci_resume(device_t dev) 613195534Sscottl{ 614195534Sscottl int res; 615195534Sscottl 616195534Sscottl if ((res = ahci_ctlr_reset(dev)) != 0) 617195534Sscottl return (res); 618205422Smav ahci_ctlr_setup(dev); 619195534Sscottl return (bus_generic_resume(dev)); 620195534Sscottl} 621195534Sscottl 622195534Sscottlstatic int 623195534Sscottlahci_setup_interrupt(device_t dev) 624195534Sscottl{ 625195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 626195534Sscottl int i, msi = 1; 627195534Sscottl 628195534Sscottl /* Process hints. */ 629195534Sscottl resource_int_value(device_get_name(dev), 630195534Sscottl device_get_unit(dev), "msi", &msi); 631195534Sscottl if (msi < 0) 632195534Sscottl msi = 0; 633195534Sscottl else if (msi == 1) 634195534Sscottl msi = min(1, pci_msi_count(dev)); 635195534Sscottl else if (msi > 1) 636195534Sscottl msi = pci_msi_count(dev); 637195534Sscottl /* Allocate MSI if needed/present. */ 638195534Sscottl if (msi && pci_alloc_msi(dev, &msi) == 0) { 639195534Sscottl ctlr->numirqs = msi; 640195534Sscottl } else { 641195534Sscottl msi = 0; 642195534Sscottl ctlr->numirqs = 1; 643195534Sscottl } 644195534Sscottl /* Check for single MSI vector fallback. */ 645195534Sscottl if (ctlr->numirqs > 1 && 646195534Sscottl (ATA_INL(ctlr->r_mem, AHCI_GHC) & AHCI_GHC_MRSM) != 0) { 647195534Sscottl device_printf(dev, "Falling back to one MSI\n"); 648195534Sscottl ctlr->numirqs = 1; 649195534Sscottl } 650195534Sscottl /* Allocate all IRQs. */ 651195534Sscottl for (i = 0; i < ctlr->numirqs; i++) { 652195534Sscottl ctlr->irqs[i].ctlr = ctlr; 653195534Sscottl ctlr->irqs[i].r_irq_rid = i + (msi ? 1 : 0); 654196656Smav if (ctlr->numirqs == 1 || i >= ctlr->channels || 655196656Smav (ctlr->ccc && i == ctlr->cccv)) 656195534Sscottl ctlr->irqs[i].mode = AHCI_IRQ_MODE_ALL; 657195534Sscottl else if (i == ctlr->numirqs - 1) 658195534Sscottl ctlr->irqs[i].mode = AHCI_IRQ_MODE_AFTER; 659195534Sscottl else 660195534Sscottl ctlr->irqs[i].mode = AHCI_IRQ_MODE_ONE; 661195534Sscottl if (!(ctlr->irqs[i].r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 662195534Sscottl &ctlr->irqs[i].r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) { 663195534Sscottl device_printf(dev, "unable to map interrupt\n"); 664195534Sscottl return ENXIO; 665195534Sscottl } 666195534Sscottl if ((bus_setup_intr(dev, ctlr->irqs[i].r_irq, ATA_INTR_FLAGS, NULL, 667195534Sscottl (ctlr->irqs[i].mode == AHCI_IRQ_MODE_ONE) ? ahci_intr_one : ahci_intr, 668195534Sscottl &ctlr->irqs[i], &ctlr->irqs[i].handle))) { 669195534Sscottl /* SOS XXX release r_irq */ 670195534Sscottl device_printf(dev, "unable to setup interrupt\n"); 671195534Sscottl return ENXIO; 672195534Sscottl } 673202011Smav if (ctlr->numirqs > 1) { 674202011Smav bus_describe_intr(dev, ctlr->irqs[i].r_irq, 675202011Smav ctlr->irqs[i].handle, 676202011Smav ctlr->irqs[i].mode == AHCI_IRQ_MODE_ONE ? 677202011Smav "ch%d" : "%d", i); 678202011Smav } 679195534Sscottl } 680195534Sscottl return (0); 681195534Sscottl} 682195534Sscottl 683195534Sscottl/* 684195534Sscottl * Common case interrupt handler. 685195534Sscottl */ 686195534Sscottlstatic void 687195534Sscottlahci_intr(void *data) 688195534Sscottl{ 689195534Sscottl struct ahci_controller_irq *irq = data; 690195534Sscottl struct ahci_controller *ctlr = irq->ctlr; 691205422Smav u_int32_t is, ise = 0; 692195534Sscottl void *arg; 693195534Sscottl int unit; 694195534Sscottl 695196656Smav if (irq->mode == AHCI_IRQ_MODE_ALL) { 696195534Sscottl unit = 0; 697196656Smav if (ctlr->ccc) 698196656Smav is = ctlr->ichannels; 699196656Smav else 700196656Smav is = ATA_INL(ctlr->r_mem, AHCI_IS); 701196656Smav } else { /* AHCI_IRQ_MODE_AFTER */ 702195534Sscottl unit = irq->r_irq_rid - 1; 703196656Smav is = ATA_INL(ctlr->r_mem, AHCI_IS); 704196656Smav } 705205422Smav /* CCC interrupt is edge triggered. */ 706205422Smav if (ctlr->ccc) 707205422Smav ise = 1 << ctlr->cccv; 708200814Smav /* Some controllers have edge triggered IS. */ 709200814Smav if (ctlr->quirks & AHCI_Q_EDGEIS) 710205422Smav ise |= is; 711205422Smav if (ise != 0) 712205422Smav ATA_OUTL(ctlr->r_mem, AHCI_IS, ise); 713195534Sscottl for (; unit < ctlr->channels; unit++) { 714195534Sscottl if ((is & (1 << unit)) != 0 && 715195534Sscottl (arg = ctlr->interrupt[unit].argument)) { 716199322Smav ctlr->interrupt[unit].function(arg); 717195534Sscottl } 718195534Sscottl } 719200814Smav /* AHCI declares level triggered IS. */ 720200814Smav if (!(ctlr->quirks & AHCI_Q_EDGEIS)) 721200814Smav ATA_OUTL(ctlr->r_mem, AHCI_IS, is); 722195534Sscottl} 723195534Sscottl 724195534Sscottl/* 725195534Sscottl * Simplified interrupt handler for multivector MSI mode. 726195534Sscottl */ 727195534Sscottlstatic void 728195534Sscottlahci_intr_one(void *data) 729195534Sscottl{ 730195534Sscottl struct ahci_controller_irq *irq = data; 731195534Sscottl struct ahci_controller *ctlr = irq->ctlr; 732195534Sscottl void *arg; 733195534Sscottl int unit; 734195534Sscottl 735195534Sscottl unit = irq->r_irq_rid - 1; 736202011Smav /* Some controllers have edge triggered IS. */ 737202011Smav if (ctlr->quirks & AHCI_Q_EDGEIS) 738202011Smav ATA_OUTL(ctlr->r_mem, AHCI_IS, 1 << unit); 739195534Sscottl if ((arg = ctlr->interrupt[unit].argument)) 740195534Sscottl ctlr->interrupt[unit].function(arg); 741202011Smav /* AHCI declares level triggered IS. */ 742202011Smav if (!(ctlr->quirks & AHCI_Q_EDGEIS)) 743202011Smav ATA_OUTL(ctlr->r_mem, AHCI_IS, 1 << unit); 744195534Sscottl} 745195534Sscottl 746195534Sscottlstatic struct resource * 747195534Sscottlahci_alloc_resource(device_t dev, device_t child, int type, int *rid, 748195534Sscottl u_long start, u_long end, u_long count, u_int flags) 749195534Sscottl{ 750195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 751195534Sscottl int unit = ((struct ahci_channel *)device_get_softc(child))->unit; 752195534Sscottl struct resource *res = NULL; 753195534Sscottl int offset = AHCI_OFFSET + (unit << 7); 754195534Sscottl long st; 755195534Sscottl 756195534Sscottl switch (type) { 757195534Sscottl case SYS_RES_MEMORY: 758195534Sscottl st = rman_get_start(ctlr->r_mem); 759195534Sscottl res = rman_reserve_resource(&ctlr->sc_iomem, st + offset, 760195534Sscottl st + offset + 127, 128, RF_ACTIVE, child); 761195534Sscottl if (res) { 762195534Sscottl bus_space_handle_t bsh; 763195534Sscottl bus_space_tag_t bst; 764195534Sscottl bsh = rman_get_bushandle(ctlr->r_mem); 765195534Sscottl bst = rman_get_bustag(ctlr->r_mem); 766195534Sscottl bus_space_subregion(bst, bsh, offset, 128, &bsh); 767195534Sscottl rman_set_bushandle(res, bsh); 768195534Sscottl rman_set_bustag(res, bst); 769195534Sscottl } 770195534Sscottl break; 771195534Sscottl case SYS_RES_IRQ: 772195534Sscottl if (*rid == ATA_IRQ_RID) 773195534Sscottl res = ctlr->irqs[0].r_irq; 774195534Sscottl break; 775195534Sscottl } 776195534Sscottl return (res); 777195534Sscottl} 778195534Sscottl 779195534Sscottlstatic int 780195534Sscottlahci_release_resource(device_t dev, device_t child, int type, int rid, 781195534Sscottl struct resource *r) 782195534Sscottl{ 783195534Sscottl 784195534Sscottl switch (type) { 785195534Sscottl case SYS_RES_MEMORY: 786195534Sscottl rman_release_resource(r); 787195534Sscottl return (0); 788195534Sscottl case SYS_RES_IRQ: 789195534Sscottl if (rid != ATA_IRQ_RID) 790195534Sscottl return ENOENT; 791195534Sscottl return (0); 792195534Sscottl } 793195534Sscottl return (EINVAL); 794195534Sscottl} 795195534Sscottl 796195534Sscottlstatic int 797195534Sscottlahci_setup_intr(device_t dev, device_t child, struct resource *irq, 798195534Sscottl int flags, driver_filter_t *filter, driver_intr_t *function, 799195534Sscottl void *argument, void **cookiep) 800195534Sscottl{ 801195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 802195534Sscottl int unit = (intptr_t)device_get_ivars(child); 803195534Sscottl 804195534Sscottl if (filter != NULL) { 805195534Sscottl printf("ahci.c: we cannot use a filter here\n"); 806195534Sscottl return (EINVAL); 807195534Sscottl } 808195534Sscottl ctlr->interrupt[unit].function = function; 809195534Sscottl ctlr->interrupt[unit].argument = argument; 810195534Sscottl return (0); 811195534Sscottl} 812195534Sscottl 813195534Sscottlstatic int 814195534Sscottlahci_teardown_intr(device_t dev, device_t child, struct resource *irq, 815195534Sscottl void *cookie) 816195534Sscottl{ 817195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 818195534Sscottl int unit = (intptr_t)device_get_ivars(child); 819195534Sscottl 820195534Sscottl ctlr->interrupt[unit].function = NULL; 821195534Sscottl ctlr->interrupt[unit].argument = NULL; 822195534Sscottl return (0); 823195534Sscottl} 824195534Sscottl 825195534Sscottlstatic int 826195534Sscottlahci_print_child(device_t dev, device_t child) 827195534Sscottl{ 828195534Sscottl int retval; 829195534Sscottl 830195534Sscottl retval = bus_print_child_header(dev, child); 831195534Sscottl retval += printf(" at channel %d", 832195534Sscottl (int)(intptr_t)device_get_ivars(child)); 833195534Sscottl retval += bus_print_child_footer(dev, child); 834195534Sscottl 835195534Sscottl return (retval); 836195534Sscottl} 837195534Sscottl 838208410Smavstatic int 839208410Smavahci_child_location_str(device_t dev, device_t child, char *buf, 840208410Smav size_t buflen) 841208410Smav{ 842208410Smav 843208410Smav snprintf(buf, buflen, "channel=%d", 844208410Smav (int)(intptr_t)device_get_ivars(child)); 845208410Smav return (0); 846208410Smav} 847208410Smav 848195534Sscottldevclass_t ahci_devclass; 849195534Sscottlstatic device_method_t ahci_methods[] = { 850195534Sscottl DEVMETHOD(device_probe, ahci_probe), 851195534Sscottl DEVMETHOD(device_attach, ahci_attach), 852195534Sscottl DEVMETHOD(device_detach, ahci_detach), 853195534Sscottl DEVMETHOD(device_suspend, ahci_suspend), 854195534Sscottl DEVMETHOD(device_resume, ahci_resume), 855195534Sscottl DEVMETHOD(bus_print_child, ahci_print_child), 856195534Sscottl DEVMETHOD(bus_alloc_resource, ahci_alloc_resource), 857195534Sscottl DEVMETHOD(bus_release_resource, ahci_release_resource), 858195534Sscottl DEVMETHOD(bus_setup_intr, ahci_setup_intr), 859195534Sscottl DEVMETHOD(bus_teardown_intr,ahci_teardown_intr), 860208410Smav DEVMETHOD(bus_child_location_str, ahci_child_location_str), 861195534Sscottl { 0, 0 } 862195534Sscottl}; 863195534Sscottlstatic driver_t ahci_driver = { 864195534Sscottl "ahci", 865195534Sscottl ahci_methods, 866195534Sscottl sizeof(struct ahci_controller) 867195534Sscottl}; 868195534SscottlDRIVER_MODULE(ahci, pci, ahci_driver, ahci_devclass, 0, 0); 869199322Smavstatic device_method_t ahci_ata_methods[] = { 870199322Smav DEVMETHOD(device_probe, ahci_ata_probe), 871199322Smav DEVMETHOD(device_attach, ahci_attach), 872199322Smav DEVMETHOD(device_detach, ahci_detach), 873199322Smav DEVMETHOD(device_suspend, ahci_suspend), 874199322Smav DEVMETHOD(device_resume, ahci_resume), 875199322Smav DEVMETHOD(bus_print_child, ahci_print_child), 876199322Smav DEVMETHOD(bus_alloc_resource, ahci_alloc_resource), 877199322Smav DEVMETHOD(bus_release_resource, ahci_release_resource), 878199322Smav DEVMETHOD(bus_setup_intr, ahci_setup_intr), 879199322Smav DEVMETHOD(bus_teardown_intr,ahci_teardown_intr), 880208410Smav DEVMETHOD(bus_child_location_str, ahci_child_location_str), 881199322Smav { 0, 0 } 882199322Smav}; 883199322Smavstatic driver_t ahci_ata_driver = { 884199322Smav "ahci", 885199322Smav ahci_ata_methods, 886199322Smav sizeof(struct ahci_controller) 887199322Smav}; 888199322SmavDRIVER_MODULE(ahci, atapci, ahci_ata_driver, ahci_devclass, 0, 0); 889195534SscottlMODULE_VERSION(ahci, 1); 890195534SscottlMODULE_DEPEND(ahci, cam, 1, 1, 1); 891195534Sscottl 892195534Sscottlstatic int 893195534Sscottlahci_ch_probe(device_t dev) 894195534Sscottl{ 895195534Sscottl 896195534Sscottl device_set_desc_copy(dev, "AHCI channel"); 897195534Sscottl return (0); 898195534Sscottl} 899195534Sscottl 900195534Sscottlstatic int 901195534Sscottlahci_ch_attach(device_t dev) 902195534Sscottl{ 903195534Sscottl struct ahci_controller *ctlr = device_get_softc(device_get_parent(dev)); 904195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 905195534Sscottl struct cam_devq *devq; 906199821Smav int rid, error, i, sata_rev = 0; 907203123Smav u_int32_t version; 908222039Smav char buf[32]; 909195534Sscottl 910195534Sscottl ch->dev = dev; 911195534Sscottl ch->unit = (intptr_t)device_get_ivars(dev); 912196656Smav ch->caps = ctlr->caps; 913196656Smav ch->caps2 = ctlr->caps2; 914199322Smav ch->quirks = ctlr->quirks; 915215725Smav ch->numslots = ((ch->caps & AHCI_CAP_NCS) >> AHCI_CAP_NCS_SHIFT) + 1; 916196656Smav mtx_init(&ch->mtx, "AHCI channel lock", NULL, MTX_DEF); 917195534Sscottl resource_int_value(device_get_name(dev), 918195534Sscottl device_get_unit(dev), "pm_level", &ch->pm_level); 919196656Smav if (ch->pm_level > 3) 920196656Smav callout_init_mtx(&ch->pm_timer, &ch->mtx, 0); 921220576Smav callout_init_mtx(&ch->reset_timer, &ch->mtx, 0); 922195534Sscottl /* Limit speed for my onboard JMicron external port. 923195534Sscottl * It is not eSATA really. */ 924195534Sscottl if (pci_get_devid(ctlr->dev) == 0x2363197b && 925195534Sscottl pci_get_subvendor(ctlr->dev) == 0x1043 && 926195534Sscottl pci_get_subdevice(ctlr->dev) == 0x81e4 && 927195534Sscottl ch->unit == 0) 928199821Smav sata_rev = 1; 929203030Smav if (ch->quirks & AHCI_Q_SATA2) 930203030Smav sata_rev = 2; 931195534Sscottl resource_int_value(device_get_name(dev), 932199821Smav device_get_unit(dev), "sata_rev", &sata_rev); 933199821Smav for (i = 0; i < 16; i++) { 934199821Smav ch->user[i].revision = sata_rev; 935199821Smav ch->user[i].mode = 0; 936199821Smav ch->user[i].bytecount = 8192; 937199821Smav ch->user[i].tags = ch->numslots; 938207499Smav ch->user[i].caps = 0; 939199821Smav ch->curr[i] = ch->user[i]; 940207499Smav if (ch->pm_level) { 941207499Smav ch->user[i].caps = CTS_SATA_CAPS_H_PMREQ | 942207499Smav CTS_SATA_CAPS_H_APST | 943207499Smav CTS_SATA_CAPS_D_PMREQ | CTS_SATA_CAPS_D_APST; 944207499Smav } 945220602Smav ch->user[i].caps |= CTS_SATA_CAPS_H_DMAAA | 946220602Smav CTS_SATA_CAPS_H_AN; 947199821Smav } 948195534Sscottl rid = ch->unit; 949195534Sscottl if (!(ch->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 950195534Sscottl &rid, RF_ACTIVE))) 951195534Sscottl return (ENXIO); 952195534Sscottl ahci_dmainit(dev); 953195534Sscottl ahci_slotsalloc(dev); 954208375Smav ahci_ch_init(dev); 955195534Sscottl mtx_lock(&ch->mtx); 956195534Sscottl rid = ATA_IRQ_RID; 957195534Sscottl if (!(ch->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 958195534Sscottl &rid, RF_SHAREABLE | RF_ACTIVE))) { 959195534Sscottl device_printf(dev, "Unable to map interrupt\n"); 960208813Smav error = ENXIO; 961208813Smav goto err0; 962195534Sscottl } 963195534Sscottl if ((bus_setup_intr(dev, ch->r_irq, ATA_INTR_FLAGS, NULL, 964195534Sscottl ahci_ch_intr_locked, dev, &ch->ih))) { 965195534Sscottl device_printf(dev, "Unable to setup interrupt\n"); 966195534Sscottl error = ENXIO; 967195534Sscottl goto err1; 968195534Sscottl } 969203123Smav ch->chcaps = ATA_INL(ch->r_mem, AHCI_P_CMD); 970203123Smav version = ATA_INL(ctlr->r_mem, AHCI_VS); 971203123Smav if (version < 0x00010020 && (ctlr->caps & AHCI_CAP_FBSS)) 972203123Smav ch->chcaps |= AHCI_P_CMD_FBSCP; 973203123Smav if (bootverbose) { 974203123Smav device_printf(dev, "Caps:%s%s%s%s%s\n", 975203123Smav (ch->chcaps & AHCI_P_CMD_HPCP) ? " HPCP":"", 976203123Smav (ch->chcaps & AHCI_P_CMD_MPSP) ? " MPSP":"", 977203123Smav (ch->chcaps & AHCI_P_CMD_CPD) ? " CPD":"", 978203123Smav (ch->chcaps & AHCI_P_CMD_ESP) ? " ESP":"", 979203123Smav (ch->chcaps & AHCI_P_CMD_FBSCP) ? " FBSCP":""); 980203123Smav } 981195534Sscottl /* Create the device queue for our SIM. */ 982195534Sscottl devq = cam_simq_alloc(ch->numslots); 983195534Sscottl if (devq == NULL) { 984195534Sscottl device_printf(dev, "Unable to allocate simq\n"); 985195534Sscottl error = ENOMEM; 986195534Sscottl goto err1; 987195534Sscottl } 988195534Sscottl /* Construct SIM entry */ 989195534Sscottl ch->sim = cam_sim_alloc(ahciaction, ahcipoll, "ahcich", ch, 990199178Smav device_get_unit(dev), &ch->mtx, 991199278Smav min(2, ch->numslots), 992199278Smav (ch->caps & AHCI_CAP_SNCQ) ? ch->numslots : 0, 993199278Smav devq); 994195534Sscottl if (ch->sim == NULL) { 995208813Smav cam_simq_free(devq); 996195534Sscottl device_printf(dev, "unable to allocate sim\n"); 997195534Sscottl error = ENOMEM; 998208813Smav goto err1; 999195534Sscottl } 1000195534Sscottl if (xpt_bus_register(ch->sim, dev, 0) != CAM_SUCCESS) { 1001195534Sscottl device_printf(dev, "unable to register xpt bus\n"); 1002195534Sscottl error = ENXIO; 1003195534Sscottl goto err2; 1004195534Sscottl } 1005195534Sscottl if (xpt_create_path(&ch->path, /*periph*/NULL, cam_sim_path(ch->sim), 1006195534Sscottl CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 1007195534Sscottl device_printf(dev, "unable to create path\n"); 1008195534Sscottl error = ENXIO; 1009195534Sscottl goto err3; 1010195534Sscottl } 1011196656Smav if (ch->pm_level > 3) { 1012196656Smav callout_reset(&ch->pm_timer, 1013196656Smav (ch->pm_level == 4) ? hz / 1000 : hz / 8, 1014196656Smav ahci_ch_pm, dev); 1015196656Smav } 1016195534Sscottl mtx_unlock(&ch->mtx); 1017222039Smav if ((ch->caps & AHCI_CAP_EMS) && 1018222039Smav (ctlr->capsem & AHCI_EM_LED)) { 1019222039Smav for (i = 0; i < AHCI_NUM_LEDS; i++) { 1020222039Smav ch->leds[i].dev = dev; 1021222039Smav ch->leds[i].num = i; 1022222039Smav } 1023222039Smav if ((ctlr->capsem & AHCI_EM_ALHD) == 0) { 1024222039Smav snprintf(buf, sizeof(buf), "%s.act", 1025222039Smav device_get_nameunit(dev)); 1026222039Smav ch->leds[0].led = led_create(ahci_ch_led, 1027222039Smav &ch->leds[0], buf); 1028222039Smav } 1029222039Smav snprintf(buf, sizeof(buf), "%s.locate", 1030222039Smav device_get_nameunit(dev)); 1031222039Smav ch->leds[1].led = led_create(ahci_ch_led, &ch->leds[1], buf); 1032222039Smav snprintf(buf, sizeof(buf), "%s.fault", 1033222039Smav device_get_nameunit(dev)); 1034222039Smav ch->leds[2].led = led_create(ahci_ch_led, &ch->leds[2], buf); 1035222039Smav } 1036195534Sscottl return (0); 1037195534Sscottl 1038195534Sscottlerr3: 1039195534Sscottl xpt_bus_deregister(cam_sim_path(ch->sim)); 1040195534Sscottlerr2: 1041195534Sscottl cam_sim_free(ch->sim, /*free_devq*/TRUE); 1042195534Sscottlerr1: 1043195534Sscottl bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 1044208813Smaverr0: 1045195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 1046195534Sscottl mtx_unlock(&ch->mtx); 1047214325Smav mtx_destroy(&ch->mtx); 1048195534Sscottl return (error); 1049195534Sscottl} 1050195534Sscottl 1051195534Sscottlstatic int 1052195534Sscottlahci_ch_detach(device_t dev) 1053195534Sscottl{ 1054195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1055222039Smav int i; 1056195534Sscottl 1057222039Smav for (i = 0; i < AHCI_NUM_LEDS; i++) { 1058222039Smav if (ch->leds[i].led) 1059222039Smav led_destroy(ch->leds[i].led); 1060222039Smav } 1061195534Sscottl mtx_lock(&ch->mtx); 1062195534Sscottl xpt_async(AC_LOST_DEVICE, ch->path, NULL); 1063220576Smav /* Forget about reset. */ 1064220576Smav if (ch->resetting) { 1065220576Smav ch->resetting = 0; 1066220576Smav xpt_release_simq(ch->sim, TRUE); 1067220576Smav } 1068195534Sscottl xpt_free_path(ch->path); 1069195534Sscottl xpt_bus_deregister(cam_sim_path(ch->sim)); 1070195534Sscottl cam_sim_free(ch->sim, /*free_devq*/TRUE); 1071195534Sscottl mtx_unlock(&ch->mtx); 1072195534Sscottl 1073196656Smav if (ch->pm_level > 3) 1074196656Smav callout_drain(&ch->pm_timer); 1075220576Smav callout_drain(&ch->reset_timer); 1076195534Sscottl bus_teardown_intr(dev, ch->r_irq, ch->ih); 1077195534Sscottl bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 1078195534Sscottl 1079208375Smav ahci_ch_deinit(dev); 1080195534Sscottl ahci_slotsfree(dev); 1081195534Sscottl ahci_dmafini(dev); 1082195534Sscottl 1083195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 1084195534Sscottl mtx_destroy(&ch->mtx); 1085195534Sscottl return (0); 1086195534Sscottl} 1087195534Sscottl 1088195534Sscottlstatic int 1089208375Smavahci_ch_init(device_t dev) 1090195534Sscottl{ 1091195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1092208375Smav uint64_t work; 1093195534Sscottl 1094208375Smav /* Disable port interrupts */ 1095208375Smav ATA_OUTL(ch->r_mem, AHCI_P_IE, 0); 1096208375Smav /* Setup work areas */ 1097208375Smav work = ch->dma.work_bus + AHCI_CL_OFFSET; 1098208375Smav ATA_OUTL(ch->r_mem, AHCI_P_CLB, work & 0xffffffff); 1099208375Smav ATA_OUTL(ch->r_mem, AHCI_P_CLBU, work >> 32); 1100208375Smav work = ch->dma.rfis_bus; 1101208375Smav ATA_OUTL(ch->r_mem, AHCI_P_FB, work & 0xffffffff); 1102208375Smav ATA_OUTL(ch->r_mem, AHCI_P_FBU, work >> 32); 1103208375Smav /* Activate the channel and power/spin up device */ 1104208375Smav ATA_OUTL(ch->r_mem, AHCI_P_CMD, 1105208375Smav (AHCI_P_CMD_ACTIVE | AHCI_P_CMD_POD | AHCI_P_CMD_SUD | 1106208375Smav ((ch->pm_level == 2 || ch->pm_level == 3) ? AHCI_P_CMD_ALPE : 0) | 1107208375Smav ((ch->pm_level > 2) ? AHCI_P_CMD_ASP : 0 ))); 1108208375Smav ahci_start_fr(dev); 1109208375Smav ahci_start(dev, 1); 1110208375Smav return (0); 1111208375Smav} 1112208375Smav 1113208375Smavstatic int 1114208375Smavahci_ch_deinit(device_t dev) 1115208375Smav{ 1116208375Smav struct ahci_channel *ch = device_get_softc(dev); 1117208375Smav 1118195534Sscottl /* Disable port interrupts. */ 1119195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 0); 1120195534Sscottl /* Reset command register. */ 1121195534Sscottl ahci_stop(dev); 1122195534Sscottl ahci_stop_fr(dev); 1123195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, 0); 1124195534Sscottl /* Allow everything, including partial and slumber modes. */ 1125195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SCTL, 0); 1126195534Sscottl /* Request slumber mode transition and give some time to get there. */ 1127195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, AHCI_P_CMD_SLUMBER); 1128195534Sscottl DELAY(100); 1129195534Sscottl /* Disable PHY. */ 1130195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SCTL, ATA_SC_DET_DISABLE); 1131195534Sscottl return (0); 1132195534Sscottl} 1133195534Sscottl 1134195534Sscottlstatic int 1135208375Smavahci_ch_suspend(device_t dev) 1136208375Smav{ 1137208375Smav struct ahci_channel *ch = device_get_softc(dev); 1138208375Smav 1139208375Smav mtx_lock(&ch->mtx); 1140208375Smav xpt_freeze_simq(ch->sim, 1); 1141220576Smav /* Forget about reset. */ 1142220576Smav if (ch->resetting) { 1143220576Smav ch->resetting = 0; 1144220576Smav callout_stop(&ch->reset_timer); 1145220576Smav xpt_release_simq(ch->sim, TRUE); 1146220576Smav } 1147208375Smav while (ch->oslots) 1148208375Smav msleep(ch, &ch->mtx, PRIBIO, "ahcisusp", hz/100); 1149208375Smav ahci_ch_deinit(dev); 1150208375Smav mtx_unlock(&ch->mtx); 1151208375Smav return (0); 1152208375Smav} 1153208375Smav 1154208375Smavstatic int 1155195534Sscottlahci_ch_resume(device_t dev) 1156195534Sscottl{ 1157195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1158195534Sscottl 1159208375Smav mtx_lock(&ch->mtx); 1160208375Smav ahci_ch_init(dev); 1161208375Smav ahci_reset(dev); 1162208375Smav xpt_release_simq(ch->sim, TRUE); 1163208375Smav mtx_unlock(&ch->mtx); 1164195534Sscottl return (0); 1165195534Sscottl} 1166195534Sscottl 1167195534Sscottldevclass_t ahcich_devclass; 1168195534Sscottlstatic device_method_t ahcich_methods[] = { 1169195534Sscottl DEVMETHOD(device_probe, ahci_ch_probe), 1170195534Sscottl DEVMETHOD(device_attach, ahci_ch_attach), 1171195534Sscottl DEVMETHOD(device_detach, ahci_ch_detach), 1172195534Sscottl DEVMETHOD(device_suspend, ahci_ch_suspend), 1173195534Sscottl DEVMETHOD(device_resume, ahci_ch_resume), 1174195534Sscottl { 0, 0 } 1175195534Sscottl}; 1176195534Sscottlstatic driver_t ahcich_driver = { 1177195534Sscottl "ahcich", 1178195534Sscottl ahcich_methods, 1179195534Sscottl sizeof(struct ahci_channel) 1180195534Sscottl}; 1181199322SmavDRIVER_MODULE(ahcich, ahci, ahcich_driver, ahcich_devclass, 0, 0); 1182195534Sscottl 1183222039Smavstatic void 1184222039Smavahci_ch_setleds(device_t dev) 1185222039Smav{ 1186222039Smav struct ahci_channel *ch; 1187222039Smav struct ahci_controller *ctlr; 1188222039Smav size_t buf; 1189222039Smav int i, timeout; 1190222039Smav int16_t val; 1191222039Smav 1192222039Smav ctlr = device_get_softc(device_get_parent(dev)); 1193222039Smav ch = device_get_softc(dev); 1194222039Smav 1195222039Smav val = 0; 1196222039Smav for (i = 0; i < AHCI_NUM_LEDS; i++) 1197222039Smav val |= ch->leds[i].state << (i * 3); 1198222039Smav 1199222039Smav buf = (ctlr->emloc & 0xffff0000) >> 14; 1200222039Smav mtx_lock(&ctlr->em_mtx); 1201222039Smav timeout = 1000; 1202222039Smav while (ATA_INL(ctlr->r_mem, AHCI_EM_CTL) & (AHCI_EM_TM | AHCI_EM_RST) && 1203222039Smav --timeout > 0) 1204222039Smav DELAY(1000); 1205222039Smav if (timeout == 0) 1206222039Smav device_printf(dev, "EM timeout\n"); 1207222039Smav ATA_OUTL(ctlr->r_mem, buf, (1 << 8) | (0 << 16) | (0 << 24)); 1208222039Smav ATA_OUTL(ctlr->r_mem, buf + 4, ch->unit | (val << 16)); 1209222039Smav ATA_OUTL(ctlr->r_mem, AHCI_EM_CTL, AHCI_EM_TM); 1210222039Smav mtx_unlock(&ctlr->em_mtx); 1211222039Smav} 1212222039Smav 1213222039Smavstatic void 1214222039Smavahci_ch_led(void *priv, int onoff) 1215222039Smav{ 1216222039Smav struct ahci_led *led; 1217222039Smav 1218222039Smav led = (struct ahci_led *)priv; 1219222039Smav 1220222039Smav led->state = onoff; 1221222039Smav ahci_ch_setleds(led->dev); 1222222039Smav} 1223222039Smav 1224195534Sscottlstruct ahci_dc_cb_args { 1225195534Sscottl bus_addr_t maddr; 1226195534Sscottl int error; 1227195534Sscottl}; 1228195534Sscottl 1229195534Sscottlstatic void 1230195534Sscottlahci_dmainit(device_t dev) 1231195534Sscottl{ 1232195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1233195534Sscottl struct ahci_dc_cb_args dcba; 1234203123Smav size_t rfsize; 1235195534Sscottl 1236195534Sscottl if (ch->caps & AHCI_CAP_64BIT) 1237195534Sscottl ch->dma.max_address = BUS_SPACE_MAXADDR; 1238195534Sscottl else 1239195534Sscottl ch->dma.max_address = BUS_SPACE_MAXADDR_32BIT; 1240195534Sscottl /* Command area. */ 1241195534Sscottl if (bus_dma_tag_create(bus_get_dma_tag(dev), 1024, 0, 1242195534Sscottl ch->dma.max_address, BUS_SPACE_MAXADDR, 1243195534Sscottl NULL, NULL, AHCI_WORK_SIZE, 1, AHCI_WORK_SIZE, 1244195534Sscottl 0, NULL, NULL, &ch->dma.work_tag)) 1245195534Sscottl goto error; 1246195534Sscottl if (bus_dmamem_alloc(ch->dma.work_tag, (void **)&ch->dma.work, 0, 1247195534Sscottl &ch->dma.work_map)) 1248195534Sscottl goto error; 1249195534Sscottl if (bus_dmamap_load(ch->dma.work_tag, ch->dma.work_map, ch->dma.work, 1250195534Sscottl AHCI_WORK_SIZE, ahci_dmasetupc_cb, &dcba, 0) || dcba.error) { 1251195534Sscottl bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 1252195534Sscottl goto error; 1253195534Sscottl } 1254195534Sscottl ch->dma.work_bus = dcba.maddr; 1255195534Sscottl /* FIS receive area. */ 1256203123Smav if (ch->chcaps & AHCI_P_CMD_FBSCP) 1257203123Smav rfsize = 4096; 1258203123Smav else 1259203123Smav rfsize = 256; 1260203123Smav if (bus_dma_tag_create(bus_get_dma_tag(dev), rfsize, 0, 1261195534Sscottl ch->dma.max_address, BUS_SPACE_MAXADDR, 1262203123Smav NULL, NULL, rfsize, 1, rfsize, 1263195534Sscottl 0, NULL, NULL, &ch->dma.rfis_tag)) 1264195534Sscottl goto error; 1265195534Sscottl if (bus_dmamem_alloc(ch->dma.rfis_tag, (void **)&ch->dma.rfis, 0, 1266195534Sscottl &ch->dma.rfis_map)) 1267195534Sscottl goto error; 1268195534Sscottl if (bus_dmamap_load(ch->dma.rfis_tag, ch->dma.rfis_map, ch->dma.rfis, 1269203123Smav rfsize, ahci_dmasetupc_cb, &dcba, 0) || dcba.error) { 1270195534Sscottl bus_dmamem_free(ch->dma.rfis_tag, ch->dma.rfis, ch->dma.rfis_map); 1271195534Sscottl goto error; 1272195534Sscottl } 1273195534Sscottl ch->dma.rfis_bus = dcba.maddr; 1274195534Sscottl /* Data area. */ 1275195534Sscottl if (bus_dma_tag_create(bus_get_dma_tag(dev), 2, 0, 1276195534Sscottl ch->dma.max_address, BUS_SPACE_MAXADDR, 1277195534Sscottl NULL, NULL, 1278195534Sscottl AHCI_SG_ENTRIES * PAGE_SIZE * ch->numslots, 1279195534Sscottl AHCI_SG_ENTRIES, AHCI_PRD_MAX, 1280195534Sscottl 0, busdma_lock_mutex, &ch->mtx, &ch->dma.data_tag)) { 1281195534Sscottl goto error; 1282195534Sscottl } 1283195534Sscottl return; 1284195534Sscottl 1285195534Sscottlerror: 1286195534Sscottl device_printf(dev, "WARNING - DMA initialization failed\n"); 1287195534Sscottl ahci_dmafini(dev); 1288195534Sscottl} 1289195534Sscottl 1290195534Sscottlstatic void 1291195534Sscottlahci_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error) 1292195534Sscottl{ 1293195534Sscottl struct ahci_dc_cb_args *dcba = (struct ahci_dc_cb_args *)xsc; 1294195534Sscottl 1295195534Sscottl if (!(dcba->error = error)) 1296195534Sscottl dcba->maddr = segs[0].ds_addr; 1297195534Sscottl} 1298195534Sscottl 1299195534Sscottlstatic void 1300195534Sscottlahci_dmafini(device_t dev) 1301195534Sscottl{ 1302195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1303195534Sscottl 1304195534Sscottl if (ch->dma.data_tag) { 1305195534Sscottl bus_dma_tag_destroy(ch->dma.data_tag); 1306195534Sscottl ch->dma.data_tag = NULL; 1307195534Sscottl } 1308195534Sscottl if (ch->dma.rfis_bus) { 1309195534Sscottl bus_dmamap_unload(ch->dma.rfis_tag, ch->dma.rfis_map); 1310195534Sscottl bus_dmamem_free(ch->dma.rfis_tag, ch->dma.rfis, ch->dma.rfis_map); 1311195534Sscottl ch->dma.rfis_bus = 0; 1312195534Sscottl ch->dma.rfis_map = NULL; 1313195534Sscottl ch->dma.rfis = NULL; 1314195534Sscottl } 1315195534Sscottl if (ch->dma.work_bus) { 1316195534Sscottl bus_dmamap_unload(ch->dma.work_tag, ch->dma.work_map); 1317195534Sscottl bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 1318195534Sscottl ch->dma.work_bus = 0; 1319195534Sscottl ch->dma.work_map = NULL; 1320195534Sscottl ch->dma.work = NULL; 1321195534Sscottl } 1322195534Sscottl if (ch->dma.work_tag) { 1323195534Sscottl bus_dma_tag_destroy(ch->dma.work_tag); 1324195534Sscottl ch->dma.work_tag = NULL; 1325195534Sscottl } 1326195534Sscottl} 1327195534Sscottl 1328195534Sscottlstatic void 1329195534Sscottlahci_slotsalloc(device_t dev) 1330195534Sscottl{ 1331195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1332195534Sscottl int i; 1333195534Sscottl 1334195534Sscottl /* Alloc and setup command/dma slots */ 1335195534Sscottl bzero(ch->slot, sizeof(ch->slot)); 1336195534Sscottl for (i = 0; i < ch->numslots; i++) { 1337195534Sscottl struct ahci_slot *slot = &ch->slot[i]; 1338195534Sscottl 1339195534Sscottl slot->dev = dev; 1340195534Sscottl slot->slot = i; 1341195534Sscottl slot->state = AHCI_SLOT_EMPTY; 1342195534Sscottl slot->ccb = NULL; 1343195534Sscottl callout_init_mtx(&slot->timeout, &ch->mtx, 0); 1344195534Sscottl 1345195534Sscottl if (bus_dmamap_create(ch->dma.data_tag, 0, &slot->dma.data_map)) 1346195534Sscottl device_printf(ch->dev, "FAILURE - create data_map\n"); 1347195534Sscottl } 1348195534Sscottl} 1349195534Sscottl 1350195534Sscottlstatic void 1351195534Sscottlahci_slotsfree(device_t dev) 1352195534Sscottl{ 1353195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1354195534Sscottl int i; 1355195534Sscottl 1356195534Sscottl /* Free all dma slots */ 1357195534Sscottl for (i = 0; i < ch->numslots; i++) { 1358195534Sscottl struct ahci_slot *slot = &ch->slot[i]; 1359195534Sscottl 1360196656Smav callout_drain(&slot->timeout); 1361195534Sscottl if (slot->dma.data_map) { 1362195534Sscottl bus_dmamap_destroy(ch->dma.data_tag, slot->dma.data_map); 1363195534Sscottl slot->dma.data_map = NULL; 1364195534Sscottl } 1365195534Sscottl } 1366195534Sscottl} 1367195534Sscottl 1368220657Smavstatic int 1369198319Smavahci_phy_check_events(device_t dev, u_int32_t serr) 1370195534Sscottl{ 1371195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1372195534Sscottl 1373220657Smav if (((ch->pm_level == 0) && (serr & ATA_SE_PHY_CHANGED)) || 1374220657Smav ((ch->pm_level != 0 || ch->listening) && (serr & ATA_SE_EXCHANGED))) { 1375195534Sscottl u_int32_t status = ATA_INL(ch->r_mem, AHCI_P_SSTS); 1376203108Smav union ccb *ccb; 1377203108Smav 1378203165Smav if (bootverbose) { 1379220657Smav if ((status & ATA_SS_DET_MASK) != ATA_SS_DET_NO_DEVICE) 1380195534Sscottl device_printf(dev, "CONNECT requested\n"); 1381220657Smav else 1382195534Sscottl device_printf(dev, "DISCONNECT requested\n"); 1383195534Sscottl } 1384203165Smav ahci_reset(dev); 1385203108Smav if ((ccb = xpt_alloc_ccb_nowait()) == NULL) 1386220657Smav return (0); 1387203108Smav if (xpt_create_path(&ccb->ccb_h.path, NULL, 1388203108Smav cam_sim_path(ch->sim), 1389203108Smav CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 1390203108Smav xpt_free_ccb(ccb); 1391220657Smav return (0); 1392203108Smav } 1393203108Smav xpt_rescan(ccb); 1394220657Smav return (1); 1395195534Sscottl } 1396220657Smav return (0); 1397195534Sscottl} 1398195534Sscottl 1399195534Sscottlstatic void 1400220657Smavahci_cpd_check_events(device_t dev) 1401220657Smav{ 1402220657Smav struct ahci_channel *ch = device_get_softc(dev); 1403220657Smav u_int32_t status; 1404220657Smav union ccb *ccb; 1405220657Smav 1406220657Smav if (ch->pm_level == 0) 1407220657Smav return; 1408220657Smav 1409220657Smav status = ATA_INL(ch->r_mem, AHCI_P_CMD); 1410220657Smav if ((status & AHCI_P_CMD_CPD) == 0) 1411220657Smav return; 1412220657Smav 1413220657Smav if (bootverbose) { 1414220657Smav if (status & AHCI_P_CMD_CPS) { 1415220657Smav device_printf(dev, "COLD CONNECT requested\n"); 1416220657Smav } else 1417220657Smav device_printf(dev, "COLD DISCONNECT requested\n"); 1418220657Smav } 1419220657Smav ahci_reset(dev); 1420220657Smav if ((ccb = xpt_alloc_ccb_nowait()) == NULL) 1421220657Smav return; 1422220657Smav if (xpt_create_path(&ccb->ccb_h.path, NULL, cam_sim_path(ch->sim), 1423220657Smav CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 1424220657Smav xpt_free_ccb(ccb); 1425220657Smav return; 1426220657Smav } 1427220657Smav xpt_rescan(ccb); 1428220657Smav} 1429220657Smav 1430220657Smavstatic void 1431196907Smavahci_notify_events(device_t dev, u_int32_t status) 1432196656Smav{ 1433196656Smav struct ahci_channel *ch = device_get_softc(dev); 1434196656Smav struct cam_path *dpath; 1435196656Smav int i; 1436196656Smav 1437200196Smav if (ch->caps & AHCI_CAP_SSNTF) 1438200196Smav ATA_OUTL(ch->r_mem, AHCI_P_SNTF, status); 1439196656Smav if (bootverbose) 1440196656Smav device_printf(dev, "SNTF 0x%04x\n", status); 1441196656Smav for (i = 0; i < 16; i++) { 1442196656Smav if ((status & (1 << i)) == 0) 1443196656Smav continue; 1444196656Smav if (xpt_create_path(&dpath, NULL, 1445196656Smav xpt_path_path_id(ch->path), i, 0) == CAM_REQ_CMP) { 1446196656Smav xpt_async(AC_SCSI_AEN, dpath, NULL); 1447196656Smav xpt_free_path(dpath); 1448196656Smav } 1449196656Smav } 1450196656Smav} 1451196656Smav 1452196656Smavstatic void 1453195534Sscottlahci_ch_intr_locked(void *data) 1454195534Sscottl{ 1455195534Sscottl device_t dev = (device_t)data; 1456195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1457195534Sscottl 1458195534Sscottl mtx_lock(&ch->mtx); 1459195534Sscottl ahci_ch_intr(data); 1460195534Sscottl mtx_unlock(&ch->mtx); 1461195534Sscottl} 1462195534Sscottl 1463195534Sscottlstatic void 1464196656Smavahci_ch_pm(void *arg) 1465196656Smav{ 1466196656Smav device_t dev = (device_t)arg; 1467196656Smav struct ahci_channel *ch = device_get_softc(dev); 1468196656Smav uint32_t work; 1469196656Smav 1470196656Smav if (ch->numrslots != 0) 1471196656Smav return; 1472196656Smav work = ATA_INL(ch->r_mem, AHCI_P_CMD); 1473196656Smav if (ch->pm_level == 4) 1474196656Smav work |= AHCI_P_CMD_PARTIAL; 1475196656Smav else 1476196656Smav work |= AHCI_P_CMD_SLUMBER; 1477196656Smav ATA_OUTL(ch->r_mem, AHCI_P_CMD, work); 1478196656Smav} 1479196656Smav 1480196656Smavstatic void 1481195534Sscottlahci_ch_intr(void *data) 1482195534Sscottl{ 1483195534Sscottl device_t dev = (device_t)data; 1484195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1485198319Smav uint32_t istatus, sstatus, cstatus, serr = 0, sntf = 0, ok, err; 1486195534Sscottl enum ahci_err_type et; 1487220657Smav int i, ccs, port, reset = 0; 1488195534Sscottl 1489195534Sscottl /* Read and clear interrupt statuses. */ 1490195534Sscottl istatus = ATA_INL(ch->r_mem, AHCI_P_IS); 1491196656Smav if (istatus == 0) 1492196656Smav return; 1493195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IS, istatus); 1494195534Sscottl /* Read command statuses. */ 1495196907Smav sstatus = ATA_INL(ch->r_mem, AHCI_P_SACT); 1496195534Sscottl cstatus = ATA_INL(ch->r_mem, AHCI_P_CI); 1497200196Smav if (istatus & AHCI_P_IX_SDB) { 1498200196Smav if (ch->caps & AHCI_CAP_SSNTF) 1499200196Smav sntf = ATA_INL(ch->r_mem, AHCI_P_SNTF); 1500203123Smav else if (ch->fbs_enabled) { 1501200196Smav u_int8_t *fis = ch->dma.rfis + 0x58; 1502200196Smav 1503203123Smav for (i = 0; i < 16; i++) { 1504203123Smav if (fis[1] & 0x80) { 1505203123Smav fis[1] &= 0x7f; 1506203123Smav sntf |= 1 << i; 1507203123Smav } 1508203123Smav fis += 256; 1509203123Smav } 1510203123Smav } else { 1511203123Smav u_int8_t *fis = ch->dma.rfis + 0x58; 1512203123Smav 1513200196Smav if (fis[1] & 0x80) 1514200196Smav sntf = (1 << (fis[1] & 0x0f)); 1515200196Smav } 1516200196Smav } 1517195534Sscottl /* Process PHY events */ 1518198319Smav if (istatus & (AHCI_P_IX_PC | AHCI_P_IX_PRC | AHCI_P_IX_OF | 1519198319Smav AHCI_P_IX_IF | AHCI_P_IX_HBD | AHCI_P_IX_HBF | AHCI_P_IX_TFE)) { 1520198319Smav serr = ATA_INL(ch->r_mem, AHCI_P_SERR); 1521198319Smav if (serr) { 1522198319Smav ATA_OUTL(ch->r_mem, AHCI_P_SERR, serr); 1523220657Smav reset = ahci_phy_check_events(dev, serr); 1524198319Smav } 1525198319Smav } 1526220657Smav /* Process cold presence detection events */ 1527220657Smav if ((istatus & AHCI_P_IX_CPD) && !reset) 1528220657Smav ahci_cpd_check_events(dev); 1529195534Sscottl /* Process command errors */ 1530198319Smav if (istatus & (AHCI_P_IX_OF | AHCI_P_IX_IF | 1531198319Smav AHCI_P_IX_HBD | AHCI_P_IX_HBF | AHCI_P_IX_TFE)) { 1532195534Sscottl ccs = (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CCS_MASK) 1533195534Sscottl >> AHCI_P_CMD_CCS_SHIFT; 1534203123Smav//device_printf(dev, "%s ERROR is %08x cs %08x ss %08x rs %08x tfd %02x serr %08x fbs %08x ccs %d\n", 1535203123Smav// __func__, istatus, cstatus, sstatus, ch->rslots, ATA_INL(ch->r_mem, AHCI_P_TFD), 1536203123Smav// serr, ATA_INL(ch->r_mem, AHCI_P_FBS), ccs); 1537203123Smav port = -1; 1538203123Smav if (ch->fbs_enabled) { 1539203123Smav uint32_t fbs = ATA_INL(ch->r_mem, AHCI_P_FBS); 1540203123Smav if (fbs & AHCI_P_FBS_SDE) { 1541203123Smav port = (fbs & AHCI_P_FBS_DWE) 1542203123Smav >> AHCI_P_FBS_DWE_SHIFT; 1543203123Smav } else { 1544203123Smav for (i = 0; i < 16; i++) { 1545203123Smav if (ch->numrslotspd[i] == 0) 1546203123Smav continue; 1547203123Smav if (port == -1) 1548203123Smav port = i; 1549203123Smav else if (port != i) { 1550203123Smav port = -2; 1551203123Smav break; 1552203123Smav } 1553203123Smav } 1554203123Smav } 1555203123Smav } 1556196656Smav err = ch->rslots & (cstatus | sstatus); 1557195534Sscottl } else { 1558195534Sscottl ccs = 0; 1559195534Sscottl err = 0; 1560203123Smav port = -1; 1561195534Sscottl } 1562195534Sscottl /* Complete all successfull commands. */ 1563196656Smav ok = ch->rslots & ~(cstatus | sstatus); 1564195534Sscottl for (i = 0; i < ch->numslots; i++) { 1565195534Sscottl if ((ok >> i) & 1) 1566195534Sscottl ahci_end_transaction(&ch->slot[i], AHCI_ERR_NONE); 1567195534Sscottl } 1568195534Sscottl /* On error, complete the rest of commands with error statuses. */ 1569195534Sscottl if (err) { 1570195534Sscottl if (ch->frozen) { 1571195534Sscottl union ccb *fccb = ch->frozen; 1572195534Sscottl ch->frozen = NULL; 1573195534Sscottl fccb->ccb_h.status = CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 1574198319Smav if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 1575198319Smav xpt_freeze_devq(fccb->ccb_h.path, 1); 1576198319Smav fccb->ccb_h.status |= CAM_DEV_QFRZN; 1577198319Smav } 1578195534Sscottl xpt_done(fccb); 1579195534Sscottl } 1580195534Sscottl for (i = 0; i < ch->numslots; i++) { 1581195534Sscottl /* XXX: reqests in loading state. */ 1582195534Sscottl if (((err >> i) & 1) == 0) 1583195534Sscottl continue; 1584203123Smav if (port >= 0 && 1585203123Smav ch->slot[i].ccb->ccb_h.target_id != port) 1586203123Smav continue; 1587198390Smav if (istatus & AHCI_P_IX_TFE) { 1588203123Smav if (port != -2) { 1589195534Sscottl /* Task File Error */ 1590203123Smav if (ch->numtslotspd[ 1591203123Smav ch->slot[i].ccb->ccb_h.target_id] == 0) { 1592195534Sscottl /* Untagged operation. */ 1593195534Sscottl if (i == ccs) 1594195534Sscottl et = AHCI_ERR_TFE; 1595195534Sscottl else 1596195534Sscottl et = AHCI_ERR_INNOCENT; 1597195534Sscottl } else { 1598195534Sscottl /* Tagged operation. */ 1599195534Sscottl et = AHCI_ERR_NCQ; 1600195534Sscottl } 1601203123Smav } else { 1602203123Smav et = AHCI_ERR_TFE; 1603203123Smav ch->fatalerr = 1; 1604203123Smav } 1605198390Smav } else if (istatus & AHCI_P_IX_IF) { 1606203123Smav if (ch->numtslots == 0 && i != ccs && port != -2) 1607198390Smav et = AHCI_ERR_INNOCENT; 1608198390Smav else 1609198390Smav et = AHCI_ERR_SATA; 1610195534Sscottl } else 1611195534Sscottl et = AHCI_ERR_INVALID; 1612195534Sscottl ahci_end_transaction(&ch->slot[i], et); 1613195534Sscottl } 1614203123Smav /* 1615203123Smav * We can't reinit port if there are some other 1616203123Smav * commands active, use resume to complete them. 1617203123Smav */ 1618220565Smav if (ch->rslots != 0 && !ch->recoverycmd) 1619203123Smav ATA_OUTL(ch->r_mem, AHCI_P_FBS, AHCI_P_FBS_EN | AHCI_P_FBS_DEC); 1620195534Sscottl } 1621196656Smav /* Process NOTIFY events */ 1622196907Smav if (sntf) 1623196907Smav ahci_notify_events(dev, sntf); 1624195534Sscottl} 1625195534Sscottl 1626195534Sscottl/* Must be called with channel locked. */ 1627195534Sscottlstatic int 1628195534Sscottlahci_check_collision(device_t dev, union ccb *ccb) 1629195534Sscottl{ 1630195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1631203123Smav int t = ccb->ccb_h.target_id; 1632195534Sscottl 1633195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1634195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1635199747Smav /* Tagged command while we have no supported tag free. */ 1636199747Smav if (((~ch->oslots) & (0xffffffff >> (32 - 1637203123Smav ch->curr[t].tags))) == 0) 1638199747Smav return (1); 1639203123Smav /* If we have FBS */ 1640203123Smav if (ch->fbs_enabled) { 1641203123Smav /* Tagged command while untagged are active. */ 1642203123Smav if (ch->numrslotspd[t] != 0 && ch->numtslotspd[t] == 0) 1643203123Smav return (1); 1644203123Smav } else { 1645203123Smav /* Tagged command while untagged are active. */ 1646203123Smav if (ch->numrslots != 0 && ch->numtslots == 0) 1647203123Smav return (1); 1648203123Smav /* Tagged command while tagged to other target is active. */ 1649203123Smav if (ch->numtslots != 0 && 1650203123Smav ch->taggedtarget != ccb->ccb_h.target_id) 1651203123Smav return (1); 1652203123Smav } 1653195534Sscottl } else { 1654203123Smav /* If we have FBS */ 1655203123Smav if (ch->fbs_enabled) { 1656203123Smav /* Untagged command while tagged are active. */ 1657203123Smav if (ch->numrslotspd[t] != 0 && ch->numtslotspd[t] != 0) 1658203123Smav return (1); 1659203123Smav } else { 1660203123Smav /* Untagged command while tagged are active. */ 1661203123Smav if (ch->numrslots != 0 && ch->numtslots != 0) 1662203123Smav return (1); 1663203123Smav } 1664195534Sscottl } 1665195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1666195534Sscottl (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) { 1667195534Sscottl /* Atomic command while anything active. */ 1668195534Sscottl if (ch->numrslots != 0) 1669195534Sscottl return (1); 1670195534Sscottl } 1671195534Sscottl /* We have some atomic command running. */ 1672195534Sscottl if (ch->aslots != 0) 1673195534Sscottl return (1); 1674195534Sscottl return (0); 1675195534Sscottl} 1676195534Sscottl 1677195534Sscottl/* Must be called with channel locked. */ 1678195534Sscottlstatic void 1679195534Sscottlahci_begin_transaction(device_t dev, union ccb *ccb) 1680195534Sscottl{ 1681195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1682195534Sscottl struct ahci_slot *slot; 1683199747Smav int tag, tags; 1684195534Sscottl 1685195534Sscottl /* Choose empty slot. */ 1686199747Smav tags = ch->numslots; 1687199747Smav if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1688199747Smav (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) 1689199747Smav tags = ch->curr[ccb->ccb_h.target_id].tags; 1690195534Sscottl tag = ch->lastslot; 1691199747Smav while (1) { 1692199747Smav if (tag >= tags) 1693195534Sscottl tag = 0; 1694199747Smav if (ch->slot[tag].state == AHCI_SLOT_EMPTY) 1695199747Smav break; 1696199747Smav tag++; 1697199747Smav }; 1698195534Sscottl ch->lastslot = tag; 1699195534Sscottl /* Occupy chosen slot. */ 1700195534Sscottl slot = &ch->slot[tag]; 1701195534Sscottl slot->ccb = ccb; 1702196656Smav /* Stop PM timer. */ 1703196656Smav if (ch->numrslots == 0 && ch->pm_level > 3) 1704196656Smav callout_stop(&ch->pm_timer); 1705195534Sscottl /* Update channel stats. */ 1706199747Smav ch->oslots |= (1 << slot->slot); 1707195534Sscottl ch->numrslots++; 1708203123Smav ch->numrslotspd[ccb->ccb_h.target_id]++; 1709195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1710195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1711195534Sscottl ch->numtslots++; 1712203123Smav ch->numtslotspd[ccb->ccb_h.target_id]++; 1713195534Sscottl ch->taggedtarget = ccb->ccb_h.target_id; 1714195534Sscottl } 1715195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1716195534Sscottl (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) 1717195534Sscottl ch->aslots |= (1 << slot->slot); 1718195534Sscottl slot->dma.nsegs = 0; 1719195534Sscottl /* If request moves data, setup and load SG list */ 1720195534Sscottl if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 1721195534Sscottl void *buf; 1722195534Sscottl bus_size_t size; 1723195534Sscottl 1724195534Sscottl slot->state = AHCI_SLOT_LOADING; 1725195534Sscottl if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1726195534Sscottl buf = ccb->ataio.data_ptr; 1727195534Sscottl size = ccb->ataio.dxfer_len; 1728195534Sscottl } else { 1729195534Sscottl buf = ccb->csio.data_ptr; 1730195534Sscottl size = ccb->csio.dxfer_len; 1731195534Sscottl } 1732195534Sscottl bus_dmamap_load(ch->dma.data_tag, slot->dma.data_map, 1733195534Sscottl buf, size, ahci_dmasetprd, slot, 0); 1734195534Sscottl } else 1735195534Sscottl ahci_execute_transaction(slot); 1736195534Sscottl} 1737195534Sscottl 1738195534Sscottl/* Locked by busdma engine. */ 1739195534Sscottlstatic void 1740195534Sscottlahci_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1741195534Sscottl{ 1742195534Sscottl struct ahci_slot *slot = arg; 1743195534Sscottl struct ahci_channel *ch = device_get_softc(slot->dev); 1744195534Sscottl struct ahci_cmd_tab *ctp; 1745195534Sscottl struct ahci_dma_prd *prd; 1746195534Sscottl int i; 1747195534Sscottl 1748195534Sscottl if (error) { 1749195534Sscottl device_printf(slot->dev, "DMA load error\n"); 1750195534Sscottl ahci_end_transaction(slot, AHCI_ERR_INVALID); 1751195534Sscottl return; 1752195534Sscottl } 1753195534Sscottl KASSERT(nsegs <= AHCI_SG_ENTRIES, ("too many DMA segment entries\n")); 1754195534Sscottl /* Get a piece of the workspace for this request */ 1755195534Sscottl ctp = (struct ahci_cmd_tab *) 1756195534Sscottl (ch->dma.work + AHCI_CT_OFFSET + (AHCI_CT_SIZE * slot->slot)); 1757195534Sscottl /* Fill S/G table */ 1758195534Sscottl prd = &ctp->prd_tab[0]; 1759195534Sscottl for (i = 0; i < nsegs; i++) { 1760195534Sscottl prd[i].dba = htole64(segs[i].ds_addr); 1761195534Sscottl prd[i].dbc = htole32((segs[i].ds_len - 1) & AHCI_PRD_MASK); 1762195534Sscottl } 1763195534Sscottl slot->dma.nsegs = nsegs; 1764195534Sscottl bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 1765195534Sscottl ((slot->ccb->ccb_h.flags & CAM_DIR_IN) ? 1766195534Sscottl BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE)); 1767195534Sscottl ahci_execute_transaction(slot); 1768195534Sscottl} 1769195534Sscottl 1770195534Sscottl/* Must be called with channel locked. */ 1771195534Sscottlstatic void 1772195534Sscottlahci_execute_transaction(struct ahci_slot *slot) 1773195534Sscottl{ 1774195534Sscottl device_t dev = slot->dev; 1775195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1776195534Sscottl struct ahci_cmd_tab *ctp; 1777195534Sscottl struct ahci_cmd_list *clp; 1778195534Sscottl union ccb *ccb = slot->ccb; 1779195534Sscottl int port = ccb->ccb_h.target_id & 0x0f; 1780222304Smav int fis_size, i, softreset; 1781203123Smav uint8_t *fis = ch->dma.rfis + 0x40; 1782203123Smav uint8_t val; 1783195534Sscottl 1784195534Sscottl /* Get a piece of the workspace for this request */ 1785195534Sscottl ctp = (struct ahci_cmd_tab *) 1786195534Sscottl (ch->dma.work + AHCI_CT_OFFSET + (AHCI_CT_SIZE * slot->slot)); 1787195534Sscottl /* Setup the FIS for this request */ 1788199821Smav if (!(fis_size = ahci_setup_fis(dev, ctp, ccb, slot->slot))) { 1789195534Sscottl device_printf(ch->dev, "Setting up SATA FIS failed\n"); 1790195534Sscottl ahci_end_transaction(slot, AHCI_ERR_INVALID); 1791195534Sscottl return; 1792195534Sscottl } 1793195534Sscottl /* Setup the command list entry */ 1794195534Sscottl clp = (struct ahci_cmd_list *) 1795195534Sscottl (ch->dma.work + AHCI_CL_OFFSET + (AHCI_CL_SIZE * slot->slot)); 1796214988Smav clp->cmd_flags = htole16( 1797214988Smav (ccb->ccb_h.flags & CAM_DIR_OUT ? AHCI_CMD_WRITE : 0) | 1798214988Smav (ccb->ccb_h.func_code == XPT_SCSI_IO ? 1799214988Smav (AHCI_CMD_ATAPI | AHCI_CMD_PREFETCH) : 0) | 1800214988Smav (fis_size / sizeof(u_int32_t)) | 1801214988Smav (port << 12)); 1802214988Smav clp->prd_length = htole16(slot->dma.nsegs); 1803195534Sscottl /* Special handling for Soft Reset command. */ 1804195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1805203123Smav (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL)) { 1806203123Smav if (ccb->ataio.cmd.control & ATA_A_RESET) { 1807222304Smav softreset = 1; 1808203123Smav /* Kick controller into sane state */ 1809203123Smav ahci_stop(dev); 1810203123Smav ahci_clo(dev); 1811203123Smav ahci_start(dev, 0); 1812203123Smav clp->cmd_flags |= AHCI_CMD_RESET | AHCI_CMD_CLR_BUSY; 1813203123Smav } else { 1814222304Smav softreset = 2; 1815203123Smav /* Prepare FIS receive area for check. */ 1816203123Smav for (i = 0; i < 20; i++) 1817203123Smav fis[i] = 0xff; 1818203123Smav } 1819222304Smav } else 1820222304Smav softreset = 0; 1821195534Sscottl clp->bytecount = 0; 1822195534Sscottl clp->cmd_table_phys = htole64(ch->dma.work_bus + AHCI_CT_OFFSET + 1823195534Sscottl (AHCI_CT_SIZE * slot->slot)); 1824195534Sscottl bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1825214988Smav BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1826195534Sscottl bus_dmamap_sync(ch->dma.rfis_tag, ch->dma.rfis_map, 1827195534Sscottl BUS_DMASYNC_PREREAD); 1828195534Sscottl /* Set ACTIVE bit for NCQ commands. */ 1829195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1830195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1831195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SACT, 1 << slot->slot); 1832195534Sscottl } 1833203123Smav /* If FBS is enabled, set PMP port. */ 1834203123Smav if (ch->fbs_enabled) { 1835203123Smav ATA_OUTL(ch->r_mem, AHCI_P_FBS, AHCI_P_FBS_EN | 1836203123Smav (port << AHCI_P_FBS_DEV_SHIFT)); 1837203123Smav } 1838195534Sscottl /* Issue command to the controller. */ 1839195534Sscottl slot->state = AHCI_SLOT_RUNNING; 1840195534Sscottl ch->rslots |= (1 << slot->slot); 1841195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CI, (1 << slot->slot)); 1842195534Sscottl /* Device reset commands doesn't interrupt. Poll them. */ 1843195534Sscottl if (ccb->ccb_h.func_code == XPT_ATA_IO && 1844222304Smav (ccb->ataio.cmd.command == ATA_DEVICE_RESET || softreset)) { 1845220777Smav int count, timeout = ccb->ccb_h.timeout * 100; 1846195534Sscottl enum ahci_err_type et = AHCI_ERR_NONE; 1847195534Sscottl 1848195534Sscottl for (count = 0; count < timeout; count++) { 1849220777Smav DELAY(10); 1850195534Sscottl if (!(ATA_INL(ch->r_mem, AHCI_P_CI) & (1 << slot->slot))) 1851195534Sscottl break; 1852222304Smav if ((ATA_INL(ch->r_mem, AHCI_P_TFD) & ATA_S_ERROR) && 1853222304Smav softreset != 1) { 1854222285Smav#if 0 1855195534Sscottl device_printf(ch->dev, 1856195534Sscottl "Poll error on slot %d, TFD: %04x\n", 1857195534Sscottl slot->slot, ATA_INL(ch->r_mem, AHCI_P_TFD)); 1858222285Smav#endif 1859195534Sscottl et = AHCI_ERR_TFE; 1860195534Sscottl break; 1861195534Sscottl } 1862198851Smav /* Workaround for ATI SB600/SB700 chipsets. */ 1863198851Smav if (ccb->ccb_h.target_id == 15 && 1864198851Smav pci_get_vendor(device_get_parent(dev)) == 0x1002 && 1865198851Smav (ATA_INL(ch->r_mem, AHCI_P_IS) & AHCI_P_IX_IPM)) { 1866198851Smav et = AHCI_ERR_TIMEOUT; 1867198851Smav break; 1868198851Smav } 1869195534Sscottl } 1870222304Smav 1871222304Smav /* Marvell controllers do not wait for readyness. */ 1872222304Smav if ((ch->quirks & AHCI_Q_NOBSYRES) && softreset == 2 && 1873222304Smav et == AHCI_ERR_NONE) { 1874222304Smav while ((val = fis[2]) & ATA_S_BUSY) { 1875222304Smav DELAY(10); 1876222304Smav if (count++ >= timeout) 1877222304Smav break; 1878222304Smav } 1879222304Smav } 1880222304Smav 1881195534Sscottl if (timeout && (count >= timeout)) { 1882222304Smav device_printf(dev, "Poll timeout on slot %d port %d\n", 1883222304Smav slot->slot, port); 1884203108Smav device_printf(dev, "is %08x cs %08x ss %08x " 1885224498Smav "rs %08x tfd %02x serr %08x cmd %08x\n", 1886203108Smav ATA_INL(ch->r_mem, AHCI_P_IS), 1887203108Smav ATA_INL(ch->r_mem, AHCI_P_CI), 1888203108Smav ATA_INL(ch->r_mem, AHCI_P_SACT), ch->rslots, 1889203108Smav ATA_INL(ch->r_mem, AHCI_P_TFD), 1890224498Smav ATA_INL(ch->r_mem, AHCI_P_SERR), 1891224498Smav ATA_INL(ch->r_mem, AHCI_P_CMD)); 1892195534Sscottl et = AHCI_ERR_TIMEOUT; 1893195534Sscottl } 1894222304Smav 1895203123Smav /* Kick controller into sane state and enable FBS. */ 1896222304Smav if (softreset == 2) 1897222285Smav ch->eslots |= (1 << slot->slot); 1898222285Smav ahci_end_transaction(slot, et); 1899195534Sscottl return; 1900195534Sscottl } 1901195534Sscottl /* Start command execution timeout */ 1902198319Smav callout_reset(&slot->timeout, (int)ccb->ccb_h.timeout * hz / 2000, 1903195534Sscottl (timeout_t*)ahci_timeout, slot); 1904195534Sscottl return; 1905195534Sscottl} 1906195534Sscottl 1907203873Smav/* Must be called with channel locked. */ 1908203873Smavstatic void 1909203873Smavahci_process_timeout(device_t dev) 1910203873Smav{ 1911203873Smav struct ahci_channel *ch = device_get_softc(dev); 1912203873Smav int i; 1913203873Smav 1914203873Smav mtx_assert(&ch->mtx, MA_OWNED); 1915203873Smav /* Handle the rest of commands. */ 1916203873Smav for (i = 0; i < ch->numslots; i++) { 1917203873Smav /* Do we have a running request on slot? */ 1918203873Smav if (ch->slot[i].state < AHCI_SLOT_RUNNING) 1919203873Smav continue; 1920203873Smav ahci_end_transaction(&ch->slot[i], AHCI_ERR_TIMEOUT); 1921203873Smav } 1922203873Smav} 1923203873Smav 1924203873Smav/* Must be called with channel locked. */ 1925203873Smavstatic void 1926203873Smavahci_rearm_timeout(device_t dev) 1927203873Smav{ 1928203873Smav struct ahci_channel *ch = device_get_softc(dev); 1929203873Smav int i; 1930203873Smav 1931203873Smav mtx_assert(&ch->mtx, MA_OWNED); 1932203873Smav for (i = 0; i < ch->numslots; i++) { 1933203873Smav struct ahci_slot *slot = &ch->slot[i]; 1934203873Smav 1935203873Smav /* Do we have a running request on slot? */ 1936203873Smav if (slot->state < AHCI_SLOT_RUNNING) 1937203873Smav continue; 1938203873Smav if ((ch->toslots & (1 << i)) == 0) 1939203873Smav continue; 1940203873Smav callout_reset(&slot->timeout, 1941203873Smav (int)slot->ccb->ccb_h.timeout * hz / 2000, 1942203873Smav (timeout_t*)ahci_timeout, slot); 1943203873Smav } 1944203873Smav} 1945203873Smav 1946195534Sscottl/* Locked by callout mechanism. */ 1947195534Sscottlstatic void 1948195534Sscottlahci_timeout(struct ahci_slot *slot) 1949195534Sscottl{ 1950195534Sscottl device_t dev = slot->dev; 1951195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1952198319Smav uint32_t sstatus; 1953198319Smav int ccs; 1954195534Sscottl int i; 1955195534Sscottl 1956196656Smav /* Check for stale timeout. */ 1957198319Smav if (slot->state < AHCI_SLOT_RUNNING) 1958196656Smav return; 1959196656Smav 1960198319Smav /* Check if slot was not being executed last time we checked. */ 1961198319Smav if (slot->state < AHCI_SLOT_EXECUTING) { 1962198319Smav /* Check if slot started executing. */ 1963198319Smav sstatus = ATA_INL(ch->r_mem, AHCI_P_SACT); 1964198319Smav ccs = (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CCS_MASK) 1965198319Smav >> AHCI_P_CMD_CCS_SHIFT; 1966203123Smav if ((sstatus & (1 << slot->slot)) != 0 || ccs == slot->slot || 1967224498Smav ch->fbs_enabled || ch->wrongccs) 1968198319Smav slot->state = AHCI_SLOT_EXECUTING; 1969224498Smav else if ((ch->rslots & (1 << ccs)) == 0) { 1970224498Smav ch->wrongccs = 1; 1971224498Smav slot->state = AHCI_SLOT_EXECUTING; 1972224498Smav } 1973198319Smav 1974198319Smav callout_reset(&slot->timeout, 1975198319Smav (int)slot->ccb->ccb_h.timeout * hz / 2000, 1976198319Smav (timeout_t*)ahci_timeout, slot); 1977198319Smav return; 1978198319Smav } 1979198319Smav 1980222304Smav device_printf(dev, "Timeout on slot %d port %d\n", 1981222304Smav slot->slot, slot->ccb->ccb_h.target_id & 0x0f); 1982224498Smav device_printf(dev, "is %08x cs %08x ss %08x rs %08x tfd %02x " 1983224498Smav "serr %08x cmd %08x\n", 1984198319Smav ATA_INL(ch->r_mem, AHCI_P_IS), ATA_INL(ch->r_mem, AHCI_P_CI), 1985198319Smav ATA_INL(ch->r_mem, AHCI_P_SACT), ch->rslots, 1986224498Smav ATA_INL(ch->r_mem, AHCI_P_TFD), ATA_INL(ch->r_mem, AHCI_P_SERR), 1987224498Smav ATA_INL(ch->r_mem, AHCI_P_CMD)); 1988195534Sscottl 1989197838Smav /* Handle frozen command. */ 1990195534Sscottl if (ch->frozen) { 1991195534Sscottl union ccb *fccb = ch->frozen; 1992195534Sscottl ch->frozen = NULL; 1993195534Sscottl fccb->ccb_h.status = CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 1994198319Smav if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 1995198319Smav xpt_freeze_devq(fccb->ccb_h.path, 1); 1996198319Smav fccb->ccb_h.status |= CAM_DEV_QFRZN; 1997198319Smav } 1998195534Sscottl xpt_done(fccb); 1999195534Sscottl } 2000224498Smav if (!ch->fbs_enabled && !ch->wrongccs) { 2001203873Smav /* Without FBS we know real timeout source. */ 2002203873Smav ch->fatalerr = 1; 2003203873Smav /* Handle command with timeout. */ 2004203873Smav ahci_end_transaction(&ch->slot[slot->slot], AHCI_ERR_TIMEOUT); 2005203873Smav /* Handle the rest of commands. */ 2006203873Smav for (i = 0; i < ch->numslots; i++) { 2007203873Smav /* Do we have a running request on slot? */ 2008203873Smav if (ch->slot[i].state < AHCI_SLOT_RUNNING) 2009203873Smav continue; 2010203873Smav ahci_end_transaction(&ch->slot[i], AHCI_ERR_INNOCENT); 2011203873Smav } 2012203873Smav } else { 2013203873Smav /* With FBS we wait for other commands timeout and pray. */ 2014203873Smav if (ch->toslots == 0) 2015203873Smav xpt_freeze_simq(ch->sim, 1); 2016203873Smav ch->toslots |= (1 << slot->slot); 2017203873Smav if ((ch->rslots & ~ch->toslots) == 0) 2018203873Smav ahci_process_timeout(dev); 2019203873Smav else 2020203873Smav device_printf(dev, " ... waiting for slots %08x\n", 2021203873Smav ch->rslots & ~ch->toslots); 2022195534Sscottl } 2023195534Sscottl} 2024195534Sscottl 2025195534Sscottl/* Must be called with channel locked. */ 2026195534Sscottlstatic void 2027195534Sscottlahci_end_transaction(struct ahci_slot *slot, enum ahci_err_type et) 2028195534Sscottl{ 2029195534Sscottl device_t dev = slot->dev; 2030195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2031195534Sscottl union ccb *ccb = slot->ccb; 2032214988Smav struct ahci_cmd_list *clp; 2033212732Smav int lastto; 2034222304Smav uint32_t sig; 2035195534Sscottl 2036195534Sscottl bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 2037214988Smav BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 2038214988Smav clp = (struct ahci_cmd_list *) 2039214988Smav (ch->dma.work + AHCI_CL_OFFSET + (AHCI_CL_SIZE * slot->slot)); 2040195534Sscottl /* Read result registers to the result struct 2041195534Sscottl * May be incorrect if several commands finished same time, 2042195534Sscottl * so read only when sure or have to. 2043195534Sscottl */ 2044195534Sscottl if (ccb->ccb_h.func_code == XPT_ATA_IO) { 2045195534Sscottl struct ata_res *res = &ccb->ataio.res; 2046195534Sscottl 2047195534Sscottl if ((et == AHCI_ERR_TFE) || 2048195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_NEEDRESULT)) { 2049195534Sscottl u_int8_t *fis = ch->dma.rfis + 0x40; 2050195534Sscottl 2051195534Sscottl bus_dmamap_sync(ch->dma.rfis_tag, ch->dma.rfis_map, 2052195534Sscottl BUS_DMASYNC_POSTREAD); 2053203123Smav if (ch->fbs_enabled) { 2054203123Smav fis += ccb->ccb_h.target_id * 256; 2055203123Smav res->status = fis[2]; 2056203123Smav res->error = fis[3]; 2057203123Smav } else { 2058203123Smav uint16_t tfd = ATA_INL(ch->r_mem, AHCI_P_TFD); 2059203123Smav 2060203123Smav res->status = tfd; 2061203123Smav res->error = tfd >> 8; 2062203123Smav } 2063195534Sscottl res->lba_low = fis[4]; 2064195534Sscottl res->lba_mid = fis[5]; 2065195534Sscottl res->lba_high = fis[6]; 2066195534Sscottl res->device = fis[7]; 2067195534Sscottl res->lba_low_exp = fis[8]; 2068195534Sscottl res->lba_mid_exp = fis[9]; 2069195534Sscottl res->lba_high_exp = fis[10]; 2070195534Sscottl res->sector_count = fis[12]; 2071195534Sscottl res->sector_count_exp = fis[13]; 2072222304Smav 2073222304Smav /* 2074222304Smav * Some weird controllers do not return signature in 2075222304Smav * FIS receive area. Read it from PxSIG register. 2076222304Smav */ 2077222304Smav if ((ch->quirks & AHCI_Q_ALTSIG) && 2078222304Smav (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) && 2079222304Smav (ccb->ataio.cmd.control & ATA_A_RESET) == 0) { 2080222304Smav sig = ATA_INL(ch->r_mem, AHCI_P_SIG); 2081222304Smav res->lba_high = sig >> 24; 2082222304Smav res->lba_mid = sig >> 16; 2083222304Smav res->lba_low = sig >> 8; 2084222304Smav res->sector_count = sig; 2085222304Smav } 2086195534Sscottl } else 2087195534Sscottl bzero(res, sizeof(*res)); 2088214988Smav if ((ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) == 0 && 2089218596Smav (ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 2090218596Smav (ch->quirks & AHCI_Q_NOCOUNT) == 0) { 2091214988Smav ccb->ataio.resid = 2092214988Smav ccb->ataio.dxfer_len - le32toh(clp->bytecount); 2093214988Smav } 2094214988Smav } else { 2095218596Smav if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 2096218596Smav (ch->quirks & AHCI_Q_NOCOUNT) == 0) { 2097214988Smav ccb->csio.resid = 2098214988Smav ccb->csio.dxfer_len - le32toh(clp->bytecount); 2099214988Smav } 2100195534Sscottl } 2101195534Sscottl if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 2102195534Sscottl bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 2103195534Sscottl (ccb->ccb_h.flags & CAM_DIR_IN) ? 2104195534Sscottl BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 2105195534Sscottl bus_dmamap_unload(ch->dma.data_tag, slot->dma.data_map); 2106195534Sscottl } 2107203123Smav if (et != AHCI_ERR_NONE) 2108203123Smav ch->eslots |= (1 << slot->slot); 2109198319Smav /* In case of error, freeze device for proper recovery. */ 2110220565Smav if ((et != AHCI_ERR_NONE) && (!ch->recoverycmd) && 2111198319Smav !(ccb->ccb_h.status & CAM_DEV_QFRZN)) { 2112198319Smav xpt_freeze_devq(ccb->ccb_h.path, 1); 2113198319Smav ccb->ccb_h.status |= CAM_DEV_QFRZN; 2114198319Smav } 2115195534Sscottl /* Set proper result status. */ 2116195534Sscottl ccb->ccb_h.status &= ~CAM_STATUS_MASK; 2117195534Sscottl switch (et) { 2118195534Sscottl case AHCI_ERR_NONE: 2119195534Sscottl ccb->ccb_h.status |= CAM_REQ_CMP; 2120195534Sscottl if (ccb->ccb_h.func_code == XPT_SCSI_IO) 2121195534Sscottl ccb->csio.scsi_status = SCSI_STATUS_OK; 2122195534Sscottl break; 2123195534Sscottl case AHCI_ERR_INVALID: 2124198851Smav ch->fatalerr = 1; 2125195534Sscottl ccb->ccb_h.status |= CAM_REQ_INVALID; 2126195534Sscottl break; 2127195534Sscottl case AHCI_ERR_INNOCENT: 2128195534Sscottl ccb->ccb_h.status |= CAM_REQUEUE_REQ; 2129195534Sscottl break; 2130195534Sscottl case AHCI_ERR_TFE: 2131198319Smav case AHCI_ERR_NCQ: 2132195534Sscottl if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 2133195534Sscottl ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR; 2134195534Sscottl ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 2135195534Sscottl } else { 2136195534Sscottl ccb->ccb_h.status |= CAM_ATA_STATUS_ERROR; 2137195534Sscottl } 2138195534Sscottl break; 2139195534Sscottl case AHCI_ERR_SATA: 2140198851Smav ch->fatalerr = 1; 2141220565Smav if (!ch->recoverycmd) { 2142198319Smav xpt_freeze_simq(ch->sim, 1); 2143198319Smav ccb->ccb_h.status &= ~CAM_STATUS_MASK; 2144198319Smav ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 2145198319Smav } 2146198319Smav ccb->ccb_h.status |= CAM_UNCOR_PARITY; 2147195534Sscottl break; 2148195534Sscottl case AHCI_ERR_TIMEOUT: 2149220565Smav if (!ch->recoverycmd) { 2150198319Smav xpt_freeze_simq(ch->sim, 1); 2151198319Smav ccb->ccb_h.status &= ~CAM_STATUS_MASK; 2152198319Smav ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 2153198319Smav } 2154195534Sscottl ccb->ccb_h.status |= CAM_CMD_TIMEOUT; 2155195534Sscottl break; 2156195534Sscottl default: 2157198851Smav ch->fatalerr = 1; 2158195534Sscottl ccb->ccb_h.status |= CAM_REQ_CMP_ERR; 2159195534Sscottl } 2160195534Sscottl /* Free slot. */ 2161199747Smav ch->oslots &= ~(1 << slot->slot); 2162195534Sscottl ch->rslots &= ~(1 << slot->slot); 2163195534Sscottl ch->aslots &= ~(1 << slot->slot); 2164195534Sscottl slot->state = AHCI_SLOT_EMPTY; 2165195534Sscottl slot->ccb = NULL; 2166195534Sscottl /* Update channel stats. */ 2167195534Sscottl ch->numrslots--; 2168203123Smav ch->numrslotspd[ccb->ccb_h.target_id]--; 2169195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 2170195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 2171195534Sscottl ch->numtslots--; 2172203123Smav ch->numtslotspd[ccb->ccb_h.target_id]--; 2173195534Sscottl } 2174212732Smav /* Cancel timeout state if request completed normally. */ 2175212732Smav if (et != AHCI_ERR_TIMEOUT) { 2176212732Smav lastto = (ch->toslots == (1 << slot->slot)); 2177212732Smav ch->toslots &= ~(1 << slot->slot); 2178212732Smav if (lastto) 2179212732Smav xpt_release_simq(ch->sim, TRUE); 2180212732Smav } 2181195534Sscottl /* If it was first request of reset sequence and there is no error, 2182195534Sscottl * proceed to second request. */ 2183195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 2184195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) && 2185195534Sscottl (ccb->ataio.cmd.control & ATA_A_RESET) && 2186195534Sscottl et == AHCI_ERR_NONE) { 2187195534Sscottl ccb->ataio.cmd.control &= ~ATA_A_RESET; 2188195534Sscottl ahci_begin_transaction(dev, ccb); 2189195534Sscottl return; 2190195534Sscottl } 2191198851Smav /* If it was our READ LOG command - process it. */ 2192220565Smav if (ccb->ccb_h.recovery_type == RECOVERY_READ_LOG) { 2193198851Smav ahci_process_read_log(dev, ccb); 2194220565Smav /* If it was our REQUEST SENSE command - process it. */ 2195220565Smav } else if (ccb->ccb_h.recovery_type == RECOVERY_REQUEST_SENSE) { 2196220565Smav ahci_process_request_sense(dev, ccb); 2197220565Smav /* If it was NCQ or ATAPI command error, put result on hold. */ 2198220565Smav } else if (et == AHCI_ERR_NCQ || 2199220565Smav ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_SCSI_STATUS_ERROR && 2200220565Smav (ccb->ccb_h.flags & CAM_DIS_AUTOSENSE) == 0)) { 2201195534Sscottl ch->hold[slot->slot] = ccb; 2202203123Smav ch->numhslots++; 2203198851Smav } else 2204195534Sscottl xpt_done(ccb); 2205198851Smav /* If we have no other active commands, ... */ 2206198851Smav if (ch->rslots == 0) { 2207198851Smav /* if there was fatal error - reset port. */ 2208203873Smav if (ch->toslots != 0 || ch->fatalerr) { 2209198851Smav ahci_reset(dev); 2210203123Smav } else { 2211203123Smav /* if we have slots in error, we can reinit port. */ 2212203123Smav if (ch->eslots != 0) { 2213203123Smav ahci_stop(dev); 2214222285Smav ahci_clo(dev); 2215203123Smav ahci_start(dev, 1); 2216203123Smav } 2217203123Smav /* if there commands on hold, we can do READ LOG. */ 2218220565Smav if (!ch->recoverycmd && ch->numhslots) 2219220565Smav ahci_issue_recovery(dev); 2220198851Smav } 2221203873Smav /* If all the rest of commands are in timeout - give them chance. */ 2222203873Smav } else if ((ch->rslots & ~ch->toslots) == 0 && 2223203873Smav et != AHCI_ERR_TIMEOUT) 2224203873Smav ahci_rearm_timeout(dev); 2225222285Smav /* Unfreeze frozen command. */ 2226222285Smav if (ch->frozen && !ahci_check_collision(dev, ch->frozen)) { 2227222285Smav union ccb *fccb = ch->frozen; 2228222285Smav ch->frozen = NULL; 2229222285Smav ahci_begin_transaction(dev, fccb); 2230222285Smav xpt_release_simq(ch->sim, TRUE); 2231222285Smav } 2232196656Smav /* Start PM timer. */ 2233207499Smav if (ch->numrslots == 0 && ch->pm_level > 3 && 2234207499Smav (ch->curr[ch->pm_present ? 15 : 0].caps & CTS_SATA_CAPS_D_PMREQ)) { 2235196656Smav callout_schedule(&ch->pm_timer, 2236196656Smav (ch->pm_level == 4) ? hz / 1000 : hz / 8); 2237196656Smav } 2238195534Sscottl} 2239195534Sscottl 2240195534Sscottlstatic void 2241220565Smavahci_issue_recovery(device_t dev) 2242195534Sscottl{ 2243195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2244195534Sscottl union ccb *ccb; 2245195534Sscottl struct ccb_ataio *ataio; 2246220565Smav struct ccb_scsiio *csio; 2247195534Sscottl int i; 2248195534Sscottl 2249220830Smav /* Find some held command. */ 2250195534Sscottl for (i = 0; i < ch->numslots; i++) { 2251195534Sscottl if (ch->hold[i]) 2252195534Sscottl break; 2253195534Sscottl } 2254195534Sscottl ccb = xpt_alloc_ccb_nowait(); 2255195534Sscottl if (ccb == NULL) { 2256220830Smav device_printf(dev, "Unable to allocate recovery command\n"); 2257220822Smavcompleteall: 2258220830Smav /* We can't do anything -- complete held commands. */ 2259220822Smav for (i = 0; i < ch->numslots; i++) { 2260220822Smav if (ch->hold[i] == NULL) 2261220822Smav continue; 2262220822Smav ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 2263220822Smav ch->hold[i]->ccb_h.status |= CAM_RESRC_UNAVAIL; 2264220822Smav xpt_done(ch->hold[i]); 2265220822Smav ch->hold[i] = NULL; 2266220822Smav ch->numhslots--; 2267220822Smav } 2268220822Smav ahci_reset(dev); 2269220822Smav return; 2270195534Sscottl } 2271195534Sscottl ccb->ccb_h = ch->hold[i]->ccb_h; /* Reuse old header. */ 2272220565Smav if (ccb->ccb_h.func_code == XPT_ATA_IO) { 2273220565Smav /* READ LOG */ 2274220565Smav ccb->ccb_h.recovery_type = RECOVERY_READ_LOG; 2275220565Smav ccb->ccb_h.func_code = XPT_ATA_IO; 2276220565Smav ccb->ccb_h.flags = CAM_DIR_IN; 2277220565Smav ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ 2278220565Smav ataio = &ccb->ataio; 2279220565Smav ataio->data_ptr = malloc(512, M_AHCI, M_NOWAIT); 2280220565Smav if (ataio->data_ptr == NULL) { 2281220565Smav xpt_free_ccb(ccb); 2282220822Smav device_printf(dev, 2283220830Smav "Unable to allocate memory for READ LOG command\n"); 2284220822Smav goto completeall; 2285220565Smav } 2286220565Smav ataio->dxfer_len = 512; 2287220565Smav bzero(&ataio->cmd, sizeof(ataio->cmd)); 2288220565Smav ataio->cmd.flags = CAM_ATAIO_48BIT; 2289220565Smav ataio->cmd.command = 0x2F; /* READ LOG EXT */ 2290220565Smav ataio->cmd.sector_count = 1; 2291220565Smav ataio->cmd.sector_count_exp = 0; 2292220565Smav ataio->cmd.lba_low = 0x10; 2293220565Smav ataio->cmd.lba_mid = 0; 2294220565Smav ataio->cmd.lba_mid_exp = 0; 2295220565Smav } else { 2296220565Smav /* REQUEST SENSE */ 2297220565Smav ccb->ccb_h.recovery_type = RECOVERY_REQUEST_SENSE; 2298220565Smav ccb->ccb_h.recovery_slot = i; 2299220565Smav ccb->ccb_h.func_code = XPT_SCSI_IO; 2300220565Smav ccb->ccb_h.flags = CAM_DIR_IN; 2301220565Smav ccb->ccb_h.status = 0; 2302220565Smav ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ 2303220565Smav csio = &ccb->csio; 2304220565Smav csio->data_ptr = (void *)&ch->hold[i]->csio.sense_data; 2305220565Smav csio->dxfer_len = ch->hold[i]->csio.sense_len; 2306220565Smav csio->cdb_len = 6; 2307220565Smav bzero(&csio->cdb_io, sizeof(csio->cdb_io)); 2308220565Smav csio->cdb_io.cdb_bytes[0] = 0x03; 2309220565Smav csio->cdb_io.cdb_bytes[4] = csio->dxfer_len; 2310195534Sscottl } 2311220565Smav /* Freeze SIM while doing recovery. */ 2312220822Smav ch->recoverycmd = 1; 2313198319Smav xpt_freeze_simq(ch->sim, 1); 2314195534Sscottl ahci_begin_transaction(dev, ccb); 2315195534Sscottl} 2316195534Sscottl 2317195534Sscottlstatic void 2318195534Sscottlahci_process_read_log(device_t dev, union ccb *ccb) 2319195534Sscottl{ 2320195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2321195534Sscottl uint8_t *data; 2322195534Sscottl struct ata_res *res; 2323195534Sscottl int i; 2324195534Sscottl 2325220565Smav ch->recoverycmd = 0; 2326195534Sscottl 2327195534Sscottl data = ccb->ataio.data_ptr; 2328195534Sscottl if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP && 2329195534Sscottl (data[0] & 0x80) == 0) { 2330195534Sscottl for (i = 0; i < ch->numslots; i++) { 2331195534Sscottl if (!ch->hold[i]) 2332195534Sscottl continue; 2333220565Smav if (ch->hold[i]->ccb_h.func_code != XPT_ATA_IO) 2334220565Smav continue; 2335195534Sscottl if ((data[0] & 0x1F) == i) { 2336195534Sscottl res = &ch->hold[i]->ataio.res; 2337195534Sscottl res->status = data[2]; 2338195534Sscottl res->error = data[3]; 2339195534Sscottl res->lba_low = data[4]; 2340195534Sscottl res->lba_mid = data[5]; 2341195534Sscottl res->lba_high = data[6]; 2342195534Sscottl res->device = data[7]; 2343195534Sscottl res->lba_low_exp = data[8]; 2344195534Sscottl res->lba_mid_exp = data[9]; 2345195534Sscottl res->lba_high_exp = data[10]; 2346195534Sscottl res->sector_count = data[12]; 2347195534Sscottl res->sector_count_exp = data[13]; 2348195534Sscottl } else { 2349195534Sscottl ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 2350195534Sscottl ch->hold[i]->ccb_h.status |= CAM_REQUEUE_REQ; 2351195534Sscottl } 2352195534Sscottl xpt_done(ch->hold[i]); 2353195534Sscottl ch->hold[i] = NULL; 2354203123Smav ch->numhslots--; 2355195534Sscottl } 2356195534Sscottl } else { 2357195534Sscottl if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) 2358195534Sscottl device_printf(dev, "Error while READ LOG EXT\n"); 2359195534Sscottl else if ((data[0] & 0x80) == 0) { 2360195534Sscottl device_printf(dev, "Non-queued command error in READ LOG EXT\n"); 2361195534Sscottl } 2362195534Sscottl for (i = 0; i < ch->numslots; i++) { 2363195534Sscottl if (!ch->hold[i]) 2364195534Sscottl continue; 2365220565Smav if (ch->hold[i]->ccb_h.func_code != XPT_ATA_IO) 2366220565Smav continue; 2367195534Sscottl xpt_done(ch->hold[i]); 2368195534Sscottl ch->hold[i] = NULL; 2369203123Smav ch->numhslots--; 2370195534Sscottl } 2371195534Sscottl } 2372195534Sscottl free(ccb->ataio.data_ptr, M_AHCI); 2373195534Sscottl xpt_free_ccb(ccb); 2374198319Smav xpt_release_simq(ch->sim, TRUE); 2375195534Sscottl} 2376195534Sscottl 2377195534Sscottlstatic void 2378220565Smavahci_process_request_sense(device_t dev, union ccb *ccb) 2379220565Smav{ 2380220565Smav struct ahci_channel *ch = device_get_softc(dev); 2381220565Smav int i; 2382220565Smav 2383220565Smav ch->recoverycmd = 0; 2384220565Smav 2385220565Smav i = ccb->ccb_h.recovery_slot; 2386220565Smav if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP) { 2387220565Smav ch->hold[i]->ccb_h.status |= CAM_AUTOSNS_VALID; 2388220565Smav } else { 2389220565Smav ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 2390220565Smav ch->hold[i]->ccb_h.status |= CAM_AUTOSENSE_FAIL; 2391220565Smav } 2392220565Smav xpt_done(ch->hold[i]); 2393220565Smav ch->hold[i] = NULL; 2394220565Smav ch->numhslots--; 2395220565Smav xpt_free_ccb(ccb); 2396220565Smav xpt_release_simq(ch->sim, TRUE); 2397220565Smav} 2398220565Smav 2399220565Smavstatic void 2400203123Smavahci_start(device_t dev, int fbs) 2401195534Sscottl{ 2402195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2403195534Sscottl u_int32_t cmd; 2404195534Sscottl 2405195534Sscottl /* Clear SATA error register */ 2406195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SERR, 0xFFFFFFFF); 2407195534Sscottl /* Clear any interrupts pending on this channel */ 2408195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IS, 0xFFFFFFFF); 2409203123Smav /* Configure FIS-based switching if supported. */ 2410203123Smav if (ch->chcaps & AHCI_P_CMD_FBSCP) { 2411203123Smav ch->fbs_enabled = (fbs && ch->pm_present) ? 1 : 0; 2412203123Smav ATA_OUTL(ch->r_mem, AHCI_P_FBS, 2413203123Smav ch->fbs_enabled ? AHCI_P_FBS_EN : 0); 2414203123Smav } 2415195534Sscottl /* Start operations on this channel */ 2416195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 2417207430Smav cmd &= ~AHCI_P_CMD_PMA; 2418195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd | AHCI_P_CMD_ST | 2419195534Sscottl (ch->pm_present ? AHCI_P_CMD_PMA : 0)); 2420195534Sscottl} 2421195534Sscottl 2422195534Sscottlstatic void 2423195534Sscottlahci_stop(device_t dev) 2424195534Sscottl{ 2425195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2426195534Sscottl u_int32_t cmd; 2427195534Sscottl int timeout; 2428195534Sscottl 2429195534Sscottl /* Kill all activity on this channel */ 2430195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 2431195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd & ~AHCI_P_CMD_ST); 2432195534Sscottl /* Wait for activity stop. */ 2433195534Sscottl timeout = 0; 2434195534Sscottl do { 2435220777Smav DELAY(10); 2436220777Smav if (timeout++ > 50000) { 2437195534Sscottl device_printf(dev, "stopping AHCI engine failed\n"); 2438195534Sscottl break; 2439195534Sscottl } 2440195534Sscottl } while (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CR); 2441203123Smav ch->eslots = 0; 2442195534Sscottl} 2443195534Sscottl 2444195534Sscottlstatic void 2445195534Sscottlahci_clo(device_t dev) 2446195534Sscottl{ 2447195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2448195534Sscottl u_int32_t cmd; 2449195534Sscottl int timeout; 2450195534Sscottl 2451195534Sscottl /* Issue Command List Override if supported */ 2452195534Sscottl if (ch->caps & AHCI_CAP_SCLO) { 2453195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 2454195534Sscottl cmd |= AHCI_P_CMD_CLO; 2455195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd); 2456195534Sscottl timeout = 0; 2457195534Sscottl do { 2458220777Smav DELAY(10); 2459220777Smav if (timeout++ > 50000) { 2460195534Sscottl device_printf(dev, "executing CLO failed\n"); 2461195534Sscottl break; 2462195534Sscottl } 2463195534Sscottl } while (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CLO); 2464195534Sscottl } 2465195534Sscottl} 2466195534Sscottl 2467195534Sscottlstatic void 2468195534Sscottlahci_stop_fr(device_t dev) 2469195534Sscottl{ 2470195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2471195534Sscottl u_int32_t cmd; 2472195534Sscottl int timeout; 2473195534Sscottl 2474195534Sscottl /* Kill all FIS reception on this channel */ 2475195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 2476195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd & ~AHCI_P_CMD_FRE); 2477195534Sscottl /* Wait for FIS reception stop. */ 2478195534Sscottl timeout = 0; 2479195534Sscottl do { 2480220777Smav DELAY(10); 2481220777Smav if (timeout++ > 50000) { 2482195534Sscottl device_printf(dev, "stopping AHCI FR engine failed\n"); 2483195534Sscottl break; 2484195534Sscottl } 2485195534Sscottl } while (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_FR); 2486195534Sscottl} 2487195534Sscottl 2488195534Sscottlstatic void 2489195534Sscottlahci_start_fr(device_t dev) 2490195534Sscottl{ 2491195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2492195534Sscottl u_int32_t cmd; 2493195534Sscottl 2494195534Sscottl /* Start FIS reception on this channel */ 2495195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 2496195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd | AHCI_P_CMD_FRE); 2497195534Sscottl} 2498195534Sscottl 2499195534Sscottlstatic int 2500220576Smavahci_wait_ready(device_t dev, int t, int t0) 2501195534Sscottl{ 2502195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2503195534Sscottl int timeout = 0; 2504195534Sscottl uint32_t val; 2505195534Sscottl 2506195534Sscottl while ((val = ATA_INL(ch->r_mem, AHCI_P_TFD)) & 2507195534Sscottl (ATA_S_BUSY | ATA_S_DRQ)) { 2508220576Smav if (timeout > t) { 2509220576Smav if (t != 0) { 2510220576Smav device_printf(dev, 2511220576Smav "AHCI reset: device not ready after %dms " 2512220576Smav "(tfd = %08x)\n", 2513220576Smav MAX(t, 0) + t0, val); 2514220576Smav } 2515195534Sscottl return (EBUSY); 2516195534Sscottl } 2517220576Smav DELAY(1000); 2518220576Smav timeout++; 2519220576Smav } 2520195534Sscottl if (bootverbose) 2521220576Smav device_printf(dev, "AHCI reset: device ready after %dms\n", 2522220576Smav timeout + t0); 2523195534Sscottl return (0); 2524195534Sscottl} 2525195534Sscottl 2526195534Sscottlstatic void 2527220576Smavahci_reset_to(void *arg) 2528220576Smav{ 2529220576Smav device_t dev = arg; 2530220576Smav struct ahci_channel *ch = device_get_softc(dev); 2531220576Smav 2532220576Smav if (ch->resetting == 0) 2533220576Smav return; 2534220576Smav ch->resetting--; 2535220576Smav if (ahci_wait_ready(dev, ch->resetting == 0 ? -1 : 0, 2536220576Smav (310 - ch->resetting) * 100) == 0) { 2537220576Smav ch->resetting = 0; 2538220777Smav ahci_start(dev, 1); 2539220576Smav xpt_release_simq(ch->sim, TRUE); 2540220576Smav return; 2541220576Smav } 2542220576Smav if (ch->resetting == 0) { 2543220576Smav ahci_clo(dev); 2544220576Smav ahci_start(dev, 1); 2545220576Smav xpt_release_simq(ch->sim, TRUE); 2546220576Smav return; 2547220576Smav } 2548220576Smav callout_schedule(&ch->reset_timer, hz / 10); 2549220576Smav} 2550220576Smav 2551220576Smavstatic void 2552195534Sscottlahci_reset(device_t dev) 2553195534Sscottl{ 2554195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2555196656Smav struct ahci_controller *ctlr = device_get_softc(device_get_parent(dev)); 2556195534Sscottl int i; 2557195534Sscottl 2558203108Smav xpt_freeze_simq(ch->sim, 1); 2559195534Sscottl if (bootverbose) 2560195534Sscottl device_printf(dev, "AHCI reset...\n"); 2561220576Smav /* Forget about previous reset. */ 2562220576Smav if (ch->resetting) { 2563220576Smav ch->resetting = 0; 2564220576Smav callout_stop(&ch->reset_timer); 2565220576Smav xpt_release_simq(ch->sim, TRUE); 2566220576Smav } 2567195534Sscottl /* Requeue freezed command. */ 2568195534Sscottl if (ch->frozen) { 2569195534Sscottl union ccb *fccb = ch->frozen; 2570195534Sscottl ch->frozen = NULL; 2571195534Sscottl fccb->ccb_h.status = CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 2572198319Smav if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 2573198319Smav xpt_freeze_devq(fccb->ccb_h.path, 1); 2574198319Smav fccb->ccb_h.status |= CAM_DEV_QFRZN; 2575198319Smav } 2576195534Sscottl xpt_done(fccb); 2577195534Sscottl } 2578195534Sscottl /* Kill the engine and requeue all running commands. */ 2579195534Sscottl ahci_stop(dev); 2580195534Sscottl for (i = 0; i < ch->numslots; i++) { 2581195534Sscottl /* Do we have a running request on slot? */ 2582195534Sscottl if (ch->slot[i].state < AHCI_SLOT_RUNNING) 2583195534Sscottl continue; 2584195534Sscottl /* XXX; Commands in loading state. */ 2585195534Sscottl ahci_end_transaction(&ch->slot[i], AHCI_ERR_INNOCENT); 2586195534Sscottl } 2587198851Smav for (i = 0; i < ch->numslots; i++) { 2588198851Smav if (!ch->hold[i]) 2589198851Smav continue; 2590198851Smav xpt_done(ch->hold[i]); 2591198851Smav ch->hold[i] = NULL; 2592203123Smav ch->numhslots--; 2593198851Smav } 2594203873Smav if (ch->toslots != 0) 2595203873Smav xpt_release_simq(ch->sim, TRUE); 2596203123Smav ch->eslots = 0; 2597203873Smav ch->toslots = 0; 2598224498Smav ch->wrongccs = 0; 2599198851Smav ch->fatalerr = 0; 2600198319Smav /* Tell the XPT about the event */ 2601198319Smav xpt_async(AC_BUS_RESET, ch->path, NULL); 2602195534Sscottl /* Disable port interrupts */ 2603195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 0); 2604195534Sscottl /* Reset and reconnect PHY, */ 2605203108Smav if (!ahci_sata_phy_reset(dev)) { 2606195534Sscottl if (bootverbose) 2607195534Sscottl device_printf(dev, 2608220576Smav "AHCI reset: device not found\n"); 2609195534Sscottl ch->devices = 0; 2610195534Sscottl /* Enable wanted port interrupts */ 2611195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 2612220657Smav (((ch->pm_level != 0) ? AHCI_P_IX_CPD | AHCI_P_IX_MP : 0) | 2613220657Smav AHCI_P_IX_PRC | AHCI_P_IX_PC)); 2614203108Smav xpt_release_simq(ch->sim, TRUE); 2615195534Sscottl return; 2616195534Sscottl } 2617220576Smav if (bootverbose) 2618220576Smav device_printf(dev, "AHCI reset: device found\n"); 2619195534Sscottl /* Wait for clearing busy status. */ 2620220576Smav if (ahci_wait_ready(dev, dumping ? 31000 : 0, 0)) { 2621220576Smav if (dumping) 2622220576Smav ahci_clo(dev); 2623220576Smav else 2624220576Smav ch->resetting = 310; 2625220576Smav } 2626195534Sscottl ch->devices = 1; 2627195534Sscottl /* Enable wanted port interrupts */ 2628195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 2629220657Smav (((ch->pm_level != 0) ? AHCI_P_IX_CPD | AHCI_P_IX_MP : 0) | 2630220657Smav AHCI_P_IX_TFE | AHCI_P_IX_HBF | 2631195534Sscottl AHCI_P_IX_HBD | AHCI_P_IX_IF | AHCI_P_IX_OF | 2632220657Smav ((ch->pm_level == 0) ? AHCI_P_IX_PRC : 0) | AHCI_P_IX_PC | 2633196656Smav AHCI_P_IX_DP | AHCI_P_IX_UF | (ctlr->ccc ? 0 : AHCI_P_IX_SDB) | 2634196656Smav AHCI_P_IX_DS | AHCI_P_IX_PS | (ctlr->ccc ? 0 : AHCI_P_IX_DHR))); 2635220576Smav if (ch->resetting) 2636220576Smav callout_reset(&ch->reset_timer, hz / 10, ahci_reset_to, dev); 2637220777Smav else { 2638220777Smav ahci_start(dev, 1); 2639220576Smav xpt_release_simq(ch->sim, TRUE); 2640220777Smav } 2641195534Sscottl} 2642195534Sscottl 2643195534Sscottlstatic int 2644199821Smavahci_setup_fis(device_t dev, struct ahci_cmd_tab *ctp, union ccb *ccb, int tag) 2645195534Sscottl{ 2646199821Smav struct ahci_channel *ch = device_get_softc(dev); 2647195534Sscottl u_int8_t *fis = &ctp->cfis[0]; 2648195534Sscottl 2649195534Sscottl bzero(ctp->cfis, 64); 2650195534Sscottl fis[0] = 0x27; /* host to device */ 2651195534Sscottl fis[1] = (ccb->ccb_h.target_id & 0x0f); 2652195534Sscottl if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 2653195534Sscottl fis[1] |= 0x80; 2654195534Sscottl fis[2] = ATA_PACKET_CMD; 2655199821Smav if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 2656199821Smav ch->curr[ccb->ccb_h.target_id].mode >= ATA_DMA) 2657195534Sscottl fis[3] = ATA_F_DMA; 2658195534Sscottl else { 2659195534Sscottl fis[5] = ccb->csio.dxfer_len; 2660195534Sscottl fis[6] = ccb->csio.dxfer_len >> 8; 2661195534Sscottl } 2662195534Sscottl fis[7] = ATA_D_LBA; 2663195534Sscottl fis[15] = ATA_A_4BIT; 2664195534Sscottl bzero(ctp->acmd, 32); 2665195534Sscottl bcopy((ccb->ccb_h.flags & CAM_CDB_POINTER) ? 2666195534Sscottl ccb->csio.cdb_io.cdb_ptr : ccb->csio.cdb_io.cdb_bytes, 2667195534Sscottl ctp->acmd, ccb->csio.cdb_len); 2668195534Sscottl } else if ((ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) == 0) { 2669195534Sscottl fis[1] |= 0x80; 2670195534Sscottl fis[2] = ccb->ataio.cmd.command; 2671195534Sscottl fis[3] = ccb->ataio.cmd.features; 2672195534Sscottl fis[4] = ccb->ataio.cmd.lba_low; 2673195534Sscottl fis[5] = ccb->ataio.cmd.lba_mid; 2674195534Sscottl fis[6] = ccb->ataio.cmd.lba_high; 2675195534Sscottl fis[7] = ccb->ataio.cmd.device; 2676195534Sscottl fis[8] = ccb->ataio.cmd.lba_low_exp; 2677195534Sscottl fis[9] = ccb->ataio.cmd.lba_mid_exp; 2678195534Sscottl fis[10] = ccb->ataio.cmd.lba_high_exp; 2679195534Sscottl fis[11] = ccb->ataio.cmd.features_exp; 2680195534Sscottl if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { 2681195534Sscottl fis[12] = tag << 3; 2682195534Sscottl fis[13] = 0; 2683195534Sscottl } else { 2684195534Sscottl fis[12] = ccb->ataio.cmd.sector_count; 2685195534Sscottl fis[13] = ccb->ataio.cmd.sector_count_exp; 2686195534Sscottl } 2687195534Sscottl fis[15] = ATA_A_4BIT; 2688195534Sscottl } else { 2689195534Sscottl fis[15] = ccb->ataio.cmd.control; 2690195534Sscottl } 2691195534Sscottl return (20); 2692195534Sscottl} 2693195534Sscottl 2694195534Sscottlstatic int 2695195534Sscottlahci_sata_connect(struct ahci_channel *ch) 2696195534Sscottl{ 2697195534Sscottl u_int32_t status; 2698220829Smav int timeout, found = 0; 2699195534Sscottl 2700195534Sscottl /* Wait up to 100ms for "connect well" */ 2701220777Smav for (timeout = 0; timeout < 1000 ; timeout++) { 2702195534Sscottl status = ATA_INL(ch->r_mem, AHCI_P_SSTS); 2703220829Smav if ((status & ATA_SS_DET_MASK) != ATA_SS_DET_NO_DEVICE) 2704220829Smav found = 1; 2705195534Sscottl if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 2706195534Sscottl ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 2707195534Sscottl ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) 2708195534Sscottl break; 2709196656Smav if ((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_OFFLINE) { 2710196656Smav if (bootverbose) { 2711196656Smav device_printf(ch->dev, "SATA offline status=%08x\n", 2712196656Smav status); 2713196656Smav } 2714196656Smav return (0); 2715196656Smav } 2716220829Smav if (found == 0 && timeout >= 100) 2717220829Smav break; 2718220777Smav DELAY(100); 2719195534Sscottl } 2720220829Smav if (timeout >= 1000 || !found) { 2721195534Sscottl if (bootverbose) { 2722220829Smav device_printf(ch->dev, 2723220829Smav "SATA connect timeout time=%dus status=%08x\n", 2724220829Smav timeout * 100, status); 2725195534Sscottl } 2726195534Sscottl return (0); 2727195534Sscottl } 2728195534Sscottl if (bootverbose) { 2729220777Smav device_printf(ch->dev, "SATA connect time=%dus status=%08x\n", 2730220777Smav timeout * 100, status); 2731195534Sscottl } 2732195534Sscottl /* Clear SATA error register */ 2733195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SERR, 0xffffffff); 2734195534Sscottl return (1); 2735195534Sscottl} 2736195534Sscottl 2737195534Sscottlstatic int 2738203108Smavahci_sata_phy_reset(device_t dev) 2739195534Sscottl{ 2740195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2741199821Smav int sata_rev; 2742195534Sscottl uint32_t val; 2743195534Sscottl 2744220657Smav if (ch->listening) { 2745220657Smav val = ATA_INL(ch->r_mem, AHCI_P_CMD); 2746220657Smav val |= AHCI_P_CMD_SUD; 2747220657Smav ATA_OUTL(ch->r_mem, AHCI_P_CMD, val); 2748220657Smav ch->listening = 0; 2749220657Smav } 2750199821Smav sata_rev = ch->user[ch->pm_present ? 15 : 0].revision; 2751199821Smav if (sata_rev == 1) 2752195534Sscottl val = ATA_SC_SPD_SPEED_GEN1; 2753199821Smav else if (sata_rev == 2) 2754195534Sscottl val = ATA_SC_SPD_SPEED_GEN2; 2755199821Smav else if (sata_rev == 3) 2756195534Sscottl val = ATA_SC_SPD_SPEED_GEN3; 2757195534Sscottl else 2758195534Sscottl val = 0; 2759195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SCTL, 2760196656Smav ATA_SC_DET_RESET | val | 2761196656Smav ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER); 2762220777Smav DELAY(1000); 2763196656Smav ATA_OUTL(ch->r_mem, AHCI_P_SCTL, 2764195534Sscottl ATA_SC_DET_IDLE | val | ((ch->pm_level > 0) ? 0 : 2765195534Sscottl (ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER))); 2766203426Smav if (!ahci_sata_connect(ch)) { 2767220657Smav if (ch->caps & AHCI_CAP_SSS) { 2768220657Smav val = ATA_INL(ch->r_mem, AHCI_P_CMD); 2769220657Smav val &= ~AHCI_P_CMD_SUD; 2770220657Smav ATA_OUTL(ch->r_mem, AHCI_P_CMD, val); 2771220657Smav ch->listening = 1; 2772220657Smav } else if (ch->pm_level > 0) 2773203426Smav ATA_OUTL(ch->r_mem, AHCI_P_SCTL, ATA_SC_DET_DISABLE); 2774203426Smav return (0); 2775203426Smav } 2776203426Smav return (1); 2777195534Sscottl} 2778195534Sscottl 2779207430Smavstatic int 2780207430Smavahci_check_ids(device_t dev, union ccb *ccb) 2781207430Smav{ 2782207430Smav struct ahci_channel *ch = device_get_softc(dev); 2783207430Smav 2784207430Smav if (ccb->ccb_h.target_id > ((ch->caps & AHCI_CAP_SPM) ? 15 : 0)) { 2785207430Smav ccb->ccb_h.status = CAM_TID_INVALID; 2786207430Smav xpt_done(ccb); 2787207430Smav return (-1); 2788207430Smav } 2789207430Smav if (ccb->ccb_h.target_lun != 0) { 2790207430Smav ccb->ccb_h.status = CAM_LUN_INVALID; 2791207430Smav xpt_done(ccb); 2792207430Smav return (-1); 2793207430Smav } 2794207430Smav return (0); 2795207430Smav} 2796207430Smav 2797195534Sscottlstatic void 2798195534Sscottlahciaction(struct cam_sim *sim, union ccb *ccb) 2799195534Sscottl{ 2800210471Smav device_t dev, parent; 2801195534Sscottl struct ahci_channel *ch; 2802195534Sscottl 2803195534Sscottl CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("ahciaction func_code=%x\n", 2804195534Sscottl ccb->ccb_h.func_code)); 2805195534Sscottl 2806195534Sscottl ch = (struct ahci_channel *)cam_sim_softc(sim); 2807195534Sscottl dev = ch->dev; 2808195534Sscottl switch (ccb->ccb_h.func_code) { 2809195534Sscottl /* Common cases first */ 2810195534Sscottl case XPT_ATA_IO: /* Execute the requested I/O operation */ 2811195534Sscottl case XPT_SCSI_IO: 2812207430Smav if (ahci_check_ids(dev, ccb)) 2813207430Smav return; 2814207430Smav if (ch->devices == 0 || 2815207430Smav (ch->pm_present == 0 && 2816207430Smav ccb->ccb_h.target_id > 0 && ccb->ccb_h.target_id < 15)) { 2817195534Sscottl ccb->ccb_h.status = CAM_SEL_TIMEOUT; 2818195534Sscottl break; 2819195534Sscottl } 2820220565Smav ccb->ccb_h.recovery_type = RECOVERY_NONE; 2821195534Sscottl /* Check for command collision. */ 2822195534Sscottl if (ahci_check_collision(dev, ccb)) { 2823195534Sscottl /* Freeze command. */ 2824195534Sscottl ch->frozen = ccb; 2825195534Sscottl /* We have only one frozen slot, so freeze simq also. */ 2826195534Sscottl xpt_freeze_simq(ch->sim, 1); 2827195534Sscottl return; 2828195534Sscottl } 2829195534Sscottl ahci_begin_transaction(dev, ccb); 2830207430Smav return; 2831195534Sscottl case XPT_EN_LUN: /* Enable LUN as a target */ 2832195534Sscottl case XPT_TARGET_IO: /* Execute target I/O request */ 2833195534Sscottl case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */ 2834195534Sscottl case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/ 2835195534Sscottl case XPT_ABORT: /* Abort the specified CCB */ 2836195534Sscottl /* XXX Implement */ 2837195534Sscottl ccb->ccb_h.status = CAM_REQ_INVALID; 2838195534Sscottl break; 2839195534Sscottl case XPT_SET_TRAN_SETTINGS: 2840195534Sscottl { 2841195534Sscottl struct ccb_trans_settings *cts = &ccb->cts; 2842199747Smav struct ahci_device *d; 2843195534Sscottl 2844207430Smav if (ahci_check_ids(dev, ccb)) 2845207430Smav return; 2846199747Smav if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 2847199747Smav d = &ch->curr[ccb->ccb_h.target_id]; 2848199747Smav else 2849199747Smav d = &ch->user[ccb->ccb_h.target_id]; 2850199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_REVISION) 2851199747Smav d->revision = cts->xport_specific.sata.revision; 2852199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_MODE) 2853199747Smav d->mode = cts->xport_specific.sata.mode; 2854199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_BYTECOUNT) 2855199747Smav d->bytecount = min(8192, cts->xport_specific.sata.bytecount); 2856199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_TAGS) 2857199747Smav d->tags = min(ch->numslots, cts->xport_specific.sata.tags); 2858199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_PM) 2859195534Sscottl ch->pm_present = cts->xport_specific.sata.pm_present; 2860203376Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_ATAPI) 2861203376Smav d->atapi = cts->xport_specific.sata.atapi; 2862207499Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_CAPS) 2863207499Smav d->caps = cts->xport_specific.sata.caps; 2864195534Sscottl ccb->ccb_h.status = CAM_REQ_CMP; 2865195534Sscottl break; 2866195534Sscottl } 2867195534Sscottl case XPT_GET_TRAN_SETTINGS: 2868195534Sscottl /* Get default/user set transfer settings for the target */ 2869195534Sscottl { 2870195534Sscottl struct ccb_trans_settings *cts = &ccb->cts; 2871199747Smav struct ahci_device *d; 2872195534Sscottl uint32_t status; 2873195534Sscottl 2874207430Smav if (ahci_check_ids(dev, ccb)) 2875207430Smav return; 2876199747Smav if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 2877199747Smav d = &ch->curr[ccb->ccb_h.target_id]; 2878199747Smav else 2879199747Smav d = &ch->user[ccb->ccb_h.target_id]; 2880195534Sscottl cts->protocol = PROTO_ATA; 2881196656Smav cts->protocol_version = PROTO_VERSION_UNSPECIFIED; 2882195534Sscottl cts->transport = XPORT_SATA; 2883196656Smav cts->transport_version = XPORT_VERSION_UNSPECIFIED; 2884195534Sscottl cts->proto_specific.valid = 0; 2885195534Sscottl cts->xport_specific.sata.valid = 0; 2886199747Smav if (cts->type == CTS_TYPE_CURRENT_SETTINGS && 2887199747Smav (ccb->ccb_h.target_id == 15 || 2888199747Smav (ccb->ccb_h.target_id == 0 && !ch->pm_present))) { 2889195534Sscottl status = ATA_INL(ch->r_mem, AHCI_P_SSTS) & ATA_SS_SPD_MASK; 2890199747Smav if (status & 0x0f0) { 2891199747Smav cts->xport_specific.sata.revision = 2892199747Smav (status & 0x0f0) >> 4; 2893199747Smav cts->xport_specific.sata.valid |= 2894199747Smav CTS_SATA_VALID_REVISION; 2895199747Smav } 2896207499Smav cts->xport_specific.sata.caps = d->caps & CTS_SATA_CAPS_D; 2897207499Smav if (ch->pm_level) { 2898207499Smav if (ch->caps & (AHCI_CAP_PSC | AHCI_CAP_SSC)) 2899207499Smav cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_PMREQ; 2900207499Smav if (ch->caps2 & AHCI_CAP2_APST) 2901207499Smav cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_APST; 2902207499Smav } 2903207499Smav if ((ch->caps & AHCI_CAP_SNCQ) && 2904207499Smav (ch->quirks & AHCI_Q_NOAA) == 0) 2905207499Smav cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_DMAAA; 2906220602Smav cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_AN; 2907207499Smav cts->xport_specific.sata.caps &= 2908207499Smav ch->user[ccb->ccb_h.target_id].caps; 2909207499Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS; 2910195534Sscottl } else { 2911199747Smav cts->xport_specific.sata.revision = d->revision; 2912199747Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_REVISION; 2913207499Smav cts->xport_specific.sata.caps = d->caps; 2914207499Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS; 2915195534Sscottl } 2916199747Smav cts->xport_specific.sata.mode = d->mode; 2917199747Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_MODE; 2918199747Smav cts->xport_specific.sata.bytecount = d->bytecount; 2919199747Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_BYTECOUNT; 2920199747Smav cts->xport_specific.sata.pm_present = ch->pm_present; 2921195534Sscottl cts->xport_specific.sata.valid |= CTS_SATA_VALID_PM; 2922199747Smav cts->xport_specific.sata.tags = d->tags; 2923199747Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_TAGS; 2924203376Smav cts->xport_specific.sata.atapi = d->atapi; 2925203376Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_ATAPI; 2926195534Sscottl ccb->ccb_h.status = CAM_REQ_CMP; 2927195534Sscottl break; 2928195534Sscottl } 2929195534Sscottl case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 2930195534Sscottl case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 2931195534Sscottl ahci_reset(dev); 2932195534Sscottl ccb->ccb_h.status = CAM_REQ_CMP; 2933195534Sscottl break; 2934195534Sscottl case XPT_TERM_IO: /* Terminate the I/O process */ 2935195534Sscottl /* XXX Implement */ 2936195534Sscottl ccb->ccb_h.status = CAM_REQ_INVALID; 2937195534Sscottl break; 2938195534Sscottl case XPT_PATH_INQ: /* Path routing inquiry */ 2939195534Sscottl { 2940195534Sscottl struct ccb_pathinq *cpi = &ccb->cpi; 2941195534Sscottl 2942210471Smav parent = device_get_parent(dev); 2943195534Sscottl cpi->version_num = 1; /* XXX??? */ 2944199278Smav cpi->hba_inquiry = PI_SDTR_ABLE; 2945199278Smav if (ch->caps & AHCI_CAP_SNCQ) 2946199278Smav cpi->hba_inquiry |= PI_TAG_ABLE; 2947195534Sscottl if (ch->caps & AHCI_CAP_SPM) 2948195534Sscottl cpi->hba_inquiry |= PI_SATAPM; 2949195534Sscottl cpi->target_sprt = 0; 2950195534Sscottl cpi->hba_misc = PIM_SEQSCAN; 2951195534Sscottl cpi->hba_eng_cnt = 0; 2952195534Sscottl if (ch->caps & AHCI_CAP_SPM) 2953198322Smav cpi->max_target = 15; 2954195534Sscottl else 2955195534Sscottl cpi->max_target = 0; 2956195534Sscottl cpi->max_lun = 0; 2957195534Sscottl cpi->initiator_id = 0; 2958195534Sscottl cpi->bus_id = cam_sim_bus(sim); 2959195534Sscottl cpi->base_transfer_speed = 150000; 2960195534Sscottl strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 2961195534Sscottl strncpy(cpi->hba_vid, "AHCI", HBA_IDLEN); 2962195534Sscottl strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 2963195534Sscottl cpi->unit_number = cam_sim_unit(sim); 2964195534Sscottl cpi->transport = XPORT_SATA; 2965196656Smav cpi->transport_version = XPORT_VERSION_UNSPECIFIED; 2966195534Sscottl cpi->protocol = PROTO_ATA; 2967196656Smav cpi->protocol_version = PROTO_VERSION_UNSPECIFIED; 2968195534Sscottl cpi->maxio = MAXPHYS; 2969196777Smav /* ATI SB600 can't handle 256 sectors with FPDMA (NCQ). */ 2970210471Smav if (pci_get_devid(parent) == 0x43801002) 2971196796Smav cpi->maxio = min(cpi->maxio, 128 * 512); 2972210471Smav cpi->hba_vendor = pci_get_vendor(parent); 2973210471Smav cpi->hba_device = pci_get_device(parent); 2974210471Smav cpi->hba_subvendor = pci_get_subvendor(parent); 2975210471Smav cpi->hba_subdevice = pci_get_subdevice(parent); 2976195534Sscottl cpi->ccb_h.status = CAM_REQ_CMP; 2977195534Sscottl break; 2978195534Sscottl } 2979195534Sscottl default: 2980195534Sscottl ccb->ccb_h.status = CAM_REQ_INVALID; 2981195534Sscottl break; 2982195534Sscottl } 2983207430Smav xpt_done(ccb); 2984195534Sscottl} 2985195534Sscottl 2986195534Sscottlstatic void 2987195534Sscottlahcipoll(struct cam_sim *sim) 2988195534Sscottl{ 2989195534Sscottl struct ahci_channel *ch = (struct ahci_channel *)cam_sim_softc(sim); 2990195534Sscottl 2991195534Sscottl ahci_ch_intr(ch->dev); 2992220789Smav if (ch->resetting != 0 && 2993220789Smav (--ch->resetpolldiv <= 0 || !callout_pending(&ch->reset_timer))) { 2994220789Smav ch->resetpolldiv = 1000; 2995220789Smav ahci_reset_to(ch->dev); 2996220789Smav } 2997195534Sscottl} 2998