ahci_pci.c revision 222304
1195534Sscottl/*- 2195534Sscottl * Copyright (c) 2009 Alexander Motin <mav@FreeBSD.org> 3195534Sscottl * All rights reserved. 4195534Sscottl * 5195534Sscottl * Redistribution and use in source and binary forms, with or without 6195534Sscottl * modification, are permitted provided that the following conditions 7195534Sscottl * are met: 8195534Sscottl * 1. Redistributions of source code must retain the above copyright 9195534Sscottl * notice, this list of conditions and the following disclaimer, 10195534Sscottl * without modification, immediately at the beginning of the file. 11195534Sscottl * 2. Redistributions in binary form must reproduce the above copyright 12195534Sscottl * notice, this list of conditions and the following disclaimer in the 13195534Sscottl * documentation and/or other materials provided with the distribution. 14195534Sscottl * 15195534Sscottl * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16195534Sscottl * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17195534Sscottl * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18195534Sscottl * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19195534Sscottl * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20195534Sscottl * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21195534Sscottl * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22195534Sscottl * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23195534Sscottl * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24195534Sscottl * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25195534Sscottl */ 26195534Sscottl 27195534Sscottl#include <sys/cdefs.h> 28195534Sscottl__FBSDID("$FreeBSD: head/sys/dev/ahci/ahci.c 222304 2011-05-26 09:23:01Z mav $"); 29195534Sscottl 30195534Sscottl#include <sys/param.h> 31195534Sscottl#include <sys/module.h> 32195534Sscottl#include <sys/systm.h> 33195534Sscottl#include <sys/kernel.h> 34195534Sscottl#include <sys/ata.h> 35195534Sscottl#include <sys/bus.h> 36220576Smav#include <sys/conf.h> 37195534Sscottl#include <sys/endian.h> 38195534Sscottl#include <sys/malloc.h> 39195534Sscottl#include <sys/lock.h> 40195534Sscottl#include <sys/mutex.h> 41195534Sscottl#include <sys/sema.h> 42195534Sscottl#include <sys/taskqueue.h> 43195534Sscottl#include <vm/uma.h> 44195534Sscottl#include <machine/stdarg.h> 45195534Sscottl#include <machine/resource.h> 46195534Sscottl#include <machine/bus.h> 47195534Sscottl#include <sys/rman.h> 48222039Smav#include <dev/led/led.h> 49195534Sscottl#include <dev/pci/pcivar.h> 50195534Sscottl#include <dev/pci/pcireg.h> 51195534Sscottl#include "ahci.h" 52195534Sscottl 53195534Sscottl#include <cam/cam.h> 54195534Sscottl#include <cam/cam_ccb.h> 55195534Sscottl#include <cam/cam_sim.h> 56195534Sscottl#include <cam/cam_xpt_sim.h> 57195534Sscottl#include <cam/cam_debug.h> 58195534Sscottl 59195534Sscottl/* local prototypes */ 60195534Sscottlstatic int ahci_setup_interrupt(device_t dev); 61195534Sscottlstatic void ahci_intr(void *data); 62195534Sscottlstatic void ahci_intr_one(void *data); 63195534Sscottlstatic int ahci_suspend(device_t dev); 64195534Sscottlstatic int ahci_resume(device_t dev); 65208375Smavstatic int ahci_ch_init(device_t dev); 66208375Smavstatic int ahci_ch_deinit(device_t dev); 67195534Sscottlstatic int ahci_ch_suspend(device_t dev); 68195534Sscottlstatic int ahci_ch_resume(device_t dev); 69196656Smavstatic void ahci_ch_pm(void *arg); 70195534Sscottlstatic void ahci_ch_intr_locked(void *data); 71195534Sscottlstatic void ahci_ch_intr(void *data); 72222039Smavstatic void ahci_ch_led(void *priv, int onoff); 73195534Sscottlstatic int ahci_ctlr_reset(device_t dev); 74205422Smavstatic int ahci_ctlr_setup(device_t dev); 75195534Sscottlstatic void ahci_begin_transaction(device_t dev, union ccb *ccb); 76195534Sscottlstatic void ahci_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error); 77195534Sscottlstatic void ahci_execute_transaction(struct ahci_slot *slot); 78195534Sscottlstatic void ahci_timeout(struct ahci_slot *slot); 79195534Sscottlstatic void ahci_end_transaction(struct ahci_slot *slot, enum ahci_err_type et); 80199821Smavstatic int ahci_setup_fis(device_t dev, struct ahci_cmd_tab *ctp, union ccb *ccb, int tag); 81195534Sscottlstatic void ahci_dmainit(device_t dev); 82195534Sscottlstatic void ahci_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error); 83195534Sscottlstatic void ahci_dmafini(device_t dev); 84195534Sscottlstatic void ahci_slotsalloc(device_t dev); 85195534Sscottlstatic void ahci_slotsfree(device_t dev); 86195534Sscottlstatic void ahci_reset(device_t dev); 87203123Smavstatic void ahci_start(device_t dev, int fbs); 88195534Sscottlstatic void ahci_stop(device_t dev); 89195534Sscottlstatic void ahci_clo(device_t dev); 90195534Sscottlstatic void ahci_start_fr(device_t dev); 91195534Sscottlstatic void ahci_stop_fr(device_t dev); 92195534Sscottl 93195534Sscottlstatic int ahci_sata_connect(struct ahci_channel *ch); 94203108Smavstatic int ahci_sata_phy_reset(device_t dev); 95220576Smavstatic int ahci_wait_ready(device_t dev, int t, int t0); 96195534Sscottl 97220565Smavstatic void ahci_issue_recovery(device_t dev); 98195534Sscottlstatic void ahci_process_read_log(device_t dev, union ccb *ccb); 99220565Smavstatic void ahci_process_request_sense(device_t dev, union ccb *ccb); 100195534Sscottl 101195534Sscottlstatic void ahciaction(struct cam_sim *sim, union ccb *ccb); 102195534Sscottlstatic void ahcipoll(struct cam_sim *sim); 103195534Sscottl 104195534SscottlMALLOC_DEFINE(M_AHCI, "AHCI driver", "AHCI driver data buffers"); 105195534Sscottl 106199176Smavstatic struct { 107199176Smav uint32_t id; 108203030Smav uint8_t rev; 109199176Smav const char *name; 110199322Smav int quirks; 111199322Smav#define AHCI_Q_NOFORCE 1 112199322Smav#define AHCI_Q_NOPMP 2 113199322Smav#define AHCI_Q_NONCQ 4 114199322Smav#define AHCI_Q_1CH 8 115199322Smav#define AHCI_Q_2CH 16 116199322Smav#define AHCI_Q_4CH 32 117199322Smav#define AHCI_Q_EDGEIS 64 118203030Smav#define AHCI_Q_SATA2 128 119203123Smav#define AHCI_Q_NOBSYRES 256 120207499Smav#define AHCI_Q_NOAA 512 121218596Smav#define AHCI_Q_NOCOUNT 1024 122222304Smav#define AHCI_Q_ALTSIG 2048 123199176Smav} ahci_ids[] = { 124203030Smav {0x43801002, 0x00, "ATI IXP600", 0}, 125203030Smav {0x43901002, 0x00, "ATI IXP700", 0}, 126203030Smav {0x43911002, 0x00, "ATI IXP700", 0}, 127203030Smav {0x43921002, 0x00, "ATI IXP700", 0}, 128203030Smav {0x43931002, 0x00, "ATI IXP700", 0}, 129203030Smav {0x43941002, 0x00, "ATI IXP800", 0}, 130203030Smav {0x43951002, 0x00, "ATI IXP800", 0}, 131203030Smav {0x26528086, 0x00, "Intel ICH6", AHCI_Q_NOFORCE}, 132203030Smav {0x26538086, 0x00, "Intel ICH6M", AHCI_Q_NOFORCE}, 133203030Smav {0x26818086, 0x00, "Intel ESB2", 0}, 134203030Smav {0x26828086, 0x00, "Intel ESB2", 0}, 135203030Smav {0x26838086, 0x00, "Intel ESB2", 0}, 136203030Smav {0x27c18086, 0x00, "Intel ICH7", 0}, 137203030Smav {0x27c38086, 0x00, "Intel ICH7", 0}, 138203030Smav {0x27c58086, 0x00, "Intel ICH7M", 0}, 139203030Smav {0x27c68086, 0x00, "Intel ICH7M", 0}, 140203030Smav {0x28218086, 0x00, "Intel ICH8", 0}, 141203030Smav {0x28228086, 0x00, "Intel ICH8", 0}, 142203030Smav {0x28248086, 0x00, "Intel ICH8", 0}, 143203030Smav {0x28298086, 0x00, "Intel ICH8M", 0}, 144203030Smav {0x282a8086, 0x00, "Intel ICH8M", 0}, 145203030Smav {0x29228086, 0x00, "Intel ICH9", 0}, 146203030Smav {0x29238086, 0x00, "Intel ICH9", 0}, 147203030Smav {0x29248086, 0x00, "Intel ICH9", 0}, 148203030Smav {0x29258086, 0x00, "Intel ICH9", 0}, 149203030Smav {0x29278086, 0x00, "Intel ICH9", 0}, 150203030Smav {0x29298086, 0x00, "Intel ICH9M", 0}, 151203030Smav {0x292a8086, 0x00, "Intel ICH9M", 0}, 152203030Smav {0x292b8086, 0x00, "Intel ICH9M", 0}, 153203030Smav {0x292c8086, 0x00, "Intel ICH9M", 0}, 154203030Smav {0x292f8086, 0x00, "Intel ICH9M", 0}, 155203030Smav {0x294d8086, 0x00, "Intel ICH9", 0}, 156203030Smav {0x294e8086, 0x00, "Intel ICH9M", 0}, 157203030Smav {0x3a058086, 0x00, "Intel ICH10", 0}, 158203030Smav {0x3a228086, 0x00, "Intel ICH10", 0}, 159203030Smav {0x3a258086, 0x00, "Intel ICH10", 0}, 160211922Smav {0x3b228086, 0x00, "Intel 5 Series/3400 Series", 0}, 161211922Smav {0x3b238086, 0x00, "Intel 5 Series/3400 Series", 0}, 162211922Smav {0x3b258086, 0x00, "Intel 5 Series/3400 Series", 0}, 163211922Smav {0x3b298086, 0x00, "Intel 5 Series/3400 Series", 0}, 164211922Smav {0x3b2c8086, 0x00, "Intel 5 Series/3400 Series", 0}, 165211922Smav {0x3b2f8086, 0x00, "Intel 5 Series/3400 Series", 0}, 166211922Smav {0x1c028086, 0x00, "Intel Cougar Point", 0}, 167211922Smav {0x1c038086, 0x00, "Intel Cougar Point", 0}, 168211922Smav {0x1c048086, 0x00, "Intel Cougar Point", 0}, 169211922Smav {0x1c058086, 0x00, "Intel Cougar Point", 0}, 170218605Smav {0x1d028086, 0x00, "Intel Patsburg", 0}, 171218605Smav {0x1d048086, 0x00, "Intel Patsburg", 0}, 172218605Smav {0x1d068086, 0x00, "Intel Patsburg", 0}, 173221789Sjfv {0x1e028086, 0x00, "Intel Panther Point", 0}, 174221789Sjfv {0x1e038086, 0x00, "Intel Panther Point", 0}, 175221789Sjfv {0x1e048086, 0x00, "Intel Panther Point", 0}, 176221789Sjfv {0x1e058086, 0x00, "Intel Panther Point", 0}, 177221789Sjfv {0x1e068086, 0x00, "Intel Panther Point", 0}, 178221789Sjfv {0x1e078086, 0x00, "Intel Panther Point", 0}, 179221789Sjfv {0x1e0e8086, 0x00, "Intel Panther Point", 0}, 180221789Sjfv {0x1e0f8086, 0x00, "Intel Panther Point", 0}, 181221789Sjfv {0x23238086, 0x00, "Intel DH89xxCC", 0}, 182203030Smav {0x2361197b, 0x00, "JMicron JMB361", AHCI_Q_NOFORCE}, 183203030Smav {0x2363197b, 0x00, "JMicron JMB363", AHCI_Q_NOFORCE}, 184203030Smav {0x2365197b, 0x00, "JMicron JMB365", AHCI_Q_NOFORCE}, 185203030Smav {0x2366197b, 0x00, "JMicron JMB366", AHCI_Q_NOFORCE}, 186203030Smav {0x2368197b, 0x00, "JMicron JMB368", AHCI_Q_NOFORCE}, 187218596Smav {0x611111ab, 0x00, "Marvell 88SX6111", AHCI_Q_NOFORCE | AHCI_Q_1CH | 188218596Smav AHCI_Q_EDGEIS}, 189218596Smav {0x612111ab, 0x00, "Marvell 88SX6121", AHCI_Q_NOFORCE | AHCI_Q_2CH | 190218596Smav AHCI_Q_EDGEIS | AHCI_Q_NONCQ | AHCI_Q_NOCOUNT}, 191218596Smav {0x614111ab, 0x00, "Marvell 88SX6141", AHCI_Q_NOFORCE | AHCI_Q_4CH | 192218596Smav AHCI_Q_EDGEIS | AHCI_Q_NONCQ | AHCI_Q_NOCOUNT}, 193218596Smav {0x614511ab, 0x00, "Marvell 88SX6145", AHCI_Q_NOFORCE | AHCI_Q_4CH | 194218596Smav AHCI_Q_EDGEIS | AHCI_Q_NONCQ | AHCI_Q_NOCOUNT}, 195220413Smav {0x91201b4b, 0x00, "Marvell 88SE912x", AHCI_Q_EDGEIS|AHCI_Q_NOBSYRES}, 196222304Smav {0x91231b4b, 0x11, "Marvell 88SE912x", AHCI_Q_NOBSYRES|AHCI_Q_ALTSIG}, 197203123Smav {0x91231b4b, 0x00, "Marvell 88SE912x", AHCI_Q_EDGEIS|AHCI_Q_SATA2|AHCI_Q_NOBSYRES}, 198221504Smav {0x91821b4b, 0x00, "Marvell 88SE9182", AHCI_Q_NOBSYRES}, 199216309Smav {0x06201103, 0x00, "HighPoint RocketRAID 620", AHCI_Q_NOBSYRES}, 200216309Smav {0x06201b4b, 0x00, "HighPoint RocketRAID 620", AHCI_Q_NOBSYRES}, 201216309Smav {0x06221103, 0x00, "HighPoint RocketRAID 622", AHCI_Q_NOBSYRES}, 202216309Smav {0x06221b4b, 0x00, "HighPoint RocketRAID 622", AHCI_Q_NOBSYRES}, 203217245Smav {0x06401103, 0x00, "HighPoint RocketRAID 640", AHCI_Q_NOBSYRES}, 204219341Smav {0x06401b4b, 0x00, "HighPoint RocketRAID 640", AHCI_Q_NOBSYRES}, 205217245Smav {0x06441103, 0x00, "HighPoint RocketRAID 644", AHCI_Q_NOBSYRES}, 206219341Smav {0x06441b4b, 0x00, "HighPoint RocketRAID 644", AHCI_Q_NOBSYRES}, 207207499Smav {0x044c10de, 0x00, "NVIDIA MCP65", AHCI_Q_NOAA}, 208207499Smav {0x044d10de, 0x00, "NVIDIA MCP65", AHCI_Q_NOAA}, 209207499Smav {0x044e10de, 0x00, "NVIDIA MCP65", AHCI_Q_NOAA}, 210207499Smav {0x044f10de, 0x00, "NVIDIA MCP65", AHCI_Q_NOAA}, 211207499Smav {0x045c10de, 0x00, "NVIDIA MCP65", AHCI_Q_NOAA}, 212207499Smav {0x045d10de, 0x00, "NVIDIA MCP65", AHCI_Q_NOAA}, 213207499Smav {0x045e10de, 0x00, "NVIDIA MCP65", AHCI_Q_NOAA}, 214207499Smav {0x045f10de, 0x00, "NVIDIA MCP65", AHCI_Q_NOAA}, 215207499Smav {0x055010de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 216207499Smav {0x055110de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 217207499Smav {0x055210de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 218207499Smav {0x055310de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 219207499Smav {0x055410de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 220207499Smav {0x055510de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 221207499Smav {0x055610de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 222207499Smav {0x055710de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 223207499Smav {0x055810de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 224207499Smav {0x055910de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 225207499Smav {0x055A10de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 226207499Smav {0x055B10de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 227207499Smav {0x058410de, 0x00, "NVIDIA MCP67", AHCI_Q_NOAA}, 228207499Smav {0x07f010de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 229207499Smav {0x07f110de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 230207499Smav {0x07f210de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 231207499Smav {0x07f310de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 232207499Smav {0x07f410de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 233207499Smav {0x07f510de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 234207499Smav {0x07f610de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 235207499Smav {0x07f710de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 236207499Smav {0x07f810de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 237207499Smav {0x07f910de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 238207499Smav {0x07fa10de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 239207499Smav {0x07fb10de, 0x00, "NVIDIA MCP73", AHCI_Q_NOAA}, 240207499Smav {0x0ad010de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 241207499Smav {0x0ad110de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 242207499Smav {0x0ad210de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 243207499Smav {0x0ad310de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 244207499Smav {0x0ad410de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 245207499Smav {0x0ad510de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 246207499Smav {0x0ad610de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 247207499Smav {0x0ad710de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 248207499Smav {0x0ad810de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 249207499Smav {0x0ad910de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 250207499Smav {0x0ada10de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 251207499Smav {0x0adb10de, 0x00, "NVIDIA MCP77", AHCI_Q_NOAA}, 252207499Smav {0x0ab410de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 253207499Smav {0x0ab510de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 254207499Smav {0x0ab610de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 255207499Smav {0x0ab710de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 256207499Smav {0x0ab810de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 257207499Smav {0x0ab910de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 258207499Smav {0x0aba10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 259207499Smav {0x0abb10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 260207499Smav {0x0abc10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 261207499Smav {0x0abd10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 262207499Smav {0x0abe10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 263207499Smav {0x0abf10de, 0x00, "NVIDIA MCP79", AHCI_Q_NOAA}, 264207499Smav {0x0d8410de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 265207499Smav {0x0d8510de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 266207499Smav {0x0d8610de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 267207499Smav {0x0d8710de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 268207499Smav {0x0d8810de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 269207499Smav {0x0d8910de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 270207499Smav {0x0d8a10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 271207499Smav {0x0d8b10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 272207499Smav {0x0d8c10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 273207499Smav {0x0d8d10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 274207499Smav {0x0d8e10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 275207499Smav {0x0d8f10de, 0x00, "NVIDIA MCP89", AHCI_Q_NOAA}, 276208907Smav {0x33491106, 0x00, "VIA VT8251", AHCI_Q_NOPMP|AHCI_Q_NONCQ}, 277208907Smav {0x62871106, 0x00, "VIA VT8251", AHCI_Q_NOPMP|AHCI_Q_NONCQ}, 278203030Smav {0x11841039, 0x00, "SiS 966", 0}, 279203030Smav {0x11851039, 0x00, "SiS 968", 0}, 280203030Smav {0x01861039, 0x00, "SiS 968", 0}, 281203030Smav {0x00000000, 0x00, NULL, 0} 282199176Smav}; 283199176Smav 284220565Smav#define recovery_type spriv_field0 285220565Smav#define RECOVERY_NONE 0 286220565Smav#define RECOVERY_READ_LOG 1 287220565Smav#define RECOVERY_REQUEST_SENSE 2 288220565Smav#define recovery_slot spriv_field1 289220565Smav 290195534Sscottlstatic int 291195534Sscottlahci_probe(device_t dev) 292195534Sscottl{ 293199176Smav char buf[64]; 294199322Smav int i, valid = 0; 295199322Smav uint32_t devid = pci_get_devid(dev); 296203030Smav uint8_t revid = pci_get_revid(dev); 297199322Smav 298199322Smav /* Is this a possible AHCI candidate? */ 299199322Smav if (pci_get_class(dev) == PCIC_STORAGE && 300199322Smav pci_get_subclass(dev) == PCIS_STORAGE_SATA && 301199322Smav pci_get_progif(dev) == PCIP_STORAGE_SATA_AHCI_1_0) 302199322Smav valid = 1; 303199322Smav /* Is this a known AHCI chip? */ 304199322Smav for (i = 0; ahci_ids[i].id != 0; i++) { 305199322Smav if (ahci_ids[i].id == devid && 306203030Smav ahci_ids[i].rev <= revid && 307199322Smav (valid || !(ahci_ids[i].quirks & AHCI_Q_NOFORCE))) { 308199717Smav /* Do not attach JMicrons with single PCI function. */ 309199717Smav if (pci_get_vendor(dev) == 0x197b && 310199717Smav (pci_read_config(dev, 0xdf, 1) & 0x40) == 0) 311199717Smav return (ENXIO); 312199322Smav snprintf(buf, sizeof(buf), "%s AHCI SATA controller", 313199322Smav ahci_ids[i].name); 314199322Smav device_set_desc_copy(dev, buf); 315199322Smav return (BUS_PROBE_VENDOR); 316199322Smav } 317199322Smav } 318199322Smav if (!valid) 319199322Smav return (ENXIO); 320199322Smav device_set_desc_copy(dev, "AHCI SATA controller"); 321199322Smav return (BUS_PROBE_VENDOR); 322199322Smav} 323199322Smav 324199322Smavstatic int 325199322Smavahci_ata_probe(device_t dev) 326199322Smav{ 327199322Smav char buf[64]; 328199176Smav int i; 329199176Smav uint32_t devid = pci_get_devid(dev); 330203030Smav uint8_t revid = pci_get_revid(dev); 331195534Sscottl 332199322Smav if ((intptr_t)device_get_ivars(dev) >= 0) 333199322Smav return (ENXIO); 334199176Smav /* Is this a known AHCI chip? */ 335199176Smav for (i = 0; ahci_ids[i].id != 0; i++) { 336203030Smav if (ahci_ids[i].id == devid && 337203030Smav ahci_ids[i].rev <= revid) { 338199176Smav snprintf(buf, sizeof(buf), "%s AHCI SATA controller", 339199176Smav ahci_ids[i].name); 340199176Smav device_set_desc_copy(dev, buf); 341199176Smav return (BUS_PROBE_VENDOR); 342199176Smav } 343199176Smav } 344199176Smav device_set_desc_copy(dev, "AHCI SATA controller"); 345195534Sscottl return (BUS_PROBE_VENDOR); 346195534Sscottl} 347195534Sscottl 348195534Sscottlstatic int 349195534Sscottlahci_attach(device_t dev) 350195534Sscottl{ 351195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 352195534Sscottl device_t child; 353199322Smav int error, unit, speed, i; 354199322Smav uint32_t devid = pci_get_devid(dev); 355203030Smav uint8_t revid = pci_get_revid(dev); 356196656Smav u_int32_t version; 357195534Sscottl 358195534Sscottl ctlr->dev = dev; 359199322Smav i = 0; 360203030Smav while (ahci_ids[i].id != 0 && 361203030Smav (ahci_ids[i].id != devid || 362203030Smav ahci_ids[i].rev > revid)) 363199322Smav i++; 364199322Smav ctlr->quirks = ahci_ids[i].quirks; 365196656Smav resource_int_value(device_get_name(dev), 366196656Smav device_get_unit(dev), "ccc", &ctlr->ccc); 367195534Sscottl /* if we have a memory BAR(5) we are likely on an AHCI part */ 368195534Sscottl ctlr->r_rid = PCIR_BAR(5); 369195534Sscottl if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 370195534Sscottl &ctlr->r_rid, RF_ACTIVE))) 371195534Sscottl return ENXIO; 372195534Sscottl /* Setup our own memory management for channels. */ 373208414Smav ctlr->sc_iomem.rm_start = rman_get_start(ctlr->r_mem); 374208414Smav ctlr->sc_iomem.rm_end = rman_get_end(ctlr->r_mem); 375195534Sscottl ctlr->sc_iomem.rm_type = RMAN_ARRAY; 376195534Sscottl ctlr->sc_iomem.rm_descr = "I/O memory addresses"; 377195534Sscottl if ((error = rman_init(&ctlr->sc_iomem)) != 0) { 378195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 379195534Sscottl return (error); 380195534Sscottl } 381195534Sscottl if ((error = rman_manage_region(&ctlr->sc_iomem, 382195534Sscottl rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) { 383195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 384195534Sscottl rman_fini(&ctlr->sc_iomem); 385195534Sscottl return (error); 386195534Sscottl } 387207511Smav pci_enable_busmaster(dev); 388195534Sscottl /* Reset controller */ 389195534Sscottl if ((error = ahci_ctlr_reset(dev)) != 0) { 390195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 391195534Sscottl rman_fini(&ctlr->sc_iomem); 392195534Sscottl return (error); 393195534Sscottl }; 394199322Smav /* Get the HW capabilities */ 395199322Smav version = ATA_INL(ctlr->r_mem, AHCI_VS); 396199322Smav ctlr->caps = ATA_INL(ctlr->r_mem, AHCI_CAP); 397199322Smav if (version >= 0x00010020) 398199322Smav ctlr->caps2 = ATA_INL(ctlr->r_mem, AHCI_CAP2); 399203108Smav if (ctlr->caps & AHCI_CAP_EMS) 400203108Smav ctlr->capsem = ATA_INL(ctlr->r_mem, AHCI_EM_CTL); 401195534Sscottl ctlr->ichannels = ATA_INL(ctlr->r_mem, AHCI_PI); 402222304Smav 403222304Smav /* Identify and set separate quirks for HBA and RAID f/w Marvells. */ 404222304Smav if ((ctlr->quirks & AHCI_Q_NOBSYRES) && 405222304Smav (ctlr->quirks & AHCI_Q_ALTSIG) && 406222304Smav (ctlr->caps & AHCI_CAP_SPM) == 0) 407222304Smav ctlr->quirks &= ~AHCI_Q_NOBSYRES; 408222304Smav 409199322Smav if (ctlr->quirks & AHCI_Q_1CH) { 410199322Smav ctlr->caps &= ~AHCI_CAP_NPMASK; 411199322Smav ctlr->ichannels &= 0x01; 412199322Smav } 413199322Smav if (ctlr->quirks & AHCI_Q_2CH) { 414199322Smav ctlr->caps &= ~AHCI_CAP_NPMASK; 415199322Smav ctlr->caps |= 1; 416199322Smav ctlr->ichannels &= 0x03; 417199322Smav } 418199322Smav if (ctlr->quirks & AHCI_Q_4CH) { 419199322Smav ctlr->caps &= ~AHCI_CAP_NPMASK; 420199322Smav ctlr->caps |= 3; 421199322Smav ctlr->ichannels &= 0x0f; 422199322Smav } 423195534Sscottl ctlr->channels = MAX(flsl(ctlr->ichannels), 424199322Smav (ctlr->caps & AHCI_CAP_NPMASK) + 1); 425199322Smav if (ctlr->quirks & AHCI_Q_NOPMP) 426199322Smav ctlr->caps &= ~AHCI_CAP_SPM; 427199322Smav if (ctlr->quirks & AHCI_Q_NONCQ) 428199322Smav ctlr->caps &= ~AHCI_CAP_SNCQ; 429205422Smav if ((ctlr->caps & AHCI_CAP_CCCS) == 0) 430205422Smav ctlr->ccc = 0; 431222039Smav mtx_init(&ctlr->em_mtx, "AHCI EM lock", NULL, MTX_DEF); 432222039Smav ctlr->emloc = ATA_INL(ctlr->r_mem, AHCI_EM_LOC); 433205422Smav ahci_ctlr_setup(dev); 434195534Sscottl /* Setup interrupts. */ 435195534Sscottl if (ahci_setup_interrupt(dev)) { 436195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 437195534Sscottl rman_fini(&ctlr->sc_iomem); 438195534Sscottl return ENXIO; 439195534Sscottl } 440195534Sscottl /* Announce HW capabilities. */ 441196656Smav speed = (ctlr->caps & AHCI_CAP_ISS) >> AHCI_CAP_ISS_SHIFT; 442195534Sscottl device_printf(dev, 443203123Smav "AHCI v%x.%02x with %d %sGbps ports, Port Multiplier %s%s\n", 444195534Sscottl ((version >> 20) & 0xf0) + ((version >> 16) & 0x0f), 445195534Sscottl ((version >> 4) & 0xf0) + (version & 0x0f), 446196656Smav (ctlr->caps & AHCI_CAP_NPMASK) + 1, 447195534Sscottl ((speed == 1) ? "1.5":((speed == 2) ? "3": 448195534Sscottl ((speed == 3) ? "6":"?"))), 449196656Smav (ctlr->caps & AHCI_CAP_SPM) ? 450203123Smav "supported" : "not supported", 451203123Smav (ctlr->caps & AHCI_CAP_FBSS) ? 452203123Smav " with FBS" : ""); 453195534Sscottl if (bootverbose) { 454195534Sscottl device_printf(dev, "Caps:%s%s%s%s%s%s%s%s %sGbps", 455196656Smav (ctlr->caps & AHCI_CAP_64BIT) ? " 64bit":"", 456196656Smav (ctlr->caps & AHCI_CAP_SNCQ) ? " NCQ":"", 457196656Smav (ctlr->caps & AHCI_CAP_SSNTF) ? " SNTF":"", 458196656Smav (ctlr->caps & AHCI_CAP_SMPS) ? " MPS":"", 459196656Smav (ctlr->caps & AHCI_CAP_SSS) ? " SS":"", 460196656Smav (ctlr->caps & AHCI_CAP_SALP) ? " ALP":"", 461196656Smav (ctlr->caps & AHCI_CAP_SAL) ? " AL":"", 462196656Smav (ctlr->caps & AHCI_CAP_SCLO) ? " CLO":"", 463195534Sscottl ((speed == 1) ? "1.5":((speed == 2) ? "3": 464195534Sscottl ((speed == 3) ? "6":"?")))); 465195534Sscottl printf("%s%s%s%s%s%s %dcmd%s%s%s %dports\n", 466196656Smav (ctlr->caps & AHCI_CAP_SAM) ? " AM":"", 467196656Smav (ctlr->caps & AHCI_CAP_SPM) ? " PM":"", 468196656Smav (ctlr->caps & AHCI_CAP_FBSS) ? " FBS":"", 469196656Smav (ctlr->caps & AHCI_CAP_PMD) ? " PMD":"", 470196656Smav (ctlr->caps & AHCI_CAP_SSC) ? " SSC":"", 471196656Smav (ctlr->caps & AHCI_CAP_PSC) ? " PSC":"", 472196656Smav ((ctlr->caps & AHCI_CAP_NCS) >> AHCI_CAP_NCS_SHIFT) + 1, 473196656Smav (ctlr->caps & AHCI_CAP_CCCS) ? " CCC":"", 474196656Smav (ctlr->caps & AHCI_CAP_EMS) ? " EM":"", 475196656Smav (ctlr->caps & AHCI_CAP_SXS) ? " eSATA":"", 476196656Smav (ctlr->caps & AHCI_CAP_NPMASK) + 1); 477195534Sscottl } 478196656Smav if (bootverbose && version >= 0x00010020) { 479196656Smav device_printf(dev, "Caps2:%s%s%s\n", 480196656Smav (ctlr->caps2 & AHCI_CAP2_APST) ? " APST":"", 481196656Smav (ctlr->caps2 & AHCI_CAP2_NVMP) ? " NVMP":"", 482196656Smav (ctlr->caps2 & AHCI_CAP2_BOH) ? " BOH":""); 483196656Smav } 484203108Smav if (bootverbose && (ctlr->caps & AHCI_CAP_EMS)) { 485203123Smav device_printf(dev, "EM Caps:%s%s%s%s%s%s%s%s\n", 486203108Smav (ctlr->capsem & AHCI_EM_PM) ? " PM":"", 487203108Smav (ctlr->capsem & AHCI_EM_ALHD) ? " ALHD":"", 488203108Smav (ctlr->capsem & AHCI_EM_XMT) ? " XMT":"", 489203108Smav (ctlr->capsem & AHCI_EM_SMB) ? " SMB":"", 490203108Smav (ctlr->capsem & AHCI_EM_SGPIO) ? " SGPIO":"", 491203108Smav (ctlr->capsem & AHCI_EM_SES2) ? " SES-2":"", 492203108Smav (ctlr->capsem & AHCI_EM_SAFTE) ? " SAF-TE":"", 493203108Smav (ctlr->capsem & AHCI_EM_LED) ? " LED":""); 494203108Smav } 495195534Sscottl /* Attach all channels on this controller */ 496195534Sscottl for (unit = 0; unit < ctlr->channels; unit++) { 497195534Sscottl if ((ctlr->ichannels & (1 << unit)) == 0) 498195534Sscottl continue; 499195534Sscottl child = device_add_child(dev, "ahcich", -1); 500195534Sscottl if (child == NULL) 501195534Sscottl device_printf(dev, "failed to add channel device\n"); 502195534Sscottl else 503195534Sscottl device_set_ivars(child, (void *)(intptr_t)unit); 504195534Sscottl } 505195534Sscottl bus_generic_attach(dev); 506195534Sscottl return 0; 507195534Sscottl} 508195534Sscottl 509195534Sscottlstatic int 510195534Sscottlahci_detach(device_t dev) 511195534Sscottl{ 512195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 513195534Sscottl device_t *children; 514195534Sscottl int nchildren, i; 515195534Sscottl 516195534Sscottl /* Detach & delete all children */ 517195534Sscottl if (!device_get_children(dev, &children, &nchildren)) { 518195534Sscottl for (i = 0; i < nchildren; i++) 519195534Sscottl device_delete_child(dev, children[i]); 520195534Sscottl free(children, M_TEMP); 521195534Sscottl } 522195534Sscottl /* Free interrupts. */ 523195534Sscottl for (i = 0; i < ctlr->numirqs; i++) { 524195534Sscottl if (ctlr->irqs[i].r_irq) { 525195534Sscottl bus_teardown_intr(dev, ctlr->irqs[i].r_irq, 526195534Sscottl ctlr->irqs[i].handle); 527195534Sscottl bus_release_resource(dev, SYS_RES_IRQ, 528195534Sscottl ctlr->irqs[i].r_irq_rid, ctlr->irqs[i].r_irq); 529195534Sscottl } 530195534Sscottl } 531195534Sscottl pci_release_msi(dev); 532195534Sscottl /* Free memory. */ 533195534Sscottl rman_fini(&ctlr->sc_iomem); 534195534Sscottl if (ctlr->r_mem) 535195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 536222039Smav mtx_destroy(&ctlr->em_mtx); 537195534Sscottl return (0); 538195534Sscottl} 539195534Sscottl 540195534Sscottlstatic int 541195534Sscottlahci_ctlr_reset(device_t dev) 542195534Sscottl{ 543195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 544195534Sscottl int timeout; 545195534Sscottl 546195534Sscottl if (pci_read_config(dev, 0x00, 4) == 0x28298086 && 547195534Sscottl (pci_read_config(dev, 0x92, 1) & 0xfe) == 0x04) 548195534Sscottl pci_write_config(dev, 0x92, 0x01, 1); 549195534Sscottl /* Enable AHCI mode */ 550195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, AHCI_GHC_AE); 551195534Sscottl /* Reset AHCI controller */ 552195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, AHCI_GHC_AE|AHCI_GHC_HR); 553195534Sscottl for (timeout = 1000; timeout > 0; timeout--) { 554195534Sscottl DELAY(1000); 555195534Sscottl if ((ATA_INL(ctlr->r_mem, AHCI_GHC) & AHCI_GHC_HR) == 0) 556195534Sscottl break; 557195534Sscottl } 558195534Sscottl if (timeout == 0) { 559195534Sscottl device_printf(dev, "AHCI controller reset failure\n"); 560195534Sscottl return ENXIO; 561195534Sscottl } 562195534Sscottl /* Reenable AHCI mode */ 563195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, AHCI_GHC_AE); 564205422Smav return (0); 565205422Smav} 566205422Smav 567205422Smavstatic int 568205422Smavahci_ctlr_setup(device_t dev) 569205422Smav{ 570205422Smav struct ahci_controller *ctlr = device_get_softc(dev); 571195534Sscottl /* Clear interrupts */ 572195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_IS, ATA_INL(ctlr->r_mem, AHCI_IS)); 573196656Smav /* Configure CCC */ 574196656Smav if (ctlr->ccc) { 575196656Smav ATA_OUTL(ctlr->r_mem, AHCI_CCCP, ATA_INL(ctlr->r_mem, AHCI_PI)); 576196656Smav ATA_OUTL(ctlr->r_mem, AHCI_CCCC, 577196656Smav (ctlr->ccc << AHCI_CCCC_TV_SHIFT) | 578196656Smav (4 << AHCI_CCCC_CC_SHIFT) | 579196656Smav AHCI_CCCC_EN); 580196656Smav ctlr->cccv = (ATA_INL(ctlr->r_mem, AHCI_CCCC) & 581196656Smav AHCI_CCCC_INT_MASK) >> AHCI_CCCC_INT_SHIFT; 582196656Smav if (bootverbose) { 583196656Smav device_printf(dev, 584196656Smav "CCC with %dms/4cmd enabled on vector %d\n", 585196656Smav ctlr->ccc, ctlr->cccv); 586196656Smav } 587196656Smav } 588195534Sscottl /* Enable AHCI interrupts */ 589195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, 590195534Sscottl ATA_INL(ctlr->r_mem, AHCI_GHC) | AHCI_GHC_IE); 591195534Sscottl return (0); 592195534Sscottl} 593195534Sscottl 594195534Sscottlstatic int 595195534Sscottlahci_suspend(device_t dev) 596195534Sscottl{ 597195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 598195534Sscottl 599195534Sscottl bus_generic_suspend(dev); 600195534Sscottl /* Disable interupts, so the state change(s) doesn't trigger */ 601195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, 602195534Sscottl ATA_INL(ctlr->r_mem, AHCI_GHC) & (~AHCI_GHC_IE)); 603195534Sscottl return 0; 604195534Sscottl} 605195534Sscottl 606195534Sscottlstatic int 607195534Sscottlahci_resume(device_t dev) 608195534Sscottl{ 609195534Sscottl int res; 610195534Sscottl 611195534Sscottl if ((res = ahci_ctlr_reset(dev)) != 0) 612195534Sscottl return (res); 613205422Smav ahci_ctlr_setup(dev); 614195534Sscottl return (bus_generic_resume(dev)); 615195534Sscottl} 616195534Sscottl 617195534Sscottlstatic int 618195534Sscottlahci_setup_interrupt(device_t dev) 619195534Sscottl{ 620195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 621195534Sscottl int i, msi = 1; 622195534Sscottl 623195534Sscottl /* Process hints. */ 624195534Sscottl resource_int_value(device_get_name(dev), 625195534Sscottl device_get_unit(dev), "msi", &msi); 626195534Sscottl if (msi < 0) 627195534Sscottl msi = 0; 628195534Sscottl else if (msi == 1) 629195534Sscottl msi = min(1, pci_msi_count(dev)); 630195534Sscottl else if (msi > 1) 631195534Sscottl msi = pci_msi_count(dev); 632195534Sscottl /* Allocate MSI if needed/present. */ 633195534Sscottl if (msi && pci_alloc_msi(dev, &msi) == 0) { 634195534Sscottl ctlr->numirqs = msi; 635195534Sscottl } else { 636195534Sscottl msi = 0; 637195534Sscottl ctlr->numirqs = 1; 638195534Sscottl } 639195534Sscottl /* Check for single MSI vector fallback. */ 640195534Sscottl if (ctlr->numirqs > 1 && 641195534Sscottl (ATA_INL(ctlr->r_mem, AHCI_GHC) & AHCI_GHC_MRSM) != 0) { 642195534Sscottl device_printf(dev, "Falling back to one MSI\n"); 643195534Sscottl ctlr->numirqs = 1; 644195534Sscottl } 645195534Sscottl /* Allocate all IRQs. */ 646195534Sscottl for (i = 0; i < ctlr->numirqs; i++) { 647195534Sscottl ctlr->irqs[i].ctlr = ctlr; 648195534Sscottl ctlr->irqs[i].r_irq_rid = i + (msi ? 1 : 0); 649196656Smav if (ctlr->numirqs == 1 || i >= ctlr->channels || 650196656Smav (ctlr->ccc && i == ctlr->cccv)) 651195534Sscottl ctlr->irqs[i].mode = AHCI_IRQ_MODE_ALL; 652195534Sscottl else if (i == ctlr->numirqs - 1) 653195534Sscottl ctlr->irqs[i].mode = AHCI_IRQ_MODE_AFTER; 654195534Sscottl else 655195534Sscottl ctlr->irqs[i].mode = AHCI_IRQ_MODE_ONE; 656195534Sscottl if (!(ctlr->irqs[i].r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 657195534Sscottl &ctlr->irqs[i].r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) { 658195534Sscottl device_printf(dev, "unable to map interrupt\n"); 659195534Sscottl return ENXIO; 660195534Sscottl } 661195534Sscottl if ((bus_setup_intr(dev, ctlr->irqs[i].r_irq, ATA_INTR_FLAGS, NULL, 662195534Sscottl (ctlr->irqs[i].mode == AHCI_IRQ_MODE_ONE) ? ahci_intr_one : ahci_intr, 663195534Sscottl &ctlr->irqs[i], &ctlr->irqs[i].handle))) { 664195534Sscottl /* SOS XXX release r_irq */ 665195534Sscottl device_printf(dev, "unable to setup interrupt\n"); 666195534Sscottl return ENXIO; 667195534Sscottl } 668202011Smav if (ctlr->numirqs > 1) { 669202011Smav bus_describe_intr(dev, ctlr->irqs[i].r_irq, 670202011Smav ctlr->irqs[i].handle, 671202011Smav ctlr->irqs[i].mode == AHCI_IRQ_MODE_ONE ? 672202011Smav "ch%d" : "%d", i); 673202011Smav } 674195534Sscottl } 675195534Sscottl return (0); 676195534Sscottl} 677195534Sscottl 678195534Sscottl/* 679195534Sscottl * Common case interrupt handler. 680195534Sscottl */ 681195534Sscottlstatic void 682195534Sscottlahci_intr(void *data) 683195534Sscottl{ 684195534Sscottl struct ahci_controller_irq *irq = data; 685195534Sscottl struct ahci_controller *ctlr = irq->ctlr; 686205422Smav u_int32_t is, ise = 0; 687195534Sscottl void *arg; 688195534Sscottl int unit; 689195534Sscottl 690196656Smav if (irq->mode == AHCI_IRQ_MODE_ALL) { 691195534Sscottl unit = 0; 692196656Smav if (ctlr->ccc) 693196656Smav is = ctlr->ichannels; 694196656Smav else 695196656Smav is = ATA_INL(ctlr->r_mem, AHCI_IS); 696196656Smav } else { /* AHCI_IRQ_MODE_AFTER */ 697195534Sscottl unit = irq->r_irq_rid - 1; 698196656Smav is = ATA_INL(ctlr->r_mem, AHCI_IS); 699196656Smav } 700205422Smav /* CCC interrupt is edge triggered. */ 701205422Smav if (ctlr->ccc) 702205422Smav ise = 1 << ctlr->cccv; 703200814Smav /* Some controllers have edge triggered IS. */ 704200814Smav if (ctlr->quirks & AHCI_Q_EDGEIS) 705205422Smav ise |= is; 706205422Smav if (ise != 0) 707205422Smav ATA_OUTL(ctlr->r_mem, AHCI_IS, ise); 708195534Sscottl for (; unit < ctlr->channels; unit++) { 709195534Sscottl if ((is & (1 << unit)) != 0 && 710195534Sscottl (arg = ctlr->interrupt[unit].argument)) { 711199322Smav ctlr->interrupt[unit].function(arg); 712195534Sscottl } 713195534Sscottl } 714200814Smav /* AHCI declares level triggered IS. */ 715200814Smav if (!(ctlr->quirks & AHCI_Q_EDGEIS)) 716200814Smav ATA_OUTL(ctlr->r_mem, AHCI_IS, is); 717195534Sscottl} 718195534Sscottl 719195534Sscottl/* 720195534Sscottl * Simplified interrupt handler for multivector MSI mode. 721195534Sscottl */ 722195534Sscottlstatic void 723195534Sscottlahci_intr_one(void *data) 724195534Sscottl{ 725195534Sscottl struct ahci_controller_irq *irq = data; 726195534Sscottl struct ahci_controller *ctlr = irq->ctlr; 727195534Sscottl void *arg; 728195534Sscottl int unit; 729195534Sscottl 730195534Sscottl unit = irq->r_irq_rid - 1; 731202011Smav /* Some controllers have edge triggered IS. */ 732202011Smav if (ctlr->quirks & AHCI_Q_EDGEIS) 733202011Smav ATA_OUTL(ctlr->r_mem, AHCI_IS, 1 << unit); 734195534Sscottl if ((arg = ctlr->interrupt[unit].argument)) 735195534Sscottl ctlr->interrupt[unit].function(arg); 736202011Smav /* AHCI declares level triggered IS. */ 737202011Smav if (!(ctlr->quirks & AHCI_Q_EDGEIS)) 738202011Smav ATA_OUTL(ctlr->r_mem, AHCI_IS, 1 << unit); 739195534Sscottl} 740195534Sscottl 741195534Sscottlstatic struct resource * 742195534Sscottlahci_alloc_resource(device_t dev, device_t child, int type, int *rid, 743195534Sscottl u_long start, u_long end, u_long count, u_int flags) 744195534Sscottl{ 745195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 746195534Sscottl int unit = ((struct ahci_channel *)device_get_softc(child))->unit; 747195534Sscottl struct resource *res = NULL; 748195534Sscottl int offset = AHCI_OFFSET + (unit << 7); 749195534Sscottl long st; 750195534Sscottl 751195534Sscottl switch (type) { 752195534Sscottl case SYS_RES_MEMORY: 753195534Sscottl st = rman_get_start(ctlr->r_mem); 754195534Sscottl res = rman_reserve_resource(&ctlr->sc_iomem, st + offset, 755195534Sscottl st + offset + 127, 128, RF_ACTIVE, child); 756195534Sscottl if (res) { 757195534Sscottl bus_space_handle_t bsh; 758195534Sscottl bus_space_tag_t bst; 759195534Sscottl bsh = rman_get_bushandle(ctlr->r_mem); 760195534Sscottl bst = rman_get_bustag(ctlr->r_mem); 761195534Sscottl bus_space_subregion(bst, bsh, offset, 128, &bsh); 762195534Sscottl rman_set_bushandle(res, bsh); 763195534Sscottl rman_set_bustag(res, bst); 764195534Sscottl } 765195534Sscottl break; 766195534Sscottl case SYS_RES_IRQ: 767195534Sscottl if (*rid == ATA_IRQ_RID) 768195534Sscottl res = ctlr->irqs[0].r_irq; 769195534Sscottl break; 770195534Sscottl } 771195534Sscottl return (res); 772195534Sscottl} 773195534Sscottl 774195534Sscottlstatic int 775195534Sscottlahci_release_resource(device_t dev, device_t child, int type, int rid, 776195534Sscottl struct resource *r) 777195534Sscottl{ 778195534Sscottl 779195534Sscottl switch (type) { 780195534Sscottl case SYS_RES_MEMORY: 781195534Sscottl rman_release_resource(r); 782195534Sscottl return (0); 783195534Sscottl case SYS_RES_IRQ: 784195534Sscottl if (rid != ATA_IRQ_RID) 785195534Sscottl return ENOENT; 786195534Sscottl return (0); 787195534Sscottl } 788195534Sscottl return (EINVAL); 789195534Sscottl} 790195534Sscottl 791195534Sscottlstatic int 792195534Sscottlahci_setup_intr(device_t dev, device_t child, struct resource *irq, 793195534Sscottl int flags, driver_filter_t *filter, driver_intr_t *function, 794195534Sscottl void *argument, void **cookiep) 795195534Sscottl{ 796195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 797195534Sscottl int unit = (intptr_t)device_get_ivars(child); 798195534Sscottl 799195534Sscottl if (filter != NULL) { 800195534Sscottl printf("ahci.c: we cannot use a filter here\n"); 801195534Sscottl return (EINVAL); 802195534Sscottl } 803195534Sscottl ctlr->interrupt[unit].function = function; 804195534Sscottl ctlr->interrupt[unit].argument = argument; 805195534Sscottl return (0); 806195534Sscottl} 807195534Sscottl 808195534Sscottlstatic int 809195534Sscottlahci_teardown_intr(device_t dev, device_t child, struct resource *irq, 810195534Sscottl void *cookie) 811195534Sscottl{ 812195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 813195534Sscottl int unit = (intptr_t)device_get_ivars(child); 814195534Sscottl 815195534Sscottl ctlr->interrupt[unit].function = NULL; 816195534Sscottl ctlr->interrupt[unit].argument = NULL; 817195534Sscottl return (0); 818195534Sscottl} 819195534Sscottl 820195534Sscottlstatic int 821195534Sscottlahci_print_child(device_t dev, device_t child) 822195534Sscottl{ 823195534Sscottl int retval; 824195534Sscottl 825195534Sscottl retval = bus_print_child_header(dev, child); 826195534Sscottl retval += printf(" at channel %d", 827195534Sscottl (int)(intptr_t)device_get_ivars(child)); 828195534Sscottl retval += bus_print_child_footer(dev, child); 829195534Sscottl 830195534Sscottl return (retval); 831195534Sscottl} 832195534Sscottl 833208410Smavstatic int 834208410Smavahci_child_location_str(device_t dev, device_t child, char *buf, 835208410Smav size_t buflen) 836208410Smav{ 837208410Smav 838208410Smav snprintf(buf, buflen, "channel=%d", 839208410Smav (int)(intptr_t)device_get_ivars(child)); 840208410Smav return (0); 841208410Smav} 842208410Smav 843195534Sscottldevclass_t ahci_devclass; 844195534Sscottlstatic device_method_t ahci_methods[] = { 845195534Sscottl DEVMETHOD(device_probe, ahci_probe), 846195534Sscottl DEVMETHOD(device_attach, ahci_attach), 847195534Sscottl DEVMETHOD(device_detach, ahci_detach), 848195534Sscottl DEVMETHOD(device_suspend, ahci_suspend), 849195534Sscottl DEVMETHOD(device_resume, ahci_resume), 850195534Sscottl DEVMETHOD(bus_print_child, ahci_print_child), 851195534Sscottl DEVMETHOD(bus_alloc_resource, ahci_alloc_resource), 852195534Sscottl DEVMETHOD(bus_release_resource, ahci_release_resource), 853195534Sscottl DEVMETHOD(bus_setup_intr, ahci_setup_intr), 854195534Sscottl DEVMETHOD(bus_teardown_intr,ahci_teardown_intr), 855208410Smav DEVMETHOD(bus_child_location_str, ahci_child_location_str), 856195534Sscottl { 0, 0 } 857195534Sscottl}; 858195534Sscottlstatic driver_t ahci_driver = { 859195534Sscottl "ahci", 860195534Sscottl ahci_methods, 861195534Sscottl sizeof(struct ahci_controller) 862195534Sscottl}; 863195534SscottlDRIVER_MODULE(ahci, pci, ahci_driver, ahci_devclass, 0, 0); 864199322Smavstatic device_method_t ahci_ata_methods[] = { 865199322Smav DEVMETHOD(device_probe, ahci_ata_probe), 866199322Smav DEVMETHOD(device_attach, ahci_attach), 867199322Smav DEVMETHOD(device_detach, ahci_detach), 868199322Smav DEVMETHOD(device_suspend, ahci_suspend), 869199322Smav DEVMETHOD(device_resume, ahci_resume), 870199322Smav DEVMETHOD(bus_print_child, ahci_print_child), 871199322Smav DEVMETHOD(bus_alloc_resource, ahci_alloc_resource), 872199322Smav DEVMETHOD(bus_release_resource, ahci_release_resource), 873199322Smav DEVMETHOD(bus_setup_intr, ahci_setup_intr), 874199322Smav DEVMETHOD(bus_teardown_intr,ahci_teardown_intr), 875208410Smav DEVMETHOD(bus_child_location_str, ahci_child_location_str), 876199322Smav { 0, 0 } 877199322Smav}; 878199322Smavstatic driver_t ahci_ata_driver = { 879199322Smav "ahci", 880199322Smav ahci_ata_methods, 881199322Smav sizeof(struct ahci_controller) 882199322Smav}; 883199322SmavDRIVER_MODULE(ahci, atapci, ahci_ata_driver, ahci_devclass, 0, 0); 884195534SscottlMODULE_VERSION(ahci, 1); 885195534SscottlMODULE_DEPEND(ahci, cam, 1, 1, 1); 886195534Sscottl 887195534Sscottlstatic int 888195534Sscottlahci_ch_probe(device_t dev) 889195534Sscottl{ 890195534Sscottl 891195534Sscottl device_set_desc_copy(dev, "AHCI channel"); 892195534Sscottl return (0); 893195534Sscottl} 894195534Sscottl 895195534Sscottlstatic int 896195534Sscottlahci_ch_attach(device_t dev) 897195534Sscottl{ 898195534Sscottl struct ahci_controller *ctlr = device_get_softc(device_get_parent(dev)); 899195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 900195534Sscottl struct cam_devq *devq; 901199821Smav int rid, error, i, sata_rev = 0; 902203123Smav u_int32_t version; 903222039Smav char buf[32]; 904195534Sscottl 905195534Sscottl ch->dev = dev; 906195534Sscottl ch->unit = (intptr_t)device_get_ivars(dev); 907196656Smav ch->caps = ctlr->caps; 908196656Smav ch->caps2 = ctlr->caps2; 909199322Smav ch->quirks = ctlr->quirks; 910215725Smav ch->numslots = ((ch->caps & AHCI_CAP_NCS) >> AHCI_CAP_NCS_SHIFT) + 1; 911196656Smav mtx_init(&ch->mtx, "AHCI channel lock", NULL, MTX_DEF); 912195534Sscottl resource_int_value(device_get_name(dev), 913195534Sscottl device_get_unit(dev), "pm_level", &ch->pm_level); 914196656Smav if (ch->pm_level > 3) 915196656Smav callout_init_mtx(&ch->pm_timer, &ch->mtx, 0); 916220576Smav callout_init_mtx(&ch->reset_timer, &ch->mtx, 0); 917195534Sscottl /* Limit speed for my onboard JMicron external port. 918195534Sscottl * It is not eSATA really. */ 919195534Sscottl if (pci_get_devid(ctlr->dev) == 0x2363197b && 920195534Sscottl pci_get_subvendor(ctlr->dev) == 0x1043 && 921195534Sscottl pci_get_subdevice(ctlr->dev) == 0x81e4 && 922195534Sscottl ch->unit == 0) 923199821Smav sata_rev = 1; 924203030Smav if (ch->quirks & AHCI_Q_SATA2) 925203030Smav sata_rev = 2; 926195534Sscottl resource_int_value(device_get_name(dev), 927199821Smav device_get_unit(dev), "sata_rev", &sata_rev); 928199821Smav for (i = 0; i < 16; i++) { 929199821Smav ch->user[i].revision = sata_rev; 930199821Smav ch->user[i].mode = 0; 931199821Smav ch->user[i].bytecount = 8192; 932199821Smav ch->user[i].tags = ch->numslots; 933207499Smav ch->user[i].caps = 0; 934199821Smav ch->curr[i] = ch->user[i]; 935207499Smav if (ch->pm_level) { 936207499Smav ch->user[i].caps = CTS_SATA_CAPS_H_PMREQ | 937207499Smav CTS_SATA_CAPS_H_APST | 938207499Smav CTS_SATA_CAPS_D_PMREQ | CTS_SATA_CAPS_D_APST; 939207499Smav } 940220602Smav ch->user[i].caps |= CTS_SATA_CAPS_H_DMAAA | 941220602Smav CTS_SATA_CAPS_H_AN; 942199821Smav } 943195534Sscottl rid = ch->unit; 944195534Sscottl if (!(ch->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 945195534Sscottl &rid, RF_ACTIVE))) 946195534Sscottl return (ENXIO); 947195534Sscottl ahci_dmainit(dev); 948195534Sscottl ahci_slotsalloc(dev); 949208375Smav ahci_ch_init(dev); 950195534Sscottl mtx_lock(&ch->mtx); 951195534Sscottl rid = ATA_IRQ_RID; 952195534Sscottl if (!(ch->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 953195534Sscottl &rid, RF_SHAREABLE | RF_ACTIVE))) { 954195534Sscottl device_printf(dev, "Unable to map interrupt\n"); 955208813Smav error = ENXIO; 956208813Smav goto err0; 957195534Sscottl } 958195534Sscottl if ((bus_setup_intr(dev, ch->r_irq, ATA_INTR_FLAGS, NULL, 959195534Sscottl ahci_ch_intr_locked, dev, &ch->ih))) { 960195534Sscottl device_printf(dev, "Unable to setup interrupt\n"); 961195534Sscottl error = ENXIO; 962195534Sscottl goto err1; 963195534Sscottl } 964203123Smav ch->chcaps = ATA_INL(ch->r_mem, AHCI_P_CMD); 965203123Smav version = ATA_INL(ctlr->r_mem, AHCI_VS); 966203123Smav if (version < 0x00010020 && (ctlr->caps & AHCI_CAP_FBSS)) 967203123Smav ch->chcaps |= AHCI_P_CMD_FBSCP; 968203123Smav if (bootverbose) { 969203123Smav device_printf(dev, "Caps:%s%s%s%s%s\n", 970203123Smav (ch->chcaps & AHCI_P_CMD_HPCP) ? " HPCP":"", 971203123Smav (ch->chcaps & AHCI_P_CMD_MPSP) ? " MPSP":"", 972203123Smav (ch->chcaps & AHCI_P_CMD_CPD) ? " CPD":"", 973203123Smav (ch->chcaps & AHCI_P_CMD_ESP) ? " ESP":"", 974203123Smav (ch->chcaps & AHCI_P_CMD_FBSCP) ? " FBSCP":""); 975203123Smav } 976195534Sscottl /* Create the device queue for our SIM. */ 977195534Sscottl devq = cam_simq_alloc(ch->numslots); 978195534Sscottl if (devq == NULL) { 979195534Sscottl device_printf(dev, "Unable to allocate simq\n"); 980195534Sscottl error = ENOMEM; 981195534Sscottl goto err1; 982195534Sscottl } 983195534Sscottl /* Construct SIM entry */ 984195534Sscottl ch->sim = cam_sim_alloc(ahciaction, ahcipoll, "ahcich", ch, 985199178Smav device_get_unit(dev), &ch->mtx, 986199278Smav min(2, ch->numslots), 987199278Smav (ch->caps & AHCI_CAP_SNCQ) ? ch->numslots : 0, 988199278Smav devq); 989195534Sscottl if (ch->sim == NULL) { 990208813Smav cam_simq_free(devq); 991195534Sscottl device_printf(dev, "unable to allocate sim\n"); 992195534Sscottl error = ENOMEM; 993208813Smav goto err1; 994195534Sscottl } 995195534Sscottl if (xpt_bus_register(ch->sim, dev, 0) != CAM_SUCCESS) { 996195534Sscottl device_printf(dev, "unable to register xpt bus\n"); 997195534Sscottl error = ENXIO; 998195534Sscottl goto err2; 999195534Sscottl } 1000195534Sscottl if (xpt_create_path(&ch->path, /*periph*/NULL, cam_sim_path(ch->sim), 1001195534Sscottl CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 1002195534Sscottl device_printf(dev, "unable to create path\n"); 1003195534Sscottl error = ENXIO; 1004195534Sscottl goto err3; 1005195534Sscottl } 1006196656Smav if (ch->pm_level > 3) { 1007196656Smav callout_reset(&ch->pm_timer, 1008196656Smav (ch->pm_level == 4) ? hz / 1000 : hz / 8, 1009196656Smav ahci_ch_pm, dev); 1010196656Smav } 1011195534Sscottl mtx_unlock(&ch->mtx); 1012222039Smav if ((ch->caps & AHCI_CAP_EMS) && 1013222039Smav (ctlr->capsem & AHCI_EM_LED)) { 1014222039Smav for (i = 0; i < AHCI_NUM_LEDS; i++) { 1015222039Smav ch->leds[i].dev = dev; 1016222039Smav ch->leds[i].num = i; 1017222039Smav } 1018222039Smav if ((ctlr->capsem & AHCI_EM_ALHD) == 0) { 1019222039Smav snprintf(buf, sizeof(buf), "%s.act", 1020222039Smav device_get_nameunit(dev)); 1021222039Smav ch->leds[0].led = led_create(ahci_ch_led, 1022222039Smav &ch->leds[0], buf); 1023222039Smav } 1024222039Smav snprintf(buf, sizeof(buf), "%s.locate", 1025222039Smav device_get_nameunit(dev)); 1026222039Smav ch->leds[1].led = led_create(ahci_ch_led, &ch->leds[1], buf); 1027222039Smav snprintf(buf, sizeof(buf), "%s.fault", 1028222039Smav device_get_nameunit(dev)); 1029222039Smav ch->leds[2].led = led_create(ahci_ch_led, &ch->leds[2], buf); 1030222039Smav } 1031195534Sscottl return (0); 1032195534Sscottl 1033195534Sscottlerr3: 1034195534Sscottl xpt_bus_deregister(cam_sim_path(ch->sim)); 1035195534Sscottlerr2: 1036195534Sscottl cam_sim_free(ch->sim, /*free_devq*/TRUE); 1037195534Sscottlerr1: 1038195534Sscottl bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 1039208813Smaverr0: 1040195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 1041195534Sscottl mtx_unlock(&ch->mtx); 1042214325Smav mtx_destroy(&ch->mtx); 1043195534Sscottl return (error); 1044195534Sscottl} 1045195534Sscottl 1046195534Sscottlstatic int 1047195534Sscottlahci_ch_detach(device_t dev) 1048195534Sscottl{ 1049195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1050222039Smav int i; 1051195534Sscottl 1052222039Smav for (i = 0; i < AHCI_NUM_LEDS; i++) { 1053222039Smav if (ch->leds[i].led) 1054222039Smav led_destroy(ch->leds[i].led); 1055222039Smav } 1056195534Sscottl mtx_lock(&ch->mtx); 1057195534Sscottl xpt_async(AC_LOST_DEVICE, ch->path, NULL); 1058220576Smav /* Forget about reset. */ 1059220576Smav if (ch->resetting) { 1060220576Smav ch->resetting = 0; 1061220576Smav xpt_release_simq(ch->sim, TRUE); 1062220576Smav } 1063195534Sscottl xpt_free_path(ch->path); 1064195534Sscottl xpt_bus_deregister(cam_sim_path(ch->sim)); 1065195534Sscottl cam_sim_free(ch->sim, /*free_devq*/TRUE); 1066195534Sscottl mtx_unlock(&ch->mtx); 1067195534Sscottl 1068196656Smav if (ch->pm_level > 3) 1069196656Smav callout_drain(&ch->pm_timer); 1070220576Smav callout_drain(&ch->reset_timer); 1071195534Sscottl bus_teardown_intr(dev, ch->r_irq, ch->ih); 1072195534Sscottl bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 1073195534Sscottl 1074208375Smav ahci_ch_deinit(dev); 1075195534Sscottl ahci_slotsfree(dev); 1076195534Sscottl ahci_dmafini(dev); 1077195534Sscottl 1078195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 1079195534Sscottl mtx_destroy(&ch->mtx); 1080195534Sscottl return (0); 1081195534Sscottl} 1082195534Sscottl 1083195534Sscottlstatic int 1084208375Smavahci_ch_init(device_t dev) 1085195534Sscottl{ 1086195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1087208375Smav uint64_t work; 1088195534Sscottl 1089208375Smav /* Disable port interrupts */ 1090208375Smav ATA_OUTL(ch->r_mem, AHCI_P_IE, 0); 1091208375Smav /* Setup work areas */ 1092208375Smav work = ch->dma.work_bus + AHCI_CL_OFFSET; 1093208375Smav ATA_OUTL(ch->r_mem, AHCI_P_CLB, work & 0xffffffff); 1094208375Smav ATA_OUTL(ch->r_mem, AHCI_P_CLBU, work >> 32); 1095208375Smav work = ch->dma.rfis_bus; 1096208375Smav ATA_OUTL(ch->r_mem, AHCI_P_FB, work & 0xffffffff); 1097208375Smav ATA_OUTL(ch->r_mem, AHCI_P_FBU, work >> 32); 1098208375Smav /* Activate the channel and power/spin up device */ 1099208375Smav ATA_OUTL(ch->r_mem, AHCI_P_CMD, 1100208375Smav (AHCI_P_CMD_ACTIVE | AHCI_P_CMD_POD | AHCI_P_CMD_SUD | 1101208375Smav ((ch->pm_level == 2 || ch->pm_level == 3) ? AHCI_P_CMD_ALPE : 0) | 1102208375Smav ((ch->pm_level > 2) ? AHCI_P_CMD_ASP : 0 ))); 1103208375Smav ahci_start_fr(dev); 1104208375Smav ahci_start(dev, 1); 1105208375Smav return (0); 1106208375Smav} 1107208375Smav 1108208375Smavstatic int 1109208375Smavahci_ch_deinit(device_t dev) 1110208375Smav{ 1111208375Smav struct ahci_channel *ch = device_get_softc(dev); 1112208375Smav 1113195534Sscottl /* Disable port interrupts. */ 1114195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 0); 1115195534Sscottl /* Reset command register. */ 1116195534Sscottl ahci_stop(dev); 1117195534Sscottl ahci_stop_fr(dev); 1118195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, 0); 1119195534Sscottl /* Allow everything, including partial and slumber modes. */ 1120195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SCTL, 0); 1121195534Sscottl /* Request slumber mode transition and give some time to get there. */ 1122195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, AHCI_P_CMD_SLUMBER); 1123195534Sscottl DELAY(100); 1124195534Sscottl /* Disable PHY. */ 1125195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SCTL, ATA_SC_DET_DISABLE); 1126195534Sscottl return (0); 1127195534Sscottl} 1128195534Sscottl 1129195534Sscottlstatic int 1130208375Smavahci_ch_suspend(device_t dev) 1131208375Smav{ 1132208375Smav struct ahci_channel *ch = device_get_softc(dev); 1133208375Smav 1134208375Smav mtx_lock(&ch->mtx); 1135208375Smav xpt_freeze_simq(ch->sim, 1); 1136220576Smav /* Forget about reset. */ 1137220576Smav if (ch->resetting) { 1138220576Smav ch->resetting = 0; 1139220576Smav callout_stop(&ch->reset_timer); 1140220576Smav xpt_release_simq(ch->sim, TRUE); 1141220576Smav } 1142208375Smav while (ch->oslots) 1143208375Smav msleep(ch, &ch->mtx, PRIBIO, "ahcisusp", hz/100); 1144208375Smav ahci_ch_deinit(dev); 1145208375Smav mtx_unlock(&ch->mtx); 1146208375Smav return (0); 1147208375Smav} 1148208375Smav 1149208375Smavstatic int 1150195534Sscottlahci_ch_resume(device_t dev) 1151195534Sscottl{ 1152195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1153195534Sscottl 1154208375Smav mtx_lock(&ch->mtx); 1155208375Smav ahci_ch_init(dev); 1156208375Smav ahci_reset(dev); 1157208375Smav xpt_release_simq(ch->sim, TRUE); 1158208375Smav mtx_unlock(&ch->mtx); 1159195534Sscottl return (0); 1160195534Sscottl} 1161195534Sscottl 1162195534Sscottldevclass_t ahcich_devclass; 1163195534Sscottlstatic device_method_t ahcich_methods[] = { 1164195534Sscottl DEVMETHOD(device_probe, ahci_ch_probe), 1165195534Sscottl DEVMETHOD(device_attach, ahci_ch_attach), 1166195534Sscottl DEVMETHOD(device_detach, ahci_ch_detach), 1167195534Sscottl DEVMETHOD(device_suspend, ahci_ch_suspend), 1168195534Sscottl DEVMETHOD(device_resume, ahci_ch_resume), 1169195534Sscottl { 0, 0 } 1170195534Sscottl}; 1171195534Sscottlstatic driver_t ahcich_driver = { 1172195534Sscottl "ahcich", 1173195534Sscottl ahcich_methods, 1174195534Sscottl sizeof(struct ahci_channel) 1175195534Sscottl}; 1176199322SmavDRIVER_MODULE(ahcich, ahci, ahcich_driver, ahcich_devclass, 0, 0); 1177195534Sscottl 1178222039Smavstatic void 1179222039Smavahci_ch_setleds(device_t dev) 1180222039Smav{ 1181222039Smav struct ahci_channel *ch; 1182222039Smav struct ahci_controller *ctlr; 1183222039Smav size_t buf; 1184222039Smav int i, timeout; 1185222039Smav int16_t val; 1186222039Smav 1187222039Smav ctlr = device_get_softc(device_get_parent(dev)); 1188222039Smav ch = device_get_softc(dev); 1189222039Smav 1190222039Smav val = 0; 1191222039Smav for (i = 0; i < AHCI_NUM_LEDS; i++) 1192222039Smav val |= ch->leds[i].state << (i * 3); 1193222039Smav 1194222039Smav buf = (ctlr->emloc & 0xffff0000) >> 14; 1195222039Smav mtx_lock(&ctlr->em_mtx); 1196222039Smav timeout = 1000; 1197222039Smav while (ATA_INL(ctlr->r_mem, AHCI_EM_CTL) & (AHCI_EM_TM | AHCI_EM_RST) && 1198222039Smav --timeout > 0) 1199222039Smav DELAY(1000); 1200222039Smav if (timeout == 0) 1201222039Smav device_printf(dev, "EM timeout\n"); 1202222039Smav ATA_OUTL(ctlr->r_mem, buf, (1 << 8) | (0 << 16) | (0 << 24)); 1203222039Smav ATA_OUTL(ctlr->r_mem, buf + 4, ch->unit | (val << 16)); 1204222039Smav ATA_OUTL(ctlr->r_mem, AHCI_EM_CTL, AHCI_EM_TM); 1205222039Smav mtx_unlock(&ctlr->em_mtx); 1206222039Smav} 1207222039Smav 1208222039Smavstatic void 1209222039Smavahci_ch_led(void *priv, int onoff) 1210222039Smav{ 1211222039Smav struct ahci_led *led; 1212222039Smav 1213222039Smav led = (struct ahci_led *)priv; 1214222039Smav 1215222039Smav led->state = onoff; 1216222039Smav ahci_ch_setleds(led->dev); 1217222039Smav} 1218222039Smav 1219195534Sscottlstruct ahci_dc_cb_args { 1220195534Sscottl bus_addr_t maddr; 1221195534Sscottl int error; 1222195534Sscottl}; 1223195534Sscottl 1224195534Sscottlstatic void 1225195534Sscottlahci_dmainit(device_t dev) 1226195534Sscottl{ 1227195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1228195534Sscottl struct ahci_dc_cb_args dcba; 1229203123Smav size_t rfsize; 1230195534Sscottl 1231195534Sscottl if (ch->caps & AHCI_CAP_64BIT) 1232195534Sscottl ch->dma.max_address = BUS_SPACE_MAXADDR; 1233195534Sscottl else 1234195534Sscottl ch->dma.max_address = BUS_SPACE_MAXADDR_32BIT; 1235195534Sscottl /* Command area. */ 1236195534Sscottl if (bus_dma_tag_create(bus_get_dma_tag(dev), 1024, 0, 1237195534Sscottl ch->dma.max_address, BUS_SPACE_MAXADDR, 1238195534Sscottl NULL, NULL, AHCI_WORK_SIZE, 1, AHCI_WORK_SIZE, 1239195534Sscottl 0, NULL, NULL, &ch->dma.work_tag)) 1240195534Sscottl goto error; 1241195534Sscottl if (bus_dmamem_alloc(ch->dma.work_tag, (void **)&ch->dma.work, 0, 1242195534Sscottl &ch->dma.work_map)) 1243195534Sscottl goto error; 1244195534Sscottl if (bus_dmamap_load(ch->dma.work_tag, ch->dma.work_map, ch->dma.work, 1245195534Sscottl AHCI_WORK_SIZE, ahci_dmasetupc_cb, &dcba, 0) || dcba.error) { 1246195534Sscottl bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 1247195534Sscottl goto error; 1248195534Sscottl } 1249195534Sscottl ch->dma.work_bus = dcba.maddr; 1250195534Sscottl /* FIS receive area. */ 1251203123Smav if (ch->chcaps & AHCI_P_CMD_FBSCP) 1252203123Smav rfsize = 4096; 1253203123Smav else 1254203123Smav rfsize = 256; 1255203123Smav if (bus_dma_tag_create(bus_get_dma_tag(dev), rfsize, 0, 1256195534Sscottl ch->dma.max_address, BUS_SPACE_MAXADDR, 1257203123Smav NULL, NULL, rfsize, 1, rfsize, 1258195534Sscottl 0, NULL, NULL, &ch->dma.rfis_tag)) 1259195534Sscottl goto error; 1260195534Sscottl if (bus_dmamem_alloc(ch->dma.rfis_tag, (void **)&ch->dma.rfis, 0, 1261195534Sscottl &ch->dma.rfis_map)) 1262195534Sscottl goto error; 1263195534Sscottl if (bus_dmamap_load(ch->dma.rfis_tag, ch->dma.rfis_map, ch->dma.rfis, 1264203123Smav rfsize, ahci_dmasetupc_cb, &dcba, 0) || dcba.error) { 1265195534Sscottl bus_dmamem_free(ch->dma.rfis_tag, ch->dma.rfis, ch->dma.rfis_map); 1266195534Sscottl goto error; 1267195534Sscottl } 1268195534Sscottl ch->dma.rfis_bus = dcba.maddr; 1269195534Sscottl /* Data area. */ 1270195534Sscottl if (bus_dma_tag_create(bus_get_dma_tag(dev), 2, 0, 1271195534Sscottl ch->dma.max_address, BUS_SPACE_MAXADDR, 1272195534Sscottl NULL, NULL, 1273195534Sscottl AHCI_SG_ENTRIES * PAGE_SIZE * ch->numslots, 1274195534Sscottl AHCI_SG_ENTRIES, AHCI_PRD_MAX, 1275195534Sscottl 0, busdma_lock_mutex, &ch->mtx, &ch->dma.data_tag)) { 1276195534Sscottl goto error; 1277195534Sscottl } 1278195534Sscottl return; 1279195534Sscottl 1280195534Sscottlerror: 1281195534Sscottl device_printf(dev, "WARNING - DMA initialization failed\n"); 1282195534Sscottl ahci_dmafini(dev); 1283195534Sscottl} 1284195534Sscottl 1285195534Sscottlstatic void 1286195534Sscottlahci_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error) 1287195534Sscottl{ 1288195534Sscottl struct ahci_dc_cb_args *dcba = (struct ahci_dc_cb_args *)xsc; 1289195534Sscottl 1290195534Sscottl if (!(dcba->error = error)) 1291195534Sscottl dcba->maddr = segs[0].ds_addr; 1292195534Sscottl} 1293195534Sscottl 1294195534Sscottlstatic void 1295195534Sscottlahci_dmafini(device_t dev) 1296195534Sscottl{ 1297195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1298195534Sscottl 1299195534Sscottl if (ch->dma.data_tag) { 1300195534Sscottl bus_dma_tag_destroy(ch->dma.data_tag); 1301195534Sscottl ch->dma.data_tag = NULL; 1302195534Sscottl } 1303195534Sscottl if (ch->dma.rfis_bus) { 1304195534Sscottl bus_dmamap_unload(ch->dma.rfis_tag, ch->dma.rfis_map); 1305195534Sscottl bus_dmamem_free(ch->dma.rfis_tag, ch->dma.rfis, ch->dma.rfis_map); 1306195534Sscottl ch->dma.rfis_bus = 0; 1307195534Sscottl ch->dma.rfis_map = NULL; 1308195534Sscottl ch->dma.rfis = NULL; 1309195534Sscottl } 1310195534Sscottl if (ch->dma.work_bus) { 1311195534Sscottl bus_dmamap_unload(ch->dma.work_tag, ch->dma.work_map); 1312195534Sscottl bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 1313195534Sscottl ch->dma.work_bus = 0; 1314195534Sscottl ch->dma.work_map = NULL; 1315195534Sscottl ch->dma.work = NULL; 1316195534Sscottl } 1317195534Sscottl if (ch->dma.work_tag) { 1318195534Sscottl bus_dma_tag_destroy(ch->dma.work_tag); 1319195534Sscottl ch->dma.work_tag = NULL; 1320195534Sscottl } 1321195534Sscottl} 1322195534Sscottl 1323195534Sscottlstatic void 1324195534Sscottlahci_slotsalloc(device_t dev) 1325195534Sscottl{ 1326195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1327195534Sscottl int i; 1328195534Sscottl 1329195534Sscottl /* Alloc and setup command/dma slots */ 1330195534Sscottl bzero(ch->slot, sizeof(ch->slot)); 1331195534Sscottl for (i = 0; i < ch->numslots; i++) { 1332195534Sscottl struct ahci_slot *slot = &ch->slot[i]; 1333195534Sscottl 1334195534Sscottl slot->dev = dev; 1335195534Sscottl slot->slot = i; 1336195534Sscottl slot->state = AHCI_SLOT_EMPTY; 1337195534Sscottl slot->ccb = NULL; 1338195534Sscottl callout_init_mtx(&slot->timeout, &ch->mtx, 0); 1339195534Sscottl 1340195534Sscottl if (bus_dmamap_create(ch->dma.data_tag, 0, &slot->dma.data_map)) 1341195534Sscottl device_printf(ch->dev, "FAILURE - create data_map\n"); 1342195534Sscottl } 1343195534Sscottl} 1344195534Sscottl 1345195534Sscottlstatic void 1346195534Sscottlahci_slotsfree(device_t dev) 1347195534Sscottl{ 1348195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1349195534Sscottl int i; 1350195534Sscottl 1351195534Sscottl /* Free all dma slots */ 1352195534Sscottl for (i = 0; i < ch->numslots; i++) { 1353195534Sscottl struct ahci_slot *slot = &ch->slot[i]; 1354195534Sscottl 1355196656Smav callout_drain(&slot->timeout); 1356195534Sscottl if (slot->dma.data_map) { 1357195534Sscottl bus_dmamap_destroy(ch->dma.data_tag, slot->dma.data_map); 1358195534Sscottl slot->dma.data_map = NULL; 1359195534Sscottl } 1360195534Sscottl } 1361195534Sscottl} 1362195534Sscottl 1363220657Smavstatic int 1364198319Smavahci_phy_check_events(device_t dev, u_int32_t serr) 1365195534Sscottl{ 1366195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1367195534Sscottl 1368220657Smav if (((ch->pm_level == 0) && (serr & ATA_SE_PHY_CHANGED)) || 1369220657Smav ((ch->pm_level != 0 || ch->listening) && (serr & ATA_SE_EXCHANGED))) { 1370195534Sscottl u_int32_t status = ATA_INL(ch->r_mem, AHCI_P_SSTS); 1371203108Smav union ccb *ccb; 1372203108Smav 1373203165Smav if (bootverbose) { 1374220657Smav if ((status & ATA_SS_DET_MASK) != ATA_SS_DET_NO_DEVICE) 1375195534Sscottl device_printf(dev, "CONNECT requested\n"); 1376220657Smav else 1377195534Sscottl device_printf(dev, "DISCONNECT requested\n"); 1378195534Sscottl } 1379203165Smav ahci_reset(dev); 1380203108Smav if ((ccb = xpt_alloc_ccb_nowait()) == NULL) 1381220657Smav return (0); 1382203108Smav if (xpt_create_path(&ccb->ccb_h.path, NULL, 1383203108Smav cam_sim_path(ch->sim), 1384203108Smav CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 1385203108Smav xpt_free_ccb(ccb); 1386220657Smav return (0); 1387203108Smav } 1388203108Smav xpt_rescan(ccb); 1389220657Smav return (1); 1390195534Sscottl } 1391220657Smav return (0); 1392195534Sscottl} 1393195534Sscottl 1394195534Sscottlstatic void 1395220657Smavahci_cpd_check_events(device_t dev) 1396220657Smav{ 1397220657Smav struct ahci_channel *ch = device_get_softc(dev); 1398220657Smav u_int32_t status; 1399220657Smav union ccb *ccb; 1400220657Smav 1401220657Smav if (ch->pm_level == 0) 1402220657Smav return; 1403220657Smav 1404220657Smav status = ATA_INL(ch->r_mem, AHCI_P_CMD); 1405220657Smav if ((status & AHCI_P_CMD_CPD) == 0) 1406220657Smav return; 1407220657Smav 1408220657Smav if (bootverbose) { 1409220657Smav if (status & AHCI_P_CMD_CPS) { 1410220657Smav device_printf(dev, "COLD CONNECT requested\n"); 1411220657Smav } else 1412220657Smav device_printf(dev, "COLD DISCONNECT requested\n"); 1413220657Smav } 1414220657Smav ahci_reset(dev); 1415220657Smav if ((ccb = xpt_alloc_ccb_nowait()) == NULL) 1416220657Smav return; 1417220657Smav if (xpt_create_path(&ccb->ccb_h.path, NULL, cam_sim_path(ch->sim), 1418220657Smav CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 1419220657Smav xpt_free_ccb(ccb); 1420220657Smav return; 1421220657Smav } 1422220657Smav xpt_rescan(ccb); 1423220657Smav} 1424220657Smav 1425220657Smavstatic void 1426196907Smavahci_notify_events(device_t dev, u_int32_t status) 1427196656Smav{ 1428196656Smav struct ahci_channel *ch = device_get_softc(dev); 1429196656Smav struct cam_path *dpath; 1430196656Smav int i; 1431196656Smav 1432200196Smav if (ch->caps & AHCI_CAP_SSNTF) 1433200196Smav ATA_OUTL(ch->r_mem, AHCI_P_SNTF, status); 1434196656Smav if (bootverbose) 1435196656Smav device_printf(dev, "SNTF 0x%04x\n", status); 1436196656Smav for (i = 0; i < 16; i++) { 1437196656Smav if ((status & (1 << i)) == 0) 1438196656Smav continue; 1439196656Smav if (xpt_create_path(&dpath, NULL, 1440196656Smav xpt_path_path_id(ch->path), i, 0) == CAM_REQ_CMP) { 1441196656Smav xpt_async(AC_SCSI_AEN, dpath, NULL); 1442196656Smav xpt_free_path(dpath); 1443196656Smav } 1444196656Smav } 1445196656Smav} 1446196656Smav 1447196656Smavstatic void 1448195534Sscottlahci_ch_intr_locked(void *data) 1449195534Sscottl{ 1450195534Sscottl device_t dev = (device_t)data; 1451195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1452195534Sscottl 1453195534Sscottl mtx_lock(&ch->mtx); 1454195534Sscottl ahci_ch_intr(data); 1455195534Sscottl mtx_unlock(&ch->mtx); 1456195534Sscottl} 1457195534Sscottl 1458195534Sscottlstatic void 1459196656Smavahci_ch_pm(void *arg) 1460196656Smav{ 1461196656Smav device_t dev = (device_t)arg; 1462196656Smav struct ahci_channel *ch = device_get_softc(dev); 1463196656Smav uint32_t work; 1464196656Smav 1465196656Smav if (ch->numrslots != 0) 1466196656Smav return; 1467196656Smav work = ATA_INL(ch->r_mem, AHCI_P_CMD); 1468196656Smav if (ch->pm_level == 4) 1469196656Smav work |= AHCI_P_CMD_PARTIAL; 1470196656Smav else 1471196656Smav work |= AHCI_P_CMD_SLUMBER; 1472196656Smav ATA_OUTL(ch->r_mem, AHCI_P_CMD, work); 1473196656Smav} 1474196656Smav 1475196656Smavstatic void 1476195534Sscottlahci_ch_intr(void *data) 1477195534Sscottl{ 1478195534Sscottl device_t dev = (device_t)data; 1479195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1480198319Smav uint32_t istatus, sstatus, cstatus, serr = 0, sntf = 0, ok, err; 1481195534Sscottl enum ahci_err_type et; 1482220657Smav int i, ccs, port, reset = 0; 1483195534Sscottl 1484195534Sscottl /* Read and clear interrupt statuses. */ 1485195534Sscottl istatus = ATA_INL(ch->r_mem, AHCI_P_IS); 1486196656Smav if (istatus == 0) 1487196656Smav return; 1488195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IS, istatus); 1489195534Sscottl /* Read command statuses. */ 1490196907Smav sstatus = ATA_INL(ch->r_mem, AHCI_P_SACT); 1491195534Sscottl cstatus = ATA_INL(ch->r_mem, AHCI_P_CI); 1492200196Smav if (istatus & AHCI_P_IX_SDB) { 1493200196Smav if (ch->caps & AHCI_CAP_SSNTF) 1494200196Smav sntf = ATA_INL(ch->r_mem, AHCI_P_SNTF); 1495203123Smav else if (ch->fbs_enabled) { 1496200196Smav u_int8_t *fis = ch->dma.rfis + 0x58; 1497200196Smav 1498203123Smav for (i = 0; i < 16; i++) { 1499203123Smav if (fis[1] & 0x80) { 1500203123Smav fis[1] &= 0x7f; 1501203123Smav sntf |= 1 << i; 1502203123Smav } 1503203123Smav fis += 256; 1504203123Smav } 1505203123Smav } else { 1506203123Smav u_int8_t *fis = ch->dma.rfis + 0x58; 1507203123Smav 1508200196Smav if (fis[1] & 0x80) 1509200196Smav sntf = (1 << (fis[1] & 0x0f)); 1510200196Smav } 1511200196Smav } 1512195534Sscottl /* Process PHY events */ 1513198319Smav if (istatus & (AHCI_P_IX_PC | AHCI_P_IX_PRC | AHCI_P_IX_OF | 1514198319Smav AHCI_P_IX_IF | AHCI_P_IX_HBD | AHCI_P_IX_HBF | AHCI_P_IX_TFE)) { 1515198319Smav serr = ATA_INL(ch->r_mem, AHCI_P_SERR); 1516198319Smav if (serr) { 1517198319Smav ATA_OUTL(ch->r_mem, AHCI_P_SERR, serr); 1518220657Smav reset = ahci_phy_check_events(dev, serr); 1519198319Smav } 1520198319Smav } 1521220657Smav /* Process cold presence detection events */ 1522220657Smav if ((istatus & AHCI_P_IX_CPD) && !reset) 1523220657Smav ahci_cpd_check_events(dev); 1524195534Sscottl /* Process command errors */ 1525198319Smav if (istatus & (AHCI_P_IX_OF | AHCI_P_IX_IF | 1526198319Smav AHCI_P_IX_HBD | AHCI_P_IX_HBF | AHCI_P_IX_TFE)) { 1527195534Sscottl ccs = (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CCS_MASK) 1528195534Sscottl >> AHCI_P_CMD_CCS_SHIFT; 1529203123Smav//device_printf(dev, "%s ERROR is %08x cs %08x ss %08x rs %08x tfd %02x serr %08x fbs %08x ccs %d\n", 1530203123Smav// __func__, istatus, cstatus, sstatus, ch->rslots, ATA_INL(ch->r_mem, AHCI_P_TFD), 1531203123Smav// serr, ATA_INL(ch->r_mem, AHCI_P_FBS), ccs); 1532203123Smav port = -1; 1533203123Smav if (ch->fbs_enabled) { 1534203123Smav uint32_t fbs = ATA_INL(ch->r_mem, AHCI_P_FBS); 1535203123Smav if (fbs & AHCI_P_FBS_SDE) { 1536203123Smav port = (fbs & AHCI_P_FBS_DWE) 1537203123Smav >> AHCI_P_FBS_DWE_SHIFT; 1538203123Smav } else { 1539203123Smav for (i = 0; i < 16; i++) { 1540203123Smav if (ch->numrslotspd[i] == 0) 1541203123Smav continue; 1542203123Smav if (port == -1) 1543203123Smav port = i; 1544203123Smav else if (port != i) { 1545203123Smav port = -2; 1546203123Smav break; 1547203123Smav } 1548203123Smav } 1549203123Smav } 1550203123Smav } 1551196656Smav err = ch->rslots & (cstatus | sstatus); 1552195534Sscottl } else { 1553195534Sscottl ccs = 0; 1554195534Sscottl err = 0; 1555203123Smav port = -1; 1556195534Sscottl } 1557195534Sscottl /* Complete all successfull commands. */ 1558196656Smav ok = ch->rslots & ~(cstatus | sstatus); 1559195534Sscottl for (i = 0; i < ch->numslots; i++) { 1560195534Sscottl if ((ok >> i) & 1) 1561195534Sscottl ahci_end_transaction(&ch->slot[i], AHCI_ERR_NONE); 1562195534Sscottl } 1563195534Sscottl /* On error, complete the rest of commands with error statuses. */ 1564195534Sscottl if (err) { 1565195534Sscottl if (ch->frozen) { 1566195534Sscottl union ccb *fccb = ch->frozen; 1567195534Sscottl ch->frozen = NULL; 1568195534Sscottl fccb->ccb_h.status = CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 1569198319Smav if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 1570198319Smav xpt_freeze_devq(fccb->ccb_h.path, 1); 1571198319Smav fccb->ccb_h.status |= CAM_DEV_QFRZN; 1572198319Smav } 1573195534Sscottl xpt_done(fccb); 1574195534Sscottl } 1575195534Sscottl for (i = 0; i < ch->numslots; i++) { 1576195534Sscottl /* XXX: reqests in loading state. */ 1577195534Sscottl if (((err >> i) & 1) == 0) 1578195534Sscottl continue; 1579203123Smav if (port >= 0 && 1580203123Smav ch->slot[i].ccb->ccb_h.target_id != port) 1581203123Smav continue; 1582198390Smav if (istatus & AHCI_P_IX_TFE) { 1583203123Smav if (port != -2) { 1584195534Sscottl /* Task File Error */ 1585203123Smav if (ch->numtslotspd[ 1586203123Smav ch->slot[i].ccb->ccb_h.target_id] == 0) { 1587195534Sscottl /* Untagged operation. */ 1588195534Sscottl if (i == ccs) 1589195534Sscottl et = AHCI_ERR_TFE; 1590195534Sscottl else 1591195534Sscottl et = AHCI_ERR_INNOCENT; 1592195534Sscottl } else { 1593195534Sscottl /* Tagged operation. */ 1594195534Sscottl et = AHCI_ERR_NCQ; 1595195534Sscottl } 1596203123Smav } else { 1597203123Smav et = AHCI_ERR_TFE; 1598203123Smav ch->fatalerr = 1; 1599203123Smav } 1600198390Smav } else if (istatus & AHCI_P_IX_IF) { 1601203123Smav if (ch->numtslots == 0 && i != ccs && port != -2) 1602198390Smav et = AHCI_ERR_INNOCENT; 1603198390Smav else 1604198390Smav et = AHCI_ERR_SATA; 1605195534Sscottl } else 1606195534Sscottl et = AHCI_ERR_INVALID; 1607195534Sscottl ahci_end_transaction(&ch->slot[i], et); 1608195534Sscottl } 1609203123Smav /* 1610203123Smav * We can't reinit port if there are some other 1611203123Smav * commands active, use resume to complete them. 1612203123Smav */ 1613220565Smav if (ch->rslots != 0 && !ch->recoverycmd) 1614203123Smav ATA_OUTL(ch->r_mem, AHCI_P_FBS, AHCI_P_FBS_EN | AHCI_P_FBS_DEC); 1615195534Sscottl } 1616196656Smav /* Process NOTIFY events */ 1617196907Smav if (sntf) 1618196907Smav ahci_notify_events(dev, sntf); 1619195534Sscottl} 1620195534Sscottl 1621195534Sscottl/* Must be called with channel locked. */ 1622195534Sscottlstatic int 1623195534Sscottlahci_check_collision(device_t dev, union ccb *ccb) 1624195534Sscottl{ 1625195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1626203123Smav int t = ccb->ccb_h.target_id; 1627195534Sscottl 1628195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1629195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1630199747Smav /* Tagged command while we have no supported tag free. */ 1631199747Smav if (((~ch->oslots) & (0xffffffff >> (32 - 1632203123Smav ch->curr[t].tags))) == 0) 1633199747Smav return (1); 1634203123Smav /* If we have FBS */ 1635203123Smav if (ch->fbs_enabled) { 1636203123Smav /* Tagged command while untagged are active. */ 1637203123Smav if (ch->numrslotspd[t] != 0 && ch->numtslotspd[t] == 0) 1638203123Smav return (1); 1639203123Smav } else { 1640203123Smav /* Tagged command while untagged are active. */ 1641203123Smav if (ch->numrslots != 0 && ch->numtslots == 0) 1642203123Smav return (1); 1643203123Smav /* Tagged command while tagged to other target is active. */ 1644203123Smav if (ch->numtslots != 0 && 1645203123Smav ch->taggedtarget != ccb->ccb_h.target_id) 1646203123Smav return (1); 1647203123Smav } 1648195534Sscottl } else { 1649203123Smav /* If we have FBS */ 1650203123Smav if (ch->fbs_enabled) { 1651203123Smav /* Untagged command while tagged are active. */ 1652203123Smav if (ch->numrslotspd[t] != 0 && ch->numtslotspd[t] != 0) 1653203123Smav return (1); 1654203123Smav } else { 1655203123Smav /* Untagged command while tagged are active. */ 1656203123Smav if (ch->numrslots != 0 && ch->numtslots != 0) 1657203123Smav return (1); 1658203123Smav } 1659195534Sscottl } 1660195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1661195534Sscottl (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) { 1662195534Sscottl /* Atomic command while anything active. */ 1663195534Sscottl if (ch->numrslots != 0) 1664195534Sscottl return (1); 1665195534Sscottl } 1666195534Sscottl /* We have some atomic command running. */ 1667195534Sscottl if (ch->aslots != 0) 1668195534Sscottl return (1); 1669195534Sscottl return (0); 1670195534Sscottl} 1671195534Sscottl 1672195534Sscottl/* Must be called with channel locked. */ 1673195534Sscottlstatic void 1674195534Sscottlahci_begin_transaction(device_t dev, union ccb *ccb) 1675195534Sscottl{ 1676195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1677195534Sscottl struct ahci_slot *slot; 1678199747Smav int tag, tags; 1679195534Sscottl 1680195534Sscottl /* Choose empty slot. */ 1681199747Smav tags = ch->numslots; 1682199747Smav if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1683199747Smav (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) 1684199747Smav tags = ch->curr[ccb->ccb_h.target_id].tags; 1685195534Sscottl tag = ch->lastslot; 1686199747Smav while (1) { 1687199747Smav if (tag >= tags) 1688195534Sscottl tag = 0; 1689199747Smav if (ch->slot[tag].state == AHCI_SLOT_EMPTY) 1690199747Smav break; 1691199747Smav tag++; 1692199747Smav }; 1693195534Sscottl ch->lastslot = tag; 1694195534Sscottl /* Occupy chosen slot. */ 1695195534Sscottl slot = &ch->slot[tag]; 1696195534Sscottl slot->ccb = ccb; 1697196656Smav /* Stop PM timer. */ 1698196656Smav if (ch->numrslots == 0 && ch->pm_level > 3) 1699196656Smav callout_stop(&ch->pm_timer); 1700195534Sscottl /* Update channel stats. */ 1701199747Smav ch->oslots |= (1 << slot->slot); 1702195534Sscottl ch->numrslots++; 1703203123Smav ch->numrslotspd[ccb->ccb_h.target_id]++; 1704195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1705195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1706195534Sscottl ch->numtslots++; 1707203123Smav ch->numtslotspd[ccb->ccb_h.target_id]++; 1708195534Sscottl ch->taggedtarget = ccb->ccb_h.target_id; 1709195534Sscottl } 1710195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1711195534Sscottl (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) 1712195534Sscottl ch->aslots |= (1 << slot->slot); 1713195534Sscottl slot->dma.nsegs = 0; 1714195534Sscottl /* If request moves data, setup and load SG list */ 1715195534Sscottl if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 1716195534Sscottl void *buf; 1717195534Sscottl bus_size_t size; 1718195534Sscottl 1719195534Sscottl slot->state = AHCI_SLOT_LOADING; 1720195534Sscottl if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1721195534Sscottl buf = ccb->ataio.data_ptr; 1722195534Sscottl size = ccb->ataio.dxfer_len; 1723195534Sscottl } else { 1724195534Sscottl buf = ccb->csio.data_ptr; 1725195534Sscottl size = ccb->csio.dxfer_len; 1726195534Sscottl } 1727195534Sscottl bus_dmamap_load(ch->dma.data_tag, slot->dma.data_map, 1728195534Sscottl buf, size, ahci_dmasetprd, slot, 0); 1729195534Sscottl } else 1730195534Sscottl ahci_execute_transaction(slot); 1731195534Sscottl} 1732195534Sscottl 1733195534Sscottl/* Locked by busdma engine. */ 1734195534Sscottlstatic void 1735195534Sscottlahci_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1736195534Sscottl{ 1737195534Sscottl struct ahci_slot *slot = arg; 1738195534Sscottl struct ahci_channel *ch = device_get_softc(slot->dev); 1739195534Sscottl struct ahci_cmd_tab *ctp; 1740195534Sscottl struct ahci_dma_prd *prd; 1741195534Sscottl int i; 1742195534Sscottl 1743195534Sscottl if (error) { 1744195534Sscottl device_printf(slot->dev, "DMA load error\n"); 1745195534Sscottl ahci_end_transaction(slot, AHCI_ERR_INVALID); 1746195534Sscottl return; 1747195534Sscottl } 1748195534Sscottl KASSERT(nsegs <= AHCI_SG_ENTRIES, ("too many DMA segment entries\n")); 1749195534Sscottl /* Get a piece of the workspace for this request */ 1750195534Sscottl ctp = (struct ahci_cmd_tab *) 1751195534Sscottl (ch->dma.work + AHCI_CT_OFFSET + (AHCI_CT_SIZE * slot->slot)); 1752195534Sscottl /* Fill S/G table */ 1753195534Sscottl prd = &ctp->prd_tab[0]; 1754195534Sscottl for (i = 0; i < nsegs; i++) { 1755195534Sscottl prd[i].dba = htole64(segs[i].ds_addr); 1756195534Sscottl prd[i].dbc = htole32((segs[i].ds_len - 1) & AHCI_PRD_MASK); 1757195534Sscottl } 1758195534Sscottl slot->dma.nsegs = nsegs; 1759195534Sscottl bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 1760195534Sscottl ((slot->ccb->ccb_h.flags & CAM_DIR_IN) ? 1761195534Sscottl BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE)); 1762195534Sscottl ahci_execute_transaction(slot); 1763195534Sscottl} 1764195534Sscottl 1765195534Sscottl/* Must be called with channel locked. */ 1766195534Sscottlstatic void 1767195534Sscottlahci_execute_transaction(struct ahci_slot *slot) 1768195534Sscottl{ 1769195534Sscottl device_t dev = slot->dev; 1770195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1771195534Sscottl struct ahci_cmd_tab *ctp; 1772195534Sscottl struct ahci_cmd_list *clp; 1773195534Sscottl union ccb *ccb = slot->ccb; 1774195534Sscottl int port = ccb->ccb_h.target_id & 0x0f; 1775222304Smav int fis_size, i, softreset; 1776203123Smav uint8_t *fis = ch->dma.rfis + 0x40; 1777203123Smav uint8_t val; 1778195534Sscottl 1779195534Sscottl /* Get a piece of the workspace for this request */ 1780195534Sscottl ctp = (struct ahci_cmd_tab *) 1781195534Sscottl (ch->dma.work + AHCI_CT_OFFSET + (AHCI_CT_SIZE * slot->slot)); 1782195534Sscottl /* Setup the FIS for this request */ 1783199821Smav if (!(fis_size = ahci_setup_fis(dev, ctp, ccb, slot->slot))) { 1784195534Sscottl device_printf(ch->dev, "Setting up SATA FIS failed\n"); 1785195534Sscottl ahci_end_transaction(slot, AHCI_ERR_INVALID); 1786195534Sscottl return; 1787195534Sscottl } 1788195534Sscottl /* Setup the command list entry */ 1789195534Sscottl clp = (struct ahci_cmd_list *) 1790195534Sscottl (ch->dma.work + AHCI_CL_OFFSET + (AHCI_CL_SIZE * slot->slot)); 1791214988Smav clp->cmd_flags = htole16( 1792214988Smav (ccb->ccb_h.flags & CAM_DIR_OUT ? AHCI_CMD_WRITE : 0) | 1793214988Smav (ccb->ccb_h.func_code == XPT_SCSI_IO ? 1794214988Smav (AHCI_CMD_ATAPI | AHCI_CMD_PREFETCH) : 0) | 1795214988Smav (fis_size / sizeof(u_int32_t)) | 1796214988Smav (port << 12)); 1797214988Smav clp->prd_length = htole16(slot->dma.nsegs); 1798195534Sscottl /* Special handling for Soft Reset command. */ 1799195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1800203123Smav (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL)) { 1801203123Smav if (ccb->ataio.cmd.control & ATA_A_RESET) { 1802222304Smav softreset = 1; 1803203123Smav /* Kick controller into sane state */ 1804203123Smav ahci_stop(dev); 1805203123Smav ahci_clo(dev); 1806203123Smav ahci_start(dev, 0); 1807203123Smav clp->cmd_flags |= AHCI_CMD_RESET | AHCI_CMD_CLR_BUSY; 1808203123Smav } else { 1809222304Smav softreset = 2; 1810203123Smav /* Prepare FIS receive area for check. */ 1811203123Smav for (i = 0; i < 20; i++) 1812203123Smav fis[i] = 0xff; 1813203123Smav } 1814222304Smav } else 1815222304Smav softreset = 0; 1816195534Sscottl clp->bytecount = 0; 1817195534Sscottl clp->cmd_table_phys = htole64(ch->dma.work_bus + AHCI_CT_OFFSET + 1818195534Sscottl (AHCI_CT_SIZE * slot->slot)); 1819195534Sscottl bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1820214988Smav BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1821195534Sscottl bus_dmamap_sync(ch->dma.rfis_tag, ch->dma.rfis_map, 1822195534Sscottl BUS_DMASYNC_PREREAD); 1823195534Sscottl /* Set ACTIVE bit for NCQ commands. */ 1824195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1825195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1826195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SACT, 1 << slot->slot); 1827195534Sscottl } 1828203123Smav /* If FBS is enabled, set PMP port. */ 1829203123Smav if (ch->fbs_enabled) { 1830203123Smav ATA_OUTL(ch->r_mem, AHCI_P_FBS, AHCI_P_FBS_EN | 1831203123Smav (port << AHCI_P_FBS_DEV_SHIFT)); 1832203123Smav } 1833195534Sscottl /* Issue command to the controller. */ 1834195534Sscottl slot->state = AHCI_SLOT_RUNNING; 1835195534Sscottl ch->rslots |= (1 << slot->slot); 1836195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CI, (1 << slot->slot)); 1837195534Sscottl /* Device reset commands doesn't interrupt. Poll them. */ 1838195534Sscottl if (ccb->ccb_h.func_code == XPT_ATA_IO && 1839222304Smav (ccb->ataio.cmd.command == ATA_DEVICE_RESET || softreset)) { 1840220777Smav int count, timeout = ccb->ccb_h.timeout * 100; 1841195534Sscottl enum ahci_err_type et = AHCI_ERR_NONE; 1842195534Sscottl 1843195534Sscottl for (count = 0; count < timeout; count++) { 1844220777Smav DELAY(10); 1845195534Sscottl if (!(ATA_INL(ch->r_mem, AHCI_P_CI) & (1 << slot->slot))) 1846195534Sscottl break; 1847222304Smav if ((ATA_INL(ch->r_mem, AHCI_P_TFD) & ATA_S_ERROR) && 1848222304Smav softreset != 1) { 1849222285Smav#if 0 1850195534Sscottl device_printf(ch->dev, 1851195534Sscottl "Poll error on slot %d, TFD: %04x\n", 1852195534Sscottl slot->slot, ATA_INL(ch->r_mem, AHCI_P_TFD)); 1853222285Smav#endif 1854195534Sscottl et = AHCI_ERR_TFE; 1855195534Sscottl break; 1856195534Sscottl } 1857198851Smav /* Workaround for ATI SB600/SB700 chipsets. */ 1858198851Smav if (ccb->ccb_h.target_id == 15 && 1859198851Smav pci_get_vendor(device_get_parent(dev)) == 0x1002 && 1860198851Smav (ATA_INL(ch->r_mem, AHCI_P_IS) & AHCI_P_IX_IPM)) { 1861198851Smav et = AHCI_ERR_TIMEOUT; 1862198851Smav break; 1863198851Smav } 1864195534Sscottl } 1865222304Smav 1866222304Smav /* Marvell controllers do not wait for readyness. */ 1867222304Smav if ((ch->quirks & AHCI_Q_NOBSYRES) && softreset == 2 && 1868222304Smav et == AHCI_ERR_NONE) { 1869222304Smav while ((val = fis[2]) & ATA_S_BUSY) { 1870222304Smav DELAY(10); 1871222304Smav if (count++ >= timeout) 1872222304Smav break; 1873222304Smav } 1874222304Smav } 1875222304Smav 1876195534Sscottl if (timeout && (count >= timeout)) { 1877222304Smav device_printf(dev, "Poll timeout on slot %d port %d\n", 1878222304Smav slot->slot, port); 1879203108Smav device_printf(dev, "is %08x cs %08x ss %08x " 1880203108Smav "rs %08x tfd %02x serr %08x\n", 1881203108Smav ATA_INL(ch->r_mem, AHCI_P_IS), 1882203108Smav ATA_INL(ch->r_mem, AHCI_P_CI), 1883203108Smav ATA_INL(ch->r_mem, AHCI_P_SACT), ch->rslots, 1884203108Smav ATA_INL(ch->r_mem, AHCI_P_TFD), 1885203108Smav ATA_INL(ch->r_mem, AHCI_P_SERR)); 1886195534Sscottl et = AHCI_ERR_TIMEOUT; 1887195534Sscottl } 1888222304Smav 1889203123Smav /* Kick controller into sane state and enable FBS. */ 1890222304Smav if (softreset == 2) 1891222285Smav ch->eslots |= (1 << slot->slot); 1892222285Smav ahci_end_transaction(slot, et); 1893195534Sscottl return; 1894195534Sscottl } 1895195534Sscottl /* Start command execution timeout */ 1896198319Smav callout_reset(&slot->timeout, (int)ccb->ccb_h.timeout * hz / 2000, 1897195534Sscottl (timeout_t*)ahci_timeout, slot); 1898195534Sscottl return; 1899195534Sscottl} 1900195534Sscottl 1901203873Smav/* Must be called with channel locked. */ 1902203873Smavstatic void 1903203873Smavahci_process_timeout(device_t dev) 1904203873Smav{ 1905203873Smav struct ahci_channel *ch = device_get_softc(dev); 1906203873Smav int i; 1907203873Smav 1908203873Smav mtx_assert(&ch->mtx, MA_OWNED); 1909203873Smav /* Handle the rest of commands. */ 1910203873Smav for (i = 0; i < ch->numslots; i++) { 1911203873Smav /* Do we have a running request on slot? */ 1912203873Smav if (ch->slot[i].state < AHCI_SLOT_RUNNING) 1913203873Smav continue; 1914203873Smav ahci_end_transaction(&ch->slot[i], AHCI_ERR_TIMEOUT); 1915203873Smav } 1916203873Smav} 1917203873Smav 1918203873Smav/* Must be called with channel locked. */ 1919203873Smavstatic void 1920203873Smavahci_rearm_timeout(device_t dev) 1921203873Smav{ 1922203873Smav struct ahci_channel *ch = device_get_softc(dev); 1923203873Smav int i; 1924203873Smav 1925203873Smav mtx_assert(&ch->mtx, MA_OWNED); 1926203873Smav for (i = 0; i < ch->numslots; i++) { 1927203873Smav struct ahci_slot *slot = &ch->slot[i]; 1928203873Smav 1929203873Smav /* Do we have a running request on slot? */ 1930203873Smav if (slot->state < AHCI_SLOT_RUNNING) 1931203873Smav continue; 1932203873Smav if ((ch->toslots & (1 << i)) == 0) 1933203873Smav continue; 1934203873Smav callout_reset(&slot->timeout, 1935203873Smav (int)slot->ccb->ccb_h.timeout * hz / 2000, 1936203873Smav (timeout_t*)ahci_timeout, slot); 1937203873Smav } 1938203873Smav} 1939203873Smav 1940195534Sscottl/* Locked by callout mechanism. */ 1941195534Sscottlstatic void 1942195534Sscottlahci_timeout(struct ahci_slot *slot) 1943195534Sscottl{ 1944195534Sscottl device_t dev = slot->dev; 1945195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1946198319Smav uint32_t sstatus; 1947198319Smav int ccs; 1948195534Sscottl int i; 1949195534Sscottl 1950196656Smav /* Check for stale timeout. */ 1951198319Smav if (slot->state < AHCI_SLOT_RUNNING) 1952196656Smav return; 1953196656Smav 1954198319Smav /* Check if slot was not being executed last time we checked. */ 1955198319Smav if (slot->state < AHCI_SLOT_EXECUTING) { 1956198319Smav /* Check if slot started executing. */ 1957198319Smav sstatus = ATA_INL(ch->r_mem, AHCI_P_SACT); 1958198319Smav ccs = (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CCS_MASK) 1959198319Smav >> AHCI_P_CMD_CCS_SHIFT; 1960203123Smav if ((sstatus & (1 << slot->slot)) != 0 || ccs == slot->slot || 1961203123Smav ch->fbs_enabled) 1962198319Smav slot->state = AHCI_SLOT_EXECUTING; 1963198319Smav 1964198319Smav callout_reset(&slot->timeout, 1965198319Smav (int)slot->ccb->ccb_h.timeout * hz / 2000, 1966198319Smav (timeout_t*)ahci_timeout, slot); 1967198319Smav return; 1968198319Smav } 1969198319Smav 1970222304Smav device_printf(dev, "Timeout on slot %d port %d\n", 1971222304Smav slot->slot, slot->ccb->ccb_h.target_id & 0x0f); 1972198319Smav device_printf(dev, "is %08x cs %08x ss %08x rs %08x tfd %02x serr %08x\n", 1973198319Smav ATA_INL(ch->r_mem, AHCI_P_IS), ATA_INL(ch->r_mem, AHCI_P_CI), 1974198319Smav ATA_INL(ch->r_mem, AHCI_P_SACT), ch->rslots, 1975198319Smav ATA_INL(ch->r_mem, AHCI_P_TFD), ATA_INL(ch->r_mem, AHCI_P_SERR)); 1976195534Sscottl 1977197838Smav /* Handle frozen command. */ 1978195534Sscottl if (ch->frozen) { 1979195534Sscottl union ccb *fccb = ch->frozen; 1980195534Sscottl ch->frozen = NULL; 1981195534Sscottl fccb->ccb_h.status = CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 1982198319Smav if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 1983198319Smav xpt_freeze_devq(fccb->ccb_h.path, 1); 1984198319Smav fccb->ccb_h.status |= CAM_DEV_QFRZN; 1985198319Smav } 1986195534Sscottl xpt_done(fccb); 1987195534Sscottl } 1988203873Smav if (!ch->fbs_enabled) { 1989203873Smav /* Without FBS we know real timeout source. */ 1990203873Smav ch->fatalerr = 1; 1991203873Smav /* Handle command with timeout. */ 1992203873Smav ahci_end_transaction(&ch->slot[slot->slot], AHCI_ERR_TIMEOUT); 1993203873Smav /* Handle the rest of commands. */ 1994203873Smav for (i = 0; i < ch->numslots; i++) { 1995203873Smav /* Do we have a running request on slot? */ 1996203873Smav if (ch->slot[i].state < AHCI_SLOT_RUNNING) 1997203873Smav continue; 1998203873Smav ahci_end_transaction(&ch->slot[i], AHCI_ERR_INNOCENT); 1999203873Smav } 2000203873Smav } else { 2001203873Smav /* With FBS we wait for other commands timeout and pray. */ 2002203873Smav if (ch->toslots == 0) 2003203873Smav xpt_freeze_simq(ch->sim, 1); 2004203873Smav ch->toslots |= (1 << slot->slot); 2005203873Smav if ((ch->rslots & ~ch->toslots) == 0) 2006203873Smav ahci_process_timeout(dev); 2007203873Smav else 2008203873Smav device_printf(dev, " ... waiting for slots %08x\n", 2009203873Smav ch->rslots & ~ch->toslots); 2010195534Sscottl } 2011195534Sscottl} 2012195534Sscottl 2013195534Sscottl/* Must be called with channel locked. */ 2014195534Sscottlstatic void 2015195534Sscottlahci_end_transaction(struct ahci_slot *slot, enum ahci_err_type et) 2016195534Sscottl{ 2017195534Sscottl device_t dev = slot->dev; 2018195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2019195534Sscottl union ccb *ccb = slot->ccb; 2020214988Smav struct ahci_cmd_list *clp; 2021212732Smav int lastto; 2022222304Smav uint32_t sig; 2023195534Sscottl 2024195534Sscottl bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 2025214988Smav BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 2026214988Smav clp = (struct ahci_cmd_list *) 2027214988Smav (ch->dma.work + AHCI_CL_OFFSET + (AHCI_CL_SIZE * slot->slot)); 2028195534Sscottl /* Read result registers to the result struct 2029195534Sscottl * May be incorrect if several commands finished same time, 2030195534Sscottl * so read only when sure or have to. 2031195534Sscottl */ 2032195534Sscottl if (ccb->ccb_h.func_code == XPT_ATA_IO) { 2033195534Sscottl struct ata_res *res = &ccb->ataio.res; 2034195534Sscottl 2035195534Sscottl if ((et == AHCI_ERR_TFE) || 2036195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_NEEDRESULT)) { 2037195534Sscottl u_int8_t *fis = ch->dma.rfis + 0x40; 2038195534Sscottl 2039195534Sscottl bus_dmamap_sync(ch->dma.rfis_tag, ch->dma.rfis_map, 2040195534Sscottl BUS_DMASYNC_POSTREAD); 2041203123Smav if (ch->fbs_enabled) { 2042203123Smav fis += ccb->ccb_h.target_id * 256; 2043203123Smav res->status = fis[2]; 2044203123Smav res->error = fis[3]; 2045203123Smav } else { 2046203123Smav uint16_t tfd = ATA_INL(ch->r_mem, AHCI_P_TFD); 2047203123Smav 2048203123Smav res->status = tfd; 2049203123Smav res->error = tfd >> 8; 2050203123Smav } 2051195534Sscottl res->lba_low = fis[4]; 2052195534Sscottl res->lba_mid = fis[5]; 2053195534Sscottl res->lba_high = fis[6]; 2054195534Sscottl res->device = fis[7]; 2055195534Sscottl res->lba_low_exp = fis[8]; 2056195534Sscottl res->lba_mid_exp = fis[9]; 2057195534Sscottl res->lba_high_exp = fis[10]; 2058195534Sscottl res->sector_count = fis[12]; 2059195534Sscottl res->sector_count_exp = fis[13]; 2060222304Smav 2061222304Smav /* 2062222304Smav * Some weird controllers do not return signature in 2063222304Smav * FIS receive area. Read it from PxSIG register. 2064222304Smav */ 2065222304Smav if ((ch->quirks & AHCI_Q_ALTSIG) && 2066222304Smav (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) && 2067222304Smav (ccb->ataio.cmd.control & ATA_A_RESET) == 0) { 2068222304Smav sig = ATA_INL(ch->r_mem, AHCI_P_SIG); 2069222304Smav res->lba_high = sig >> 24; 2070222304Smav res->lba_mid = sig >> 16; 2071222304Smav res->lba_low = sig >> 8; 2072222304Smav res->sector_count = sig; 2073222304Smav } 2074195534Sscottl } else 2075195534Sscottl bzero(res, sizeof(*res)); 2076214988Smav if ((ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) == 0 && 2077218596Smav (ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 2078218596Smav (ch->quirks & AHCI_Q_NOCOUNT) == 0) { 2079214988Smav ccb->ataio.resid = 2080214988Smav ccb->ataio.dxfer_len - le32toh(clp->bytecount); 2081214988Smav } 2082214988Smav } else { 2083218596Smav if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 2084218596Smav (ch->quirks & AHCI_Q_NOCOUNT) == 0) { 2085214988Smav ccb->csio.resid = 2086214988Smav ccb->csio.dxfer_len - le32toh(clp->bytecount); 2087214988Smav } 2088195534Sscottl } 2089195534Sscottl if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 2090195534Sscottl bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 2091195534Sscottl (ccb->ccb_h.flags & CAM_DIR_IN) ? 2092195534Sscottl BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 2093195534Sscottl bus_dmamap_unload(ch->dma.data_tag, slot->dma.data_map); 2094195534Sscottl } 2095203123Smav if (et != AHCI_ERR_NONE) 2096203123Smav ch->eslots |= (1 << slot->slot); 2097198319Smav /* In case of error, freeze device for proper recovery. */ 2098220565Smav if ((et != AHCI_ERR_NONE) && (!ch->recoverycmd) && 2099198319Smav !(ccb->ccb_h.status & CAM_DEV_QFRZN)) { 2100198319Smav xpt_freeze_devq(ccb->ccb_h.path, 1); 2101198319Smav ccb->ccb_h.status |= CAM_DEV_QFRZN; 2102198319Smav } 2103195534Sscottl /* Set proper result status. */ 2104195534Sscottl ccb->ccb_h.status &= ~CAM_STATUS_MASK; 2105195534Sscottl switch (et) { 2106195534Sscottl case AHCI_ERR_NONE: 2107195534Sscottl ccb->ccb_h.status |= CAM_REQ_CMP; 2108195534Sscottl if (ccb->ccb_h.func_code == XPT_SCSI_IO) 2109195534Sscottl ccb->csio.scsi_status = SCSI_STATUS_OK; 2110195534Sscottl break; 2111195534Sscottl case AHCI_ERR_INVALID: 2112198851Smav ch->fatalerr = 1; 2113195534Sscottl ccb->ccb_h.status |= CAM_REQ_INVALID; 2114195534Sscottl break; 2115195534Sscottl case AHCI_ERR_INNOCENT: 2116195534Sscottl ccb->ccb_h.status |= CAM_REQUEUE_REQ; 2117195534Sscottl break; 2118195534Sscottl case AHCI_ERR_TFE: 2119198319Smav case AHCI_ERR_NCQ: 2120195534Sscottl if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 2121195534Sscottl ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR; 2122195534Sscottl ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 2123195534Sscottl } else { 2124195534Sscottl ccb->ccb_h.status |= CAM_ATA_STATUS_ERROR; 2125195534Sscottl } 2126195534Sscottl break; 2127195534Sscottl case AHCI_ERR_SATA: 2128198851Smav ch->fatalerr = 1; 2129220565Smav if (!ch->recoverycmd) { 2130198319Smav xpt_freeze_simq(ch->sim, 1); 2131198319Smav ccb->ccb_h.status &= ~CAM_STATUS_MASK; 2132198319Smav ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 2133198319Smav } 2134198319Smav ccb->ccb_h.status |= CAM_UNCOR_PARITY; 2135195534Sscottl break; 2136195534Sscottl case AHCI_ERR_TIMEOUT: 2137220565Smav if (!ch->recoverycmd) { 2138198319Smav xpt_freeze_simq(ch->sim, 1); 2139198319Smav ccb->ccb_h.status &= ~CAM_STATUS_MASK; 2140198319Smav ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 2141198319Smav } 2142195534Sscottl ccb->ccb_h.status |= CAM_CMD_TIMEOUT; 2143195534Sscottl break; 2144195534Sscottl default: 2145198851Smav ch->fatalerr = 1; 2146195534Sscottl ccb->ccb_h.status |= CAM_REQ_CMP_ERR; 2147195534Sscottl } 2148195534Sscottl /* Free slot. */ 2149199747Smav ch->oslots &= ~(1 << slot->slot); 2150195534Sscottl ch->rslots &= ~(1 << slot->slot); 2151195534Sscottl ch->aslots &= ~(1 << slot->slot); 2152195534Sscottl slot->state = AHCI_SLOT_EMPTY; 2153195534Sscottl slot->ccb = NULL; 2154195534Sscottl /* Update channel stats. */ 2155195534Sscottl ch->numrslots--; 2156203123Smav ch->numrslotspd[ccb->ccb_h.target_id]--; 2157195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 2158195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 2159195534Sscottl ch->numtslots--; 2160203123Smav ch->numtslotspd[ccb->ccb_h.target_id]--; 2161195534Sscottl } 2162212732Smav /* Cancel timeout state if request completed normally. */ 2163212732Smav if (et != AHCI_ERR_TIMEOUT) { 2164212732Smav lastto = (ch->toslots == (1 << slot->slot)); 2165212732Smav ch->toslots &= ~(1 << slot->slot); 2166212732Smav if (lastto) 2167212732Smav xpt_release_simq(ch->sim, TRUE); 2168212732Smav } 2169195534Sscottl /* If it was first request of reset sequence and there is no error, 2170195534Sscottl * proceed to second request. */ 2171195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 2172195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) && 2173195534Sscottl (ccb->ataio.cmd.control & ATA_A_RESET) && 2174195534Sscottl et == AHCI_ERR_NONE) { 2175195534Sscottl ccb->ataio.cmd.control &= ~ATA_A_RESET; 2176195534Sscottl ahci_begin_transaction(dev, ccb); 2177195534Sscottl return; 2178195534Sscottl } 2179198851Smav /* If it was our READ LOG command - process it. */ 2180220565Smav if (ccb->ccb_h.recovery_type == RECOVERY_READ_LOG) { 2181198851Smav ahci_process_read_log(dev, ccb); 2182220565Smav /* If it was our REQUEST SENSE command - process it. */ 2183220565Smav } else if (ccb->ccb_h.recovery_type == RECOVERY_REQUEST_SENSE) { 2184220565Smav ahci_process_request_sense(dev, ccb); 2185220565Smav /* If it was NCQ or ATAPI command error, put result on hold. */ 2186220565Smav } else if (et == AHCI_ERR_NCQ || 2187220565Smav ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_SCSI_STATUS_ERROR && 2188220565Smav (ccb->ccb_h.flags & CAM_DIS_AUTOSENSE) == 0)) { 2189195534Sscottl ch->hold[slot->slot] = ccb; 2190203123Smav ch->numhslots++; 2191198851Smav } else 2192195534Sscottl xpt_done(ccb); 2193198851Smav /* If we have no other active commands, ... */ 2194198851Smav if (ch->rslots == 0) { 2195198851Smav /* if there was fatal error - reset port. */ 2196203873Smav if (ch->toslots != 0 || ch->fatalerr) { 2197198851Smav ahci_reset(dev); 2198203123Smav } else { 2199203123Smav /* if we have slots in error, we can reinit port. */ 2200203123Smav if (ch->eslots != 0) { 2201203123Smav ahci_stop(dev); 2202222285Smav ahci_clo(dev); 2203203123Smav ahci_start(dev, 1); 2204203123Smav } 2205203123Smav /* if there commands on hold, we can do READ LOG. */ 2206220565Smav if (!ch->recoverycmd && ch->numhslots) 2207220565Smav ahci_issue_recovery(dev); 2208198851Smav } 2209203873Smav /* If all the rest of commands are in timeout - give them chance. */ 2210203873Smav } else if ((ch->rslots & ~ch->toslots) == 0 && 2211203873Smav et != AHCI_ERR_TIMEOUT) 2212203873Smav ahci_rearm_timeout(dev); 2213222285Smav /* Unfreeze frozen command. */ 2214222285Smav if (ch->frozen && !ahci_check_collision(dev, ch->frozen)) { 2215222285Smav union ccb *fccb = ch->frozen; 2216222285Smav ch->frozen = NULL; 2217222285Smav ahci_begin_transaction(dev, fccb); 2218222285Smav xpt_release_simq(ch->sim, TRUE); 2219222285Smav } 2220196656Smav /* Start PM timer. */ 2221207499Smav if (ch->numrslots == 0 && ch->pm_level > 3 && 2222207499Smav (ch->curr[ch->pm_present ? 15 : 0].caps & CTS_SATA_CAPS_D_PMREQ)) { 2223196656Smav callout_schedule(&ch->pm_timer, 2224196656Smav (ch->pm_level == 4) ? hz / 1000 : hz / 8); 2225196656Smav } 2226195534Sscottl} 2227195534Sscottl 2228195534Sscottlstatic void 2229220565Smavahci_issue_recovery(device_t dev) 2230195534Sscottl{ 2231195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2232195534Sscottl union ccb *ccb; 2233195534Sscottl struct ccb_ataio *ataio; 2234220565Smav struct ccb_scsiio *csio; 2235195534Sscottl int i; 2236195534Sscottl 2237220830Smav /* Find some held command. */ 2238195534Sscottl for (i = 0; i < ch->numslots; i++) { 2239195534Sscottl if (ch->hold[i]) 2240195534Sscottl break; 2241195534Sscottl } 2242195534Sscottl ccb = xpt_alloc_ccb_nowait(); 2243195534Sscottl if (ccb == NULL) { 2244220830Smav device_printf(dev, "Unable to allocate recovery command\n"); 2245220822Smavcompleteall: 2246220830Smav /* We can't do anything -- complete held commands. */ 2247220822Smav for (i = 0; i < ch->numslots; i++) { 2248220822Smav if (ch->hold[i] == NULL) 2249220822Smav continue; 2250220822Smav ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 2251220822Smav ch->hold[i]->ccb_h.status |= CAM_RESRC_UNAVAIL; 2252220822Smav xpt_done(ch->hold[i]); 2253220822Smav ch->hold[i] = NULL; 2254220822Smav ch->numhslots--; 2255220822Smav } 2256220822Smav ahci_reset(dev); 2257220822Smav return; 2258195534Sscottl } 2259195534Sscottl ccb->ccb_h = ch->hold[i]->ccb_h; /* Reuse old header. */ 2260220565Smav if (ccb->ccb_h.func_code == XPT_ATA_IO) { 2261220565Smav /* READ LOG */ 2262220565Smav ccb->ccb_h.recovery_type = RECOVERY_READ_LOG; 2263220565Smav ccb->ccb_h.func_code = XPT_ATA_IO; 2264220565Smav ccb->ccb_h.flags = CAM_DIR_IN; 2265220565Smav ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ 2266220565Smav ataio = &ccb->ataio; 2267220565Smav ataio->data_ptr = malloc(512, M_AHCI, M_NOWAIT); 2268220565Smav if (ataio->data_ptr == NULL) { 2269220565Smav xpt_free_ccb(ccb); 2270220822Smav device_printf(dev, 2271220830Smav "Unable to allocate memory for READ LOG command\n"); 2272220822Smav goto completeall; 2273220565Smav } 2274220565Smav ataio->dxfer_len = 512; 2275220565Smav bzero(&ataio->cmd, sizeof(ataio->cmd)); 2276220565Smav ataio->cmd.flags = CAM_ATAIO_48BIT; 2277220565Smav ataio->cmd.command = 0x2F; /* READ LOG EXT */ 2278220565Smav ataio->cmd.sector_count = 1; 2279220565Smav ataio->cmd.sector_count_exp = 0; 2280220565Smav ataio->cmd.lba_low = 0x10; 2281220565Smav ataio->cmd.lba_mid = 0; 2282220565Smav ataio->cmd.lba_mid_exp = 0; 2283220565Smav } else { 2284220565Smav /* REQUEST SENSE */ 2285220565Smav ccb->ccb_h.recovery_type = RECOVERY_REQUEST_SENSE; 2286220565Smav ccb->ccb_h.recovery_slot = i; 2287220565Smav ccb->ccb_h.func_code = XPT_SCSI_IO; 2288220565Smav ccb->ccb_h.flags = CAM_DIR_IN; 2289220565Smav ccb->ccb_h.status = 0; 2290220565Smav ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ 2291220565Smav csio = &ccb->csio; 2292220565Smav csio->data_ptr = (void *)&ch->hold[i]->csio.sense_data; 2293220565Smav csio->dxfer_len = ch->hold[i]->csio.sense_len; 2294220565Smav csio->cdb_len = 6; 2295220565Smav bzero(&csio->cdb_io, sizeof(csio->cdb_io)); 2296220565Smav csio->cdb_io.cdb_bytes[0] = 0x03; 2297220565Smav csio->cdb_io.cdb_bytes[4] = csio->dxfer_len; 2298195534Sscottl } 2299220565Smav /* Freeze SIM while doing recovery. */ 2300220822Smav ch->recoverycmd = 1; 2301198319Smav xpt_freeze_simq(ch->sim, 1); 2302195534Sscottl ahci_begin_transaction(dev, ccb); 2303195534Sscottl} 2304195534Sscottl 2305195534Sscottlstatic void 2306195534Sscottlahci_process_read_log(device_t dev, union ccb *ccb) 2307195534Sscottl{ 2308195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2309195534Sscottl uint8_t *data; 2310195534Sscottl struct ata_res *res; 2311195534Sscottl int i; 2312195534Sscottl 2313220565Smav ch->recoverycmd = 0; 2314195534Sscottl 2315195534Sscottl data = ccb->ataio.data_ptr; 2316195534Sscottl if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP && 2317195534Sscottl (data[0] & 0x80) == 0) { 2318195534Sscottl for (i = 0; i < ch->numslots; i++) { 2319195534Sscottl if (!ch->hold[i]) 2320195534Sscottl continue; 2321220565Smav if (ch->hold[i]->ccb_h.func_code != XPT_ATA_IO) 2322220565Smav continue; 2323195534Sscottl if ((data[0] & 0x1F) == i) { 2324195534Sscottl res = &ch->hold[i]->ataio.res; 2325195534Sscottl res->status = data[2]; 2326195534Sscottl res->error = data[3]; 2327195534Sscottl res->lba_low = data[4]; 2328195534Sscottl res->lba_mid = data[5]; 2329195534Sscottl res->lba_high = data[6]; 2330195534Sscottl res->device = data[7]; 2331195534Sscottl res->lba_low_exp = data[8]; 2332195534Sscottl res->lba_mid_exp = data[9]; 2333195534Sscottl res->lba_high_exp = data[10]; 2334195534Sscottl res->sector_count = data[12]; 2335195534Sscottl res->sector_count_exp = data[13]; 2336195534Sscottl } else { 2337195534Sscottl ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 2338195534Sscottl ch->hold[i]->ccb_h.status |= CAM_REQUEUE_REQ; 2339195534Sscottl } 2340195534Sscottl xpt_done(ch->hold[i]); 2341195534Sscottl ch->hold[i] = NULL; 2342203123Smav ch->numhslots--; 2343195534Sscottl } 2344195534Sscottl } else { 2345195534Sscottl if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) 2346195534Sscottl device_printf(dev, "Error while READ LOG EXT\n"); 2347195534Sscottl else if ((data[0] & 0x80) == 0) { 2348195534Sscottl device_printf(dev, "Non-queued command error in READ LOG EXT\n"); 2349195534Sscottl } 2350195534Sscottl for (i = 0; i < ch->numslots; i++) { 2351195534Sscottl if (!ch->hold[i]) 2352195534Sscottl continue; 2353220565Smav if (ch->hold[i]->ccb_h.func_code != XPT_ATA_IO) 2354220565Smav continue; 2355195534Sscottl xpt_done(ch->hold[i]); 2356195534Sscottl ch->hold[i] = NULL; 2357203123Smav ch->numhslots--; 2358195534Sscottl } 2359195534Sscottl } 2360195534Sscottl free(ccb->ataio.data_ptr, M_AHCI); 2361195534Sscottl xpt_free_ccb(ccb); 2362198319Smav xpt_release_simq(ch->sim, TRUE); 2363195534Sscottl} 2364195534Sscottl 2365195534Sscottlstatic void 2366220565Smavahci_process_request_sense(device_t dev, union ccb *ccb) 2367220565Smav{ 2368220565Smav struct ahci_channel *ch = device_get_softc(dev); 2369220565Smav int i; 2370220565Smav 2371220565Smav ch->recoverycmd = 0; 2372220565Smav 2373220565Smav i = ccb->ccb_h.recovery_slot; 2374220565Smav if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP) { 2375220565Smav ch->hold[i]->ccb_h.status |= CAM_AUTOSNS_VALID; 2376220565Smav } else { 2377220565Smav ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 2378220565Smav ch->hold[i]->ccb_h.status |= CAM_AUTOSENSE_FAIL; 2379220565Smav } 2380220565Smav xpt_done(ch->hold[i]); 2381220565Smav ch->hold[i] = NULL; 2382220565Smav ch->numhslots--; 2383220565Smav xpt_free_ccb(ccb); 2384220565Smav xpt_release_simq(ch->sim, TRUE); 2385220565Smav} 2386220565Smav 2387220565Smavstatic void 2388203123Smavahci_start(device_t dev, int fbs) 2389195534Sscottl{ 2390195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2391195534Sscottl u_int32_t cmd; 2392195534Sscottl 2393195534Sscottl /* Clear SATA error register */ 2394195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SERR, 0xFFFFFFFF); 2395195534Sscottl /* Clear any interrupts pending on this channel */ 2396195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IS, 0xFFFFFFFF); 2397203123Smav /* Configure FIS-based switching if supported. */ 2398203123Smav if (ch->chcaps & AHCI_P_CMD_FBSCP) { 2399203123Smav ch->fbs_enabled = (fbs && ch->pm_present) ? 1 : 0; 2400203123Smav ATA_OUTL(ch->r_mem, AHCI_P_FBS, 2401203123Smav ch->fbs_enabled ? AHCI_P_FBS_EN : 0); 2402203123Smav } 2403195534Sscottl /* Start operations on this channel */ 2404195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 2405207430Smav cmd &= ~AHCI_P_CMD_PMA; 2406195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd | AHCI_P_CMD_ST | 2407195534Sscottl (ch->pm_present ? AHCI_P_CMD_PMA : 0)); 2408195534Sscottl} 2409195534Sscottl 2410195534Sscottlstatic void 2411195534Sscottlahci_stop(device_t dev) 2412195534Sscottl{ 2413195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2414195534Sscottl u_int32_t cmd; 2415195534Sscottl int timeout; 2416195534Sscottl 2417195534Sscottl /* Kill all activity on this channel */ 2418195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 2419195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd & ~AHCI_P_CMD_ST); 2420195534Sscottl /* Wait for activity stop. */ 2421195534Sscottl timeout = 0; 2422195534Sscottl do { 2423220777Smav DELAY(10); 2424220777Smav if (timeout++ > 50000) { 2425195534Sscottl device_printf(dev, "stopping AHCI engine failed\n"); 2426195534Sscottl break; 2427195534Sscottl } 2428195534Sscottl } while (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CR); 2429203123Smav ch->eslots = 0; 2430195534Sscottl} 2431195534Sscottl 2432195534Sscottlstatic void 2433195534Sscottlahci_clo(device_t dev) 2434195534Sscottl{ 2435195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2436195534Sscottl u_int32_t cmd; 2437195534Sscottl int timeout; 2438195534Sscottl 2439195534Sscottl /* Issue Command List Override if supported */ 2440195534Sscottl if (ch->caps & AHCI_CAP_SCLO) { 2441195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 2442195534Sscottl cmd |= AHCI_P_CMD_CLO; 2443195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd); 2444195534Sscottl timeout = 0; 2445195534Sscottl do { 2446220777Smav DELAY(10); 2447220777Smav if (timeout++ > 50000) { 2448195534Sscottl device_printf(dev, "executing CLO failed\n"); 2449195534Sscottl break; 2450195534Sscottl } 2451195534Sscottl } while (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CLO); 2452195534Sscottl } 2453195534Sscottl} 2454195534Sscottl 2455195534Sscottlstatic void 2456195534Sscottlahci_stop_fr(device_t dev) 2457195534Sscottl{ 2458195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2459195534Sscottl u_int32_t cmd; 2460195534Sscottl int timeout; 2461195534Sscottl 2462195534Sscottl /* Kill all FIS reception on this channel */ 2463195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 2464195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd & ~AHCI_P_CMD_FRE); 2465195534Sscottl /* Wait for FIS reception stop. */ 2466195534Sscottl timeout = 0; 2467195534Sscottl do { 2468220777Smav DELAY(10); 2469220777Smav if (timeout++ > 50000) { 2470195534Sscottl device_printf(dev, "stopping AHCI FR engine failed\n"); 2471195534Sscottl break; 2472195534Sscottl } 2473195534Sscottl } while (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_FR); 2474195534Sscottl} 2475195534Sscottl 2476195534Sscottlstatic void 2477195534Sscottlahci_start_fr(device_t dev) 2478195534Sscottl{ 2479195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2480195534Sscottl u_int32_t cmd; 2481195534Sscottl 2482195534Sscottl /* Start FIS reception on this channel */ 2483195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 2484195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd | AHCI_P_CMD_FRE); 2485195534Sscottl} 2486195534Sscottl 2487195534Sscottlstatic int 2488220576Smavahci_wait_ready(device_t dev, int t, int t0) 2489195534Sscottl{ 2490195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2491195534Sscottl int timeout = 0; 2492195534Sscottl uint32_t val; 2493195534Sscottl 2494195534Sscottl while ((val = ATA_INL(ch->r_mem, AHCI_P_TFD)) & 2495195534Sscottl (ATA_S_BUSY | ATA_S_DRQ)) { 2496220576Smav if (timeout > t) { 2497220576Smav if (t != 0) { 2498220576Smav device_printf(dev, 2499220576Smav "AHCI reset: device not ready after %dms " 2500220576Smav "(tfd = %08x)\n", 2501220576Smav MAX(t, 0) + t0, val); 2502220576Smav } 2503195534Sscottl return (EBUSY); 2504195534Sscottl } 2505220576Smav DELAY(1000); 2506220576Smav timeout++; 2507220576Smav } 2508195534Sscottl if (bootverbose) 2509220576Smav device_printf(dev, "AHCI reset: device ready after %dms\n", 2510220576Smav timeout + t0); 2511195534Sscottl return (0); 2512195534Sscottl} 2513195534Sscottl 2514195534Sscottlstatic void 2515220576Smavahci_reset_to(void *arg) 2516220576Smav{ 2517220576Smav device_t dev = arg; 2518220576Smav struct ahci_channel *ch = device_get_softc(dev); 2519220576Smav 2520220576Smav if (ch->resetting == 0) 2521220576Smav return; 2522220576Smav ch->resetting--; 2523220576Smav if (ahci_wait_ready(dev, ch->resetting == 0 ? -1 : 0, 2524220576Smav (310 - ch->resetting) * 100) == 0) { 2525220576Smav ch->resetting = 0; 2526220777Smav ahci_start(dev, 1); 2527220576Smav xpt_release_simq(ch->sim, TRUE); 2528220576Smav return; 2529220576Smav } 2530220576Smav if (ch->resetting == 0) { 2531220576Smav ahci_clo(dev); 2532220576Smav ahci_start(dev, 1); 2533220576Smav xpt_release_simq(ch->sim, TRUE); 2534220576Smav return; 2535220576Smav } 2536220576Smav callout_schedule(&ch->reset_timer, hz / 10); 2537220576Smav} 2538220576Smav 2539220576Smavstatic void 2540195534Sscottlahci_reset(device_t dev) 2541195534Sscottl{ 2542195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2543196656Smav struct ahci_controller *ctlr = device_get_softc(device_get_parent(dev)); 2544195534Sscottl int i; 2545195534Sscottl 2546203108Smav xpt_freeze_simq(ch->sim, 1); 2547195534Sscottl if (bootverbose) 2548195534Sscottl device_printf(dev, "AHCI reset...\n"); 2549220576Smav /* Forget about previous reset. */ 2550220576Smav if (ch->resetting) { 2551220576Smav ch->resetting = 0; 2552220576Smav callout_stop(&ch->reset_timer); 2553220576Smav xpt_release_simq(ch->sim, TRUE); 2554220576Smav } 2555195534Sscottl /* Requeue freezed command. */ 2556195534Sscottl if (ch->frozen) { 2557195534Sscottl union ccb *fccb = ch->frozen; 2558195534Sscottl ch->frozen = NULL; 2559195534Sscottl fccb->ccb_h.status = CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 2560198319Smav if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 2561198319Smav xpt_freeze_devq(fccb->ccb_h.path, 1); 2562198319Smav fccb->ccb_h.status |= CAM_DEV_QFRZN; 2563198319Smav } 2564195534Sscottl xpt_done(fccb); 2565195534Sscottl } 2566195534Sscottl /* Kill the engine and requeue all running commands. */ 2567195534Sscottl ahci_stop(dev); 2568195534Sscottl for (i = 0; i < ch->numslots; i++) { 2569195534Sscottl /* Do we have a running request on slot? */ 2570195534Sscottl if (ch->slot[i].state < AHCI_SLOT_RUNNING) 2571195534Sscottl continue; 2572195534Sscottl /* XXX; Commands in loading state. */ 2573195534Sscottl ahci_end_transaction(&ch->slot[i], AHCI_ERR_INNOCENT); 2574195534Sscottl } 2575198851Smav for (i = 0; i < ch->numslots; i++) { 2576198851Smav if (!ch->hold[i]) 2577198851Smav continue; 2578198851Smav xpt_done(ch->hold[i]); 2579198851Smav ch->hold[i] = NULL; 2580203123Smav ch->numhslots--; 2581198851Smav } 2582203873Smav if (ch->toslots != 0) 2583203873Smav xpt_release_simq(ch->sim, TRUE); 2584203123Smav ch->eslots = 0; 2585203873Smav ch->toslots = 0; 2586198851Smav ch->fatalerr = 0; 2587198319Smav /* Tell the XPT about the event */ 2588198319Smav xpt_async(AC_BUS_RESET, ch->path, NULL); 2589195534Sscottl /* Disable port interrupts */ 2590195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 0); 2591195534Sscottl /* Reset and reconnect PHY, */ 2592203108Smav if (!ahci_sata_phy_reset(dev)) { 2593195534Sscottl if (bootverbose) 2594195534Sscottl device_printf(dev, 2595220576Smav "AHCI reset: device not found\n"); 2596195534Sscottl ch->devices = 0; 2597195534Sscottl /* Enable wanted port interrupts */ 2598195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 2599220657Smav (((ch->pm_level != 0) ? AHCI_P_IX_CPD | AHCI_P_IX_MP : 0) | 2600220657Smav AHCI_P_IX_PRC | AHCI_P_IX_PC)); 2601203108Smav xpt_release_simq(ch->sim, TRUE); 2602195534Sscottl return; 2603195534Sscottl } 2604220576Smav if (bootverbose) 2605220576Smav device_printf(dev, "AHCI reset: device found\n"); 2606195534Sscottl /* Wait for clearing busy status. */ 2607220576Smav if (ahci_wait_ready(dev, dumping ? 31000 : 0, 0)) { 2608220576Smav if (dumping) 2609220576Smav ahci_clo(dev); 2610220576Smav else 2611220576Smav ch->resetting = 310; 2612220576Smav } 2613195534Sscottl ch->devices = 1; 2614195534Sscottl /* Enable wanted port interrupts */ 2615195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 2616220657Smav (((ch->pm_level != 0) ? AHCI_P_IX_CPD | AHCI_P_IX_MP : 0) | 2617220657Smav AHCI_P_IX_TFE | AHCI_P_IX_HBF | 2618195534Sscottl AHCI_P_IX_HBD | AHCI_P_IX_IF | AHCI_P_IX_OF | 2619220657Smav ((ch->pm_level == 0) ? AHCI_P_IX_PRC : 0) | AHCI_P_IX_PC | 2620196656Smav AHCI_P_IX_DP | AHCI_P_IX_UF | (ctlr->ccc ? 0 : AHCI_P_IX_SDB) | 2621196656Smav AHCI_P_IX_DS | AHCI_P_IX_PS | (ctlr->ccc ? 0 : AHCI_P_IX_DHR))); 2622220576Smav if (ch->resetting) 2623220576Smav callout_reset(&ch->reset_timer, hz / 10, ahci_reset_to, dev); 2624220777Smav else { 2625220777Smav ahci_start(dev, 1); 2626220576Smav xpt_release_simq(ch->sim, TRUE); 2627220777Smav } 2628195534Sscottl} 2629195534Sscottl 2630195534Sscottlstatic int 2631199821Smavahci_setup_fis(device_t dev, struct ahci_cmd_tab *ctp, union ccb *ccb, int tag) 2632195534Sscottl{ 2633199821Smav struct ahci_channel *ch = device_get_softc(dev); 2634195534Sscottl u_int8_t *fis = &ctp->cfis[0]; 2635195534Sscottl 2636195534Sscottl bzero(ctp->cfis, 64); 2637195534Sscottl fis[0] = 0x27; /* host to device */ 2638195534Sscottl fis[1] = (ccb->ccb_h.target_id & 0x0f); 2639195534Sscottl if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 2640195534Sscottl fis[1] |= 0x80; 2641195534Sscottl fis[2] = ATA_PACKET_CMD; 2642199821Smav if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 2643199821Smav ch->curr[ccb->ccb_h.target_id].mode >= ATA_DMA) 2644195534Sscottl fis[3] = ATA_F_DMA; 2645195534Sscottl else { 2646195534Sscottl fis[5] = ccb->csio.dxfer_len; 2647195534Sscottl fis[6] = ccb->csio.dxfer_len >> 8; 2648195534Sscottl } 2649195534Sscottl fis[7] = ATA_D_LBA; 2650195534Sscottl fis[15] = ATA_A_4BIT; 2651195534Sscottl bzero(ctp->acmd, 32); 2652195534Sscottl bcopy((ccb->ccb_h.flags & CAM_CDB_POINTER) ? 2653195534Sscottl ccb->csio.cdb_io.cdb_ptr : ccb->csio.cdb_io.cdb_bytes, 2654195534Sscottl ctp->acmd, ccb->csio.cdb_len); 2655195534Sscottl } else if ((ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) == 0) { 2656195534Sscottl fis[1] |= 0x80; 2657195534Sscottl fis[2] = ccb->ataio.cmd.command; 2658195534Sscottl fis[3] = ccb->ataio.cmd.features; 2659195534Sscottl fis[4] = ccb->ataio.cmd.lba_low; 2660195534Sscottl fis[5] = ccb->ataio.cmd.lba_mid; 2661195534Sscottl fis[6] = ccb->ataio.cmd.lba_high; 2662195534Sscottl fis[7] = ccb->ataio.cmd.device; 2663195534Sscottl fis[8] = ccb->ataio.cmd.lba_low_exp; 2664195534Sscottl fis[9] = ccb->ataio.cmd.lba_mid_exp; 2665195534Sscottl fis[10] = ccb->ataio.cmd.lba_high_exp; 2666195534Sscottl fis[11] = ccb->ataio.cmd.features_exp; 2667195534Sscottl if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { 2668195534Sscottl fis[12] = tag << 3; 2669195534Sscottl fis[13] = 0; 2670195534Sscottl } else { 2671195534Sscottl fis[12] = ccb->ataio.cmd.sector_count; 2672195534Sscottl fis[13] = ccb->ataio.cmd.sector_count_exp; 2673195534Sscottl } 2674195534Sscottl fis[15] = ATA_A_4BIT; 2675195534Sscottl } else { 2676195534Sscottl fis[15] = ccb->ataio.cmd.control; 2677195534Sscottl } 2678195534Sscottl return (20); 2679195534Sscottl} 2680195534Sscottl 2681195534Sscottlstatic int 2682195534Sscottlahci_sata_connect(struct ahci_channel *ch) 2683195534Sscottl{ 2684195534Sscottl u_int32_t status; 2685220829Smav int timeout, found = 0; 2686195534Sscottl 2687195534Sscottl /* Wait up to 100ms for "connect well" */ 2688220777Smav for (timeout = 0; timeout < 1000 ; timeout++) { 2689195534Sscottl status = ATA_INL(ch->r_mem, AHCI_P_SSTS); 2690220829Smav if ((status & ATA_SS_DET_MASK) != ATA_SS_DET_NO_DEVICE) 2691220829Smav found = 1; 2692195534Sscottl if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 2693195534Sscottl ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 2694195534Sscottl ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) 2695195534Sscottl break; 2696196656Smav if ((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_OFFLINE) { 2697196656Smav if (bootverbose) { 2698196656Smav device_printf(ch->dev, "SATA offline status=%08x\n", 2699196656Smav status); 2700196656Smav } 2701196656Smav return (0); 2702196656Smav } 2703220829Smav if (found == 0 && timeout >= 100) 2704220829Smav break; 2705220777Smav DELAY(100); 2706195534Sscottl } 2707220829Smav if (timeout >= 1000 || !found) { 2708195534Sscottl if (bootverbose) { 2709220829Smav device_printf(ch->dev, 2710220829Smav "SATA connect timeout time=%dus status=%08x\n", 2711220829Smav timeout * 100, status); 2712195534Sscottl } 2713195534Sscottl return (0); 2714195534Sscottl } 2715195534Sscottl if (bootverbose) { 2716220777Smav device_printf(ch->dev, "SATA connect time=%dus status=%08x\n", 2717220777Smav timeout * 100, status); 2718195534Sscottl } 2719195534Sscottl /* Clear SATA error register */ 2720195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SERR, 0xffffffff); 2721195534Sscottl return (1); 2722195534Sscottl} 2723195534Sscottl 2724195534Sscottlstatic int 2725203108Smavahci_sata_phy_reset(device_t dev) 2726195534Sscottl{ 2727195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2728199821Smav int sata_rev; 2729195534Sscottl uint32_t val; 2730195534Sscottl 2731220657Smav if (ch->listening) { 2732220657Smav val = ATA_INL(ch->r_mem, AHCI_P_CMD); 2733220657Smav val |= AHCI_P_CMD_SUD; 2734220657Smav ATA_OUTL(ch->r_mem, AHCI_P_CMD, val); 2735220657Smav ch->listening = 0; 2736220657Smav } 2737199821Smav sata_rev = ch->user[ch->pm_present ? 15 : 0].revision; 2738199821Smav if (sata_rev == 1) 2739195534Sscottl val = ATA_SC_SPD_SPEED_GEN1; 2740199821Smav else if (sata_rev == 2) 2741195534Sscottl val = ATA_SC_SPD_SPEED_GEN2; 2742199821Smav else if (sata_rev == 3) 2743195534Sscottl val = ATA_SC_SPD_SPEED_GEN3; 2744195534Sscottl else 2745195534Sscottl val = 0; 2746195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SCTL, 2747196656Smav ATA_SC_DET_RESET | val | 2748196656Smav ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER); 2749220777Smav DELAY(1000); 2750196656Smav ATA_OUTL(ch->r_mem, AHCI_P_SCTL, 2751195534Sscottl ATA_SC_DET_IDLE | val | ((ch->pm_level > 0) ? 0 : 2752195534Sscottl (ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER))); 2753203426Smav if (!ahci_sata_connect(ch)) { 2754220657Smav if (ch->caps & AHCI_CAP_SSS) { 2755220657Smav val = ATA_INL(ch->r_mem, AHCI_P_CMD); 2756220657Smav val &= ~AHCI_P_CMD_SUD; 2757220657Smav ATA_OUTL(ch->r_mem, AHCI_P_CMD, val); 2758220657Smav ch->listening = 1; 2759220657Smav } else if (ch->pm_level > 0) 2760203426Smav ATA_OUTL(ch->r_mem, AHCI_P_SCTL, ATA_SC_DET_DISABLE); 2761203426Smav return (0); 2762203426Smav } 2763203426Smav return (1); 2764195534Sscottl} 2765195534Sscottl 2766207430Smavstatic int 2767207430Smavahci_check_ids(device_t dev, union ccb *ccb) 2768207430Smav{ 2769207430Smav struct ahci_channel *ch = device_get_softc(dev); 2770207430Smav 2771207430Smav if (ccb->ccb_h.target_id > ((ch->caps & AHCI_CAP_SPM) ? 15 : 0)) { 2772207430Smav ccb->ccb_h.status = CAM_TID_INVALID; 2773207430Smav xpt_done(ccb); 2774207430Smav return (-1); 2775207430Smav } 2776207430Smav if (ccb->ccb_h.target_lun != 0) { 2777207430Smav ccb->ccb_h.status = CAM_LUN_INVALID; 2778207430Smav xpt_done(ccb); 2779207430Smav return (-1); 2780207430Smav } 2781207430Smav return (0); 2782207430Smav} 2783207430Smav 2784195534Sscottlstatic void 2785195534Sscottlahciaction(struct cam_sim *sim, union ccb *ccb) 2786195534Sscottl{ 2787210471Smav device_t dev, parent; 2788195534Sscottl struct ahci_channel *ch; 2789195534Sscottl 2790195534Sscottl CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("ahciaction func_code=%x\n", 2791195534Sscottl ccb->ccb_h.func_code)); 2792195534Sscottl 2793195534Sscottl ch = (struct ahci_channel *)cam_sim_softc(sim); 2794195534Sscottl dev = ch->dev; 2795195534Sscottl switch (ccb->ccb_h.func_code) { 2796195534Sscottl /* Common cases first */ 2797195534Sscottl case XPT_ATA_IO: /* Execute the requested I/O operation */ 2798195534Sscottl case XPT_SCSI_IO: 2799207430Smav if (ahci_check_ids(dev, ccb)) 2800207430Smav return; 2801207430Smav if (ch->devices == 0 || 2802207430Smav (ch->pm_present == 0 && 2803207430Smav ccb->ccb_h.target_id > 0 && ccb->ccb_h.target_id < 15)) { 2804195534Sscottl ccb->ccb_h.status = CAM_SEL_TIMEOUT; 2805195534Sscottl break; 2806195534Sscottl } 2807220565Smav ccb->ccb_h.recovery_type = RECOVERY_NONE; 2808195534Sscottl /* Check for command collision. */ 2809195534Sscottl if (ahci_check_collision(dev, ccb)) { 2810195534Sscottl /* Freeze command. */ 2811195534Sscottl ch->frozen = ccb; 2812195534Sscottl /* We have only one frozen slot, so freeze simq also. */ 2813195534Sscottl xpt_freeze_simq(ch->sim, 1); 2814195534Sscottl return; 2815195534Sscottl } 2816195534Sscottl ahci_begin_transaction(dev, ccb); 2817207430Smav return; 2818195534Sscottl case XPT_EN_LUN: /* Enable LUN as a target */ 2819195534Sscottl case XPT_TARGET_IO: /* Execute target I/O request */ 2820195534Sscottl case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */ 2821195534Sscottl case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/ 2822195534Sscottl case XPT_ABORT: /* Abort the specified CCB */ 2823195534Sscottl /* XXX Implement */ 2824195534Sscottl ccb->ccb_h.status = CAM_REQ_INVALID; 2825195534Sscottl break; 2826195534Sscottl case XPT_SET_TRAN_SETTINGS: 2827195534Sscottl { 2828195534Sscottl struct ccb_trans_settings *cts = &ccb->cts; 2829199747Smav struct ahci_device *d; 2830195534Sscottl 2831207430Smav if (ahci_check_ids(dev, ccb)) 2832207430Smav return; 2833199747Smav if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 2834199747Smav d = &ch->curr[ccb->ccb_h.target_id]; 2835199747Smav else 2836199747Smav d = &ch->user[ccb->ccb_h.target_id]; 2837199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_REVISION) 2838199747Smav d->revision = cts->xport_specific.sata.revision; 2839199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_MODE) 2840199747Smav d->mode = cts->xport_specific.sata.mode; 2841199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_BYTECOUNT) 2842199747Smav d->bytecount = min(8192, cts->xport_specific.sata.bytecount); 2843199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_TAGS) 2844199747Smav d->tags = min(ch->numslots, cts->xport_specific.sata.tags); 2845199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_PM) 2846195534Sscottl ch->pm_present = cts->xport_specific.sata.pm_present; 2847203376Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_ATAPI) 2848203376Smav d->atapi = cts->xport_specific.sata.atapi; 2849207499Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_CAPS) 2850207499Smav d->caps = cts->xport_specific.sata.caps; 2851195534Sscottl ccb->ccb_h.status = CAM_REQ_CMP; 2852195534Sscottl break; 2853195534Sscottl } 2854195534Sscottl case XPT_GET_TRAN_SETTINGS: 2855195534Sscottl /* Get default/user set transfer settings for the target */ 2856195534Sscottl { 2857195534Sscottl struct ccb_trans_settings *cts = &ccb->cts; 2858199747Smav struct ahci_device *d; 2859195534Sscottl uint32_t status; 2860195534Sscottl 2861207430Smav if (ahci_check_ids(dev, ccb)) 2862207430Smav return; 2863199747Smav if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 2864199747Smav d = &ch->curr[ccb->ccb_h.target_id]; 2865199747Smav else 2866199747Smav d = &ch->user[ccb->ccb_h.target_id]; 2867195534Sscottl cts->protocol = PROTO_ATA; 2868196656Smav cts->protocol_version = PROTO_VERSION_UNSPECIFIED; 2869195534Sscottl cts->transport = XPORT_SATA; 2870196656Smav cts->transport_version = XPORT_VERSION_UNSPECIFIED; 2871195534Sscottl cts->proto_specific.valid = 0; 2872195534Sscottl cts->xport_specific.sata.valid = 0; 2873199747Smav if (cts->type == CTS_TYPE_CURRENT_SETTINGS && 2874199747Smav (ccb->ccb_h.target_id == 15 || 2875199747Smav (ccb->ccb_h.target_id == 0 && !ch->pm_present))) { 2876195534Sscottl status = ATA_INL(ch->r_mem, AHCI_P_SSTS) & ATA_SS_SPD_MASK; 2877199747Smav if (status & 0x0f0) { 2878199747Smav cts->xport_specific.sata.revision = 2879199747Smav (status & 0x0f0) >> 4; 2880199747Smav cts->xport_specific.sata.valid |= 2881199747Smav CTS_SATA_VALID_REVISION; 2882199747Smav } 2883207499Smav cts->xport_specific.sata.caps = d->caps & CTS_SATA_CAPS_D; 2884207499Smav if (ch->pm_level) { 2885207499Smav if (ch->caps & (AHCI_CAP_PSC | AHCI_CAP_SSC)) 2886207499Smav cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_PMREQ; 2887207499Smav if (ch->caps2 & AHCI_CAP2_APST) 2888207499Smav cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_APST; 2889207499Smav } 2890207499Smav if ((ch->caps & AHCI_CAP_SNCQ) && 2891207499Smav (ch->quirks & AHCI_Q_NOAA) == 0) 2892207499Smav cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_DMAAA; 2893220602Smav cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_AN; 2894207499Smav cts->xport_specific.sata.caps &= 2895207499Smav ch->user[ccb->ccb_h.target_id].caps; 2896207499Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS; 2897195534Sscottl } else { 2898199747Smav cts->xport_specific.sata.revision = d->revision; 2899199747Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_REVISION; 2900207499Smav cts->xport_specific.sata.caps = d->caps; 2901207499Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS; 2902195534Sscottl } 2903199747Smav cts->xport_specific.sata.mode = d->mode; 2904199747Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_MODE; 2905199747Smav cts->xport_specific.sata.bytecount = d->bytecount; 2906199747Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_BYTECOUNT; 2907199747Smav cts->xport_specific.sata.pm_present = ch->pm_present; 2908195534Sscottl cts->xport_specific.sata.valid |= CTS_SATA_VALID_PM; 2909199747Smav cts->xport_specific.sata.tags = d->tags; 2910199747Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_TAGS; 2911203376Smav cts->xport_specific.sata.atapi = d->atapi; 2912203376Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_ATAPI; 2913195534Sscottl ccb->ccb_h.status = CAM_REQ_CMP; 2914195534Sscottl break; 2915195534Sscottl } 2916195534Sscottl case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 2917195534Sscottl case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 2918195534Sscottl ahci_reset(dev); 2919195534Sscottl ccb->ccb_h.status = CAM_REQ_CMP; 2920195534Sscottl break; 2921195534Sscottl case XPT_TERM_IO: /* Terminate the I/O process */ 2922195534Sscottl /* XXX Implement */ 2923195534Sscottl ccb->ccb_h.status = CAM_REQ_INVALID; 2924195534Sscottl break; 2925195534Sscottl case XPT_PATH_INQ: /* Path routing inquiry */ 2926195534Sscottl { 2927195534Sscottl struct ccb_pathinq *cpi = &ccb->cpi; 2928195534Sscottl 2929210471Smav parent = device_get_parent(dev); 2930195534Sscottl cpi->version_num = 1; /* XXX??? */ 2931199278Smav cpi->hba_inquiry = PI_SDTR_ABLE; 2932199278Smav if (ch->caps & AHCI_CAP_SNCQ) 2933199278Smav cpi->hba_inquiry |= PI_TAG_ABLE; 2934195534Sscottl if (ch->caps & AHCI_CAP_SPM) 2935195534Sscottl cpi->hba_inquiry |= PI_SATAPM; 2936195534Sscottl cpi->target_sprt = 0; 2937195534Sscottl cpi->hba_misc = PIM_SEQSCAN; 2938195534Sscottl cpi->hba_eng_cnt = 0; 2939195534Sscottl if (ch->caps & AHCI_CAP_SPM) 2940198322Smav cpi->max_target = 15; 2941195534Sscottl else 2942195534Sscottl cpi->max_target = 0; 2943195534Sscottl cpi->max_lun = 0; 2944195534Sscottl cpi->initiator_id = 0; 2945195534Sscottl cpi->bus_id = cam_sim_bus(sim); 2946195534Sscottl cpi->base_transfer_speed = 150000; 2947195534Sscottl strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 2948195534Sscottl strncpy(cpi->hba_vid, "AHCI", HBA_IDLEN); 2949195534Sscottl strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 2950195534Sscottl cpi->unit_number = cam_sim_unit(sim); 2951195534Sscottl cpi->transport = XPORT_SATA; 2952196656Smav cpi->transport_version = XPORT_VERSION_UNSPECIFIED; 2953195534Sscottl cpi->protocol = PROTO_ATA; 2954196656Smav cpi->protocol_version = PROTO_VERSION_UNSPECIFIED; 2955195534Sscottl cpi->maxio = MAXPHYS; 2956196777Smav /* ATI SB600 can't handle 256 sectors with FPDMA (NCQ). */ 2957210471Smav if (pci_get_devid(parent) == 0x43801002) 2958196796Smav cpi->maxio = min(cpi->maxio, 128 * 512); 2959210471Smav cpi->hba_vendor = pci_get_vendor(parent); 2960210471Smav cpi->hba_device = pci_get_device(parent); 2961210471Smav cpi->hba_subvendor = pci_get_subvendor(parent); 2962210471Smav cpi->hba_subdevice = pci_get_subdevice(parent); 2963195534Sscottl cpi->ccb_h.status = CAM_REQ_CMP; 2964195534Sscottl break; 2965195534Sscottl } 2966195534Sscottl default: 2967195534Sscottl ccb->ccb_h.status = CAM_REQ_INVALID; 2968195534Sscottl break; 2969195534Sscottl } 2970207430Smav xpt_done(ccb); 2971195534Sscottl} 2972195534Sscottl 2973195534Sscottlstatic void 2974195534Sscottlahcipoll(struct cam_sim *sim) 2975195534Sscottl{ 2976195534Sscottl struct ahci_channel *ch = (struct ahci_channel *)cam_sim_softc(sim); 2977195534Sscottl 2978195534Sscottl ahci_ch_intr(ch->dev); 2979220789Smav if (ch->resetting != 0 && 2980220789Smav (--ch->resetpolldiv <= 0 || !callout_pending(&ch->reset_timer))) { 2981220789Smav ch->resetpolldiv = 1000; 2982220789Smav ahci_reset_to(ch->dev); 2983220789Smav } 2984195534Sscottl} 2985