ahci_pci.c revision 203030
1195534Sscottl/*- 2195534Sscottl * Copyright (c) 2009 Alexander Motin <mav@FreeBSD.org> 3195534Sscottl * All rights reserved. 4195534Sscottl * 5195534Sscottl * Redistribution and use in source and binary forms, with or without 6195534Sscottl * modification, are permitted provided that the following conditions 7195534Sscottl * are met: 8195534Sscottl * 1. Redistributions of source code must retain the above copyright 9195534Sscottl * notice, this list of conditions and the following disclaimer, 10195534Sscottl * without modification, immediately at the beginning of the file. 11195534Sscottl * 2. Redistributions in binary form must reproduce the above copyright 12195534Sscottl * notice, this list of conditions and the following disclaimer in the 13195534Sscottl * documentation and/or other materials provided with the distribution. 14195534Sscottl * 15195534Sscottl * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16195534Sscottl * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17195534Sscottl * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18195534Sscottl * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19195534Sscottl * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20195534Sscottl * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21195534Sscottl * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22195534Sscottl * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23195534Sscottl * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24195534Sscottl * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25195534Sscottl */ 26195534Sscottl 27195534Sscottl#include <sys/cdefs.h> 28195534Sscottl__FBSDID("$FreeBSD: head/sys/dev/ahci/ahci.c 203030 2010-01-26 15:25:24Z mav $"); 29195534Sscottl 30195534Sscottl#include <sys/param.h> 31195534Sscottl#include <sys/module.h> 32195534Sscottl#include <sys/systm.h> 33195534Sscottl#include <sys/kernel.h> 34195534Sscottl#include <sys/ata.h> 35195534Sscottl#include <sys/bus.h> 36195534Sscottl#include <sys/endian.h> 37195534Sscottl#include <sys/malloc.h> 38195534Sscottl#include <sys/lock.h> 39195534Sscottl#include <sys/mutex.h> 40195534Sscottl#include <sys/sema.h> 41195534Sscottl#include <sys/taskqueue.h> 42195534Sscottl#include <vm/uma.h> 43195534Sscottl#include <machine/stdarg.h> 44195534Sscottl#include <machine/resource.h> 45195534Sscottl#include <machine/bus.h> 46195534Sscottl#include <sys/rman.h> 47195534Sscottl#include <dev/pci/pcivar.h> 48195534Sscottl#include <dev/pci/pcireg.h> 49195534Sscottl#include "ahci.h" 50195534Sscottl 51195534Sscottl#include <cam/cam.h> 52195534Sscottl#include <cam/cam_ccb.h> 53195534Sscottl#include <cam/cam_sim.h> 54195534Sscottl#include <cam/cam_xpt_sim.h> 55195534Sscottl#include <cam/cam_xpt_periph.h> 56195534Sscottl#include <cam/cam_debug.h> 57195534Sscottl 58195534Sscottl/* local prototypes */ 59195534Sscottlstatic int ahci_setup_interrupt(device_t dev); 60195534Sscottlstatic void ahci_intr(void *data); 61195534Sscottlstatic void ahci_intr_one(void *data); 62195534Sscottlstatic int ahci_suspend(device_t dev); 63195534Sscottlstatic int ahci_resume(device_t dev); 64195534Sscottlstatic int ahci_ch_suspend(device_t dev); 65195534Sscottlstatic int ahci_ch_resume(device_t dev); 66196656Smavstatic void ahci_ch_pm(void *arg); 67195534Sscottlstatic void ahci_ch_intr_locked(void *data); 68195534Sscottlstatic void ahci_ch_intr(void *data); 69195534Sscottlstatic int ahci_ctlr_reset(device_t dev); 70195534Sscottlstatic void ahci_begin_transaction(device_t dev, union ccb *ccb); 71195534Sscottlstatic void ahci_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error); 72195534Sscottlstatic void ahci_execute_transaction(struct ahci_slot *slot); 73195534Sscottlstatic void ahci_timeout(struct ahci_slot *slot); 74195534Sscottlstatic void ahci_end_transaction(struct ahci_slot *slot, enum ahci_err_type et); 75199821Smavstatic int ahci_setup_fis(device_t dev, struct ahci_cmd_tab *ctp, union ccb *ccb, int tag); 76195534Sscottlstatic void ahci_dmainit(device_t dev); 77195534Sscottlstatic void ahci_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error); 78195534Sscottlstatic void ahci_dmafini(device_t dev); 79195534Sscottlstatic void ahci_slotsalloc(device_t dev); 80195534Sscottlstatic void ahci_slotsfree(device_t dev); 81195534Sscottlstatic void ahci_reset(device_t dev); 82195534Sscottlstatic void ahci_start(device_t dev); 83195534Sscottlstatic void ahci_stop(device_t dev); 84195534Sscottlstatic void ahci_clo(device_t dev); 85195534Sscottlstatic void ahci_start_fr(device_t dev); 86195534Sscottlstatic void ahci_stop_fr(device_t dev); 87195534Sscottl 88195534Sscottlstatic int ahci_sata_connect(struct ahci_channel *ch); 89195534Sscottlstatic int ahci_sata_phy_reset(device_t dev, int quick); 90195534Sscottl 91195534Sscottlstatic void ahci_issue_read_log(device_t dev); 92195534Sscottlstatic void ahci_process_read_log(device_t dev, union ccb *ccb); 93195534Sscottl 94195534Sscottlstatic void ahciaction(struct cam_sim *sim, union ccb *ccb); 95195534Sscottlstatic void ahcipoll(struct cam_sim *sim); 96195534Sscottl 97195534SscottlMALLOC_DEFINE(M_AHCI, "AHCI driver", "AHCI driver data buffers"); 98195534Sscottl 99199176Smavstatic struct { 100199176Smav uint32_t id; 101203030Smav uint8_t rev; 102199176Smav const char *name; 103199322Smav int quirks; 104199322Smav#define AHCI_Q_NOFORCE 1 105199322Smav#define AHCI_Q_NOPMP 2 106199322Smav#define AHCI_Q_NONCQ 4 107199322Smav#define AHCI_Q_1CH 8 108199322Smav#define AHCI_Q_2CH 16 109199322Smav#define AHCI_Q_4CH 32 110199322Smav#define AHCI_Q_EDGEIS 64 111203030Smav#define AHCI_Q_SATA2 128 112199176Smav} ahci_ids[] = { 113203030Smav {0x43801002, 0x00, "ATI IXP600", 0}, 114203030Smav {0x43901002, 0x00, "ATI IXP700", 0}, 115203030Smav {0x43911002, 0x00, "ATI IXP700", 0}, 116203030Smav {0x43921002, 0x00, "ATI IXP700", 0}, 117203030Smav {0x43931002, 0x00, "ATI IXP700", 0}, 118203030Smav {0x43941002, 0x00, "ATI IXP800", 0}, 119203030Smav {0x43951002, 0x00, "ATI IXP800", 0}, 120203030Smav {0x26528086, 0x00, "Intel ICH6", AHCI_Q_NOFORCE}, 121203030Smav {0x26538086, 0x00, "Intel ICH6M", AHCI_Q_NOFORCE}, 122203030Smav {0x26818086, 0x00, "Intel ESB2", 0}, 123203030Smav {0x26828086, 0x00, "Intel ESB2", 0}, 124203030Smav {0x26838086, 0x00, "Intel ESB2", 0}, 125203030Smav {0x27c18086, 0x00, "Intel ICH7", 0}, 126203030Smav {0x27c38086, 0x00, "Intel ICH7", 0}, 127203030Smav {0x27c58086, 0x00, "Intel ICH7M", 0}, 128203030Smav {0x27c68086, 0x00, "Intel ICH7M", 0}, 129203030Smav {0x28218086, 0x00, "Intel ICH8", 0}, 130203030Smav {0x28228086, 0x00, "Intel ICH8", 0}, 131203030Smav {0x28248086, 0x00, "Intel ICH8", 0}, 132203030Smav {0x28298086, 0x00, "Intel ICH8M", 0}, 133203030Smav {0x282a8086, 0x00, "Intel ICH8M", 0}, 134203030Smav {0x29228086, 0x00, "Intel ICH9", 0}, 135203030Smav {0x29238086, 0x00, "Intel ICH9", 0}, 136203030Smav {0x29248086, 0x00, "Intel ICH9", 0}, 137203030Smav {0x29258086, 0x00, "Intel ICH9", 0}, 138203030Smav {0x29278086, 0x00, "Intel ICH9", 0}, 139203030Smav {0x29298086, 0x00, "Intel ICH9M", 0}, 140203030Smav {0x292a8086, 0x00, "Intel ICH9M", 0}, 141203030Smav {0x292b8086, 0x00, "Intel ICH9M", 0}, 142203030Smav {0x292c8086, 0x00, "Intel ICH9M", 0}, 143203030Smav {0x292f8086, 0x00, "Intel ICH9M", 0}, 144203030Smav {0x294d8086, 0x00, "Intel ICH9", 0}, 145203030Smav {0x294e8086, 0x00, "Intel ICH9M", 0}, 146203030Smav {0x3a058086, 0x00, "Intel ICH10", 0}, 147203030Smav {0x3a228086, 0x00, "Intel ICH10", 0}, 148203030Smav {0x3a258086, 0x00, "Intel ICH10", 0}, 149203030Smav {0x3b228086, 0x00, "Intel PCH", 0}, 150203030Smav {0x3b238086, 0x00, "Intel PCH", 0}, 151203030Smav {0x3b248086, 0x00, "Intel PCH", 0}, 152203030Smav {0x3b258086, 0x00, "Intel PCH", 0}, 153203030Smav {0x3b298086, 0x00, "Intel PCH", 0}, 154203030Smav {0x3b2b8086, 0x00, "Intel PCH", 0}, 155203030Smav {0x3b2c8086, 0x00, "Intel PCH", 0}, 156203030Smav {0x3b2f8086, 0x00, "Intel PCH", 0}, 157203030Smav {0x2361197b, 0x00, "JMicron JMB361", AHCI_Q_NOFORCE}, 158203030Smav {0x2363197b, 0x00, "JMicron JMB363", AHCI_Q_NOFORCE}, 159203030Smav {0x2365197b, 0x00, "JMicron JMB365", AHCI_Q_NOFORCE}, 160203030Smav {0x2366197b, 0x00, "JMicron JMB366", AHCI_Q_NOFORCE}, 161203030Smav {0x2368197b, 0x00, "JMicron JMB368", AHCI_Q_NOFORCE}, 162203030Smav {0x611111ab, 0x00, "Marvell 88SX6111", AHCI_Q_NOFORCE|AHCI_Q_1CH|AHCI_Q_EDGEIS}, 163203030Smav {0x612111ab, 0x00, "Marvell 88SX6121", AHCI_Q_NOFORCE|AHCI_Q_2CH|AHCI_Q_EDGEIS}, 164203030Smav {0x614111ab, 0x00, "Marvell 88SX6141", AHCI_Q_NOFORCE|AHCI_Q_4CH|AHCI_Q_EDGEIS}, 165203030Smav {0x614511ab, 0x00, "Marvell 88SX6145", AHCI_Q_NOFORCE|AHCI_Q_4CH|AHCI_Q_EDGEIS}, 166203030Smav {0x91231b4b, 0x11, "Marvell 88SE912x", 0}, 167203030Smav {0x91231b4b, 0x00, "Marvell 88SE912x", AHCI_Q_EDGEIS|AHCI_Q_SATA2}, 168203030Smav {0x044c10de, 0x00, "NVIDIA MCP65", 0}, 169203030Smav {0x044d10de, 0x00, "NVIDIA MCP65", 0}, 170203030Smav {0x044e10de, 0x00, "NVIDIA MCP65", 0}, 171203030Smav {0x044f10de, 0x00, "NVIDIA MCP65", 0}, 172203030Smav {0x045c10de, 0x00, "NVIDIA MCP65", 0}, 173203030Smav {0x045d10de, 0x00, "NVIDIA MCP65", 0}, 174203030Smav {0x045e10de, 0x00, "NVIDIA MCP65", 0}, 175203030Smav {0x045f10de, 0x00, "NVIDIA MCP65", 0}, 176203030Smav {0x055010de, 0x00, "NVIDIA MCP67", 0}, 177203030Smav {0x055110de, 0x00, "NVIDIA MCP67", 0}, 178203030Smav {0x055210de, 0x00, "NVIDIA MCP67", 0}, 179203030Smav {0x055310de, 0x00, "NVIDIA MCP67", 0}, 180203030Smav {0x055410de, 0x00, "NVIDIA MCP67", 0}, 181203030Smav {0x055510de, 0x00, "NVIDIA MCP67", 0}, 182203030Smav {0x055610de, 0x00, "NVIDIA MCP67", 0}, 183203030Smav {0x055710de, 0x00, "NVIDIA MCP67", 0}, 184203030Smav {0x055810de, 0x00, "NVIDIA MCP67", 0}, 185203030Smav {0x055910de, 0x00, "NVIDIA MCP67", 0}, 186203030Smav {0x055A10de, 0x00, "NVIDIA MCP67", 0}, 187203030Smav {0x055B10de, 0x00, "NVIDIA MCP67", 0}, 188203030Smav {0x058410de, 0x00, "NVIDIA MCP67", 0}, 189203030Smav {0x07f010de, 0x00, "NVIDIA MCP73", 0}, 190203030Smav {0x07f110de, 0x00, "NVIDIA MCP73", 0}, 191203030Smav {0x07f210de, 0x00, "NVIDIA MCP73", 0}, 192203030Smav {0x07f310de, 0x00, "NVIDIA MCP73", 0}, 193203030Smav {0x07f410de, 0x00, "NVIDIA MCP73", 0}, 194203030Smav {0x07f510de, 0x00, "NVIDIA MCP73", 0}, 195203030Smav {0x07f610de, 0x00, "NVIDIA MCP73", 0}, 196203030Smav {0x07f710de, 0x00, "NVIDIA MCP73", 0}, 197203030Smav {0x07f810de, 0x00, "NVIDIA MCP73", 0}, 198203030Smav {0x07f910de, 0x00, "NVIDIA MCP73", 0}, 199203030Smav {0x07fa10de, 0x00, "NVIDIA MCP73", 0}, 200203030Smav {0x07fb10de, 0x00, "NVIDIA MCP73", 0}, 201203030Smav {0x0ad010de, 0x00, "NVIDIA MCP77", 0}, 202203030Smav {0x0ad110de, 0x00, "NVIDIA MCP77", 0}, 203203030Smav {0x0ad210de, 0x00, "NVIDIA MCP77", 0}, 204203030Smav {0x0ad310de, 0x00, "NVIDIA MCP77", 0}, 205203030Smav {0x0ad410de, 0x00, "NVIDIA MCP77", 0}, 206203030Smav {0x0ad510de, 0x00, "NVIDIA MCP77", 0}, 207203030Smav {0x0ad610de, 0x00, "NVIDIA MCP77", 0}, 208203030Smav {0x0ad710de, 0x00, "NVIDIA MCP77", 0}, 209203030Smav {0x0ad810de, 0x00, "NVIDIA MCP77", 0}, 210203030Smav {0x0ad910de, 0x00, "NVIDIA MCP77", 0}, 211203030Smav {0x0ada10de, 0x00, "NVIDIA MCP77", 0}, 212203030Smav {0x0adb10de, 0x00, "NVIDIA MCP77", 0}, 213203030Smav {0x0ab410de, 0x00, "NVIDIA MCP79", 0}, 214203030Smav {0x0ab510de, 0x00, "NVIDIA MCP79", 0}, 215203030Smav {0x0ab610de, 0x00, "NVIDIA MCP79", 0}, 216203030Smav {0x0ab710de, 0x00, "NVIDIA MCP79", 0}, 217203030Smav {0x0ab810de, 0x00, "NVIDIA MCP79", 0}, 218203030Smav {0x0ab910de, 0x00, "NVIDIA MCP79", 0}, 219203030Smav {0x0aba10de, 0x00, "NVIDIA MCP79", 0}, 220203030Smav {0x0abb10de, 0x00, "NVIDIA MCP79", 0}, 221203030Smav {0x0abc10de, 0x00, "NVIDIA MCP79", 0}, 222203030Smav {0x0abd10de, 0x00, "NVIDIA MCP79", 0}, 223203030Smav {0x0abe10de, 0x00, "NVIDIA MCP79", 0}, 224203030Smav {0x0abf10de, 0x00, "NVIDIA MCP79", 0}, 225203030Smav {0x0d8410de, 0x00, "NVIDIA MCP89", 0}, 226203030Smav {0x0d8510de, 0x00, "NVIDIA MCP89", 0}, 227203030Smav {0x0d8610de, 0x00, "NVIDIA MCP89", 0}, 228203030Smav {0x0d8710de, 0x00, "NVIDIA MCP89", 0}, 229203030Smav {0x0d8810de, 0x00, "NVIDIA MCP89", 0}, 230203030Smav {0x0d8910de, 0x00, "NVIDIA MCP89", 0}, 231203030Smav {0x0d8a10de, 0x00, "NVIDIA MCP89", 0}, 232203030Smav {0x0d8b10de, 0x00, "NVIDIA MCP89", 0}, 233203030Smav {0x0d8c10de, 0x00, "NVIDIA MCP89", 0}, 234203030Smav {0x0d8d10de, 0x00, "NVIDIA MCP89", 0}, 235203030Smav {0x0d8e10de, 0x00, "NVIDIA MCP89", 0}, 236203030Smav {0x0d8f10de, 0x00, "NVIDIA MCP89", 0}, 237203030Smav {0x33491106, 0x00, "VIA VT8251", 0}, 238203030Smav {0x62871106, 0x00, "VIA VT8251", 0}, 239203030Smav {0x11841039, 0x00, "SiS 966", 0}, 240203030Smav {0x11851039, 0x00, "SiS 968", 0}, 241203030Smav {0x01861039, 0x00, "SiS 968", 0}, 242203030Smav {0x00000000, 0x00, NULL, 0} 243199176Smav}; 244199176Smav 245195534Sscottlstatic int 246195534Sscottlahci_probe(device_t dev) 247195534Sscottl{ 248199176Smav char buf[64]; 249199322Smav int i, valid = 0; 250199322Smav uint32_t devid = pci_get_devid(dev); 251203030Smav uint8_t revid = pci_get_revid(dev); 252199322Smav 253199322Smav /* Is this a possible AHCI candidate? */ 254199322Smav if (pci_get_class(dev) == PCIC_STORAGE && 255199322Smav pci_get_subclass(dev) == PCIS_STORAGE_SATA && 256199322Smav pci_get_progif(dev) == PCIP_STORAGE_SATA_AHCI_1_0) 257199322Smav valid = 1; 258199322Smav /* Is this a known AHCI chip? */ 259199322Smav for (i = 0; ahci_ids[i].id != 0; i++) { 260199322Smav if (ahci_ids[i].id == devid && 261203030Smav ahci_ids[i].rev <= revid && 262199322Smav (valid || !(ahci_ids[i].quirks & AHCI_Q_NOFORCE))) { 263199717Smav /* Do not attach JMicrons with single PCI function. */ 264199717Smav if (pci_get_vendor(dev) == 0x197b && 265199717Smav (pci_read_config(dev, 0xdf, 1) & 0x40) == 0) 266199717Smav return (ENXIO); 267199322Smav snprintf(buf, sizeof(buf), "%s AHCI SATA controller", 268199322Smav ahci_ids[i].name); 269199322Smav device_set_desc_copy(dev, buf); 270199322Smav return (BUS_PROBE_VENDOR); 271199322Smav } 272199322Smav } 273199322Smav if (!valid) 274199322Smav return (ENXIO); 275199322Smav device_set_desc_copy(dev, "AHCI SATA controller"); 276199322Smav return (BUS_PROBE_VENDOR); 277199322Smav} 278199322Smav 279199322Smavstatic int 280199322Smavahci_ata_probe(device_t dev) 281199322Smav{ 282199322Smav char buf[64]; 283199176Smav int i; 284199176Smav uint32_t devid = pci_get_devid(dev); 285203030Smav uint8_t revid = pci_get_revid(dev); 286195534Sscottl 287199322Smav if ((intptr_t)device_get_ivars(dev) >= 0) 288199322Smav return (ENXIO); 289199176Smav /* Is this a known AHCI chip? */ 290199176Smav for (i = 0; ahci_ids[i].id != 0; i++) { 291203030Smav if (ahci_ids[i].id == devid && 292203030Smav ahci_ids[i].rev <= revid) { 293199176Smav snprintf(buf, sizeof(buf), "%s AHCI SATA controller", 294199176Smav ahci_ids[i].name); 295199176Smav device_set_desc_copy(dev, buf); 296199176Smav return (BUS_PROBE_VENDOR); 297199176Smav } 298199176Smav } 299199176Smav device_set_desc_copy(dev, "AHCI SATA controller"); 300195534Sscottl return (BUS_PROBE_VENDOR); 301195534Sscottl} 302195534Sscottl 303195534Sscottlstatic int 304195534Sscottlahci_attach(device_t dev) 305195534Sscottl{ 306195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 307195534Sscottl device_t child; 308199322Smav int error, unit, speed, i; 309199322Smav uint32_t devid = pci_get_devid(dev); 310203030Smav uint8_t revid = pci_get_revid(dev); 311196656Smav u_int32_t version; 312195534Sscottl 313195534Sscottl ctlr->dev = dev; 314199322Smav i = 0; 315203030Smav while (ahci_ids[i].id != 0 && 316203030Smav (ahci_ids[i].id != devid || 317203030Smav ahci_ids[i].rev > revid)) 318199322Smav i++; 319199322Smav ctlr->quirks = ahci_ids[i].quirks; 320196656Smav resource_int_value(device_get_name(dev), 321196656Smav device_get_unit(dev), "ccc", &ctlr->ccc); 322195534Sscottl /* if we have a memory BAR(5) we are likely on an AHCI part */ 323195534Sscottl ctlr->r_rid = PCIR_BAR(5); 324195534Sscottl if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 325195534Sscottl &ctlr->r_rid, RF_ACTIVE))) 326195534Sscottl return ENXIO; 327195534Sscottl /* Setup our own memory management for channels. */ 328195534Sscottl ctlr->sc_iomem.rm_type = RMAN_ARRAY; 329195534Sscottl ctlr->sc_iomem.rm_descr = "I/O memory addresses"; 330195534Sscottl if ((error = rman_init(&ctlr->sc_iomem)) != 0) { 331195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 332195534Sscottl return (error); 333195534Sscottl } 334195534Sscottl if ((error = rman_manage_region(&ctlr->sc_iomem, 335195534Sscottl rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) { 336195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 337195534Sscottl rman_fini(&ctlr->sc_iomem); 338195534Sscottl return (error); 339195534Sscottl } 340195534Sscottl /* Reset controller */ 341195534Sscottl if ((error = ahci_ctlr_reset(dev)) != 0) { 342195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 343195534Sscottl rman_fini(&ctlr->sc_iomem); 344195534Sscottl return (error); 345195534Sscottl }; 346199322Smav /* Get the HW capabilities */ 347199322Smav version = ATA_INL(ctlr->r_mem, AHCI_VS); 348199322Smav ctlr->caps = ATA_INL(ctlr->r_mem, AHCI_CAP); 349199322Smav if (version >= 0x00010020) 350199322Smav ctlr->caps2 = ATA_INL(ctlr->r_mem, AHCI_CAP2); 351195534Sscottl ctlr->ichannels = ATA_INL(ctlr->r_mem, AHCI_PI); 352199322Smav if (ctlr->quirks & AHCI_Q_1CH) { 353199322Smav ctlr->caps &= ~AHCI_CAP_NPMASK; 354199322Smav ctlr->ichannels &= 0x01; 355199322Smav } 356199322Smav if (ctlr->quirks & AHCI_Q_2CH) { 357199322Smav ctlr->caps &= ~AHCI_CAP_NPMASK; 358199322Smav ctlr->caps |= 1; 359199322Smav ctlr->ichannels &= 0x03; 360199322Smav } 361199322Smav if (ctlr->quirks & AHCI_Q_4CH) { 362199322Smav ctlr->caps &= ~AHCI_CAP_NPMASK; 363199322Smav ctlr->caps |= 3; 364199322Smav ctlr->ichannels &= 0x0f; 365199322Smav } 366195534Sscottl ctlr->channels = MAX(flsl(ctlr->ichannels), 367199322Smav (ctlr->caps & AHCI_CAP_NPMASK) + 1); 368199322Smav if (ctlr->quirks & AHCI_Q_NOPMP) 369199322Smav ctlr->caps &= ~AHCI_CAP_SPM; 370199322Smav if (ctlr->quirks & AHCI_Q_NONCQ) 371199322Smav ctlr->caps &= ~AHCI_CAP_SNCQ; 372195534Sscottl /* Setup interrupts. */ 373195534Sscottl if (ahci_setup_interrupt(dev)) { 374195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 375195534Sscottl rman_fini(&ctlr->sc_iomem); 376195534Sscottl return ENXIO; 377195534Sscottl } 378195534Sscottl /* Announce HW capabilities. */ 379196656Smav speed = (ctlr->caps & AHCI_CAP_ISS) >> AHCI_CAP_ISS_SHIFT; 380195534Sscottl device_printf(dev, 381195534Sscottl "AHCI v%x.%02x with %d %sGbps ports, Port Multiplier %s\n", 382195534Sscottl ((version >> 20) & 0xf0) + ((version >> 16) & 0x0f), 383195534Sscottl ((version >> 4) & 0xf0) + (version & 0x0f), 384196656Smav (ctlr->caps & AHCI_CAP_NPMASK) + 1, 385195534Sscottl ((speed == 1) ? "1.5":((speed == 2) ? "3": 386195534Sscottl ((speed == 3) ? "6":"?"))), 387196656Smav (ctlr->caps & AHCI_CAP_SPM) ? 388195534Sscottl "supported" : "not supported"); 389195534Sscottl if (bootverbose) { 390195534Sscottl device_printf(dev, "Caps:%s%s%s%s%s%s%s%s %sGbps", 391196656Smav (ctlr->caps & AHCI_CAP_64BIT) ? " 64bit":"", 392196656Smav (ctlr->caps & AHCI_CAP_SNCQ) ? " NCQ":"", 393196656Smav (ctlr->caps & AHCI_CAP_SSNTF) ? " SNTF":"", 394196656Smav (ctlr->caps & AHCI_CAP_SMPS) ? " MPS":"", 395196656Smav (ctlr->caps & AHCI_CAP_SSS) ? " SS":"", 396196656Smav (ctlr->caps & AHCI_CAP_SALP) ? " ALP":"", 397196656Smav (ctlr->caps & AHCI_CAP_SAL) ? " AL":"", 398196656Smav (ctlr->caps & AHCI_CAP_SCLO) ? " CLO":"", 399195534Sscottl ((speed == 1) ? "1.5":((speed == 2) ? "3": 400195534Sscottl ((speed == 3) ? "6":"?")))); 401195534Sscottl printf("%s%s%s%s%s%s %dcmd%s%s%s %dports\n", 402196656Smav (ctlr->caps & AHCI_CAP_SAM) ? " AM":"", 403196656Smav (ctlr->caps & AHCI_CAP_SPM) ? " PM":"", 404196656Smav (ctlr->caps & AHCI_CAP_FBSS) ? " FBS":"", 405196656Smav (ctlr->caps & AHCI_CAP_PMD) ? " PMD":"", 406196656Smav (ctlr->caps & AHCI_CAP_SSC) ? " SSC":"", 407196656Smav (ctlr->caps & AHCI_CAP_PSC) ? " PSC":"", 408196656Smav ((ctlr->caps & AHCI_CAP_NCS) >> AHCI_CAP_NCS_SHIFT) + 1, 409196656Smav (ctlr->caps & AHCI_CAP_CCCS) ? " CCC":"", 410196656Smav (ctlr->caps & AHCI_CAP_EMS) ? " EM":"", 411196656Smav (ctlr->caps & AHCI_CAP_SXS) ? " eSATA":"", 412196656Smav (ctlr->caps & AHCI_CAP_NPMASK) + 1); 413195534Sscottl } 414196656Smav if (bootverbose && version >= 0x00010020) { 415196656Smav device_printf(dev, "Caps2:%s%s%s\n", 416196656Smav (ctlr->caps2 & AHCI_CAP2_APST) ? " APST":"", 417196656Smav (ctlr->caps2 & AHCI_CAP2_NVMP) ? " NVMP":"", 418196656Smav (ctlr->caps2 & AHCI_CAP2_BOH) ? " BOH":""); 419196656Smav } 420195534Sscottl /* Attach all channels on this controller */ 421195534Sscottl for (unit = 0; unit < ctlr->channels; unit++) { 422195534Sscottl if ((ctlr->ichannels & (1 << unit)) == 0) 423195534Sscottl continue; 424195534Sscottl child = device_add_child(dev, "ahcich", -1); 425195534Sscottl if (child == NULL) 426195534Sscottl device_printf(dev, "failed to add channel device\n"); 427195534Sscottl else 428195534Sscottl device_set_ivars(child, (void *)(intptr_t)unit); 429195534Sscottl } 430195534Sscottl bus_generic_attach(dev); 431195534Sscottl return 0; 432195534Sscottl} 433195534Sscottl 434195534Sscottlstatic int 435195534Sscottlahci_detach(device_t dev) 436195534Sscottl{ 437195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 438195534Sscottl device_t *children; 439195534Sscottl int nchildren, i; 440195534Sscottl 441195534Sscottl /* Detach & delete all children */ 442195534Sscottl if (!device_get_children(dev, &children, &nchildren)) { 443195534Sscottl for (i = 0; i < nchildren; i++) 444195534Sscottl device_delete_child(dev, children[i]); 445195534Sscottl free(children, M_TEMP); 446195534Sscottl } 447195534Sscottl /* Free interrupts. */ 448195534Sscottl for (i = 0; i < ctlr->numirqs; i++) { 449195534Sscottl if (ctlr->irqs[i].r_irq) { 450195534Sscottl bus_teardown_intr(dev, ctlr->irqs[i].r_irq, 451195534Sscottl ctlr->irqs[i].handle); 452195534Sscottl bus_release_resource(dev, SYS_RES_IRQ, 453195534Sscottl ctlr->irqs[i].r_irq_rid, ctlr->irqs[i].r_irq); 454195534Sscottl } 455195534Sscottl } 456195534Sscottl pci_release_msi(dev); 457195534Sscottl /* Free memory. */ 458195534Sscottl rman_fini(&ctlr->sc_iomem); 459195534Sscottl if (ctlr->r_mem) 460195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 461195534Sscottl return (0); 462195534Sscottl} 463195534Sscottl 464195534Sscottlstatic int 465195534Sscottlahci_ctlr_reset(device_t dev) 466195534Sscottl{ 467195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 468195534Sscottl int timeout; 469195534Sscottl 470195534Sscottl if (pci_read_config(dev, 0x00, 4) == 0x28298086 && 471195534Sscottl (pci_read_config(dev, 0x92, 1) & 0xfe) == 0x04) 472195534Sscottl pci_write_config(dev, 0x92, 0x01, 1); 473195534Sscottl /* Enable AHCI mode */ 474195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, AHCI_GHC_AE); 475195534Sscottl /* Reset AHCI controller */ 476195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, AHCI_GHC_AE|AHCI_GHC_HR); 477195534Sscottl for (timeout = 1000; timeout > 0; timeout--) { 478195534Sscottl DELAY(1000); 479195534Sscottl if ((ATA_INL(ctlr->r_mem, AHCI_GHC) & AHCI_GHC_HR) == 0) 480195534Sscottl break; 481195534Sscottl } 482195534Sscottl if (timeout == 0) { 483195534Sscottl device_printf(dev, "AHCI controller reset failure\n"); 484195534Sscottl return ENXIO; 485195534Sscottl } 486195534Sscottl /* Reenable AHCI mode */ 487195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, AHCI_GHC_AE); 488195534Sscottl /* Clear interrupts */ 489195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_IS, ATA_INL(ctlr->r_mem, AHCI_IS)); 490196656Smav /* Configure CCC */ 491196656Smav if (ctlr->ccc) { 492196656Smav ATA_OUTL(ctlr->r_mem, AHCI_CCCP, ATA_INL(ctlr->r_mem, AHCI_PI)); 493196656Smav ATA_OUTL(ctlr->r_mem, AHCI_CCCC, 494196656Smav (ctlr->ccc << AHCI_CCCC_TV_SHIFT) | 495196656Smav (4 << AHCI_CCCC_CC_SHIFT) | 496196656Smav AHCI_CCCC_EN); 497196656Smav ctlr->cccv = (ATA_INL(ctlr->r_mem, AHCI_CCCC) & 498196656Smav AHCI_CCCC_INT_MASK) >> AHCI_CCCC_INT_SHIFT; 499196656Smav if (bootverbose) { 500196656Smav device_printf(dev, 501196656Smav "CCC with %dms/4cmd enabled on vector %d\n", 502196656Smav ctlr->ccc, ctlr->cccv); 503196656Smav } 504196656Smav } 505195534Sscottl /* Enable AHCI interrupts */ 506195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, 507195534Sscottl ATA_INL(ctlr->r_mem, AHCI_GHC) | AHCI_GHC_IE); 508195534Sscottl return (0); 509195534Sscottl} 510195534Sscottl 511195534Sscottlstatic int 512195534Sscottlahci_suspend(device_t dev) 513195534Sscottl{ 514195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 515195534Sscottl 516195534Sscottl bus_generic_suspend(dev); 517195534Sscottl /* Disable interupts, so the state change(s) doesn't trigger */ 518195534Sscottl ATA_OUTL(ctlr->r_mem, AHCI_GHC, 519195534Sscottl ATA_INL(ctlr->r_mem, AHCI_GHC) & (~AHCI_GHC_IE)); 520195534Sscottl return 0; 521195534Sscottl} 522195534Sscottl 523195534Sscottlstatic int 524195534Sscottlahci_resume(device_t dev) 525195534Sscottl{ 526195534Sscottl int res; 527195534Sscottl 528195534Sscottl if ((res = ahci_ctlr_reset(dev)) != 0) 529195534Sscottl return (res); 530195534Sscottl return (bus_generic_resume(dev)); 531195534Sscottl} 532195534Sscottl 533195534Sscottlstatic int 534195534Sscottlahci_setup_interrupt(device_t dev) 535195534Sscottl{ 536195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 537195534Sscottl int i, msi = 1; 538195534Sscottl 539195534Sscottl /* Process hints. */ 540195534Sscottl resource_int_value(device_get_name(dev), 541195534Sscottl device_get_unit(dev), "msi", &msi); 542195534Sscottl if (msi < 0) 543195534Sscottl msi = 0; 544195534Sscottl else if (msi == 1) 545195534Sscottl msi = min(1, pci_msi_count(dev)); 546195534Sscottl else if (msi > 1) 547195534Sscottl msi = pci_msi_count(dev); 548195534Sscottl /* Allocate MSI if needed/present. */ 549195534Sscottl if (msi && pci_alloc_msi(dev, &msi) == 0) { 550195534Sscottl ctlr->numirqs = msi; 551195534Sscottl } else { 552195534Sscottl msi = 0; 553195534Sscottl ctlr->numirqs = 1; 554195534Sscottl } 555195534Sscottl /* Check for single MSI vector fallback. */ 556195534Sscottl if (ctlr->numirqs > 1 && 557195534Sscottl (ATA_INL(ctlr->r_mem, AHCI_GHC) & AHCI_GHC_MRSM) != 0) { 558195534Sscottl device_printf(dev, "Falling back to one MSI\n"); 559195534Sscottl ctlr->numirqs = 1; 560195534Sscottl } 561195534Sscottl /* Allocate all IRQs. */ 562195534Sscottl for (i = 0; i < ctlr->numirqs; i++) { 563195534Sscottl ctlr->irqs[i].ctlr = ctlr; 564195534Sscottl ctlr->irqs[i].r_irq_rid = i + (msi ? 1 : 0); 565196656Smav if (ctlr->numirqs == 1 || i >= ctlr->channels || 566196656Smav (ctlr->ccc && i == ctlr->cccv)) 567195534Sscottl ctlr->irqs[i].mode = AHCI_IRQ_MODE_ALL; 568195534Sscottl else if (i == ctlr->numirqs - 1) 569195534Sscottl ctlr->irqs[i].mode = AHCI_IRQ_MODE_AFTER; 570195534Sscottl else 571195534Sscottl ctlr->irqs[i].mode = AHCI_IRQ_MODE_ONE; 572195534Sscottl if (!(ctlr->irqs[i].r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 573195534Sscottl &ctlr->irqs[i].r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) { 574195534Sscottl device_printf(dev, "unable to map interrupt\n"); 575195534Sscottl return ENXIO; 576195534Sscottl } 577195534Sscottl if ((bus_setup_intr(dev, ctlr->irqs[i].r_irq, ATA_INTR_FLAGS, NULL, 578195534Sscottl (ctlr->irqs[i].mode == AHCI_IRQ_MODE_ONE) ? ahci_intr_one : ahci_intr, 579195534Sscottl &ctlr->irqs[i], &ctlr->irqs[i].handle))) { 580195534Sscottl /* SOS XXX release r_irq */ 581195534Sscottl device_printf(dev, "unable to setup interrupt\n"); 582195534Sscottl return ENXIO; 583195534Sscottl } 584202011Smav if (ctlr->numirqs > 1) { 585202011Smav bus_describe_intr(dev, ctlr->irqs[i].r_irq, 586202011Smav ctlr->irqs[i].handle, 587202011Smav ctlr->irqs[i].mode == AHCI_IRQ_MODE_ONE ? 588202011Smav "ch%d" : "%d", i); 589202011Smav } 590195534Sscottl } 591195534Sscottl return (0); 592195534Sscottl} 593195534Sscottl 594195534Sscottl/* 595195534Sscottl * Common case interrupt handler. 596195534Sscottl */ 597195534Sscottlstatic void 598195534Sscottlahci_intr(void *data) 599195534Sscottl{ 600195534Sscottl struct ahci_controller_irq *irq = data; 601195534Sscottl struct ahci_controller *ctlr = irq->ctlr; 602195534Sscottl u_int32_t is; 603195534Sscottl void *arg; 604195534Sscottl int unit; 605195534Sscottl 606196656Smav if (irq->mode == AHCI_IRQ_MODE_ALL) { 607195534Sscottl unit = 0; 608196656Smav if (ctlr->ccc) 609196656Smav is = ctlr->ichannels; 610196656Smav else 611196656Smav is = ATA_INL(ctlr->r_mem, AHCI_IS); 612196656Smav } else { /* AHCI_IRQ_MODE_AFTER */ 613195534Sscottl unit = irq->r_irq_rid - 1; 614196656Smav is = ATA_INL(ctlr->r_mem, AHCI_IS); 615196656Smav } 616200814Smav /* Some controllers have edge triggered IS. */ 617200814Smav if (ctlr->quirks & AHCI_Q_EDGEIS) 618200814Smav ATA_OUTL(ctlr->r_mem, AHCI_IS, is); 619195534Sscottl for (; unit < ctlr->channels; unit++) { 620195534Sscottl if ((is & (1 << unit)) != 0 && 621195534Sscottl (arg = ctlr->interrupt[unit].argument)) { 622199322Smav ctlr->interrupt[unit].function(arg); 623195534Sscottl } 624195534Sscottl } 625200814Smav /* AHCI declares level triggered IS. */ 626200814Smav if (!(ctlr->quirks & AHCI_Q_EDGEIS)) 627200814Smav ATA_OUTL(ctlr->r_mem, AHCI_IS, is); 628195534Sscottl} 629195534Sscottl 630195534Sscottl/* 631195534Sscottl * Simplified interrupt handler for multivector MSI mode. 632195534Sscottl */ 633195534Sscottlstatic void 634195534Sscottlahci_intr_one(void *data) 635195534Sscottl{ 636195534Sscottl struct ahci_controller_irq *irq = data; 637195534Sscottl struct ahci_controller *ctlr = irq->ctlr; 638195534Sscottl void *arg; 639195534Sscottl int unit; 640195534Sscottl 641195534Sscottl unit = irq->r_irq_rid - 1; 642202011Smav /* Some controllers have edge triggered IS. */ 643202011Smav if (ctlr->quirks & AHCI_Q_EDGEIS) 644202011Smav ATA_OUTL(ctlr->r_mem, AHCI_IS, 1 << unit); 645195534Sscottl if ((arg = ctlr->interrupt[unit].argument)) 646195534Sscottl ctlr->interrupt[unit].function(arg); 647202011Smav /* AHCI declares level triggered IS. */ 648202011Smav if (!(ctlr->quirks & AHCI_Q_EDGEIS)) 649202011Smav ATA_OUTL(ctlr->r_mem, AHCI_IS, 1 << unit); 650195534Sscottl} 651195534Sscottl 652195534Sscottlstatic struct resource * 653195534Sscottlahci_alloc_resource(device_t dev, device_t child, int type, int *rid, 654195534Sscottl u_long start, u_long end, u_long count, u_int flags) 655195534Sscottl{ 656195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 657195534Sscottl int unit = ((struct ahci_channel *)device_get_softc(child))->unit; 658195534Sscottl struct resource *res = NULL; 659195534Sscottl int offset = AHCI_OFFSET + (unit << 7); 660195534Sscottl long st; 661195534Sscottl 662195534Sscottl switch (type) { 663195534Sscottl case SYS_RES_MEMORY: 664195534Sscottl st = rman_get_start(ctlr->r_mem); 665195534Sscottl res = rman_reserve_resource(&ctlr->sc_iomem, st + offset, 666195534Sscottl st + offset + 127, 128, RF_ACTIVE, child); 667195534Sscottl if (res) { 668195534Sscottl bus_space_handle_t bsh; 669195534Sscottl bus_space_tag_t bst; 670195534Sscottl bsh = rman_get_bushandle(ctlr->r_mem); 671195534Sscottl bst = rman_get_bustag(ctlr->r_mem); 672195534Sscottl bus_space_subregion(bst, bsh, offset, 128, &bsh); 673195534Sscottl rman_set_bushandle(res, bsh); 674195534Sscottl rman_set_bustag(res, bst); 675195534Sscottl } 676195534Sscottl break; 677195534Sscottl case SYS_RES_IRQ: 678195534Sscottl if (*rid == ATA_IRQ_RID) 679195534Sscottl res = ctlr->irqs[0].r_irq; 680195534Sscottl break; 681195534Sscottl } 682195534Sscottl return (res); 683195534Sscottl} 684195534Sscottl 685195534Sscottlstatic int 686195534Sscottlahci_release_resource(device_t dev, device_t child, int type, int rid, 687195534Sscottl struct resource *r) 688195534Sscottl{ 689195534Sscottl 690195534Sscottl switch (type) { 691195534Sscottl case SYS_RES_MEMORY: 692195534Sscottl rman_release_resource(r); 693195534Sscottl return (0); 694195534Sscottl case SYS_RES_IRQ: 695195534Sscottl if (rid != ATA_IRQ_RID) 696195534Sscottl return ENOENT; 697195534Sscottl return (0); 698195534Sscottl } 699195534Sscottl return (EINVAL); 700195534Sscottl} 701195534Sscottl 702195534Sscottlstatic int 703195534Sscottlahci_setup_intr(device_t dev, device_t child, struct resource *irq, 704195534Sscottl int flags, driver_filter_t *filter, driver_intr_t *function, 705195534Sscottl void *argument, void **cookiep) 706195534Sscottl{ 707195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 708195534Sscottl int unit = (intptr_t)device_get_ivars(child); 709195534Sscottl 710195534Sscottl if (filter != NULL) { 711195534Sscottl printf("ahci.c: we cannot use a filter here\n"); 712195534Sscottl return (EINVAL); 713195534Sscottl } 714195534Sscottl ctlr->interrupt[unit].function = function; 715195534Sscottl ctlr->interrupt[unit].argument = argument; 716195534Sscottl return (0); 717195534Sscottl} 718195534Sscottl 719195534Sscottlstatic int 720195534Sscottlahci_teardown_intr(device_t dev, device_t child, struct resource *irq, 721195534Sscottl void *cookie) 722195534Sscottl{ 723195534Sscottl struct ahci_controller *ctlr = device_get_softc(dev); 724195534Sscottl int unit = (intptr_t)device_get_ivars(child); 725195534Sscottl 726195534Sscottl ctlr->interrupt[unit].function = NULL; 727195534Sscottl ctlr->interrupt[unit].argument = NULL; 728195534Sscottl return (0); 729195534Sscottl} 730195534Sscottl 731195534Sscottlstatic int 732195534Sscottlahci_print_child(device_t dev, device_t child) 733195534Sscottl{ 734195534Sscottl int retval; 735195534Sscottl 736195534Sscottl retval = bus_print_child_header(dev, child); 737195534Sscottl retval += printf(" at channel %d", 738195534Sscottl (int)(intptr_t)device_get_ivars(child)); 739195534Sscottl retval += bus_print_child_footer(dev, child); 740195534Sscottl 741195534Sscottl return (retval); 742195534Sscottl} 743195534Sscottl 744195534Sscottldevclass_t ahci_devclass; 745195534Sscottlstatic device_method_t ahci_methods[] = { 746195534Sscottl DEVMETHOD(device_probe, ahci_probe), 747195534Sscottl DEVMETHOD(device_attach, ahci_attach), 748195534Sscottl DEVMETHOD(device_detach, ahci_detach), 749195534Sscottl DEVMETHOD(device_suspend, ahci_suspend), 750195534Sscottl DEVMETHOD(device_resume, ahci_resume), 751195534Sscottl DEVMETHOD(bus_print_child, ahci_print_child), 752195534Sscottl DEVMETHOD(bus_alloc_resource, ahci_alloc_resource), 753195534Sscottl DEVMETHOD(bus_release_resource, ahci_release_resource), 754195534Sscottl DEVMETHOD(bus_setup_intr, ahci_setup_intr), 755195534Sscottl DEVMETHOD(bus_teardown_intr,ahci_teardown_intr), 756195534Sscottl { 0, 0 } 757195534Sscottl}; 758195534Sscottlstatic driver_t ahci_driver = { 759195534Sscottl "ahci", 760195534Sscottl ahci_methods, 761195534Sscottl sizeof(struct ahci_controller) 762195534Sscottl}; 763195534SscottlDRIVER_MODULE(ahci, pci, ahci_driver, ahci_devclass, 0, 0); 764199322Smavstatic device_method_t ahci_ata_methods[] = { 765199322Smav DEVMETHOD(device_probe, ahci_ata_probe), 766199322Smav DEVMETHOD(device_attach, ahci_attach), 767199322Smav DEVMETHOD(device_detach, ahci_detach), 768199322Smav DEVMETHOD(device_suspend, ahci_suspend), 769199322Smav DEVMETHOD(device_resume, ahci_resume), 770199322Smav DEVMETHOD(bus_print_child, ahci_print_child), 771199322Smav DEVMETHOD(bus_alloc_resource, ahci_alloc_resource), 772199322Smav DEVMETHOD(bus_release_resource, ahci_release_resource), 773199322Smav DEVMETHOD(bus_setup_intr, ahci_setup_intr), 774199322Smav DEVMETHOD(bus_teardown_intr,ahci_teardown_intr), 775199322Smav { 0, 0 } 776199322Smav}; 777199322Smavstatic driver_t ahci_ata_driver = { 778199322Smav "ahci", 779199322Smav ahci_ata_methods, 780199322Smav sizeof(struct ahci_controller) 781199322Smav}; 782199322SmavDRIVER_MODULE(ahci, atapci, ahci_ata_driver, ahci_devclass, 0, 0); 783195534SscottlMODULE_VERSION(ahci, 1); 784195534SscottlMODULE_DEPEND(ahci, cam, 1, 1, 1); 785195534Sscottl 786195534Sscottlstatic int 787195534Sscottlahci_ch_probe(device_t dev) 788195534Sscottl{ 789195534Sscottl 790195534Sscottl device_set_desc_copy(dev, "AHCI channel"); 791195534Sscottl return (0); 792195534Sscottl} 793195534Sscottl 794195534Sscottlstatic int 795195534Sscottlahci_ch_attach(device_t dev) 796195534Sscottl{ 797195534Sscottl struct ahci_controller *ctlr = device_get_softc(device_get_parent(dev)); 798195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 799195534Sscottl struct cam_devq *devq; 800199821Smav int rid, error, i, sata_rev = 0; 801195534Sscottl 802195534Sscottl ch->dev = dev; 803195534Sscottl ch->unit = (intptr_t)device_get_ivars(dev); 804196656Smav ch->caps = ctlr->caps; 805196656Smav ch->caps2 = ctlr->caps2; 806199322Smav ch->quirks = ctlr->quirks; 807195534Sscottl ch->numslots = ((ch->caps & AHCI_CAP_NCS) >> AHCI_CAP_NCS_SHIFT) + 1, 808196656Smav mtx_init(&ch->mtx, "AHCI channel lock", NULL, MTX_DEF); 809195534Sscottl resource_int_value(device_get_name(dev), 810195534Sscottl device_get_unit(dev), "pm_level", &ch->pm_level); 811196656Smav if (ch->pm_level > 3) 812196656Smav callout_init_mtx(&ch->pm_timer, &ch->mtx, 0); 813195534Sscottl /* Limit speed for my onboard JMicron external port. 814195534Sscottl * It is not eSATA really. */ 815195534Sscottl if (pci_get_devid(ctlr->dev) == 0x2363197b && 816195534Sscottl pci_get_subvendor(ctlr->dev) == 0x1043 && 817195534Sscottl pci_get_subdevice(ctlr->dev) == 0x81e4 && 818195534Sscottl ch->unit == 0) 819199821Smav sata_rev = 1; 820203030Smav if (ch->quirks & AHCI_Q_SATA2) 821203030Smav sata_rev = 2; 822195534Sscottl resource_int_value(device_get_name(dev), 823199821Smav device_get_unit(dev), "sata_rev", &sata_rev); 824199821Smav for (i = 0; i < 16; i++) { 825199821Smav ch->user[i].revision = sata_rev; 826199821Smav ch->user[i].mode = 0; 827199821Smav ch->user[i].bytecount = 8192; 828199821Smav ch->user[i].tags = ch->numslots; 829199821Smav ch->curr[i] = ch->user[i]; 830199821Smav } 831195534Sscottl rid = ch->unit; 832195534Sscottl if (!(ch->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 833195534Sscottl &rid, RF_ACTIVE))) 834195534Sscottl return (ENXIO); 835195534Sscottl ahci_dmainit(dev); 836195534Sscottl ahci_slotsalloc(dev); 837195534Sscottl ahci_ch_resume(dev); 838195534Sscottl mtx_lock(&ch->mtx); 839195534Sscottl rid = ATA_IRQ_RID; 840195534Sscottl if (!(ch->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 841195534Sscottl &rid, RF_SHAREABLE | RF_ACTIVE))) { 842195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 843195534Sscottl device_printf(dev, "Unable to map interrupt\n"); 844195534Sscottl return (ENXIO); 845195534Sscottl } 846195534Sscottl if ((bus_setup_intr(dev, ch->r_irq, ATA_INTR_FLAGS, NULL, 847195534Sscottl ahci_ch_intr_locked, dev, &ch->ih))) { 848195534Sscottl device_printf(dev, "Unable to setup interrupt\n"); 849195534Sscottl error = ENXIO; 850195534Sscottl goto err1; 851195534Sscottl } 852195534Sscottl /* Create the device queue for our SIM. */ 853195534Sscottl devq = cam_simq_alloc(ch->numslots); 854195534Sscottl if (devq == NULL) { 855195534Sscottl device_printf(dev, "Unable to allocate simq\n"); 856195534Sscottl error = ENOMEM; 857195534Sscottl goto err1; 858195534Sscottl } 859195534Sscottl /* Construct SIM entry */ 860195534Sscottl ch->sim = cam_sim_alloc(ahciaction, ahcipoll, "ahcich", ch, 861199178Smav device_get_unit(dev), &ch->mtx, 862199278Smav min(2, ch->numslots), 863199278Smav (ch->caps & AHCI_CAP_SNCQ) ? ch->numslots : 0, 864199278Smav devq); 865195534Sscottl if (ch->sim == NULL) { 866195534Sscottl device_printf(dev, "unable to allocate sim\n"); 867195534Sscottl error = ENOMEM; 868195534Sscottl goto err2; 869195534Sscottl } 870195534Sscottl if (xpt_bus_register(ch->sim, dev, 0) != CAM_SUCCESS) { 871195534Sscottl device_printf(dev, "unable to register xpt bus\n"); 872195534Sscottl error = ENXIO; 873195534Sscottl goto err2; 874195534Sscottl } 875195534Sscottl if (xpt_create_path(&ch->path, /*periph*/NULL, cam_sim_path(ch->sim), 876195534Sscottl CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 877195534Sscottl device_printf(dev, "unable to create path\n"); 878195534Sscottl error = ENXIO; 879195534Sscottl goto err3; 880195534Sscottl } 881196656Smav if (ch->pm_level > 3) { 882196656Smav callout_reset(&ch->pm_timer, 883196656Smav (ch->pm_level == 4) ? hz / 1000 : hz / 8, 884196656Smav ahci_ch_pm, dev); 885196656Smav } 886195534Sscottl mtx_unlock(&ch->mtx); 887195534Sscottl return (0); 888195534Sscottl 889195534Sscottlerr3: 890195534Sscottl xpt_bus_deregister(cam_sim_path(ch->sim)); 891195534Sscottlerr2: 892195534Sscottl cam_sim_free(ch->sim, /*free_devq*/TRUE); 893195534Sscottlerr1: 894195534Sscottl bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 895195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 896195534Sscottl mtx_unlock(&ch->mtx); 897195534Sscottl return (error); 898195534Sscottl} 899195534Sscottl 900195534Sscottlstatic int 901195534Sscottlahci_ch_detach(device_t dev) 902195534Sscottl{ 903195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 904195534Sscottl 905195534Sscottl mtx_lock(&ch->mtx); 906195534Sscottl xpt_async(AC_LOST_DEVICE, ch->path, NULL); 907195534Sscottl xpt_free_path(ch->path); 908195534Sscottl xpt_bus_deregister(cam_sim_path(ch->sim)); 909195534Sscottl cam_sim_free(ch->sim, /*free_devq*/TRUE); 910195534Sscottl mtx_unlock(&ch->mtx); 911195534Sscottl 912196656Smav if (ch->pm_level > 3) 913196656Smav callout_drain(&ch->pm_timer); 914195534Sscottl bus_teardown_intr(dev, ch->r_irq, ch->ih); 915195534Sscottl bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 916195534Sscottl 917195534Sscottl ahci_ch_suspend(dev); 918195534Sscottl ahci_slotsfree(dev); 919195534Sscottl ahci_dmafini(dev); 920195534Sscottl 921195534Sscottl bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 922195534Sscottl mtx_destroy(&ch->mtx); 923195534Sscottl return (0); 924195534Sscottl} 925195534Sscottl 926195534Sscottlstatic int 927195534Sscottlahci_ch_suspend(device_t dev) 928195534Sscottl{ 929195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 930195534Sscottl 931195534Sscottl /* Disable port interrupts. */ 932195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 0); 933195534Sscottl /* Reset command register. */ 934195534Sscottl ahci_stop(dev); 935195534Sscottl ahci_stop_fr(dev); 936195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, 0); 937195534Sscottl /* Allow everything, including partial and slumber modes. */ 938195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SCTL, 0); 939195534Sscottl /* Request slumber mode transition and give some time to get there. */ 940195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, AHCI_P_CMD_SLUMBER); 941195534Sscottl DELAY(100); 942195534Sscottl /* Disable PHY. */ 943195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SCTL, ATA_SC_DET_DISABLE); 944195534Sscottl return (0); 945195534Sscottl} 946195534Sscottl 947195534Sscottlstatic int 948195534Sscottlahci_ch_resume(device_t dev) 949195534Sscottl{ 950195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 951195534Sscottl uint64_t work; 952195534Sscottl 953195534Sscottl /* Disable port interrupts */ 954195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 0); 955195534Sscottl /* Setup work areas */ 956195534Sscottl work = ch->dma.work_bus + AHCI_CL_OFFSET; 957195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CLB, work & 0xffffffff); 958195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CLBU, work >> 32); 959195534Sscottl work = ch->dma.rfis_bus; 960195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_FB, work & 0xffffffff); 961195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_FBU, work >> 32); 962195534Sscottl /* Activate the channel and power/spin up device */ 963195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, 964195534Sscottl (AHCI_P_CMD_ACTIVE | AHCI_P_CMD_POD | AHCI_P_CMD_SUD | 965196656Smav ((ch->pm_level == 2 || ch->pm_level == 3) ? AHCI_P_CMD_ALPE : 0) | 966195534Sscottl ((ch->pm_level > 2) ? AHCI_P_CMD_ASP : 0 ))); 967195534Sscottl ahci_start_fr(dev); 968195534Sscottl ahci_start(dev); 969195534Sscottl return (0); 970195534Sscottl} 971195534Sscottl 972195534Sscottldevclass_t ahcich_devclass; 973195534Sscottlstatic device_method_t ahcich_methods[] = { 974195534Sscottl DEVMETHOD(device_probe, ahci_ch_probe), 975195534Sscottl DEVMETHOD(device_attach, ahci_ch_attach), 976195534Sscottl DEVMETHOD(device_detach, ahci_ch_detach), 977195534Sscottl DEVMETHOD(device_suspend, ahci_ch_suspend), 978195534Sscottl DEVMETHOD(device_resume, ahci_ch_resume), 979195534Sscottl { 0, 0 } 980195534Sscottl}; 981195534Sscottlstatic driver_t ahcich_driver = { 982195534Sscottl "ahcich", 983195534Sscottl ahcich_methods, 984195534Sscottl sizeof(struct ahci_channel) 985195534Sscottl}; 986199322SmavDRIVER_MODULE(ahcich, ahci, ahcich_driver, ahcich_devclass, 0, 0); 987195534Sscottl 988195534Sscottlstruct ahci_dc_cb_args { 989195534Sscottl bus_addr_t maddr; 990195534Sscottl int error; 991195534Sscottl}; 992195534Sscottl 993195534Sscottlstatic void 994195534Sscottlahci_dmainit(device_t dev) 995195534Sscottl{ 996195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 997195534Sscottl struct ahci_dc_cb_args dcba; 998195534Sscottl 999195534Sscottl if (ch->caps & AHCI_CAP_64BIT) 1000195534Sscottl ch->dma.max_address = BUS_SPACE_MAXADDR; 1001195534Sscottl else 1002195534Sscottl ch->dma.max_address = BUS_SPACE_MAXADDR_32BIT; 1003195534Sscottl /* Command area. */ 1004195534Sscottl if (bus_dma_tag_create(bus_get_dma_tag(dev), 1024, 0, 1005195534Sscottl ch->dma.max_address, BUS_SPACE_MAXADDR, 1006195534Sscottl NULL, NULL, AHCI_WORK_SIZE, 1, AHCI_WORK_SIZE, 1007195534Sscottl 0, NULL, NULL, &ch->dma.work_tag)) 1008195534Sscottl goto error; 1009195534Sscottl if (bus_dmamem_alloc(ch->dma.work_tag, (void **)&ch->dma.work, 0, 1010195534Sscottl &ch->dma.work_map)) 1011195534Sscottl goto error; 1012195534Sscottl if (bus_dmamap_load(ch->dma.work_tag, ch->dma.work_map, ch->dma.work, 1013195534Sscottl AHCI_WORK_SIZE, ahci_dmasetupc_cb, &dcba, 0) || dcba.error) { 1014195534Sscottl bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 1015195534Sscottl goto error; 1016195534Sscottl } 1017195534Sscottl ch->dma.work_bus = dcba.maddr; 1018195534Sscottl /* FIS receive area. */ 1019195534Sscottl if (bus_dma_tag_create(bus_get_dma_tag(dev), 4096, 0, 1020195534Sscottl ch->dma.max_address, BUS_SPACE_MAXADDR, 1021195534Sscottl NULL, NULL, 4096, 1, 4096, 1022195534Sscottl 0, NULL, NULL, &ch->dma.rfis_tag)) 1023195534Sscottl goto error; 1024195534Sscottl if (bus_dmamem_alloc(ch->dma.rfis_tag, (void **)&ch->dma.rfis, 0, 1025195534Sscottl &ch->dma.rfis_map)) 1026195534Sscottl goto error; 1027195534Sscottl if (bus_dmamap_load(ch->dma.rfis_tag, ch->dma.rfis_map, ch->dma.rfis, 1028195534Sscottl 4096, ahci_dmasetupc_cb, &dcba, 0) || dcba.error) { 1029195534Sscottl bus_dmamem_free(ch->dma.rfis_tag, ch->dma.rfis, ch->dma.rfis_map); 1030195534Sscottl goto error; 1031195534Sscottl } 1032195534Sscottl ch->dma.rfis_bus = dcba.maddr; 1033195534Sscottl /* Data area. */ 1034195534Sscottl if (bus_dma_tag_create(bus_get_dma_tag(dev), 2, 0, 1035195534Sscottl ch->dma.max_address, BUS_SPACE_MAXADDR, 1036195534Sscottl NULL, NULL, 1037195534Sscottl AHCI_SG_ENTRIES * PAGE_SIZE * ch->numslots, 1038195534Sscottl AHCI_SG_ENTRIES, AHCI_PRD_MAX, 1039195534Sscottl 0, busdma_lock_mutex, &ch->mtx, &ch->dma.data_tag)) { 1040195534Sscottl goto error; 1041195534Sscottl } 1042195534Sscottl return; 1043195534Sscottl 1044195534Sscottlerror: 1045195534Sscottl device_printf(dev, "WARNING - DMA initialization failed\n"); 1046195534Sscottl ahci_dmafini(dev); 1047195534Sscottl} 1048195534Sscottl 1049195534Sscottlstatic void 1050195534Sscottlahci_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error) 1051195534Sscottl{ 1052195534Sscottl struct ahci_dc_cb_args *dcba = (struct ahci_dc_cb_args *)xsc; 1053195534Sscottl 1054195534Sscottl if (!(dcba->error = error)) 1055195534Sscottl dcba->maddr = segs[0].ds_addr; 1056195534Sscottl} 1057195534Sscottl 1058195534Sscottlstatic void 1059195534Sscottlahci_dmafini(device_t dev) 1060195534Sscottl{ 1061195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1062195534Sscottl 1063195534Sscottl if (ch->dma.data_tag) { 1064195534Sscottl bus_dma_tag_destroy(ch->dma.data_tag); 1065195534Sscottl ch->dma.data_tag = NULL; 1066195534Sscottl } 1067195534Sscottl if (ch->dma.rfis_bus) { 1068195534Sscottl bus_dmamap_unload(ch->dma.rfis_tag, ch->dma.rfis_map); 1069195534Sscottl bus_dmamem_free(ch->dma.rfis_tag, ch->dma.rfis, ch->dma.rfis_map); 1070195534Sscottl ch->dma.rfis_bus = 0; 1071195534Sscottl ch->dma.rfis_map = NULL; 1072195534Sscottl ch->dma.rfis = NULL; 1073195534Sscottl } 1074195534Sscottl if (ch->dma.work_bus) { 1075195534Sscottl bus_dmamap_unload(ch->dma.work_tag, ch->dma.work_map); 1076195534Sscottl bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 1077195534Sscottl ch->dma.work_bus = 0; 1078195534Sscottl ch->dma.work_map = NULL; 1079195534Sscottl ch->dma.work = NULL; 1080195534Sscottl } 1081195534Sscottl if (ch->dma.work_tag) { 1082195534Sscottl bus_dma_tag_destroy(ch->dma.work_tag); 1083195534Sscottl ch->dma.work_tag = NULL; 1084195534Sscottl } 1085195534Sscottl} 1086195534Sscottl 1087195534Sscottlstatic void 1088195534Sscottlahci_slotsalloc(device_t dev) 1089195534Sscottl{ 1090195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1091195534Sscottl int i; 1092195534Sscottl 1093195534Sscottl /* Alloc and setup command/dma slots */ 1094195534Sscottl bzero(ch->slot, sizeof(ch->slot)); 1095195534Sscottl for (i = 0; i < ch->numslots; i++) { 1096195534Sscottl struct ahci_slot *slot = &ch->slot[i]; 1097195534Sscottl 1098195534Sscottl slot->dev = dev; 1099195534Sscottl slot->slot = i; 1100195534Sscottl slot->state = AHCI_SLOT_EMPTY; 1101195534Sscottl slot->ccb = NULL; 1102195534Sscottl callout_init_mtx(&slot->timeout, &ch->mtx, 0); 1103195534Sscottl 1104195534Sscottl if (bus_dmamap_create(ch->dma.data_tag, 0, &slot->dma.data_map)) 1105195534Sscottl device_printf(ch->dev, "FAILURE - create data_map\n"); 1106195534Sscottl } 1107195534Sscottl} 1108195534Sscottl 1109195534Sscottlstatic void 1110195534Sscottlahci_slotsfree(device_t dev) 1111195534Sscottl{ 1112195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1113195534Sscottl int i; 1114195534Sscottl 1115195534Sscottl /* Free all dma slots */ 1116195534Sscottl for (i = 0; i < ch->numslots; i++) { 1117195534Sscottl struct ahci_slot *slot = &ch->slot[i]; 1118195534Sscottl 1119196656Smav callout_drain(&slot->timeout); 1120195534Sscottl if (slot->dma.data_map) { 1121195534Sscottl bus_dmamap_destroy(ch->dma.data_tag, slot->dma.data_map); 1122195534Sscottl slot->dma.data_map = NULL; 1123195534Sscottl } 1124195534Sscottl } 1125195534Sscottl} 1126195534Sscottl 1127195534Sscottlstatic void 1128198319Smavahci_phy_check_events(device_t dev, u_int32_t serr) 1129195534Sscottl{ 1130195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1131195534Sscottl 1132198319Smav if ((serr & ATA_SE_PHY_CHANGED) && (ch->pm_level == 0)) { 1133195534Sscottl u_int32_t status = ATA_INL(ch->r_mem, AHCI_P_SSTS); 1134195534Sscottl if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 1135195534Sscottl ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 1136195534Sscottl ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) { 1137195534Sscottl if (bootverbose) 1138195534Sscottl device_printf(dev, "CONNECT requested\n"); 1139195534Sscottl ahci_reset(dev); 1140195534Sscottl } else { 1141195534Sscottl if (bootverbose) 1142195534Sscottl device_printf(dev, "DISCONNECT requested\n"); 1143195534Sscottl ch->devices = 0; 1144195534Sscottl } 1145195534Sscottl } 1146195534Sscottl} 1147195534Sscottl 1148195534Sscottlstatic void 1149196907Smavahci_notify_events(device_t dev, u_int32_t status) 1150196656Smav{ 1151196656Smav struct ahci_channel *ch = device_get_softc(dev); 1152196656Smav struct cam_path *dpath; 1153196656Smav int i; 1154196656Smav 1155200196Smav if (ch->caps & AHCI_CAP_SSNTF) 1156200196Smav ATA_OUTL(ch->r_mem, AHCI_P_SNTF, status); 1157196656Smav if (bootverbose) 1158196656Smav device_printf(dev, "SNTF 0x%04x\n", status); 1159196656Smav for (i = 0; i < 16; i++) { 1160196656Smav if ((status & (1 << i)) == 0) 1161196656Smav continue; 1162196656Smav if (xpt_create_path(&dpath, NULL, 1163196656Smav xpt_path_path_id(ch->path), i, 0) == CAM_REQ_CMP) { 1164196656Smav xpt_async(AC_SCSI_AEN, dpath, NULL); 1165196656Smav xpt_free_path(dpath); 1166196656Smav } 1167196656Smav } 1168196656Smav} 1169196656Smav 1170196656Smavstatic void 1171195534Sscottlahci_ch_intr_locked(void *data) 1172195534Sscottl{ 1173195534Sscottl device_t dev = (device_t)data; 1174195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1175195534Sscottl 1176195534Sscottl mtx_lock(&ch->mtx); 1177195534Sscottl ahci_ch_intr(data); 1178195534Sscottl mtx_unlock(&ch->mtx); 1179195534Sscottl} 1180195534Sscottl 1181195534Sscottlstatic void 1182196656Smavahci_ch_pm(void *arg) 1183196656Smav{ 1184196656Smav device_t dev = (device_t)arg; 1185196656Smav struct ahci_channel *ch = device_get_softc(dev); 1186196656Smav uint32_t work; 1187196656Smav 1188196656Smav if (ch->numrslots != 0) 1189196656Smav return; 1190196656Smav work = ATA_INL(ch->r_mem, AHCI_P_CMD); 1191196656Smav if (ch->pm_level == 4) 1192196656Smav work |= AHCI_P_CMD_PARTIAL; 1193196656Smav else 1194196656Smav work |= AHCI_P_CMD_SLUMBER; 1195196656Smav ATA_OUTL(ch->r_mem, AHCI_P_CMD, work); 1196196656Smav} 1197196656Smav 1198196656Smavstatic void 1199195534Sscottlahci_ch_intr(void *data) 1200195534Sscottl{ 1201195534Sscottl device_t dev = (device_t)data; 1202195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1203198319Smav uint32_t istatus, sstatus, cstatus, serr = 0, sntf = 0, ok, err; 1204195534Sscottl enum ahci_err_type et; 1205195534Sscottl int i, ccs, ncq_err = 0; 1206195534Sscottl 1207195534Sscottl /* Read and clear interrupt statuses. */ 1208195534Sscottl istatus = ATA_INL(ch->r_mem, AHCI_P_IS); 1209196656Smav if (istatus == 0) 1210196656Smav return; 1211195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IS, istatus); 1212195534Sscottl /* Read command statuses. */ 1213196907Smav sstatus = ATA_INL(ch->r_mem, AHCI_P_SACT); 1214195534Sscottl cstatus = ATA_INL(ch->r_mem, AHCI_P_CI); 1215200196Smav if (istatus & AHCI_P_IX_SDB) { 1216200196Smav if (ch->caps & AHCI_CAP_SSNTF) 1217200196Smav sntf = ATA_INL(ch->r_mem, AHCI_P_SNTF); 1218200196Smav else { 1219200196Smav u_int8_t *fis = ch->dma.rfis + 0x58; 1220200196Smav 1221200196Smav if (fis[1] & 0x80) 1222200196Smav sntf = (1 << (fis[1] & 0x0f)); 1223200196Smav } 1224200196Smav } 1225195534Sscottl /* Process PHY events */ 1226198319Smav if (istatus & (AHCI_P_IX_PC | AHCI_P_IX_PRC | AHCI_P_IX_OF | 1227198319Smav AHCI_P_IX_IF | AHCI_P_IX_HBD | AHCI_P_IX_HBF | AHCI_P_IX_TFE)) { 1228198319Smav serr = ATA_INL(ch->r_mem, AHCI_P_SERR); 1229198319Smav if (serr) { 1230198319Smav ATA_OUTL(ch->r_mem, AHCI_P_SERR, serr); 1231198319Smav ahci_phy_check_events(dev, serr); 1232198319Smav } 1233198319Smav } 1234195534Sscottl /* Process command errors */ 1235198319Smav if (istatus & (AHCI_P_IX_OF | AHCI_P_IX_IF | 1236198319Smav AHCI_P_IX_HBD | AHCI_P_IX_HBF | AHCI_P_IX_TFE)) { 1237195534Sscottl//device_printf(dev, "%s ERROR is %08x cs %08x ss %08x rs %08x tfd %02x serr %08x\n", 1238195534Sscottl// __func__, istatus, cstatus, sstatus, ch->rslots, ATA_INL(ch->r_mem, AHCI_P_TFD), 1239198319Smav// serr); 1240195534Sscottl ccs = (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CCS_MASK) 1241195534Sscottl >> AHCI_P_CMD_CCS_SHIFT; 1242196656Smav err = ch->rslots & (cstatus | sstatus); 1243195534Sscottl /* Kick controller into sane state */ 1244195534Sscottl ahci_stop(dev); 1245195534Sscottl ahci_start(dev); 1246195534Sscottl } else { 1247195534Sscottl ccs = 0; 1248195534Sscottl err = 0; 1249195534Sscottl } 1250195534Sscottl /* Complete all successfull commands. */ 1251196656Smav ok = ch->rslots & ~(cstatus | sstatus); 1252195534Sscottl for (i = 0; i < ch->numslots; i++) { 1253195534Sscottl if ((ok >> i) & 1) 1254195534Sscottl ahci_end_transaction(&ch->slot[i], AHCI_ERR_NONE); 1255195534Sscottl } 1256195534Sscottl /* On error, complete the rest of commands with error statuses. */ 1257195534Sscottl if (err) { 1258195534Sscottl if (ch->frozen) { 1259195534Sscottl union ccb *fccb = ch->frozen; 1260195534Sscottl ch->frozen = NULL; 1261195534Sscottl fccb->ccb_h.status = CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 1262198319Smav if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 1263198319Smav xpt_freeze_devq(fccb->ccb_h.path, 1); 1264198319Smav fccb->ccb_h.status |= CAM_DEV_QFRZN; 1265198319Smav } 1266195534Sscottl xpt_done(fccb); 1267195534Sscottl } 1268195534Sscottl for (i = 0; i < ch->numslots; i++) { 1269195534Sscottl /* XXX: reqests in loading state. */ 1270195534Sscottl if (((err >> i) & 1) == 0) 1271195534Sscottl continue; 1272198390Smav if (istatus & AHCI_P_IX_TFE) { 1273195534Sscottl /* Task File Error */ 1274195534Sscottl if (ch->numtslots == 0) { 1275195534Sscottl /* Untagged operation. */ 1276195534Sscottl if (i == ccs) 1277195534Sscottl et = AHCI_ERR_TFE; 1278195534Sscottl else 1279195534Sscottl et = AHCI_ERR_INNOCENT; 1280195534Sscottl } else { 1281195534Sscottl /* Tagged operation. */ 1282195534Sscottl et = AHCI_ERR_NCQ; 1283195534Sscottl ncq_err = 1; 1284195534Sscottl } 1285198390Smav } else if (istatus & AHCI_P_IX_IF) { 1286198390Smav if (ch->numtslots == 0 && i != ccs) 1287198390Smav et = AHCI_ERR_INNOCENT; 1288198390Smav else 1289198390Smav et = AHCI_ERR_SATA; 1290195534Sscottl } else 1291195534Sscottl et = AHCI_ERR_INVALID; 1292195534Sscottl ahci_end_transaction(&ch->slot[i], et); 1293195534Sscottl } 1294195534Sscottl if (ncq_err) 1295195534Sscottl ahci_issue_read_log(dev); 1296195534Sscottl } 1297196656Smav /* Process NOTIFY events */ 1298196907Smav if (sntf) 1299196907Smav ahci_notify_events(dev, sntf); 1300195534Sscottl} 1301195534Sscottl 1302195534Sscottl/* Must be called with channel locked. */ 1303195534Sscottlstatic int 1304195534Sscottlahci_check_collision(device_t dev, union ccb *ccb) 1305195534Sscottl{ 1306195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1307195534Sscottl 1308195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1309195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1310195534Sscottl /* Tagged command while untagged are active. */ 1311195534Sscottl if (ch->numrslots != 0 && ch->numtslots == 0) 1312195534Sscottl return (1); 1313195534Sscottl /* Tagged command while tagged to other target is active. */ 1314195534Sscottl if (ch->numtslots != 0 && 1315195534Sscottl ch->taggedtarget != ccb->ccb_h.target_id) 1316195534Sscottl return (1); 1317199747Smav /* Tagged command while we have no supported tag free. */ 1318199747Smav if (((~ch->oslots) & (0xffffffff >> (32 - 1319199747Smav ch->curr[ccb->ccb_h.target_id].tags))) == 0) 1320199747Smav return (1); 1321195534Sscottl } else { 1322195534Sscottl /* Untagged command while tagged are active. */ 1323195534Sscottl if (ch->numrslots != 0 && ch->numtslots != 0) 1324195534Sscottl return (1); 1325195534Sscottl } 1326195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1327195534Sscottl (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) { 1328195534Sscottl /* Atomic command while anything active. */ 1329195534Sscottl if (ch->numrslots != 0) 1330195534Sscottl return (1); 1331195534Sscottl } 1332195534Sscottl /* We have some atomic command running. */ 1333195534Sscottl if (ch->aslots != 0) 1334195534Sscottl return (1); 1335195534Sscottl return (0); 1336195534Sscottl} 1337195534Sscottl 1338195534Sscottl/* Must be called with channel locked. */ 1339195534Sscottlstatic void 1340195534Sscottlahci_begin_transaction(device_t dev, union ccb *ccb) 1341195534Sscottl{ 1342195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1343195534Sscottl struct ahci_slot *slot; 1344199747Smav int tag, tags; 1345195534Sscottl 1346195534Sscottl /* Choose empty slot. */ 1347199747Smav tags = ch->numslots; 1348199747Smav if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1349199747Smav (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) 1350199747Smav tags = ch->curr[ccb->ccb_h.target_id].tags; 1351195534Sscottl tag = ch->lastslot; 1352199747Smav while (1) { 1353199747Smav if (tag >= tags) 1354195534Sscottl tag = 0; 1355199747Smav if (ch->slot[tag].state == AHCI_SLOT_EMPTY) 1356199747Smav break; 1357199747Smav tag++; 1358199747Smav }; 1359195534Sscottl ch->lastslot = tag; 1360195534Sscottl /* Occupy chosen slot. */ 1361195534Sscottl slot = &ch->slot[tag]; 1362195534Sscottl slot->ccb = ccb; 1363196656Smav /* Stop PM timer. */ 1364196656Smav if (ch->numrslots == 0 && ch->pm_level > 3) 1365196656Smav callout_stop(&ch->pm_timer); 1366195534Sscottl /* Update channel stats. */ 1367199747Smav ch->oslots |= (1 << slot->slot); 1368195534Sscottl ch->numrslots++; 1369195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1370195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1371195534Sscottl ch->numtslots++; 1372195534Sscottl ch->taggedtarget = ccb->ccb_h.target_id; 1373195534Sscottl } 1374195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1375195534Sscottl (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) 1376195534Sscottl ch->aslots |= (1 << slot->slot); 1377195534Sscottl slot->dma.nsegs = 0; 1378195534Sscottl /* If request moves data, setup and load SG list */ 1379195534Sscottl if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 1380195534Sscottl void *buf; 1381195534Sscottl bus_size_t size; 1382195534Sscottl 1383195534Sscottl slot->state = AHCI_SLOT_LOADING; 1384195534Sscottl if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1385195534Sscottl buf = ccb->ataio.data_ptr; 1386195534Sscottl size = ccb->ataio.dxfer_len; 1387195534Sscottl } else { 1388195534Sscottl buf = ccb->csio.data_ptr; 1389195534Sscottl size = ccb->csio.dxfer_len; 1390195534Sscottl } 1391195534Sscottl bus_dmamap_load(ch->dma.data_tag, slot->dma.data_map, 1392195534Sscottl buf, size, ahci_dmasetprd, slot, 0); 1393195534Sscottl } else 1394195534Sscottl ahci_execute_transaction(slot); 1395195534Sscottl} 1396195534Sscottl 1397195534Sscottl/* Locked by busdma engine. */ 1398195534Sscottlstatic void 1399195534Sscottlahci_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1400195534Sscottl{ 1401195534Sscottl struct ahci_slot *slot = arg; 1402195534Sscottl struct ahci_channel *ch = device_get_softc(slot->dev); 1403195534Sscottl struct ahci_cmd_tab *ctp; 1404195534Sscottl struct ahci_dma_prd *prd; 1405195534Sscottl int i; 1406195534Sscottl 1407195534Sscottl if (error) { 1408195534Sscottl device_printf(slot->dev, "DMA load error\n"); 1409195534Sscottl ahci_end_transaction(slot, AHCI_ERR_INVALID); 1410195534Sscottl return; 1411195534Sscottl } 1412195534Sscottl KASSERT(nsegs <= AHCI_SG_ENTRIES, ("too many DMA segment entries\n")); 1413195534Sscottl /* Get a piece of the workspace for this request */ 1414195534Sscottl ctp = (struct ahci_cmd_tab *) 1415195534Sscottl (ch->dma.work + AHCI_CT_OFFSET + (AHCI_CT_SIZE * slot->slot)); 1416195534Sscottl /* Fill S/G table */ 1417195534Sscottl prd = &ctp->prd_tab[0]; 1418195534Sscottl for (i = 0; i < nsegs; i++) { 1419195534Sscottl prd[i].dba = htole64(segs[i].ds_addr); 1420195534Sscottl prd[i].dbc = htole32((segs[i].ds_len - 1) & AHCI_PRD_MASK); 1421195534Sscottl } 1422195534Sscottl slot->dma.nsegs = nsegs; 1423195534Sscottl bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 1424195534Sscottl ((slot->ccb->ccb_h.flags & CAM_DIR_IN) ? 1425195534Sscottl BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE)); 1426195534Sscottl ahci_execute_transaction(slot); 1427195534Sscottl} 1428195534Sscottl 1429195534Sscottl/* Must be called with channel locked. */ 1430195534Sscottlstatic void 1431195534Sscottlahci_execute_transaction(struct ahci_slot *slot) 1432195534Sscottl{ 1433195534Sscottl device_t dev = slot->dev; 1434195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1435195534Sscottl struct ahci_cmd_tab *ctp; 1436195534Sscottl struct ahci_cmd_list *clp; 1437195534Sscottl union ccb *ccb = slot->ccb; 1438195534Sscottl int port = ccb->ccb_h.target_id & 0x0f; 1439195534Sscottl int fis_size; 1440195534Sscottl 1441195534Sscottl /* Get a piece of the workspace for this request */ 1442195534Sscottl ctp = (struct ahci_cmd_tab *) 1443195534Sscottl (ch->dma.work + AHCI_CT_OFFSET + (AHCI_CT_SIZE * slot->slot)); 1444195534Sscottl /* Setup the FIS for this request */ 1445199821Smav if (!(fis_size = ahci_setup_fis(dev, ctp, ccb, slot->slot))) { 1446195534Sscottl device_printf(ch->dev, "Setting up SATA FIS failed\n"); 1447195534Sscottl ahci_end_transaction(slot, AHCI_ERR_INVALID); 1448195534Sscottl return; 1449195534Sscottl } 1450195534Sscottl /* Setup the command list entry */ 1451195534Sscottl clp = (struct ahci_cmd_list *) 1452195534Sscottl (ch->dma.work + AHCI_CL_OFFSET + (AHCI_CL_SIZE * slot->slot)); 1453195534Sscottl clp->prd_length = slot->dma.nsegs; 1454195534Sscottl clp->cmd_flags = (ccb->ccb_h.flags & CAM_DIR_OUT ? AHCI_CMD_WRITE : 0) | 1455195534Sscottl (ccb->ccb_h.func_code == XPT_SCSI_IO ? 1456195534Sscottl (AHCI_CMD_ATAPI | AHCI_CMD_PREFETCH) : 0) | 1457195534Sscottl (fis_size / sizeof(u_int32_t)) | 1458195534Sscottl (port << 12); 1459195534Sscottl /* Special handling for Soft Reset command. */ 1460195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1461195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) && 1462195534Sscottl (ccb->ataio.cmd.control & ATA_A_RESET)) { 1463195534Sscottl /* Kick controller into sane state */ 1464195534Sscottl ahci_stop(dev); 1465195534Sscottl ahci_clo(dev); 1466195534Sscottl ahci_start(dev); 1467195534Sscottl clp->cmd_flags |= AHCI_CMD_RESET | AHCI_CMD_CLR_BUSY; 1468195534Sscottl } 1469195534Sscottl clp->bytecount = 0; 1470195534Sscottl clp->cmd_table_phys = htole64(ch->dma.work_bus + AHCI_CT_OFFSET + 1471195534Sscottl (AHCI_CT_SIZE * slot->slot)); 1472195534Sscottl bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1473195534Sscottl BUS_DMASYNC_PREWRITE); 1474195534Sscottl bus_dmamap_sync(ch->dma.rfis_tag, ch->dma.rfis_map, 1475195534Sscottl BUS_DMASYNC_PREREAD); 1476195534Sscottl /* Set ACTIVE bit for NCQ commands. */ 1477195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1478195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1479195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SACT, 1 << slot->slot); 1480195534Sscottl } 1481195534Sscottl /* Issue command to the controller. */ 1482195534Sscottl slot->state = AHCI_SLOT_RUNNING; 1483195534Sscottl ch->rslots |= (1 << slot->slot); 1484195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CI, (1 << slot->slot)); 1485195534Sscottl /* Device reset commands doesn't interrupt. Poll them. */ 1486195534Sscottl if (ccb->ccb_h.func_code == XPT_ATA_IO && 1487195534Sscottl (ccb->ataio.cmd.command == ATA_DEVICE_RESET || 1488195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL))) { 1489195534Sscottl int count, timeout = ccb->ccb_h.timeout; 1490195534Sscottl enum ahci_err_type et = AHCI_ERR_NONE; 1491195534Sscottl 1492195534Sscottl for (count = 0; count < timeout; count++) { 1493195534Sscottl DELAY(1000); 1494195534Sscottl if (!(ATA_INL(ch->r_mem, AHCI_P_CI) & (1 << slot->slot))) 1495195534Sscottl break; 1496195534Sscottl if (ATA_INL(ch->r_mem, AHCI_P_TFD) & ATA_S_ERROR) { 1497195534Sscottl device_printf(ch->dev, 1498195534Sscottl "Poll error on slot %d, TFD: %04x\n", 1499195534Sscottl slot->slot, ATA_INL(ch->r_mem, AHCI_P_TFD)); 1500195534Sscottl et = AHCI_ERR_TFE; 1501195534Sscottl break; 1502195534Sscottl } 1503198851Smav /* Workaround for ATI SB600/SB700 chipsets. */ 1504198851Smav if (ccb->ccb_h.target_id == 15 && 1505198851Smav pci_get_vendor(device_get_parent(dev)) == 0x1002 && 1506198851Smav (ATA_INL(ch->r_mem, AHCI_P_IS) & AHCI_P_IX_IPM)) { 1507198851Smav et = AHCI_ERR_TIMEOUT; 1508198851Smav break; 1509198851Smav } 1510195534Sscottl } 1511195534Sscottl if (timeout && (count >= timeout)) { 1512195534Sscottl device_printf(ch->dev, 1513195534Sscottl "Poll timeout on slot %d\n", slot->slot); 1514195534Sscottl et = AHCI_ERR_TIMEOUT; 1515195534Sscottl } 1516195534Sscottl if (et != AHCI_ERR_NONE) { 1517195534Sscottl /* Kick controller into sane state */ 1518195534Sscottl ahci_stop(ch->dev); 1519195534Sscottl ahci_start(ch->dev); 1520195534Sscottl } 1521195534Sscottl ahci_end_transaction(slot, et); 1522195534Sscottl return; 1523195534Sscottl } 1524195534Sscottl /* Start command execution timeout */ 1525198319Smav callout_reset(&slot->timeout, (int)ccb->ccb_h.timeout * hz / 2000, 1526195534Sscottl (timeout_t*)ahci_timeout, slot); 1527195534Sscottl return; 1528195534Sscottl} 1529195534Sscottl 1530195534Sscottl/* Locked by callout mechanism. */ 1531195534Sscottlstatic void 1532195534Sscottlahci_timeout(struct ahci_slot *slot) 1533195534Sscottl{ 1534195534Sscottl device_t dev = slot->dev; 1535195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1536198319Smav uint32_t sstatus; 1537198319Smav int ccs; 1538195534Sscottl int i; 1539195534Sscottl 1540196656Smav /* Check for stale timeout. */ 1541198319Smav if (slot->state < AHCI_SLOT_RUNNING) 1542196656Smav return; 1543196656Smav 1544198319Smav /* Check if slot was not being executed last time we checked. */ 1545198319Smav if (slot->state < AHCI_SLOT_EXECUTING) { 1546198319Smav /* Check if slot started executing. */ 1547198319Smav sstatus = ATA_INL(ch->r_mem, AHCI_P_SACT); 1548198319Smav ccs = (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CCS_MASK) 1549198319Smav >> AHCI_P_CMD_CCS_SHIFT; 1550198319Smav if ((sstatus & (1 << slot->slot)) != 0 || ccs == slot->slot) 1551198319Smav slot->state = AHCI_SLOT_EXECUTING; 1552198319Smav 1553198319Smav callout_reset(&slot->timeout, 1554198319Smav (int)slot->ccb->ccb_h.timeout * hz / 2000, 1555198319Smav (timeout_t*)ahci_timeout, slot); 1556198319Smav return; 1557198319Smav } 1558198319Smav 1559195534Sscottl device_printf(dev, "Timeout on slot %d\n", slot->slot); 1560198319Smav device_printf(dev, "is %08x cs %08x ss %08x rs %08x tfd %02x serr %08x\n", 1561198319Smav ATA_INL(ch->r_mem, AHCI_P_IS), ATA_INL(ch->r_mem, AHCI_P_CI), 1562198319Smav ATA_INL(ch->r_mem, AHCI_P_SACT), ch->rslots, 1563198319Smav ATA_INL(ch->r_mem, AHCI_P_TFD), ATA_INL(ch->r_mem, AHCI_P_SERR)); 1564195534Sscottl 1565198851Smav ch->fatalerr = 1; 1566197838Smav /* Handle frozen command. */ 1567195534Sscottl if (ch->frozen) { 1568195534Sscottl union ccb *fccb = ch->frozen; 1569195534Sscottl ch->frozen = NULL; 1570195534Sscottl fccb->ccb_h.status = CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 1571198319Smav if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 1572198319Smav xpt_freeze_devq(fccb->ccb_h.path, 1); 1573198319Smav fccb->ccb_h.status |= CAM_DEV_QFRZN; 1574198319Smav } 1575195534Sscottl xpt_done(fccb); 1576195534Sscottl } 1577197838Smav /* Handle command with timeout. */ 1578197838Smav ahci_end_transaction(&ch->slot[slot->slot], AHCI_ERR_TIMEOUT); 1579197838Smav /* Handle the rest of commands. */ 1580195534Sscottl for (i = 0; i < ch->numslots; i++) { 1581195534Sscottl /* Do we have a running request on slot? */ 1582195534Sscottl if (ch->slot[i].state < AHCI_SLOT_RUNNING) 1583195534Sscottl continue; 1584195534Sscottl ahci_end_transaction(&ch->slot[i], AHCI_ERR_INNOCENT); 1585195534Sscottl } 1586195534Sscottl} 1587195534Sscottl 1588195534Sscottl/* Must be called with channel locked. */ 1589195534Sscottlstatic void 1590195534Sscottlahci_end_transaction(struct ahci_slot *slot, enum ahci_err_type et) 1591195534Sscottl{ 1592195534Sscottl device_t dev = slot->dev; 1593195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1594195534Sscottl union ccb *ccb = slot->ccb; 1595195534Sscottl 1596195534Sscottl bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1597195534Sscottl BUS_DMASYNC_POSTWRITE); 1598195534Sscottl /* Read result registers to the result struct 1599195534Sscottl * May be incorrect if several commands finished same time, 1600195534Sscottl * so read only when sure or have to. 1601195534Sscottl */ 1602195534Sscottl if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1603195534Sscottl struct ata_res *res = &ccb->ataio.res; 1604195534Sscottl 1605195534Sscottl if ((et == AHCI_ERR_TFE) || 1606195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_NEEDRESULT)) { 1607195534Sscottl u_int8_t *fis = ch->dma.rfis + 0x40; 1608195534Sscottl uint16_t tfd = ATA_INL(ch->r_mem, AHCI_P_TFD); 1609195534Sscottl 1610195534Sscottl bus_dmamap_sync(ch->dma.rfis_tag, ch->dma.rfis_map, 1611195534Sscottl BUS_DMASYNC_POSTREAD); 1612195534Sscottl res->status = tfd; 1613195534Sscottl res->error = tfd >> 8; 1614195534Sscottl res->lba_low = fis[4]; 1615195534Sscottl res->lba_mid = fis[5]; 1616195534Sscottl res->lba_high = fis[6]; 1617195534Sscottl res->device = fis[7]; 1618195534Sscottl res->lba_low_exp = fis[8]; 1619195534Sscottl res->lba_mid_exp = fis[9]; 1620195534Sscottl res->lba_high_exp = fis[10]; 1621195534Sscottl res->sector_count = fis[12]; 1622195534Sscottl res->sector_count_exp = fis[13]; 1623195534Sscottl } else 1624195534Sscottl bzero(res, sizeof(*res)); 1625195534Sscottl } 1626195534Sscottl if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 1627195534Sscottl bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 1628195534Sscottl (ccb->ccb_h.flags & CAM_DIR_IN) ? 1629195534Sscottl BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1630195534Sscottl bus_dmamap_unload(ch->dma.data_tag, slot->dma.data_map); 1631195534Sscottl } 1632198319Smav /* In case of error, freeze device for proper recovery. */ 1633198319Smav if ((et != AHCI_ERR_NONE) && (!ch->readlog) && 1634198319Smav !(ccb->ccb_h.status & CAM_DEV_QFRZN)) { 1635198319Smav xpt_freeze_devq(ccb->ccb_h.path, 1); 1636198319Smav ccb->ccb_h.status |= CAM_DEV_QFRZN; 1637198319Smav } 1638195534Sscottl /* Set proper result status. */ 1639195534Sscottl ccb->ccb_h.status &= ~CAM_STATUS_MASK; 1640195534Sscottl switch (et) { 1641195534Sscottl case AHCI_ERR_NONE: 1642195534Sscottl ccb->ccb_h.status |= CAM_REQ_CMP; 1643195534Sscottl if (ccb->ccb_h.func_code == XPT_SCSI_IO) 1644195534Sscottl ccb->csio.scsi_status = SCSI_STATUS_OK; 1645195534Sscottl break; 1646195534Sscottl case AHCI_ERR_INVALID: 1647198851Smav ch->fatalerr = 1; 1648195534Sscottl ccb->ccb_h.status |= CAM_REQ_INVALID; 1649195534Sscottl break; 1650195534Sscottl case AHCI_ERR_INNOCENT: 1651195534Sscottl ccb->ccb_h.status |= CAM_REQUEUE_REQ; 1652195534Sscottl break; 1653195534Sscottl case AHCI_ERR_TFE: 1654198319Smav case AHCI_ERR_NCQ: 1655195534Sscottl if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1656195534Sscottl ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR; 1657195534Sscottl ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 1658195534Sscottl } else { 1659195534Sscottl ccb->ccb_h.status |= CAM_ATA_STATUS_ERROR; 1660195534Sscottl } 1661195534Sscottl break; 1662195534Sscottl case AHCI_ERR_SATA: 1663198851Smav ch->fatalerr = 1; 1664198319Smav if (!ch->readlog) { 1665198319Smav xpt_freeze_simq(ch->sim, 1); 1666198319Smav ccb->ccb_h.status &= ~CAM_STATUS_MASK; 1667198319Smav ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 1668198319Smav } 1669198319Smav ccb->ccb_h.status |= CAM_UNCOR_PARITY; 1670195534Sscottl break; 1671195534Sscottl case AHCI_ERR_TIMEOUT: 1672198851Smav /* Do no treat soft-reset timeout as fatal here. */ 1673198851Smav if (ccb->ccb_h.func_code != XPT_ATA_IO || 1674198851Smav !(ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL)) 1675198851Smav ch->fatalerr = 1; 1676198319Smav if (!ch->readlog) { 1677198319Smav xpt_freeze_simq(ch->sim, 1); 1678198319Smav ccb->ccb_h.status &= ~CAM_STATUS_MASK; 1679198319Smav ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 1680198319Smav } 1681195534Sscottl ccb->ccb_h.status |= CAM_CMD_TIMEOUT; 1682195534Sscottl break; 1683195534Sscottl default: 1684198851Smav ch->fatalerr = 1; 1685195534Sscottl ccb->ccb_h.status |= CAM_REQ_CMP_ERR; 1686195534Sscottl } 1687195534Sscottl /* Free slot. */ 1688199747Smav ch->oslots &= ~(1 << slot->slot); 1689195534Sscottl ch->rslots &= ~(1 << slot->slot); 1690195534Sscottl ch->aslots &= ~(1 << slot->slot); 1691195534Sscottl slot->state = AHCI_SLOT_EMPTY; 1692195534Sscottl slot->ccb = NULL; 1693195534Sscottl /* Update channel stats. */ 1694195534Sscottl ch->numrslots--; 1695195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1696195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1697195534Sscottl ch->numtslots--; 1698195534Sscottl } 1699195534Sscottl /* If it was first request of reset sequence and there is no error, 1700195534Sscottl * proceed to second request. */ 1701195534Sscottl if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1702195534Sscottl (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) && 1703195534Sscottl (ccb->ataio.cmd.control & ATA_A_RESET) && 1704195534Sscottl et == AHCI_ERR_NONE) { 1705195534Sscottl ccb->ataio.cmd.control &= ~ATA_A_RESET; 1706195534Sscottl ahci_begin_transaction(dev, ccb); 1707195534Sscottl return; 1708195534Sscottl } 1709198851Smav /* If it was our READ LOG command - process it. */ 1710198851Smav if (ch->readlog) { 1711198851Smav ahci_process_read_log(dev, ccb); 1712195534Sscottl /* If it was NCQ command error, put result on hold. */ 1713198851Smav } else if (et == AHCI_ERR_NCQ) { 1714195534Sscottl ch->hold[slot->slot] = ccb; 1715198851Smav } else 1716195534Sscottl xpt_done(ccb); 1717195534Sscottl /* Unfreeze frozen command. */ 1718199747Smav if (ch->frozen && !ahci_check_collision(dev, ch->frozen)) { 1719195534Sscottl union ccb *fccb = ch->frozen; 1720195534Sscottl ch->frozen = NULL; 1721195534Sscottl ahci_begin_transaction(dev, fccb); 1722195534Sscottl xpt_release_simq(ch->sim, TRUE); 1723195534Sscottl } 1724198851Smav /* If we have no other active commands, ... */ 1725198851Smav if (ch->rslots == 0) { 1726198851Smav /* if there was fatal error - reset port. */ 1727198851Smav if (ch->fatalerr) { 1728198851Smav ahci_reset(dev); 1729198851Smav } 1730198851Smav } 1731196656Smav /* Start PM timer. */ 1732196656Smav if (ch->numrslots == 0 && ch->pm_level > 3) { 1733196656Smav callout_schedule(&ch->pm_timer, 1734196656Smav (ch->pm_level == 4) ? hz / 1000 : hz / 8); 1735196656Smav } 1736195534Sscottl} 1737195534Sscottl 1738195534Sscottlstatic void 1739195534Sscottlahci_issue_read_log(device_t dev) 1740195534Sscottl{ 1741195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1742195534Sscottl union ccb *ccb; 1743195534Sscottl struct ccb_ataio *ataio; 1744195534Sscottl int i; 1745195534Sscottl 1746195534Sscottl ch->readlog = 1; 1747195534Sscottl /* Find some holden command. */ 1748195534Sscottl for (i = 0; i < ch->numslots; i++) { 1749195534Sscottl if (ch->hold[i]) 1750195534Sscottl break; 1751195534Sscottl } 1752195534Sscottl ccb = xpt_alloc_ccb_nowait(); 1753195534Sscottl if (ccb == NULL) { 1754195534Sscottl device_printf(dev, "Unable allocate READ LOG command"); 1755195534Sscottl return; /* XXX */ 1756195534Sscottl } 1757195534Sscottl ccb->ccb_h = ch->hold[i]->ccb_h; /* Reuse old header. */ 1758195534Sscottl ccb->ccb_h.func_code = XPT_ATA_IO; 1759195534Sscottl ccb->ccb_h.flags = CAM_DIR_IN; 1760195534Sscottl ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ 1761195534Sscottl ataio = &ccb->ataio; 1762195534Sscottl ataio->data_ptr = malloc(512, M_AHCI, M_NOWAIT); 1763195534Sscottl if (ataio->data_ptr == NULL) { 1764195534Sscottl device_printf(dev, "Unable allocate memory for READ LOG command"); 1765195534Sscottl return; /* XXX */ 1766195534Sscottl } 1767195534Sscottl ataio->dxfer_len = 512; 1768195534Sscottl bzero(&ataio->cmd, sizeof(ataio->cmd)); 1769195534Sscottl ataio->cmd.flags = CAM_ATAIO_48BIT; 1770195534Sscottl ataio->cmd.command = 0x2F; /* READ LOG EXT */ 1771195534Sscottl ataio->cmd.sector_count = 1; 1772195534Sscottl ataio->cmd.sector_count_exp = 0; 1773195534Sscottl ataio->cmd.lba_low = 0x10; 1774195534Sscottl ataio->cmd.lba_mid = 0; 1775195534Sscottl ataio->cmd.lba_mid_exp = 0; 1776198319Smav /* Freeze SIM while doing READ LOG EXT. */ 1777198319Smav xpt_freeze_simq(ch->sim, 1); 1778195534Sscottl ahci_begin_transaction(dev, ccb); 1779195534Sscottl} 1780195534Sscottl 1781195534Sscottlstatic void 1782195534Sscottlahci_process_read_log(device_t dev, union ccb *ccb) 1783195534Sscottl{ 1784195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1785195534Sscottl uint8_t *data; 1786195534Sscottl struct ata_res *res; 1787195534Sscottl int i; 1788195534Sscottl 1789195534Sscottl ch->readlog = 0; 1790195534Sscottl 1791195534Sscottl data = ccb->ataio.data_ptr; 1792195534Sscottl if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP && 1793195534Sscottl (data[0] & 0x80) == 0) { 1794195534Sscottl for (i = 0; i < ch->numslots; i++) { 1795195534Sscottl if (!ch->hold[i]) 1796195534Sscottl continue; 1797195534Sscottl if ((data[0] & 0x1F) == i) { 1798195534Sscottl res = &ch->hold[i]->ataio.res; 1799195534Sscottl res->status = data[2]; 1800195534Sscottl res->error = data[3]; 1801195534Sscottl res->lba_low = data[4]; 1802195534Sscottl res->lba_mid = data[5]; 1803195534Sscottl res->lba_high = data[6]; 1804195534Sscottl res->device = data[7]; 1805195534Sscottl res->lba_low_exp = data[8]; 1806195534Sscottl res->lba_mid_exp = data[9]; 1807195534Sscottl res->lba_high_exp = data[10]; 1808195534Sscottl res->sector_count = data[12]; 1809195534Sscottl res->sector_count_exp = data[13]; 1810195534Sscottl } else { 1811195534Sscottl ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 1812195534Sscottl ch->hold[i]->ccb_h.status |= CAM_REQUEUE_REQ; 1813195534Sscottl } 1814195534Sscottl xpt_done(ch->hold[i]); 1815195534Sscottl ch->hold[i] = NULL; 1816195534Sscottl } 1817195534Sscottl } else { 1818195534Sscottl if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) 1819195534Sscottl device_printf(dev, "Error while READ LOG EXT\n"); 1820195534Sscottl else if ((data[0] & 0x80) == 0) { 1821195534Sscottl device_printf(dev, "Non-queued command error in READ LOG EXT\n"); 1822195534Sscottl } 1823195534Sscottl for (i = 0; i < ch->numslots; i++) { 1824195534Sscottl if (!ch->hold[i]) 1825195534Sscottl continue; 1826195534Sscottl xpt_done(ch->hold[i]); 1827195534Sscottl ch->hold[i] = NULL; 1828195534Sscottl } 1829195534Sscottl } 1830195534Sscottl free(ccb->ataio.data_ptr, M_AHCI); 1831195534Sscottl xpt_free_ccb(ccb); 1832198319Smav xpt_release_simq(ch->sim, TRUE); 1833195534Sscottl} 1834195534Sscottl 1835195534Sscottlstatic void 1836195534Sscottlahci_start(device_t dev) 1837195534Sscottl{ 1838195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1839195534Sscottl u_int32_t cmd; 1840195534Sscottl 1841195534Sscottl /* Clear SATA error register */ 1842195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SERR, 0xFFFFFFFF); 1843195534Sscottl /* Clear any interrupts pending on this channel */ 1844195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IS, 0xFFFFFFFF); 1845195534Sscottl /* Start operations on this channel */ 1846195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 1847195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd | AHCI_P_CMD_ST | 1848195534Sscottl (ch->pm_present ? AHCI_P_CMD_PMA : 0)); 1849195534Sscottl} 1850195534Sscottl 1851195534Sscottlstatic void 1852195534Sscottlahci_stop(device_t dev) 1853195534Sscottl{ 1854195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1855195534Sscottl u_int32_t cmd; 1856195534Sscottl int timeout; 1857195534Sscottl 1858195534Sscottl /* Kill all activity on this channel */ 1859195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 1860195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd & ~AHCI_P_CMD_ST); 1861195534Sscottl /* Wait for activity stop. */ 1862195534Sscottl timeout = 0; 1863195534Sscottl do { 1864195534Sscottl DELAY(1000); 1865195534Sscottl if (timeout++ > 1000) { 1866195534Sscottl device_printf(dev, "stopping AHCI engine failed\n"); 1867195534Sscottl break; 1868195534Sscottl } 1869195534Sscottl } while (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CR); 1870195534Sscottl} 1871195534Sscottl 1872195534Sscottlstatic void 1873195534Sscottlahci_clo(device_t dev) 1874195534Sscottl{ 1875195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1876195534Sscottl u_int32_t cmd; 1877195534Sscottl int timeout; 1878195534Sscottl 1879195534Sscottl /* Issue Command List Override if supported */ 1880195534Sscottl if (ch->caps & AHCI_CAP_SCLO) { 1881195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 1882195534Sscottl cmd |= AHCI_P_CMD_CLO; 1883195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd); 1884195534Sscottl timeout = 0; 1885195534Sscottl do { 1886195534Sscottl DELAY(1000); 1887195534Sscottl if (timeout++ > 1000) { 1888195534Sscottl device_printf(dev, "executing CLO failed\n"); 1889195534Sscottl break; 1890195534Sscottl } 1891195534Sscottl } while (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CLO); 1892195534Sscottl } 1893195534Sscottl} 1894195534Sscottl 1895195534Sscottlstatic void 1896195534Sscottlahci_stop_fr(device_t dev) 1897195534Sscottl{ 1898195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1899195534Sscottl u_int32_t cmd; 1900195534Sscottl int timeout; 1901195534Sscottl 1902195534Sscottl /* Kill all FIS reception on this channel */ 1903195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 1904195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd & ~AHCI_P_CMD_FRE); 1905195534Sscottl /* Wait for FIS reception stop. */ 1906195534Sscottl timeout = 0; 1907195534Sscottl do { 1908195534Sscottl DELAY(1000); 1909195534Sscottl if (timeout++ > 1000) { 1910195534Sscottl device_printf(dev, "stopping AHCI FR engine failed\n"); 1911195534Sscottl break; 1912195534Sscottl } 1913195534Sscottl } while (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_FR); 1914195534Sscottl} 1915195534Sscottl 1916195534Sscottlstatic void 1917195534Sscottlahci_start_fr(device_t dev) 1918195534Sscottl{ 1919195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1920195534Sscottl u_int32_t cmd; 1921195534Sscottl 1922195534Sscottl /* Start FIS reception on this channel */ 1923195534Sscottl cmd = ATA_INL(ch->r_mem, AHCI_P_CMD); 1924195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd | AHCI_P_CMD_FRE); 1925195534Sscottl} 1926195534Sscottl 1927195534Sscottlstatic int 1928195534Sscottlahci_wait_ready(device_t dev, int t) 1929195534Sscottl{ 1930195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1931195534Sscottl int timeout = 0; 1932195534Sscottl uint32_t val; 1933195534Sscottl 1934195534Sscottl while ((val = ATA_INL(ch->r_mem, AHCI_P_TFD)) & 1935195534Sscottl (ATA_S_BUSY | ATA_S_DRQ)) { 1936195534Sscottl DELAY(1000); 1937195534Sscottl if (timeout++ > t) { 1938195534Sscottl device_printf(dev, "port is not ready (timeout %dms) " 1939195534Sscottl "tfd = %08x\n", t, val); 1940195534Sscottl return (EBUSY); 1941195534Sscottl } 1942195534Sscottl } 1943195534Sscottl if (bootverbose) 1944195534Sscottl device_printf(dev, "ready wait time=%dms\n", timeout); 1945195534Sscottl return (0); 1946195534Sscottl} 1947195534Sscottl 1948195534Sscottlstatic void 1949195534Sscottlahci_reset(device_t dev) 1950195534Sscottl{ 1951195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 1952196656Smav struct ahci_controller *ctlr = device_get_softc(device_get_parent(dev)); 1953195534Sscottl int i; 1954195534Sscottl 1955195534Sscottl if (bootverbose) 1956195534Sscottl device_printf(dev, "AHCI reset...\n"); 1957195534Sscottl /* Requeue freezed command. */ 1958195534Sscottl if (ch->frozen) { 1959195534Sscottl union ccb *fccb = ch->frozen; 1960195534Sscottl ch->frozen = NULL; 1961195534Sscottl fccb->ccb_h.status = CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 1962198319Smav if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 1963198319Smav xpt_freeze_devq(fccb->ccb_h.path, 1); 1964198319Smav fccb->ccb_h.status |= CAM_DEV_QFRZN; 1965198319Smav } 1966195534Sscottl xpt_done(fccb); 1967195534Sscottl } 1968195534Sscottl /* Kill the engine and requeue all running commands. */ 1969195534Sscottl ahci_stop(dev); 1970195534Sscottl for (i = 0; i < ch->numslots; i++) { 1971195534Sscottl /* Do we have a running request on slot? */ 1972195534Sscottl if (ch->slot[i].state < AHCI_SLOT_RUNNING) 1973195534Sscottl continue; 1974195534Sscottl /* XXX; Commands in loading state. */ 1975195534Sscottl ahci_end_transaction(&ch->slot[i], AHCI_ERR_INNOCENT); 1976195534Sscottl } 1977198851Smav for (i = 0; i < ch->numslots; i++) { 1978198851Smav if (!ch->hold[i]) 1979198851Smav continue; 1980198851Smav xpt_done(ch->hold[i]); 1981198851Smav ch->hold[i] = NULL; 1982198851Smav } 1983198851Smav ch->fatalerr = 0; 1984198319Smav /* Tell the XPT about the event */ 1985198319Smav xpt_async(AC_BUS_RESET, ch->path, NULL); 1986195534Sscottl /* Disable port interrupts */ 1987195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 0); 1988195534Sscottl /* Reset and reconnect PHY, */ 1989195534Sscottl if (!ahci_sata_phy_reset(dev, 0)) { 1990195534Sscottl if (bootverbose) 1991195534Sscottl device_printf(dev, 1992195534Sscottl "AHCI reset done: phy reset found no device\n"); 1993195534Sscottl ch->devices = 0; 1994195534Sscottl /* Enable wanted port interrupts */ 1995195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 1996195534Sscottl (AHCI_P_IX_CPD | AHCI_P_IX_PRC | AHCI_P_IX_PC)); 1997195534Sscottl return; 1998195534Sscottl } 1999195534Sscottl /* Wait for clearing busy status. */ 2000195534Sscottl if (ahci_wait_ready(dev, 10000)) { 2001195534Sscottl device_printf(dev, "device ready timeout\n"); 2002195534Sscottl ahci_clo(dev); 2003195534Sscottl } 2004195534Sscottl ahci_start(dev); 2005195534Sscottl ch->devices = 1; 2006195534Sscottl /* Enable wanted port interrupts */ 2007195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_IE, 2008195534Sscottl (AHCI_P_IX_CPD | AHCI_P_IX_TFE | AHCI_P_IX_HBF | 2009195534Sscottl AHCI_P_IX_HBD | AHCI_P_IX_IF | AHCI_P_IX_OF | 2010195534Sscottl ((ch->pm_level == 0) ? AHCI_P_IX_PRC | AHCI_P_IX_PC : 0) | 2011196656Smav AHCI_P_IX_DP | AHCI_P_IX_UF | (ctlr->ccc ? 0 : AHCI_P_IX_SDB) | 2012196656Smav AHCI_P_IX_DS | AHCI_P_IX_PS | (ctlr->ccc ? 0 : AHCI_P_IX_DHR))); 2013195534Sscottl if (bootverbose) 2014196656Smav device_printf(dev, "AHCI reset done: device found\n"); 2015195534Sscottl} 2016195534Sscottl 2017195534Sscottlstatic int 2018199821Smavahci_setup_fis(device_t dev, struct ahci_cmd_tab *ctp, union ccb *ccb, int tag) 2019195534Sscottl{ 2020199821Smav struct ahci_channel *ch = device_get_softc(dev); 2021195534Sscottl u_int8_t *fis = &ctp->cfis[0]; 2022195534Sscottl 2023195534Sscottl bzero(ctp->cfis, 64); 2024195534Sscottl fis[0] = 0x27; /* host to device */ 2025195534Sscottl fis[1] = (ccb->ccb_h.target_id & 0x0f); 2026195534Sscottl if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 2027195534Sscottl fis[1] |= 0x80; 2028195534Sscottl fis[2] = ATA_PACKET_CMD; 2029199821Smav if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 2030199821Smav ch->curr[ccb->ccb_h.target_id].mode >= ATA_DMA) 2031195534Sscottl fis[3] = ATA_F_DMA; 2032195534Sscottl else { 2033195534Sscottl fis[5] = ccb->csio.dxfer_len; 2034195534Sscottl fis[6] = ccb->csio.dxfer_len >> 8; 2035195534Sscottl } 2036195534Sscottl fis[7] = ATA_D_LBA; 2037195534Sscottl fis[15] = ATA_A_4BIT; 2038195534Sscottl bzero(ctp->acmd, 32); 2039195534Sscottl bcopy((ccb->ccb_h.flags & CAM_CDB_POINTER) ? 2040195534Sscottl ccb->csio.cdb_io.cdb_ptr : ccb->csio.cdb_io.cdb_bytes, 2041195534Sscottl ctp->acmd, ccb->csio.cdb_len); 2042195534Sscottl } else if ((ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) == 0) { 2043195534Sscottl fis[1] |= 0x80; 2044195534Sscottl fis[2] = ccb->ataio.cmd.command; 2045195534Sscottl fis[3] = ccb->ataio.cmd.features; 2046195534Sscottl fis[4] = ccb->ataio.cmd.lba_low; 2047195534Sscottl fis[5] = ccb->ataio.cmd.lba_mid; 2048195534Sscottl fis[6] = ccb->ataio.cmd.lba_high; 2049195534Sscottl fis[7] = ccb->ataio.cmd.device; 2050195534Sscottl fis[8] = ccb->ataio.cmd.lba_low_exp; 2051195534Sscottl fis[9] = ccb->ataio.cmd.lba_mid_exp; 2052195534Sscottl fis[10] = ccb->ataio.cmd.lba_high_exp; 2053195534Sscottl fis[11] = ccb->ataio.cmd.features_exp; 2054195534Sscottl if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { 2055195534Sscottl fis[12] = tag << 3; 2056195534Sscottl fis[13] = 0; 2057195534Sscottl } else { 2058195534Sscottl fis[12] = ccb->ataio.cmd.sector_count; 2059195534Sscottl fis[13] = ccb->ataio.cmd.sector_count_exp; 2060195534Sscottl } 2061195534Sscottl fis[15] = ATA_A_4BIT; 2062195534Sscottl } else { 2063195534Sscottl fis[15] = ccb->ataio.cmd.control; 2064195534Sscottl } 2065195534Sscottl return (20); 2066195534Sscottl} 2067195534Sscottl 2068195534Sscottlstatic int 2069195534Sscottlahci_sata_connect(struct ahci_channel *ch) 2070195534Sscottl{ 2071195534Sscottl u_int32_t status; 2072195534Sscottl int timeout; 2073195534Sscottl 2074195534Sscottl /* Wait up to 100ms for "connect well" */ 2075195534Sscottl for (timeout = 0; timeout < 100 ; timeout++) { 2076195534Sscottl status = ATA_INL(ch->r_mem, AHCI_P_SSTS); 2077195534Sscottl if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 2078195534Sscottl ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 2079195534Sscottl ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) 2080195534Sscottl break; 2081196656Smav if ((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_OFFLINE) { 2082196656Smav if (bootverbose) { 2083196656Smav device_printf(ch->dev, "SATA offline status=%08x\n", 2084196656Smav status); 2085196656Smav } 2086196656Smav return (0); 2087196656Smav } 2088195534Sscottl DELAY(1000); 2089195534Sscottl } 2090195534Sscottl if (timeout >= 100) { 2091195534Sscottl if (bootverbose) { 2092195534Sscottl device_printf(ch->dev, "SATA connect timeout status=%08x\n", 2093195534Sscottl status); 2094195534Sscottl } 2095195534Sscottl return (0); 2096195534Sscottl } 2097195534Sscottl if (bootverbose) { 2098195534Sscottl device_printf(ch->dev, "SATA connect time=%dms status=%08x\n", 2099195534Sscottl timeout, status); 2100195534Sscottl } 2101195534Sscottl /* Clear SATA error register */ 2102195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SERR, 0xffffffff); 2103195534Sscottl return (1); 2104195534Sscottl} 2105195534Sscottl 2106195534Sscottlstatic int 2107195534Sscottlahci_sata_phy_reset(device_t dev, int quick) 2108195534Sscottl{ 2109195534Sscottl struct ahci_channel *ch = device_get_softc(dev); 2110199821Smav int sata_rev; 2111195534Sscottl uint32_t val; 2112195534Sscottl 2113195534Sscottl if (quick) { 2114195534Sscottl val = ATA_INL(ch->r_mem, AHCI_P_SCTL); 2115195534Sscottl if ((val & ATA_SC_DET_MASK) == ATA_SC_DET_IDLE) 2116195534Sscottl return (ahci_sata_connect(ch)); 2117195534Sscottl } 2118195534Sscottl 2119195534Sscottl if (bootverbose) 2120195534Sscottl device_printf(dev, "hardware reset ...\n"); 2121199821Smav sata_rev = ch->user[ch->pm_present ? 15 : 0].revision; 2122199821Smav if (sata_rev == 1) 2123195534Sscottl val = ATA_SC_SPD_SPEED_GEN1; 2124199821Smav else if (sata_rev == 2) 2125195534Sscottl val = ATA_SC_SPD_SPEED_GEN2; 2126199821Smav else if (sata_rev == 3) 2127195534Sscottl val = ATA_SC_SPD_SPEED_GEN3; 2128195534Sscottl else 2129195534Sscottl val = 0; 2130195534Sscottl ATA_OUTL(ch->r_mem, AHCI_P_SCTL, 2131196656Smav ATA_SC_DET_RESET | val | 2132196656Smav ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER); 2133196656Smav DELAY(5000); 2134196656Smav ATA_OUTL(ch->r_mem, AHCI_P_SCTL, 2135195534Sscottl ATA_SC_DET_IDLE | val | ((ch->pm_level > 0) ? 0 : 2136195534Sscottl (ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER))); 2137196656Smav DELAY(5000); 2138195534Sscottl return (ahci_sata_connect(ch)); 2139195534Sscottl} 2140195534Sscottl 2141195534Sscottlstatic void 2142195534Sscottlahciaction(struct cam_sim *sim, union ccb *ccb) 2143195534Sscottl{ 2144195534Sscottl device_t dev; 2145195534Sscottl struct ahci_channel *ch; 2146195534Sscottl 2147195534Sscottl CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("ahciaction func_code=%x\n", 2148195534Sscottl ccb->ccb_h.func_code)); 2149195534Sscottl 2150195534Sscottl ch = (struct ahci_channel *)cam_sim_softc(sim); 2151195534Sscottl dev = ch->dev; 2152195534Sscottl switch (ccb->ccb_h.func_code) { 2153195534Sscottl /* Common cases first */ 2154195534Sscottl case XPT_ATA_IO: /* Execute the requested I/O operation */ 2155195534Sscottl case XPT_SCSI_IO: 2156195534Sscottl if (ch->devices == 0) { 2157195534Sscottl ccb->ccb_h.status = CAM_SEL_TIMEOUT; 2158195534Sscottl xpt_done(ccb); 2159195534Sscottl break; 2160195534Sscottl } 2161195534Sscottl /* Check for command collision. */ 2162195534Sscottl if (ahci_check_collision(dev, ccb)) { 2163195534Sscottl /* Freeze command. */ 2164195534Sscottl ch->frozen = ccb; 2165195534Sscottl /* We have only one frozen slot, so freeze simq also. */ 2166195534Sscottl xpt_freeze_simq(ch->sim, 1); 2167195534Sscottl return; 2168195534Sscottl } 2169195534Sscottl ahci_begin_transaction(dev, ccb); 2170195534Sscottl break; 2171195534Sscottl case XPT_EN_LUN: /* Enable LUN as a target */ 2172195534Sscottl case XPT_TARGET_IO: /* Execute target I/O request */ 2173195534Sscottl case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */ 2174195534Sscottl case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/ 2175195534Sscottl case XPT_ABORT: /* Abort the specified CCB */ 2176195534Sscottl /* XXX Implement */ 2177195534Sscottl ccb->ccb_h.status = CAM_REQ_INVALID; 2178195534Sscottl xpt_done(ccb); 2179195534Sscottl break; 2180195534Sscottl case XPT_SET_TRAN_SETTINGS: 2181195534Sscottl { 2182195534Sscottl struct ccb_trans_settings *cts = &ccb->cts; 2183199747Smav struct ahci_device *d; 2184195534Sscottl 2185199747Smav if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 2186199747Smav d = &ch->curr[ccb->ccb_h.target_id]; 2187199747Smav else 2188199747Smav d = &ch->user[ccb->ccb_h.target_id]; 2189199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_REVISION) 2190199747Smav d->revision = cts->xport_specific.sata.revision; 2191199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_MODE) 2192199747Smav d->mode = cts->xport_specific.sata.mode; 2193199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_BYTECOUNT) 2194199747Smav d->bytecount = min(8192, cts->xport_specific.sata.bytecount); 2195199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_TAGS) 2196199747Smav d->tags = min(ch->numslots, cts->xport_specific.sata.tags); 2197199747Smav if (cts->xport_specific.sata.valid & CTS_SATA_VALID_PM) 2198195534Sscottl ch->pm_present = cts->xport_specific.sata.pm_present; 2199195534Sscottl ccb->ccb_h.status = CAM_REQ_CMP; 2200195534Sscottl xpt_done(ccb); 2201195534Sscottl break; 2202195534Sscottl } 2203195534Sscottl case XPT_GET_TRAN_SETTINGS: 2204195534Sscottl /* Get default/user set transfer settings for the target */ 2205195534Sscottl { 2206195534Sscottl struct ccb_trans_settings *cts = &ccb->cts; 2207199747Smav struct ahci_device *d; 2208195534Sscottl uint32_t status; 2209195534Sscottl 2210199747Smav if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 2211199747Smav d = &ch->curr[ccb->ccb_h.target_id]; 2212199747Smav else 2213199747Smav d = &ch->user[ccb->ccb_h.target_id]; 2214195534Sscottl cts->protocol = PROTO_ATA; 2215196656Smav cts->protocol_version = PROTO_VERSION_UNSPECIFIED; 2216195534Sscottl cts->transport = XPORT_SATA; 2217196656Smav cts->transport_version = XPORT_VERSION_UNSPECIFIED; 2218195534Sscottl cts->proto_specific.valid = 0; 2219195534Sscottl cts->xport_specific.sata.valid = 0; 2220199747Smav if (cts->type == CTS_TYPE_CURRENT_SETTINGS && 2221199747Smav (ccb->ccb_h.target_id == 15 || 2222199747Smav (ccb->ccb_h.target_id == 0 && !ch->pm_present))) { 2223195534Sscottl status = ATA_INL(ch->r_mem, AHCI_P_SSTS) & ATA_SS_SPD_MASK; 2224199747Smav if (status & 0x0f0) { 2225199747Smav cts->xport_specific.sata.revision = 2226199747Smav (status & 0x0f0) >> 4; 2227199747Smav cts->xport_specific.sata.valid |= 2228199747Smav CTS_SATA_VALID_REVISION; 2229199747Smav } 2230195534Sscottl } else { 2231199747Smav cts->xport_specific.sata.revision = d->revision; 2232199747Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_REVISION; 2233195534Sscottl } 2234199747Smav cts->xport_specific.sata.mode = d->mode; 2235199747Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_MODE; 2236199747Smav cts->xport_specific.sata.bytecount = d->bytecount; 2237199747Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_BYTECOUNT; 2238199747Smav cts->xport_specific.sata.pm_present = ch->pm_present; 2239195534Sscottl cts->xport_specific.sata.valid |= CTS_SATA_VALID_PM; 2240199747Smav cts->xport_specific.sata.tags = d->tags; 2241199747Smav cts->xport_specific.sata.valid |= CTS_SATA_VALID_TAGS; 2242195534Sscottl ccb->ccb_h.status = CAM_REQ_CMP; 2243195534Sscottl xpt_done(ccb); 2244195534Sscottl break; 2245195534Sscottl } 2246195534Sscottl#if 0 2247195534Sscottl case XPT_CALC_GEOMETRY: 2248195534Sscottl { 2249195534Sscottl struct ccb_calc_geometry *ccg; 2250195534Sscottl uint32_t size_mb; 2251195534Sscottl uint32_t secs_per_cylinder; 2252195534Sscottl 2253195534Sscottl ccg = &ccb->ccg; 2254195534Sscottl size_mb = ccg->volume_size 2255195534Sscottl / ((1024L * 1024L) / ccg->block_size); 2256195534Sscottl if (size_mb >= 1024 && (aha->extended_trans != 0)) { 2257195534Sscottl if (size_mb >= 2048) { 2258195534Sscottl ccg->heads = 255; 2259195534Sscottl ccg->secs_per_track = 63; 2260195534Sscottl } else { 2261195534Sscottl ccg->heads = 128; 2262195534Sscottl ccg->secs_per_track = 32; 2263195534Sscottl } 2264195534Sscottl } else { 2265195534Sscottl ccg->heads = 64; 2266195534Sscottl ccg->secs_per_track = 32; 2267195534Sscottl } 2268195534Sscottl secs_per_cylinder = ccg->heads * ccg->secs_per_track; 2269195534Sscottl ccg->cylinders = ccg->volume_size / secs_per_cylinder; 2270195534Sscottl ccb->ccb_h.status = CAM_REQ_CMP; 2271195534Sscottl xpt_done(ccb); 2272195534Sscottl break; 2273195534Sscottl } 2274195534Sscottl#endif 2275195534Sscottl case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 2276195534Sscottl case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 2277195534Sscottl ahci_reset(dev); 2278195534Sscottl ccb->ccb_h.status = CAM_REQ_CMP; 2279195534Sscottl xpt_done(ccb); 2280195534Sscottl break; 2281195534Sscottl case XPT_TERM_IO: /* Terminate the I/O process */ 2282195534Sscottl /* XXX Implement */ 2283195534Sscottl ccb->ccb_h.status = CAM_REQ_INVALID; 2284195534Sscottl xpt_done(ccb); 2285195534Sscottl break; 2286195534Sscottl case XPT_PATH_INQ: /* Path routing inquiry */ 2287195534Sscottl { 2288195534Sscottl struct ccb_pathinq *cpi = &ccb->cpi; 2289195534Sscottl 2290195534Sscottl cpi->version_num = 1; /* XXX??? */ 2291199278Smav cpi->hba_inquiry = PI_SDTR_ABLE; 2292199278Smav if (ch->caps & AHCI_CAP_SNCQ) 2293199278Smav cpi->hba_inquiry |= PI_TAG_ABLE; 2294195534Sscottl if (ch->caps & AHCI_CAP_SPM) 2295195534Sscottl cpi->hba_inquiry |= PI_SATAPM; 2296195534Sscottl cpi->target_sprt = 0; 2297195534Sscottl cpi->hba_misc = PIM_SEQSCAN; 2298195534Sscottl cpi->hba_eng_cnt = 0; 2299195534Sscottl if (ch->caps & AHCI_CAP_SPM) 2300198322Smav cpi->max_target = 15; 2301195534Sscottl else 2302195534Sscottl cpi->max_target = 0; 2303195534Sscottl cpi->max_lun = 0; 2304195534Sscottl cpi->initiator_id = 0; 2305195534Sscottl cpi->bus_id = cam_sim_bus(sim); 2306195534Sscottl cpi->base_transfer_speed = 150000; 2307195534Sscottl strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 2308195534Sscottl strncpy(cpi->hba_vid, "AHCI", HBA_IDLEN); 2309195534Sscottl strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 2310195534Sscottl cpi->unit_number = cam_sim_unit(sim); 2311195534Sscottl cpi->transport = XPORT_SATA; 2312196656Smav cpi->transport_version = XPORT_VERSION_UNSPECIFIED; 2313195534Sscottl cpi->protocol = PROTO_ATA; 2314196656Smav cpi->protocol_version = PROTO_VERSION_UNSPECIFIED; 2315195534Sscottl cpi->maxio = MAXPHYS; 2316196777Smav /* ATI SB600 can't handle 256 sectors with FPDMA (NCQ). */ 2317196777Smav if (pci_get_devid(device_get_parent(dev)) == 0x43801002) 2318196796Smav cpi->maxio = min(cpi->maxio, 128 * 512); 2319195534Sscottl cpi->ccb_h.status = CAM_REQ_CMP; 2320195534Sscottl xpt_done(ccb); 2321195534Sscottl break; 2322195534Sscottl } 2323195534Sscottl default: 2324195534Sscottl ccb->ccb_h.status = CAM_REQ_INVALID; 2325195534Sscottl xpt_done(ccb); 2326195534Sscottl break; 2327195534Sscottl } 2328195534Sscottl} 2329195534Sscottl 2330195534Sscottlstatic void 2331195534Sscottlahcipoll(struct cam_sim *sim) 2332195534Sscottl{ 2333195534Sscottl struct ahci_channel *ch = (struct ahci_channel *)cam_sim_softc(sim); 2334195534Sscottl 2335195534Sscottl ahci_ch_intr(ch->dev); 2336195534Sscottl} 2337