1197007Sdelphij/*	$NetBSD: x86emu_regs.h,v 1.1 2007/12/01 20:14:10 joerg Exp $	*/
2197007Sdelphij/*	$OpenBSD: x86emu_regs.h,v 1.2 2009/06/06 03:45:05 matthieu Exp $ */
3197007Sdelphij
4197007Sdelphij/****************************************************************************
5197007Sdelphij*
6197007Sdelphij*  Realmode X86 Emulator Library
7197007Sdelphij*
8197007Sdelphij*  Copyright (C) 1996-1999 SciTech Software, Inc.
9197007Sdelphij*  Copyright (C) David Mosberger-Tang
10197007Sdelphij*  Copyright (C) 1999 Egbert Eich
11197007Sdelphij*  Copyright (C) 2007 Joerg Sonnenberger
12197007Sdelphij*
13197007Sdelphij*  ========================================================================
14197007Sdelphij*
15197007Sdelphij*  Permission to use, copy, modify, distribute, and sell this software and
16197007Sdelphij*  its documentation for any purpose is hereby granted without fee,
17197007Sdelphij*  provided that the above copyright notice appear in all copies and that
18197007Sdelphij*  both that copyright notice and this permission notice appear in
19197007Sdelphij*  supporting documentation, and that the name of the authors not be used
20197007Sdelphij*  in advertising or publicity pertaining to distribution of the software
21197007Sdelphij*  without specific, written prior permission.  The authors makes no
22197007Sdelphij*  representations about the suitability of this software for any purpose.
23197007Sdelphij*  It is provided "as is" without express or implied warranty.
24197007Sdelphij*
25197007Sdelphij*  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
26197007Sdelphij*  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
27197007Sdelphij*  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
28197007Sdelphij*  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
29197007Sdelphij*  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
30197007Sdelphij*  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
31197007Sdelphij*  PERFORMANCE OF THIS SOFTWARE.
32197007Sdelphij*
33197007Sdelphij****************************************************************************/
34197007Sdelphij
35197007Sdelphij#ifndef __X86EMU_REGS_H
36197007Sdelphij#define __X86EMU_REGS_H
37197007Sdelphij
38197007Sdelphij/*---------------------- Macros and type definitions ----------------------*/
39197007Sdelphij
40197007Sdelphij/* 8 bit registers */
41197007Sdelphij#define R_AH  register_a.I8_reg.h_reg
42197007Sdelphij#define R_AL  register_a.I8_reg.l_reg
43197007Sdelphij#define R_BH  register_b.I8_reg.h_reg
44197007Sdelphij#define R_BL  register_b.I8_reg.l_reg
45197007Sdelphij#define R_CH  register_c.I8_reg.h_reg
46197007Sdelphij#define R_CL  register_c.I8_reg.l_reg
47197007Sdelphij#define R_DH  register_d.I8_reg.h_reg
48197007Sdelphij#define R_DL  register_d.I8_reg.l_reg
49197007Sdelphij
50197007Sdelphij/* 16 bit registers */
51197007Sdelphij#define R_AX  register_a.I16_reg.x_reg
52197007Sdelphij#define R_BX  register_b.I16_reg.x_reg
53197007Sdelphij#define R_CX  register_c.I16_reg.x_reg
54197007Sdelphij#define R_DX  register_d.I16_reg.x_reg
55197007Sdelphij
56197007Sdelphij/* 32 bit extended registers */
57197007Sdelphij#define R_EAX  register_a.I32_reg.e_reg
58197007Sdelphij#define R_EBX  register_b.I32_reg.e_reg
59197007Sdelphij#define R_ECX  register_c.I32_reg.e_reg
60197007Sdelphij#define R_EDX  register_d.I32_reg.e_reg
61197007Sdelphij
62197007Sdelphij/* special registers */
63197007Sdelphij#define R_SP  register_sp.I16_reg.x_reg
64197007Sdelphij#define R_BP  register_bp.I16_reg.x_reg
65197007Sdelphij#define R_SI  register_si.I16_reg.x_reg
66197007Sdelphij#define R_DI  register_di.I16_reg.x_reg
67197007Sdelphij#define R_IP  register_ip.I16_reg.x_reg
68197007Sdelphij#define R_FLG register_flags
69197007Sdelphij
70197007Sdelphij/* special registers */
71197007Sdelphij#define R_ESP  register_sp.I32_reg.e_reg
72197007Sdelphij#define R_EBP  register_bp.I32_reg.e_reg
73197007Sdelphij#define R_ESI  register_si.I32_reg.e_reg
74197007Sdelphij#define R_EDI  register_di.I32_reg.e_reg
75197007Sdelphij#define R_EIP  register_ip.I32_reg.e_reg
76197007Sdelphij#define R_EFLG register_flags
77197007Sdelphij
78197007Sdelphij/* segment registers */
79197007Sdelphij#define R_CS  register_cs
80197007Sdelphij#define R_DS  register_ds
81197007Sdelphij#define R_SS  register_ss
82197007Sdelphij#define R_ES  register_es
83197007Sdelphij#define R_FS  register_fs
84197007Sdelphij#define R_GS  register_gs
85197007Sdelphij
86197007Sdelphij/* flag conditions   */
87197007Sdelphij#define FB_CF 0x0001            /* CARRY flag  */
88197007Sdelphij#define FB_PF 0x0004            /* PARITY flag */
89197007Sdelphij#define FB_AF 0x0010            /* AUX  flag   */
90197007Sdelphij#define FB_ZF 0x0040            /* ZERO flag   */
91197007Sdelphij#define FB_SF 0x0080            /* SIGN flag   */
92197007Sdelphij#define FB_TF 0x0100            /* TRAP flag   */
93197007Sdelphij#define FB_IF 0x0200            /* INTERRUPT ENABLE flag */
94197007Sdelphij#define FB_DF 0x0400            /* DIR flag    */
95197007Sdelphij#define FB_OF 0x0800            /* OVERFLOW flag */
96197007Sdelphij
97197007Sdelphij/* 80286 and above always have bit#1 set */
98197007Sdelphij#define F_ALWAYS_ON  (0x0002)   /* flag bits always on */
99197007Sdelphij
100197007Sdelphij/*
101197007Sdelphij * Define a mask for only those flag bits we will ever pass back
102197007Sdelphij * (via PUSHF)
103197007Sdelphij */
104197007Sdelphij#define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF)
105197007Sdelphij
106197007Sdelphij/* following bits masked in to a 16bit quantity */
107197007Sdelphij
108197007Sdelphij#define F_CF 0x0001             /* CARRY flag  */
109197007Sdelphij#define F_PF 0x0004             /* PARITY flag */
110197007Sdelphij#define F_AF 0x0010             /* AUX  flag   */
111197007Sdelphij#define F_ZF 0x0040             /* ZERO flag   */
112197007Sdelphij#define F_SF 0x0080             /* SIGN flag   */
113197007Sdelphij#define F_TF 0x0100             /* TRAP flag   */
114197007Sdelphij#define F_IF 0x0200             /* INTERRUPT ENABLE flag */
115197007Sdelphij#define F_DF 0x0400             /* DIR flag    */
116197007Sdelphij#define F_OF 0x0800             /* OVERFLOW flag */
117197007Sdelphij
118197007Sdelphij#define SET_FLAG(flag)        	(emu->x86.R_FLG |= (flag))
119197007Sdelphij#define CLEAR_FLAG(flag)      	(emu->x86.R_FLG &= ~(flag))
120197007Sdelphij#define ACCESS_FLAG(flag)     	(emu->x86.R_FLG & (flag))
121197007Sdelphij#define CLEARALL_FLAG(m)    	(emu->x86.R_FLG = 0)
122197007Sdelphij
123197007Sdelphij#define CONDITIONAL_SET_FLAG(COND,FLAG) \
124197007Sdelphij  if (COND) SET_FLAG(FLAG); else CLEAR_FLAG(FLAG)
125197007Sdelphij
126197007Sdelphij#define F_PF_CALC 0x010000      /* PARITY flag has been calced    */
127197007Sdelphij#define F_ZF_CALC 0x020000      /* ZERO flag has been calced      */
128197007Sdelphij#define F_SF_CALC 0x040000      /* SIGN flag has been calced      */
129197007Sdelphij
130197007Sdelphij#define F_ALL_CALC      0xff0000        /* All have been calced   */
131197007Sdelphij
132197007Sdelphij/*
133197007Sdelphij * Emulator machine state.
134197007Sdelphij * Segment usage control.
135197007Sdelphij */
136197007Sdelphij#define SYSMODE_SEG_DS_SS       0x00000001
137197007Sdelphij#define SYSMODE_SEGOVR_CS       0x00000002
138197007Sdelphij#define SYSMODE_SEGOVR_DS       0x00000004
139197007Sdelphij#define SYSMODE_SEGOVR_ES       0x00000008
140197007Sdelphij#define SYSMODE_SEGOVR_FS       0x00000010
141197007Sdelphij#define SYSMODE_SEGOVR_GS       0x00000020
142197007Sdelphij#define SYSMODE_SEGOVR_SS       0x00000040
143197007Sdelphij#define SYSMODE_PREFIX_REPE     0x00000080
144197007Sdelphij#define SYSMODE_PREFIX_REPNE    0x00000100
145197007Sdelphij#define SYSMODE_PREFIX_DATA     0x00000200
146197007Sdelphij#define SYSMODE_PREFIX_ADDR     0x00000400
147197007Sdelphij#define SYSMODE_INTR_PENDING    0x10000000
148197007Sdelphij#define SYSMODE_EXTRN_INTR      0x20000000
149197007Sdelphij#define SYSMODE_HALTED          0x40000000
150197007Sdelphij
151197007Sdelphij#define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS      | \
152197007Sdelphij						 SYSMODE_SEGOVR_CS      | \
153197007Sdelphij						 SYSMODE_SEGOVR_DS      | \
154197007Sdelphij						 SYSMODE_SEGOVR_ES      | \
155197007Sdelphij						 SYSMODE_SEGOVR_FS      | \
156197007Sdelphij						 SYSMODE_SEGOVR_GS      | \
157197007Sdelphij						 SYSMODE_SEGOVR_SS)
158197007Sdelphij#define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS      | \
159197007Sdelphij						 SYSMODE_SEGOVR_CS      | \
160197007Sdelphij						 SYSMODE_SEGOVR_DS      | \
161197007Sdelphij						 SYSMODE_SEGOVR_ES      | \
162197007Sdelphij						 SYSMODE_SEGOVR_FS      | \
163197007Sdelphij						 SYSMODE_SEGOVR_GS      | \
164197007Sdelphij						 SYSMODE_SEGOVR_SS      | \
165197007Sdelphij						 SYSMODE_PREFIX_DATA    | \
166197007Sdelphij						 SYSMODE_PREFIX_ADDR)
167197007Sdelphij
168197007Sdelphij#define  INTR_SYNCH           0x1
169197007Sdelphij
170197007Sdelphij#endif /* __X86EMU_REGS_H */
171