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39
40
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43
44
45
46/**
47 * @file
48 *
49 * Interface to the TWSI / I2C bus
50 *
51 * Note: Currently on 7 bit device addresses are supported
52 *
53 * <hr>$Revision: 70030 $<hr>
54 *
55 */
56
57#ifndef __CVMX_TWSI_H__
58#define __CVMX_TWSI_H__
59
60#ifdef	__cplusplus
61extern "C" {
62#endif
63
64
65    /* Extra TWSI Bus Opcodes */
66#define TWSI_SLAVE_ADD     0
67#define TWSI_DATA          1
68#define TWSI_CTL           2
69#define TWSI_CLKCTL_STAT   3       /* R=0 selects CLKCTL, R=1 selects STAT */
70#define TWSI_STAT          3       /* when R = 1 */
71#define TWSI_SLAVE_ADD_EXT 4
72#define TWSI_RST           7
73
74
75/**
76 * Do a twsi read from a 7 bit device address using an (optional) internal address.
77 * Up to 8 bytes can be read at a time.
78 *
79 * @param twsi_id   which Octeon TWSI bus to use
80 * @param dev_addr  Device address (7 bit)
81 * @param internal_addr
82 *                  Internal address.  Can be 0, 1 or 2 bytes in width
83 * @param num_bytes Number of data bytes to read
84 * @param ia_width_bytes
85 *                  Internal address size in bytes (0, 1, or 2)
86 * @param data      Pointer argument where the read data is returned.
87 *
88 * @return read data returned in 'data' argument
89 *         Number of bytes read on success
90 *         -1 on failure
91 */
92int cvmx_twsix_read_ia(int twsi_id, uint8_t dev_addr, uint16_t internal_addr, int num_bytes, int ia_width_bytes, uint64_t *data);
93
94
95
96
97/**
98 * A convenience wrapper function around cvmx_twsix_read_ia() that
99 * only supports 8 bit internal addresses.
100 * Reads up to 7 bytes, and returns both the value read or error
101 * value in the return value
102 *
103 * @param twsi_id   which Octeon TWSI bus to use
104 * @param dev_addr  Device address (7 bit only)
105 * @param internal_addr
106 *                  Internal address (8 bit only)
107 * @param num_bytes Number of bytes to read (0-7)
108 *
109 * @return Value read from TWSI on success
110 *         -1 on error
111 */
112static inline int64_t cvmx_twsix_read_ia8(int twsi_id, uint8_t dev_addr, uint8_t internal_addr, int num_bytes)
113{
114    uint64_t data;
115    if (num_bytes < 1 || num_bytes > 7)
116        return -1;
117    if (cvmx_twsix_read_ia(twsi_id,dev_addr,internal_addr,num_bytes, 1, &data) < 0)
118        return -1;
119    return data;
120}
121
122/**
123 * A convenience wrapper function around cvmx_twsix_read_ia() that
124 * only supports 16 bit internal addresses.
125 * Reads up to 7 bytes, and returns both the value read or error
126 * value in the return value
127 *
128 * @param twsi_id   which Octeon TWSI bus to use
129 * @param dev_addr  Device address (7 bit only)
130 * @param internal_addr
131 *                  Internal address (16 bit only)
132 * @param num_bytes Number of bytes to read (0-7)
133 *
134 * @return Value read from TWSI on success
135 *         -1 on error
136 */
137static inline int64_t cvmx_twsix_read_ia16(int twsi_id, uint8_t dev_addr, uint16_t internal_addr, int num_bytes)
138{
139    uint64_t data;
140    if (num_bytes < 1 || num_bytes > 7)
141        return -1;
142    if (cvmx_twsix_read_ia(twsi_id, dev_addr, internal_addr, num_bytes, 2, &data) < 0)
143        return -1;
144    return data;
145}
146
147
148
149/**
150 * Read from a TWSI device (7 bit device address only) without generating any
151 * internal addresses.
152 * Read from 1-8 bytes and returns them in the data pointer.
153 *
154 * @param twsi_id   TWSI interface on Octeon to use
155 * @param dev_addr  TWSI device address (7 bit only)
156 * @param num_bytes number of bytes to read
157 * @param data      Pointer to data read from TWSI device
158 *
159 * @return Number of bytes read on success
160 *         -1 on error
161 */
162int cvmx_twsix_read(int twsi_id, uint8_t dev_addr, int num_bytes, uint64_t *data);
163
164
165
166/**
167 * Perform a twsi write operation to a 7 bit device address.
168 *
169 * Note that many eeprom devices have page restrictions regarding address boundaries
170 * that can be crossed in one write operation.  This is device dependent, and this routine
171 * does nothing in this regard.
172 * This command does not generate any internal addressess.
173 *
174 * @param twsi_id   Octeon TWSI interface to use
175 * @param dev_addr  TWSI device address
176 * @param num_bytes Number of bytes to write (between 1 and 8 inclusive)
177 * @param data      Data to write
178 *
179 * @return 0 on success
180 *         -1 on failure
181 */
182int cvmx_twsix_write(int twsi_id, uint8_t dev_addr, int num_bytes, uint64_t data);
183
184/**
185 * Write 1-8 bytes to a TWSI device using an internal address.
186 *
187 * @param twsi_id   which TWSI interface on Octeon to use
188 * @param dev_addr  TWSI device address (7 bit only)
189 * @param internal_addr
190 *                  TWSI internal address (0, 8, or 16 bits)
191 * @param num_bytes Number of bytes to write (1-8)
192 * @param ia_width_bytes
193 *                  internal address width, in bytes (0, 1, 2)
194 * @param data      Data to write.  Data is written MSB first on the twsi bus, and only the lower
195 *                  num_bytes bytes of the argument are valid.  (If a 2 byte write is done, only
196 *                  the low 2 bytes of the argument is used.
197 *
198 * @return Number of bytes read on success,
199 *         -1 on error
200 */
201int cvmx_twsix_write_ia(int twsi_id, uint8_t dev_addr, uint16_t internal_addr, int num_bytes, int ia_width_bytes, uint64_t data);
202
203/***********************************************************************
204** Functions below are deprecated, and not recomended for use.
205** They have been superceded by more flexible functions that are
206** now provided.
207************************************************************************/
208
209
210
211
212
213
214/**
215 * Read 8-bit from a device on the TWSI / I2C bus
216 *
217 * @param twsi_id  Which TWSI bus to use. CN3XXX, CN58XX, and CN50XX only
218 *                 support 0. CN56XX and CN57XX support 0-1.
219 * @param dev_addr I2C device address (7 bit)
220 * @param internal_addr
221 *                 Internal device address
222 *
223 * @return 8-bit data or < 0 in case of error
224 */
225static inline int cvmx_twsix_read8(int twsi_id, uint8_t dev_addr, uint8_t internal_addr)
226{
227    return cvmx_twsix_read_ia8(twsi_id, dev_addr, internal_addr, 1);
228}
229
230/**
231 * Read 8-bit from a device on the TWSI / I2C bus
232 *
233 * Uses current internal address
234 *
235 * @param twsi_id  Which TWSI bus to use. CN3XXX, CN58XX, and CN50XX only
236 *                 support 0. CN56XX and CN57XX support 0-1.
237 * @param dev_addr I2C device address (7 bit)
238 *
239 * @return 8-bit value or < 0 in case of error
240 */
241static inline int cvmx_twsix_read8_cur_addr(int twsi_id, uint8_t dev_addr)
242{
243    uint64_t data;
244
245    if (cvmx_twsix_read(twsi_id,dev_addr, 1, &data) < 0)
246        return -1;
247    return(data & 0xff);
248}
249
250/**
251 * Write 8-bit to a device on the TWSI / I2C bus
252 *
253 * @param twsi_id  Which TWSI bus to use. CN3XXX, CN58XX, and CN50XX only
254 *                 support 0. CN56XX and CN57XX support 0-1.
255 * @param dev_addr I2C device address (7 bit)
256 * @param internal_addr
257 *                 Internal device address
258 * @param data     Data to be written
259 *
260 * @return 0 on success and < 0 in case of error
261 */
262static inline int cvmx_twsix_write8(int twsi_id, uint8_t dev_addr, uint8_t internal_addr, uint8_t data)
263{
264    if (cvmx_twsix_write_ia(twsi_id,dev_addr,internal_addr, 1, 1,data) < 0)
265        return -1;
266    return 0;
267}
268
269/**
270 * Read 8-bit from a device on the TWSI / I2C bus zero.
271 *
272 * This function is for compatibility with SDK 1.6.0 and
273 * before which only supported a single TWSI bus.
274 *
275 * @param dev_addr I2C device address (7 bit)
276 * @param internal_addr
277 *                 Internal device address
278 *
279 * @return 8-bit data or < 0 in case of error
280 */
281static inline int cvmx_twsi_read8(uint8_t dev_addr, uint8_t internal_addr)
282{
283    return cvmx_twsix_read8(0, dev_addr, internal_addr);
284}
285
286/**
287 * Read 8-bit from a device on the TWSI / I2C bus zero.
288 *
289 * Uses current internal address
290 *
291 * This function is for compatibility with SDK 1.6.0 and
292 * before which only supported a single TWSI bus.
293 *
294 * @param dev_addr I2C device address (7 bit)
295 *
296 * @return 8-bit value or < 0 in case of error
297 */
298static inline int cvmx_twsi_read8_cur_addr(uint8_t dev_addr)
299{
300    return cvmx_twsix_read8_cur_addr(0, dev_addr);
301}
302
303/**
304 * Write 8-bit to a device on the TWSI / I2C bus zero.
305 * This function is for compatibility with SDK 1.6.0 and
306 * before which only supported a single TWSI bus.
307 *
308 * @param dev_addr I2C device address (7 bit)
309 * @param internal_addr
310 *                 Internal device address
311 * @param data     Data to be written
312 *
313 * @return 0 on success and < 0 in case of error
314 */
315static inline int cvmx_twsi_write8(uint8_t dev_addr, uint8_t internal_addr, uint8_t data)
316{
317    return cvmx_twsix_write8(0, dev_addr, internal_addr, data);
318}
319
320#ifdef	__cplusplus
321}
322#endif
323
324#endif  /*  __CVMX_TWSI_H__ */
325