cvmx-tlb.h revision 215976
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THE ENTIRE RISK ARISING OUT OF USE OR 37 * PERFORMANCE OF THE SOFTWARE LIES WITH YOU. 38 ***********************license end**************************************/ 39 40 41#ifndef __CVMX_TLB_H__ 42#define __CVMX_TLB_H__ 43 44/** 45 * @file 46 * 47 * cvmx-tlb provides access functions for setting up TLB entries for simple 48 * executive applications. 49 * 50 * <hr>$Revision: 41586 $<hr> 51 */ 52 53#ifdef __cplusplus 54extern "C" { 55#endif 56 57#define CVMX_TLB_PAGEMASK_4K (0x3 << 11) 58#define CVMX_TLB_PAGEMASK_16K (0xF << 11) 59#define CVMX_TLB_PAGEMASK_64K (0x3F << 11) 60#define CVMX_TLB_PAGEMASK_256K (0xFF << 11) 61#define CVMX_TLB_PAGEMASK_1M (0x3FF << 11) 62#define CVMX_TLB_PAGEMASK_4M (0xFFF << 11) 63#define CVMX_TLB_PAGEMASK_16M (0x3FFF << 11) 64#define CVMX_TLB_PAGEMASK_64M (0xFFFF << 11) 65#define CVMX_TLB_PAGEMASK_256M (0x3FFFF << 11) 66 67#define PAGE_MASK ( ~(( 1<< 12 ) -1)) 68 69/** 70 * Set up a wired entry. This function is designed to be used by Simple 71 * Executive to set up its virtual to physical address mapping at start up 72 * time. After the mapping is set up, the remaining unused TLB entries can 73 * be use for run time shared memory mapping. 74 * 75 * Calling this function causes the C0 wired index register to increase. 76 * Wired index register points to the separation between fixed TLB mapping 77 * and run time shared memory mapping. 78 * 79 * @param hi Entry Hi 80 * @param lo0 Entry Low0 81 * @param lo1 Entry Low1 82 * @pagam pagemask Pagemask 83 * 84 * @return 0: the entry is added 85 * @return -1: out of TLB entry 86 */ 87int cvmx_tlb_add_wired_entry( uint64_t hi, uint64_t lo0, 88 uint64_t lo1, uint64_t pagemask); 89 90 91/** 92 * Find a free entry that can be used for share memory mapping. 93 * 94 * @return -1: no free entry found 95 * @return : a free entry 96 */ 97int cvmx_tlb_allocate_runtime_entry(void); 98 99/** 100 * Invalidate the TLB entry. Remove previous mapping if one was set up 101 * @param tlbi 102 */ 103void cvmx_tlb_free_runtime_entry(uint32_t tlbi); 104 105/** 106 * Debug routine to show all shared memory mapping 107 */ 108void cvmx_tlb_dump_shared_mapping(void); 109 110/** 111 * Program a single TLB entry to enable the provided vaddr to paddr mapping. 112 * 113 * @param index Index of the TLB entry 114 * @param vaddr The virtual address for this mapping 115 * @param paddr The physical address for this mapping 116 * @param size Size of the mapping 117 * @param tlb_flags Entry mapping flags 118 */ 119void cvmx_tlb_write_entry(int index, uint64_t vaddr, uint64_t paddr, 120 uint64_t size, uint64_t tlb_flags); 121 122 123/** 124 * Program a single TLB entry to enable the provided vaddr to paddr mapping. 125 * This version adds a wired entry that should not be changed at run time 126 * 127 * @param index Index of the TLB entry 128 * @param vaddr The virtual address for this mapping 129 * @param paddr The physical address for this mapping 130 * @param size Size of the mapping 131 * @param tlb_flags Entry mapping flags 132 * @return -1: TLB out of entries 133 * 0: fixed entry added 134 * 135 */ 136int cvmx_tlb_add_fixed_entry(uint64_t vaddr, uint64_t paddr, 137 uint64_t size, uint64_t tlb_flags); 138 139/** 140 * Program a single TLB entry to enable the provided vaddr to paddr mapping. 141 * This version writes a runtime entry. It will check the index to make sure 142 * not to overwrite any fixed entries. 143 * 144 * @param index Index of the TLB entry 145 * @param vaddr The virtual address for this mapping 146 * @param paddr The physical address for this mapping 147 * @param size Size of the mapping 148 * @param tlb_flags Entry mapping flags 149 */ 150void cvmx_tlb_write_runtime_entry(int index, uint64_t vaddr, uint64_t paddr, 151 uint64_t size, uint64_t tlb_flags); 152 153 154/** 155 * Find the TLB index of a given virtual address 156 * 157 * @param vaddr The virtual address to look up 158 * @return -1 not TLB mapped 159 * >=0 TLB TLB index 160 */ 161int cvmx_tlb_lookup(uint64_t vaddr); 162 163/** 164 * Debug routine to show all TLB entries of this core 165 * 166 */ 167void cvmx_tlb_dump_all(void); 168 169/** 170 * Query for total number of TLBs of the core 171 * 172 * @return Total number of TLB entries available on the core 173 */ 174static inline uint32_t cvmx_tlb_size_limit(void) 175{ 176 uint32_t tlb_size_limit = 0; 177 178 if (OCTEON_IS_MODEL(OCTEON_CN63XX)) tlb_size_limit = 128; 179 else if (OCTEON_IS_MODEL(OCTEON_CN5XXX)) tlb_size_limit = 64; 180 else if (OCTEON_IS_MODEL(OCTEON_CN3XXX)) tlb_size_limit = 32; 181 182 return tlb_size_limit; 183} 184 185/* 186 * @INTERNAL 187 * return the next power of two value for the given input <v> 188 * 189 * @param v input value 190 * @return next power of two value for v 191 */ 192static inline uint64_t __upper_power_of_two(uint64_t v) 193{ 194 v--; 195 v |= v >> 1; 196 v |= v >> 2; 197 v |= v >> 4; 198 v |= v >> 8; 199 v |= v >> 16; 200 v |= v >> 32; 201 v++; 202 return v; 203} 204 205/** 206 * @INTERNAL 207 * Check if the given value 'v' is power of two. 208 * 209 * @param v input value 210 * @return 1 yes 211 * 0 no 212 */ 213static inline int __is_power_of_two(uint64_t v) 214{ 215 int num_of_1s = 0; 216 217 CVMX_DPOP(num_of_1s, v); 218 return (num_of_1s == 1 ); 219} 220 221 222/** 223 * @INTERNAL 224 * 225 * Find last bit set 64bit version 226 * 227 * @param x the integer to find leading 1 228 * 229 * @return >=0 the bit position (0..63) of the most significant 1 bit in a word 230 * -1 if no 1 bit exists 231 */ 232static inline uint64_t __fls64(uint64_t x) 233{ 234 int lz; 235 236 if (sizeof(x) != 8) return 0; 237 238 __asm__( 239 " .set push \n" 240 " .set mips64 \n" 241 " dclz %0, %1 \n" 242 " .set pop \n" 243 : "=r" (lz) 244 : "r" (x)); 245 246 return 63 - lz; 247} 248 249/** 250 * @INTERNAL 251 * Compute log2(v), only works if v is power of two. 252 * 253 * @param v the input value 254 * @return log2(v) 255 */ 256static inline uint32_t __log2(uint64_t v) 257{ 258 uint32_t log2 = 0 ; 259 260 if (v) log2 = __fls64(v); 261 262 return log2; 263} 264 265 266#ifdef __cplusplus 267} 268#endif 269 270#endif 271