1218792Snp/***********************license start***************
2237436Snp * Copyright (c) 2003-2012  Cavium Inc. (support@cavium.com). All rights
3218792Snp * reserved.
4218792Snp *
5218792Snp *
6218792Snp * Redistribution and use in source and binary forms, with or without
7218792Snp * modification, are permitted provided that the following conditions are
8218792Snp * met:
9218792Snp *
10218792Snp *   * Redistributions of source code must retain the above copyright
11218792Snp *     notice, this list of conditions and the following disclaimer.
12218792Snp *
13218792Snp *   * Redistributions in binary form must reproduce the above
14218792Snp *     copyright notice, this list of conditions and the following
15218792Snp *     disclaimer in the documentation and/or other materials provided
16218792Snp *     with the distribution.
17218792Snp
18218792Snp *   * Neither the name of Cavium Inc. nor the names of
19218792Snp *     its contributors may be used to endorse or promote products
20218792Snp *     derived from this software without specific prior written
21218792Snp *     permission.
22218792Snp
23218792Snp * This Software, including technical data, may be subject to U.S. export  control
24218792Snp * laws, including the U.S. Export Administration Act and its  associated
25218792Snp * regulations, and may be subject to export or import  regulations in other
26218792Snp * countries.
27218792Snp
28218792Snp * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
29218792Snp * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR
30237263Snp * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
31237263Snp * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
32218792Snp * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
33218792Snp * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
34218792Snp * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
35228561Snp * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
36218792Snp * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR
37220649Snp * PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
38246385Snp ***********************license end**************************************/
39246385Snp
40246385Snp
41246385Snp/**
42246385Snp * cvmx-smi-defs.h
43246385Snp *
44218792Snp * Configuration and status register (CSR) type definitions for
45218792Snp * Octeon smi.
46218792Snp *
47218792Snp * This file is auto generated. Do not edit.
48218792Snp *
49218792Snp * <hr>$Revision$<hr>
50218792Snp *
51218792Snp */
52218792Snp#ifndef __CVMX_SMI_DEFS_H__
53218792Snp#define __CVMX_SMI_DEFS_H__
54218792Snp
55218792Snp#if CVMX_ENABLE_CSR_ADDRESS_CHECKING
56218792Snp#define CVMX_SMI_DRV_CTL CVMX_SMI_DRV_CTL_FUNC()
57218792Snpstatic inline uint64_t CVMX_SMI_DRV_CTL_FUNC(void)
58218792Snp{
59218792Snp	if (!(OCTEON_IS_MODEL(OCTEON_CN61XX) || OCTEON_IS_MODEL(OCTEON_CN63XX) || OCTEON_IS_MODEL(OCTEON_CN66XX) || OCTEON_IS_MODEL(OCTEON_CN68XX) || OCTEON_IS_MODEL(OCTEON_CNF71XX)))
60218792Snp		cvmx_warn("CVMX_SMI_DRV_CTL not supported on this chip\n");
61218792Snp	return CVMX_ADD_IO_SEG(0x0001180000001828ull);
62218792Snp}
63218792Snp#else
64218792Snp#define CVMX_SMI_DRV_CTL (CVMX_ADD_IO_SEG(0x0001180000001828ull))
65218792Snp#endif
66218792Snp
67218792Snp/**
68218792Snp * cvmx_smi_drv_ctl
69218792Snp *
70218792Snp * SMI_DRV_CTL = SMI Drive Strength Control
71218792Snp *
72218792Snp */
73218792Snpunion cvmx_smi_drv_ctl {
74218792Snp	uint64_t u64;
75218792Snp	struct cvmx_smi_drv_ctl_s {
76218792Snp#ifdef __BIG_ENDIAN_BITFIELD
77218792Snp	uint64_t reserved_14_63               : 50;
78218792Snp	uint64_t pctl                         : 6;  /**< PCTL Drive strength control bits
79218792Snp                                                         Assuming a 50ohm termination
80218792Snp                                                         3.3v supply = 19
81218792Snp                                                         2.5v supply = TBD */
82218792Snp	uint64_t reserved_6_7                 : 2;
83218792Snp	uint64_t nctl                         : 6;  /**< NCTL Drive strength control bits
84218792Snp                                                         Assuming a 50ohm termination
85218792Snp                                                         3.3v supply = 15
86218792Snp                                                         2.5v supply = TBD */
87218792Snp#else
88218792Snp	uint64_t nctl                         : 6;
89218792Snp	uint64_t reserved_6_7                 : 2;
90218792Snp	uint64_t pctl                         : 6;
91218792Snp	uint64_t reserved_14_63               : 50;
92218792Snp#endif
93218792Snp	} s;
94218792Snp	struct cvmx_smi_drv_ctl_s             cn61xx;
95218792Snp	struct cvmx_smi_drv_ctl_s             cn63xx;
96218792Snp	struct cvmx_smi_drv_ctl_s             cn63xxp1;
97218792Snp	struct cvmx_smi_drv_ctl_s             cn66xx;
98218792Snp	struct cvmx_smi_drv_ctl_s             cn68xx;
99218792Snp	struct cvmx_smi_drv_ctl_s             cn68xxp1;
100218792Snp	struct cvmx_smi_drv_ctl_s             cnf71xx;
101218792Snp};
102218792Snptypedef union cvmx_smi_drv_ctl cvmx_smi_drv_ctl_t;
103218792Snp
104218792Snp#endif
105218792Snp