1210284Sjmallett/***********************license start***************
2232812Sjmallett * Copyright (c) 2003-2010  Cavium Inc. (support@cavium.com). All rights
3215990Sjmallett * reserved.
4210284Sjmallett *
5210284Sjmallett *
6215990Sjmallett * Redistribution and use in source and binary forms, with or without
7215990Sjmallett * modification, are permitted provided that the following conditions are
8215990Sjmallett * met:
9210284Sjmallett *
10215990Sjmallett *   * Redistributions of source code must retain the above copyright
11215990Sjmallett *     notice, this list of conditions and the following disclaimer.
12210284Sjmallett *
13215990Sjmallett *   * Redistributions in binary form must reproduce the above
14215990Sjmallett *     copyright notice, this list of conditions and the following
15215990Sjmallett *     disclaimer in the documentation and/or other materials provided
16215990Sjmallett *     with the distribution.
17215990Sjmallett
18232812Sjmallett *   * Neither the name of Cavium Inc. nor the names of
19215990Sjmallett *     its contributors may be used to endorse or promote products
20215990Sjmallett *     derived from this software without specific prior written
21215990Sjmallett *     permission.
22215990Sjmallett
23215990Sjmallett * This Software, including technical data, may be subject to U.S. export  control
24215990Sjmallett * laws, including the U.S. Export Administration Act and its  associated
25215990Sjmallett * regulations, and may be subject to export or import  regulations in other
26215990Sjmallett * countries.
27215990Sjmallett
28215990Sjmallett * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
29232812Sjmallett * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR
30215990Sjmallett * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
31215990Sjmallett * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
32215990Sjmallett * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
33215990Sjmallett * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
34215990Sjmallett * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
35215990Sjmallett * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
36215990Sjmallett * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR
37215990Sjmallett * PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
38210284Sjmallett ***********************license end**************************************/
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45215990Sjmallett
46210284Sjmallett/**
47210284Sjmallett * @file
48210284Sjmallett *
49210284Sjmallett * Functions for NPI initialization, configuration,
50210284Sjmallett * and monitoring.
51210284Sjmallett *
52232812Sjmallett * <hr>$Revision: 70030 $<hr>
53210284Sjmallett */
54215990Sjmallett#ifdef CVMX_BUILD_FOR_LINUX_KERNEL
55215990Sjmallett#include <asm/octeon/cvmx.h>
56215990Sjmallett#include <asm/octeon/cvmx-config.h>
57215990Sjmallett#ifdef CVMX_ENABLE_PKO_FUNCTIONS
58215990Sjmallett#include <asm/octeon/cvmx-helper.h>
59232812Sjmallett#include <asm/octeon/cvmx-pko.h>
60232812Sjmallett#include <asm/octeon/cvmx-pexp-defs.h>
61232812Sjmallett#include <asm/octeon/cvmx-sli-defs.h>
62215990Sjmallett#endif
63215990Sjmallett#include <asm/octeon/cvmx-pip-defs.h>
64215990Sjmallett#else
65215990Sjmallett#if !defined(__FreeBSD__) || !defined(_KERNEL)
66215990Sjmallett#include "executive-config.h"
67215990Sjmallett#include "cvmx-config.h"
68232812Sjmallett#include "cvmx.h"
69232812Sjmallett#include "cvmx-pko.h"
70215990Sjmallett#ifdef CVMX_ENABLE_PKO_FUNCTIONS
71210284Sjmallett#include "cvmx-helper.h"
72215990Sjmallett#endif
73215990Sjmallett#else
74215990Sjmallett#include "cvmx.h"
75232812Sjmallett#include "cvmx-pko.h"
76215990Sjmallett#include "cvmx-helper.h"
77215990Sjmallett#endif
78215990Sjmallett#endif
79210284Sjmallett
80210311Sjmallett#ifdef CVMX_ENABLE_PKO_FUNCTIONS
81215990Sjmallett
82210284Sjmallett/**
83210284Sjmallett * @INTERNAL
84210284Sjmallett * Probe a NPI interface and determine the number of ports
85210284Sjmallett * connected to it. The NPI interface should still be down
86210284Sjmallett * after this call.
87210284Sjmallett *
88210284Sjmallett * @param interface Interface to probe
89210284Sjmallett *
90210284Sjmallett * @return Number of ports on the interface. Zero to disable.
91210284Sjmallett */
92210284Sjmallettint __cvmx_helper_npi_probe(int interface)
93210284Sjmallett{
94210284Sjmallett#if CVMX_PKO_QUEUES_PER_PORT_PCI > 0
95232812Sjmallett    if (OCTEON_IS_MODEL(OCTEON_CN68XX))
96232812Sjmallett        return 32;
97210284Sjmallett#if 0
98210284Sjmallett    /* Technically CN30XX, CN31XX, and CN50XX contain packet engines, but
99210284Sjmallett        nobody ever uses them. Since this is the case, we disable them here */
100210284Sjmallett    else if (OCTEON_IS_MODEL(OCTEON_CN31XX) || OCTEON_IS_MODEL(OCTEON_CN50XX))
101210284Sjmallett        return 2;
102210284Sjmallett    else if (OCTEON_IS_MODEL(OCTEON_CN30XX))
103210284Sjmallett        return 1;
104210284Sjmallett#endif
105232812Sjmallett    else if (!(OCTEON_IS_MODEL(OCTEON_CN52XX_PASS1_X) || OCTEON_IS_MODEL(OCTEON_CN56XX_PASS1_X) || OCTEON_IS_MODEL(OCTEON_CN31XX) || OCTEON_IS_MODEL(OCTEON_CN50XX) || OCTEON_IS_MODEL(OCTEON_CN30XX)))
106232812Sjmallett        return 4; /* The packet engines didn't exist before cn56xx pass 2 */
107210284Sjmallett#endif
108210284Sjmallett    return 0;
109210284Sjmallett}
110210284Sjmallett
111210284Sjmallett
112210284Sjmallett/**
113210284Sjmallett * @INTERNAL
114210284Sjmallett * Bringup and enable a NPI interface. After this call packet
115210284Sjmallett * I/O should be fully functional. This is called with IPD
116210284Sjmallett * enabled but PKO disabled.
117210284Sjmallett *
118210284Sjmallett * @param interface Interface to bring up
119210284Sjmallett *
120210284Sjmallett * @return Zero on success, negative on failure
121210284Sjmallett */
122210284Sjmallettint __cvmx_helper_npi_enable(int interface)
123210284Sjmallett{
124232812Sjmallett    int num_ports = cvmx_helper_ports_on_interface(interface);
125232812Sjmallett
126210284Sjmallett    /* On CN50XX, CN52XX, and CN56XX we need to disable length checking
127210284Sjmallett        so packet < 64 bytes and jumbo frames don't get errors */
128210284Sjmallett    if (!OCTEON_IS_MODEL(OCTEON_CN3XXX) && !OCTEON_IS_MODEL(OCTEON_CN58XX))
129210284Sjmallett    {
130210284Sjmallett        int port;
131210284Sjmallett        for (port=0; port<num_ports; port++)
132210284Sjmallett        {
133215990Sjmallett            cvmx_pip_prt_cfgx_t port_cfg;
134232812Sjmallett            int ipd_port = (OCTEON_IS_MODEL(OCTEON_CN68XX)) ?
135232812Sjmallett	        cvmx_helper_get_pknd(interface, port) :
136232812Sjmallett		cvmx_helper_get_ipd_port(interface, port);
137210284Sjmallett            port_cfg.u64 = cvmx_read_csr(CVMX_PIP_PRT_CFGX(ipd_port));
138232812Sjmallett            port_cfg.s.lenerr_en = 0;
139210284Sjmallett            port_cfg.s.maxerr_en = 0;
140210284Sjmallett            port_cfg.s.minerr_en = 0;
141210284Sjmallett            cvmx_write_csr(CVMX_PIP_PRT_CFGX(ipd_port), port_cfg.u64);
142232812Sjmallett
143232812Sjmallett            if (OCTEON_IS_MODEL(OCTEON_CN68XX))
144232812Sjmallett            {
145232812Sjmallett                /*
146232812Sjmallett                 * Set up pknd and bpid
147232812Sjmallett                 */
148232812Sjmallett		cvmx_sli_portx_pkind_t config;
149232812Sjmallett		config.u64 = cvmx_read_csr(CVMX_PEXP_SLI_PORTX_PKIND(port));
150232812Sjmallett		config.s.bpkind = cvmx_helper_get_bpid(interface, port);
151232812Sjmallett		config.s.pkind = cvmx_helper_get_pknd(interface, port);
152232812Sjmallett		cvmx_write_csr(CVMX_PEXP_SLI_PORTX_PKIND(port), config.u64);
153232812Sjmallett            }
154210284Sjmallett        }
155210284Sjmallett    }
156210284Sjmallett
157232812Sjmallett    if (OCTEON_IS_MODEL(OCTEON_CN68XX))
158232812Sjmallett    {
159232812Sjmallett	/*
160232812Sjmallett	 * Set up pko pipes.
161232812Sjmallett	 */
162232812Sjmallett	cvmx_sli_tx_pipe_t config;
163232812Sjmallett	config.u64 = cvmx_read_csr(CVMX_PEXP_SLI_TX_PIPE);
164232812Sjmallett	config.s.base = __cvmx_pko_get_pipe (interface, 0);
165232812Sjmallett#ifdef CVMX_HELPER_NPI_MAX_PIPES
166232812Sjmallett	config.s.nump = CVMX_HELPER_NPI_MAX_PIPES;
167232812Sjmallett#else
168232812Sjmallett	config.s.nump = num_ports;
169232812Sjmallett#endif
170232812Sjmallett	cvmx_write_csr(CVMX_PEXP_SLI_TX_PIPE, config.u64);
171232812Sjmallett    }
172232812Sjmallett
173232812Sjmallett
174210284Sjmallett    /* Enables are controlled by the remote host, so nothing to do here */
175210284Sjmallett    return 0;
176210284Sjmallett}
177210284Sjmallett
178210284Sjmallett#endif /* CVMX_ENABLE_PKO_FUNCTIONS */
179210284Sjmallett
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