1296177Sjhibbits/* Copyright (c) 2008-2011 Freescale Semiconductor, Inc.
2296177Sjhibbits * All rights reserved.
3296177Sjhibbits *
4296177Sjhibbits * Redistribution and use in source and binary forms, with or without
5296177Sjhibbits * modification, are permitted provided that the following conditions are met:
6296177Sjhibbits *     * Redistributions of source code must retain the above copyright
7296177Sjhibbits *       notice, this list of conditions and the following disclaimer.
8296177Sjhibbits *     * Redistributions in binary form must reproduce the above copyright
9296177Sjhibbits *       notice, this list of conditions and the following disclaimer in the
10296177Sjhibbits *       documentation and/or other materials provided with the distribution.
11296177Sjhibbits *     * Neither the name of Freescale Semiconductor nor the
12296177Sjhibbits *       names of its contributors may be used to endorse or promote products
13296177Sjhibbits *       derived from this software without specific prior written permission.
14296177Sjhibbits *
15296177Sjhibbits *
16296177Sjhibbits * ALTERNATIVELY, this software may be distributed under the terms of the
17296177Sjhibbits * GNU General Public License ("GPL") as published by the Free Software
18296177Sjhibbits * Foundation, either version 2 of that License or (at your option) any
19296177Sjhibbits * later version.
20296177Sjhibbits *
21296177Sjhibbits * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
22296177Sjhibbits * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
23296177Sjhibbits * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24296177Sjhibbits * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
25296177Sjhibbits * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
26296177Sjhibbits * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
27296177Sjhibbits * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28296177Sjhibbits * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29296177Sjhibbits * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
30296177Sjhibbits * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31296177Sjhibbits */
32296177Sjhibbits
33296177Sjhibbits/******************************************************************************
34296177Sjhibbits @File          dtsec.c
35296177Sjhibbits
36296177Sjhibbits @Description   FM dTSEC ...
37296177Sjhibbits*//***************************************************************************/
38296177Sjhibbits
39296177Sjhibbits#include "std_ext.h"
40296177Sjhibbits#include "error_ext.h"
41296177Sjhibbits#include "string_ext.h"
42296177Sjhibbits#include "xx_ext.h"
43296177Sjhibbits#include "endian_ext.h"
44296177Sjhibbits#include "crc_mac_addr_ext.h"
45296177Sjhibbits#include "debug_ext.h"
46296177Sjhibbits
47296177Sjhibbits#include "fm_common.h"
48296177Sjhibbits#include "dtsec.h"
49296177Sjhibbits
50296177Sjhibbits
51296177Sjhibbits/*****************************************************************************/
52296177Sjhibbits/*                      Internal routines                                    */
53296177Sjhibbits/*****************************************************************************/
54296177Sjhibbits
55296177Sjhibbitsstatic t_Error CheckInitParameters(t_Dtsec *p_Dtsec)
56296177Sjhibbits{
57296177Sjhibbits    if(ENET_SPEED_FROM_MODE(p_Dtsec->enetMode) >= e_ENET_SPEED_10000)
58296177Sjhibbits        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Ethernet 1G MAC driver only supports 1G or lower speeds"));
59296177Sjhibbits    if(p_Dtsec->macId >= FM_MAX_NUM_OF_1G_MACS)
60296177Sjhibbits        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("macId can not be greater than the number of 1G MACs"));
61296177Sjhibbits    if(p_Dtsec->addr == 0)
62296177Sjhibbits        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Ethernet MAC Must have a valid MAC Address"));
63296177Sjhibbits    if(((p_Dtsec->enetMode == e_ENET_MODE_SGMII_1000) ||
64296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_RGMII_1000) ||
65296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_QSGMII_1000)) &&
66296177Sjhibbits        p_Dtsec->p_DtsecDriverParam->halfDuplex)
67296177Sjhibbits        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Ethernet MAC 1G can't work in half duplex"));
68296177Sjhibbits    if(p_Dtsec->p_DtsecDriverParam->halfDuplex && (p_Dtsec->p_DtsecDriverParam)->loopback)
69296177Sjhibbits        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("LoopBack is not supported in halfDuplex mode"));
70296177Sjhibbits#ifdef FM_NO_RX_PREAM_ERRATA_DTSECx1
71296177Sjhibbits    if(p_Dtsec->p_DtsecDriverParam->preambleRxEn)
72296177Sjhibbits        RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("preambleRxEn"));
73296177Sjhibbits#endif /* FM_NO_RX_PREAM_ERRATA_DTSECx1 */
74296177Sjhibbits    if(((p_Dtsec->p_DtsecDriverParam)->preambleTxEn || (p_Dtsec->p_DtsecDriverParam)->preambleRxEn) &&( (p_Dtsec->p_DtsecDriverParam)->preambleLength != 0x7))
75296177Sjhibbits        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Preamble length should be 0x7 bytes"));
76296177Sjhibbits    if((p_Dtsec->p_DtsecDriverParam)->fifoTxWatermarkH<((p_Dtsec->p_DtsecDriverParam)->fifoTxThr+8))
77296177Sjhibbits        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("fifoTxWatermarkH has to be at least 8 larger than fifoTxThr"));
78296177Sjhibbits    if((p_Dtsec->p_DtsecDriverParam)->halfDuplex &&
79296177Sjhibbits       (p_Dtsec->p_DtsecDriverParam->txTimeStampEn || p_Dtsec->p_DtsecDriverParam->rxTimeStampEn))
80296177Sjhibbits        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("dTSEC in half duplex mode has to be with 1588 timeStamping diable"));
81296177Sjhibbits    if((p_Dtsec->p_DtsecDriverParam)->actOnRxPauseFrame && (p_Dtsec->p_DtsecDriverParam)->controlFrameAccept )
82296177Sjhibbits        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Receive control frame are not passed to the system memory so it can not be accept "));
83296177Sjhibbits    if((p_Dtsec->p_DtsecDriverParam)->packetAlignmentPadding  > MAX_PACKET_ALIGNMENT)
84296177Sjhibbits        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("packetAlignmentPadding can't be greater than %d ",MAX_PACKET_ALIGNMENT ));
85296177Sjhibbits    if(((p_Dtsec->p_DtsecDriverParam)->nonBackToBackIpg1  > MAX_INTER_PACKET_GAP) ||
86296177Sjhibbits        ((p_Dtsec->p_DtsecDriverParam)->nonBackToBackIpg2 > MAX_INTER_PACKET_GAP) ||
87296177Sjhibbits        ((p_Dtsec->p_DtsecDriverParam)->backToBackIpg > MAX_INTER_PACKET_GAP))
88296177Sjhibbits        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("Inter packet gap can't be greater than %d ",MAX_INTER_PACKET_GAP ));
89296177Sjhibbits    if((p_Dtsec->p_DtsecDriverParam)->alternateBackoffVal > MAX_INTER_PALTERNATE_BEB)
90296177Sjhibbits        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("alternateBackoffVal can't be greater than %d ",MAX_INTER_PALTERNATE_BEB ));
91296177Sjhibbits    if((p_Dtsec->p_DtsecDriverParam)->maxRetransmission > MAX_RETRANSMISSION)
92296177Sjhibbits        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("maxRetransmission can't be greater than %d ",MAX_RETRANSMISSION ));
93296177Sjhibbits    if((p_Dtsec->p_DtsecDriverParam)->collisionWindow > MAX_COLLISION_WINDOW)
94296177Sjhibbits        RETURN_ERROR(MAJOR, E_INVALID_STATE, ("collisionWindow can't be greater than %d ",MAX_COLLISION_WINDOW ));
95296177Sjhibbits
96296177Sjhibbits    /*  If Auto negotiation process is disabled, need to */
97296177Sjhibbits    /*  Set up the PHY using the MII Management Interface */
98296177Sjhibbits    if (p_Dtsec->p_DtsecDriverParam->tbiPhyAddr > MAX_PHYS)
99296177Sjhibbits        RETURN_ERROR(MAJOR, E_NOT_IN_RANGE, ("PHY address (should be 0-%d)", MAX_PHYS));
100296177Sjhibbits    if(!p_Dtsec->f_Exception)
101296177Sjhibbits        RETURN_ERROR(MAJOR, E_INVALID_HANDLE, ("uninitialized f_Exception"));
102296177Sjhibbits    if(!p_Dtsec->f_Event)
103296177Sjhibbits        RETURN_ERROR(MAJOR, E_INVALID_HANDLE, ("uninitialized f_Event"));
104296177Sjhibbits    return E_OK;
105296177Sjhibbits}
106296177Sjhibbits
107296177Sjhibbitsstatic uint8_t GetMiiDiv(int32_t refClk)
108296177Sjhibbits{
109296177Sjhibbits    uint32_t    div,tmpClk;
110296177Sjhibbits    int         minRange;
111296177Sjhibbits
112296177Sjhibbits    div = 1;
113296177Sjhibbits    minRange = (int)(refClk/40 - 1);
114296177Sjhibbits
115296177Sjhibbits    tmpClk = (uint32_t)ABS(refClk/60 - 1);
116296177Sjhibbits    if (tmpClk < minRange)
117296177Sjhibbits    {
118296177Sjhibbits        div = 2;
119296177Sjhibbits        minRange = (int)tmpClk;
120296177Sjhibbits    }
121296177Sjhibbits    tmpClk = (uint32_t)ABS(refClk/60 - 1);
122296177Sjhibbits    if (tmpClk < minRange)
123296177Sjhibbits    {
124296177Sjhibbits        div = 3;
125296177Sjhibbits        minRange = (int)tmpClk;
126296177Sjhibbits    }
127296177Sjhibbits    tmpClk = (uint32_t)ABS(refClk/80 - 1);
128296177Sjhibbits    if (tmpClk < minRange)
129296177Sjhibbits    {
130296177Sjhibbits        div = 4;
131296177Sjhibbits        minRange = (int)tmpClk;
132296177Sjhibbits    }
133296177Sjhibbits    tmpClk = (uint32_t)ABS(refClk/100 - 1);
134296177Sjhibbits    if (tmpClk < minRange)
135296177Sjhibbits    {
136296177Sjhibbits        div = 5;
137296177Sjhibbits        minRange = (int)tmpClk;
138296177Sjhibbits    }
139296177Sjhibbits    tmpClk = (uint32_t)ABS(refClk/140 - 1);
140296177Sjhibbits    if (tmpClk < minRange)
141296177Sjhibbits    {
142296177Sjhibbits        div = 6;
143296177Sjhibbits        minRange = (int)tmpClk;
144296177Sjhibbits    }
145296177Sjhibbits    tmpClk = (uint32_t)ABS(refClk/280 - 1);
146296177Sjhibbits    if (tmpClk < minRange)
147296177Sjhibbits    {
148296177Sjhibbits        div = 7;
149296177Sjhibbits        minRange = (int)tmpClk;
150296177Sjhibbits    }
151296177Sjhibbits
152296177Sjhibbits    return (uint8_t)div;
153296177Sjhibbits}
154296177Sjhibbits
155296177Sjhibbits/* ........................................................................... */
156296177Sjhibbits
157296177Sjhibbitsstatic void SetDefaultParam(t_DtsecDriverParam *p_DtsecDriverParam)
158296177Sjhibbits{
159296177Sjhibbits    p_DtsecDriverParam->errorDisabled       = DEFAULT_errorDisabled;
160296177Sjhibbits
161296177Sjhibbits    p_DtsecDriverParam->promiscuousEnable   = DEFAULT_promiscuousEnable;
162296177Sjhibbits
163296177Sjhibbits    p_DtsecDriverParam->pauseExtended       = DEFAULT_pauseExtended;
164296177Sjhibbits    p_DtsecDriverParam->pauseTime           = DEFAULT_pauseTime;
165296177Sjhibbits
166296177Sjhibbits    p_DtsecDriverParam->halfDuplex              = DEFAULT_halfDuplex;
167296177Sjhibbits    p_DtsecDriverParam->halfDulexFlowControlEn  = DEFAULT_halfDulexFlowControlEn;
168296177Sjhibbits    p_DtsecDriverParam->txTimeStampEn           = DEFAULT_txTimeStampEn;
169296177Sjhibbits    p_DtsecDriverParam->rxTimeStampEn           = DEFAULT_rxTimeStampEn;
170296177Sjhibbits
171296177Sjhibbits    p_DtsecDriverParam->packetAlignmentPadding = DEFAULT_packetAlignment;
172296177Sjhibbits    p_DtsecDriverParam->controlFrameAccept     = DEFAULT_controlFrameAccept;
173296177Sjhibbits    p_DtsecDriverParam->groupHashExtend        = DEFAULT_groupHashExtend;
174296177Sjhibbits    p_DtsecDriverParam->broadcReject           = DEFAULT_broadcReject;
175296177Sjhibbits    p_DtsecDriverParam->rxShortFrame           = DEFAULT_rxShortFrame;
176296177Sjhibbits    p_DtsecDriverParam->exactMatch             = DEFAULT_exactMatch;
177296177Sjhibbits    p_DtsecDriverParam->debugMode              = DEFAULT_debugMode;
178296177Sjhibbits
179296177Sjhibbits    p_DtsecDriverParam->loopback               = DEFAULT_loopback;
180296177Sjhibbits    p_DtsecDriverParam->tbiPhyAddr             = DEFAULT_tbiPhyAddr;
181296177Sjhibbits    p_DtsecDriverParam->actOnRxPauseFrame      = DEFAULT_actOnRxPauseFrame;
182296177Sjhibbits    p_DtsecDriverParam->actOnTxPauseFrame      = DEFAULT_actOnTxPauseFrame;
183296177Sjhibbits
184296177Sjhibbits    p_DtsecDriverParam->preambleLength         = DEFAULT_PreAmLength;
185296177Sjhibbits    p_DtsecDriverParam->preambleRxEn           = DEFAULT_PreAmRxEn;
186296177Sjhibbits    p_DtsecDriverParam->preambleTxEn           = DEFAULT_PreAmTxEn;
187296177Sjhibbits    p_DtsecDriverParam->lengthCheckEnable      = DEFAULT_lengthCheckEnable;
188296177Sjhibbits    p_DtsecDriverParam->padAndCrcEnable        = DEFAULT_padAndCrcEnable;
189296177Sjhibbits    p_DtsecDriverParam->crcEnable              = DEFAULT_crcEnable;
190296177Sjhibbits
191296177Sjhibbits    p_DtsecDriverParam->nonBackToBackIpg1      = DEFAULT_nonBackToBackIpg1;
192296177Sjhibbits    p_DtsecDriverParam->nonBackToBackIpg2      = DEFAULT_nonBackToBackIpg2;
193296177Sjhibbits    p_DtsecDriverParam->minIfgEnforcement      = DEFAULT_minIfgEnforcement;
194296177Sjhibbits    p_DtsecDriverParam->backToBackIpg          = DEFAULT_backToBackIpg;
195296177Sjhibbits
196296177Sjhibbits    p_DtsecDriverParam->alternateBackoffVal    = DEFAULT_altBackoffVal;
197296177Sjhibbits    p_DtsecDriverParam->alternateBackoffEnable = DEFAULT_altBackoffEnable;
198296177Sjhibbits    p_DtsecDriverParam->backPressureNoBackoff  = DEFAULT_backPressureNoBackoff;
199296177Sjhibbits    p_DtsecDriverParam->noBackoff              = DEFAULT_noBackoff;
200296177Sjhibbits    p_DtsecDriverParam->excessDefer            = DEFAULT_excessDefer;
201296177Sjhibbits    p_DtsecDriverParam->maxRetransmission      = DEFAULT_maxRetransmission;
202296177Sjhibbits    p_DtsecDriverParam->collisionWindow        = DEFAULT_collisionWindow;
203296177Sjhibbits
204296177Sjhibbits    p_DtsecDriverParam->maxFrameLength         = DEFAULT_maxFrameLength;
205296177Sjhibbits
206296177Sjhibbits    p_DtsecDriverParam->fifoTxThr              = DEFAULT_fifoTxThr;
207296177Sjhibbits    p_DtsecDriverParam->fifoTxWatermarkH       = DEFAULT_fifoTxWatermarkH;
208296177Sjhibbits
209296177Sjhibbits    p_DtsecDriverParam->fifoRxWatermarkL       = DEFAULT_fifoRxWatermarkL;
210296177Sjhibbits}
211296177Sjhibbits
212296177Sjhibbitsstatic void DtsecException(t_Handle h_Dtsec)
213296177Sjhibbits{
214296177Sjhibbits    t_Dtsec             *p_Dtsec = (t_Dtsec *)h_Dtsec;
215296177Sjhibbits    uint32_t            event;
216296177Sjhibbits    t_DtsecMemMap       *p_DtsecMemMap;
217296177Sjhibbits
218296177Sjhibbits    ASSERT_COND(p_Dtsec);
219296177Sjhibbits    p_DtsecMemMap = p_Dtsec->p_MemMap;
220296177Sjhibbits    ASSERT_COND(p_DtsecMemMap);
221296177Sjhibbits
222296177Sjhibbits    event = GET_UINT32(p_DtsecMemMap->ievent);
223296177Sjhibbits    /* handle only MDIO events */
224296177Sjhibbits    event &= (IMASK_MMRDEN | IMASK_MMWREN);
225296177Sjhibbits    if(event)
226296177Sjhibbits    {
227296177Sjhibbits        event &= GET_UINT32(p_DtsecMemMap->imask);
228296177Sjhibbits
229296177Sjhibbits        WRITE_UINT32(p_DtsecMemMap->ievent, event);
230296177Sjhibbits
231296177Sjhibbits        if(event & IMASK_MMRDEN)
232296177Sjhibbits            p_Dtsec->f_Event(p_Dtsec->h_App, e_FM_MAC_EX_1G_MII_MNG_RD_COMPLET);
233296177Sjhibbits        if(event & IMASK_MMWREN)
234296177Sjhibbits            p_Dtsec->f_Event(p_Dtsec->h_App, e_FM_MAC_EX_1G_MII_MNG_WR_COMPLET);
235296177Sjhibbits    }
236296177Sjhibbits}
237296177Sjhibbits
238296177Sjhibbitsstatic void UpdateStatistics(t_Dtsec *p_Dtsec)
239296177Sjhibbits{
240296177Sjhibbits    t_DtsecMemMap   *p_DtsecMemMap = p_Dtsec->p_MemMap;
241296177Sjhibbits    uint32_t        car1 =  GET_UINT32(p_DtsecMemMap->car1);
242296177Sjhibbits    uint32_t        car2 =  GET_UINT32(p_DtsecMemMap->car2);
243296177Sjhibbits
244296177Sjhibbits    if(car1)
245296177Sjhibbits    {
246296177Sjhibbits        WRITE_UINT32(p_DtsecMemMap->car1, car1);
247296177Sjhibbits        if(car1 & CAR1_TR64)
248296177Sjhibbits            p_Dtsec->internalStatistics.tr64 += VAL22BIT;
249296177Sjhibbits        if(car1 & CAR1_TR127)
250296177Sjhibbits            p_Dtsec->internalStatistics.tr127 += VAL22BIT;
251296177Sjhibbits        if(car1 & CAR1_TR255)
252296177Sjhibbits            p_Dtsec->internalStatistics.tr255 += VAL22BIT;
253296177Sjhibbits        if(car1 & CAR1_TR511)
254296177Sjhibbits            p_Dtsec->internalStatistics.tr511 += VAL22BIT;
255296177Sjhibbits        if(car1 & CAR1_TRK1)
256296177Sjhibbits            p_Dtsec->internalStatistics.tr1k += VAL22BIT;
257296177Sjhibbits        if(car1 & CAR1_TRMAX)
258296177Sjhibbits            p_Dtsec->internalStatistics.trmax += VAL22BIT;
259296177Sjhibbits        if(car1 & CAR1_TRMGV)
260296177Sjhibbits            p_Dtsec->internalStatistics.trmgv += VAL22BIT;
261296177Sjhibbits        if(car1 & CAR1_RBYT)
262296177Sjhibbits            p_Dtsec->internalStatistics.rbyt += (uint64_t)VAL32BIT;
263296177Sjhibbits        if(car1 & CAR1_RPKT)
264296177Sjhibbits            p_Dtsec->internalStatistics.rpkt += VAL22BIT;
265296177Sjhibbits        if(car1 & CAR1_RMCA)
266296177Sjhibbits            p_Dtsec->internalStatistics.rmca += VAL22BIT;
267296177Sjhibbits        if(car1 & CAR1_RBCA)
268296177Sjhibbits            p_Dtsec->internalStatistics.rbca += VAL22BIT;
269296177Sjhibbits        if(car1 & CAR1_RXPF)
270296177Sjhibbits            p_Dtsec->internalStatistics.rxpf += VAL16BIT;
271296177Sjhibbits        if(car1 & CAR1_RALN)
272296177Sjhibbits            p_Dtsec->internalStatistics.raln += VAL16BIT;
273296177Sjhibbits        if(car1 & CAR1_RFLR)
274296177Sjhibbits            p_Dtsec->internalStatistics.rflr += VAL16BIT;
275296177Sjhibbits        if(car1 & CAR1_RCDE)
276296177Sjhibbits            p_Dtsec->internalStatistics.rcde += VAL16BIT;
277296177Sjhibbits        if(car1 & CAR1_RCSE)
278296177Sjhibbits            p_Dtsec->internalStatistics.rcse += VAL16BIT;
279296177Sjhibbits        if(car1 & CAR1_RUND)
280296177Sjhibbits            p_Dtsec->internalStatistics.rund += VAL16BIT;
281296177Sjhibbits        if(car1 & CAR1_ROVR)
282296177Sjhibbits            p_Dtsec->internalStatistics.rovr += VAL16BIT;
283296177Sjhibbits        if(car1 & CAR1_RFRG)
284296177Sjhibbits            p_Dtsec->internalStatistics.rfrg += VAL16BIT;
285296177Sjhibbits        if(car1 & CAR1_RJBR)
286296177Sjhibbits            p_Dtsec->internalStatistics.rjbr += VAL16BIT;
287296177Sjhibbits        if(car1 & CAR1_RDRP)
288296177Sjhibbits            p_Dtsec->internalStatistics.rdrp += VAL16BIT;
289296177Sjhibbits    }
290296177Sjhibbits    if(car2)
291296177Sjhibbits    {
292296177Sjhibbits        WRITE_UINT32(p_DtsecMemMap->car2, car2);
293296177Sjhibbits        if(car2  & CAR2_TFCS)
294296177Sjhibbits            p_Dtsec->internalStatistics.tfcs += VAL12BIT;
295296177Sjhibbits        if(car2  & CAR2_TBYT)
296296177Sjhibbits            p_Dtsec->internalStatistics.tbyt += (uint64_t)VAL32BIT;
297296177Sjhibbits        if(car2  & CAR2_TPKT)
298296177Sjhibbits            p_Dtsec->internalStatistics.tpkt += VAL22BIT;
299296177Sjhibbits        if(car2  & CAR2_TMCA)
300296177Sjhibbits            p_Dtsec->internalStatistics.tmca += VAL22BIT;
301296177Sjhibbits        if(car2  & CAR2_TBCA)
302296177Sjhibbits            p_Dtsec->internalStatistics.tbca += VAL22BIT;
303296177Sjhibbits        if(car2  & CAR2_TXPF)
304296177Sjhibbits            p_Dtsec->internalStatistics.txpf += VAL16BIT;
305296177Sjhibbits        if(car2  & CAR2_TDRP)
306296177Sjhibbits            p_Dtsec->internalStatistics.tdrp += VAL16BIT;
307296177Sjhibbits    }
308296177Sjhibbits}
309296177Sjhibbits
310296177Sjhibbits/* .............................................................................. */
311296177Sjhibbits
312296177Sjhibbitsstatic uint16_t DtsecGetMaxFrameLength(t_Handle h_Dtsec)
313296177Sjhibbits{
314296177Sjhibbits    t_Dtsec              *p_Dtsec = (t_Dtsec *)h_Dtsec;
315296177Sjhibbits
316296177Sjhibbits    SANITY_CHECK_RETURN_VALUE(p_Dtsec, E_INVALID_HANDLE, 0);
317296177Sjhibbits
318296177Sjhibbits    return (uint16_t)GET_UINT32(p_Dtsec->p_MemMap->maxfrm);
319296177Sjhibbits}
320296177Sjhibbits
321296177Sjhibbitsstatic void DtsecErrException(t_Handle h_Dtsec)
322296177Sjhibbits{
323296177Sjhibbits    t_Dtsec             *p_Dtsec = (t_Dtsec *)h_Dtsec;
324296177Sjhibbits    uint32_t            event;
325296177Sjhibbits    t_DtsecMemMap       *p_DtsecMemMap = p_Dtsec->p_MemMap;
326296177Sjhibbits
327296177Sjhibbits    event = GET_UINT32(p_DtsecMemMap->ievent);
328296177Sjhibbits    /* do not handle MDIO events */
329296177Sjhibbits    event &= ~(IMASK_MMRDEN | IMASK_MMWREN);
330296177Sjhibbits
331296177Sjhibbits    event &= GET_UINT32(p_DtsecMemMap->imask);
332296177Sjhibbits
333296177Sjhibbits    WRITE_UINT32(p_DtsecMemMap->ievent, event);
334296177Sjhibbits
335296177Sjhibbits    if(event & IMASK_BREN)
336296177Sjhibbits        p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_BAB_RX);
337296177Sjhibbits    if(event & IMASK_RXCEN)
338296177Sjhibbits        p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_RX_CTL);
339296177Sjhibbits    if(event & IMASK_MSROEN)
340296177Sjhibbits        UpdateStatistics(p_Dtsec);
341296177Sjhibbits    if(event & IMASK_GTSCEN)
342296177Sjhibbits        p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_GRATEFUL_TX_STP_COMPLET);
343296177Sjhibbits    if(event & IMASK_BTEN)
344296177Sjhibbits        p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_BAB_TX);
345296177Sjhibbits    if(event & IMASK_TXCEN)
346296177Sjhibbits        p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_TX_CTL);
347296177Sjhibbits    if(event & IMASK_TXEEN)
348296177Sjhibbits        p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_TX_ERR);
349296177Sjhibbits    if(event & IMASK_LCEN)
350296177Sjhibbits        p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_LATE_COL);
351296177Sjhibbits    if(event & IMASK_CRLEN)
352296177Sjhibbits        p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_COL_RET_LMT);
353296177Sjhibbits    if(event & IMASK_XFUNEN)
354296177Sjhibbits    {
355296177Sjhibbits#ifdef FM_TX_LOCKUP_ERRATA_DTSEC6
356296177Sjhibbits        uint32_t  tpkt1, tmpReg1, tpkt2, tmpReg2, i;
357296177Sjhibbits        /* a. Write 0x00E0_0C00 to DTSEC_ID */
358296177Sjhibbits        /* This is a read only regidter */
359296177Sjhibbits
360296177Sjhibbits        /* b. Read and save the value of TPKT */
361296177Sjhibbits        tpkt1 = GET_UINT32(p_DtsecMemMap->tpkt);
362296177Sjhibbits
363296177Sjhibbits        /* c. Read the register at dTSEC address offset 0x32C */
364296177Sjhibbits        tmpReg1 =  GET_UINT32(*(uint32_t*)((uint8_t*)p_DtsecMemMap + 0x32c));
365296177Sjhibbits
366296177Sjhibbits        /* d. Compare bits [9:15] to bits [25:31] of the register at address offset 0x32C. */
367296177Sjhibbits        if((tmpReg1 & 0x007F0000) != (tmpReg1 & 0x0000007F))
368296177Sjhibbits        {
369296177Sjhibbits            /* If they are not equal, save the value of this register and wait for at least
370296177Sjhibbits             * MAXFRM*16 ns */
371296177Sjhibbits            XX_UDelay((uint32_t)(NCSW_MIN(DtsecGetMaxFrameLength(p_Dtsec)*16/1000, 1)));
372296177Sjhibbits        }
373296177Sjhibbits
374296177Sjhibbits        /* e. Read and save TPKT again and read the register at dTSEC address offset
375296177Sjhibbits            0x32C again*/
376296177Sjhibbits        tpkt2 = GET_UINT32(p_DtsecMemMap->tpkt);
377296177Sjhibbits        tmpReg2 = GET_UINT32(*(uint32_t*)((uint8_t*)p_DtsecMemMap + 0x32c));
378296177Sjhibbits
379296177Sjhibbits        /* f. Compare the value of TPKT saved in step b to value read in step e. Also
380296177Sjhibbits            compare bits [9:15] of the register at offset 0x32C saved in step d to the value
381296177Sjhibbits            of bits [9:15] saved in step e. If the two registers values are unchanged, then
382296177Sjhibbits            the transmit portion of the dTSEC controller is locked up and the user should
383296177Sjhibbits            proceed to the recover sequence. */
384296177Sjhibbits        if((tpkt1 == tpkt2) && ((tmpReg1 & 0x007F0000) == (tmpReg2 & 0x007F0000)))
385296177Sjhibbits        {
386296177Sjhibbits            /* recover sequence */
387296177Sjhibbits
388296177Sjhibbits            /* a.Write a 1 to RCTRL[GRS]*/
389296177Sjhibbits
390296177Sjhibbits            WRITE_UINT32(p_DtsecMemMap->rctrl, GET_UINT32(p_DtsecMemMap->rctrl) | RCTRL_GRS);
391296177Sjhibbits
392296177Sjhibbits            /* b.Wait until IEVENT[GRSC]=1, or at least 100 us has elapsed. */
393296177Sjhibbits            for(i = 0 ; i < 100 ; i++ )
394296177Sjhibbits            {
395296177Sjhibbits                if(GET_UINT32(p_DtsecMemMap->ievent) & IMASK_GRSCEN)
396296177Sjhibbits                    break;
397296177Sjhibbits                XX_UDelay(1);
398296177Sjhibbits            }
399296177Sjhibbits            if(GET_UINT32(p_DtsecMemMap->ievent) & IMASK_GRSCEN)
400296177Sjhibbits                WRITE_UINT32(p_DtsecMemMap->ievent, IMASK_GRSCEN);
401296177Sjhibbits            else
402296177Sjhibbits                DBG(INFO,("Rx lockup due to dTSEC Tx lockup"));
403296177Sjhibbits
404296177Sjhibbits
405296177Sjhibbits            /* c.Write a 1 to bit n of FM_RSTC (offset 0x0CC of FPM)*/
406296177Sjhibbits            FmResetMac(p_Dtsec->fmMacControllerDriver.h_Fm, e_FM_MAC_1G, p_Dtsec->fmMacControllerDriver.macId);
407296177Sjhibbits
408296177Sjhibbits            /* d.Wait 4 Tx clocks (32 ns) */
409296177Sjhibbits            XX_UDelay(1);
410296177Sjhibbits
411296177Sjhibbits            /* e.Write a 0 to bit n of FM_RSTC. */
412296177Sjhibbits            /* cleared by FMAN */
413296177Sjhibbits        }
414296177Sjhibbits        else
415296177Sjhibbits        {
416296177Sjhibbits            /* If either value has changed, the dTSEC controller is not locked up and the
417296177Sjhibbits               controller should be allowed to proceed normally by writing the reset value
418296177Sjhibbits               of 0x0824_0101 to DTSEC_ID. */
419296177Sjhibbits            /* Register is read only */
420296177Sjhibbits        }
421296177Sjhibbits#endif /* FM_TX_LOCKUP_ERRATA_DTSEC6 */
422296177Sjhibbits
423296177Sjhibbits        p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_TX_FIFO_UNDRN);
424296177Sjhibbits    }
425296177Sjhibbits    if(event & IMASK_MAGEN)
426296177Sjhibbits        p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_MAG_PCKT);
427296177Sjhibbits    if(event & IMASK_GRSCEN)
428296177Sjhibbits        p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_GRATEFUL_RX_STP_COMPLET);
429296177Sjhibbits    if(event & IMASK_TDPEEN)
430296177Sjhibbits        p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_TX_DATA_ERR);
431296177Sjhibbits    if(event & IMASK_RDPEEN)
432296177Sjhibbits        p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_RX_DATA_ERR);
433296177Sjhibbits
434296177Sjhibbits    /*  - masked interrupts */
435296177Sjhibbits    ASSERT_COND(!(event & IMASK_ABRTEN));
436296177Sjhibbits    ASSERT_COND(!(event & IMASK_IFERREN));
437296177Sjhibbits}
438296177Sjhibbits
439296177Sjhibbitsstatic void Dtsec1588Exception(t_Handle h_Dtsec)
440296177Sjhibbits{
441296177Sjhibbits    t_Dtsec             *p_Dtsec = (t_Dtsec *)h_Dtsec;
442296177Sjhibbits    uint32_t            event;
443296177Sjhibbits    t_DtsecMemMap       *p_DtsecMemMap = p_Dtsec->p_MemMap;
444296177Sjhibbits
445296177Sjhibbits    if (p_Dtsec->ptpTsuEnabled)
446296177Sjhibbits    {
447296177Sjhibbits        event = GET_UINT32(p_DtsecMemMap->tmr_pevent);
448296177Sjhibbits        event &= GET_UINT32(p_DtsecMemMap->tmr_pemask);
449296177Sjhibbits        if(event)
450296177Sjhibbits        {
451296177Sjhibbits            WRITE_UINT32(p_DtsecMemMap->tmr_pevent, event);
452296177Sjhibbits            ASSERT_COND(event & PEMASK_TSRE);
453296177Sjhibbits            p_Dtsec->f_Exception(p_Dtsec->h_App, e_FM_MAC_EX_1G_1588_TS_RX_ERR);
454296177Sjhibbits        }
455296177Sjhibbits    }
456296177Sjhibbits}
457296177Sjhibbits
458296177Sjhibbits/* ........................................................................... */
459296177Sjhibbits
460296177Sjhibbitsstatic void FreeInitResources(t_Dtsec *p_Dtsec)
461296177Sjhibbits{
462296177Sjhibbits   /*TODO - need to ask why with mdioIrq != 0*/
463296177Sjhibbits    if ((p_Dtsec->mdioIrq != 0) && (p_Dtsec->mdioIrq != NO_IRQ))
464296177Sjhibbits    {
465296177Sjhibbits        XX_DisableIntr(p_Dtsec->mdioIrq);
466296177Sjhibbits        XX_FreeIntr(p_Dtsec->mdioIrq);
467296177Sjhibbits    }
468296177Sjhibbits    else if (p_Dtsec->mdioIrq == 0)
469296177Sjhibbits        FmUnregisterIntr(p_Dtsec->fmMacControllerDriver.h_Fm, e_FM_MOD_1G_MAC, p_Dtsec->macId, e_FM_INTR_TYPE_NORMAL);
470296177Sjhibbits    FmUnregisterIntr(p_Dtsec->fmMacControllerDriver.h_Fm, e_FM_MOD_1G_MAC, p_Dtsec->macId, e_FM_INTR_TYPE_ERR);
471296177Sjhibbits    FmUnregisterIntr(p_Dtsec->fmMacControllerDriver.h_Fm, e_FM_MOD_1G_MAC_TMR, p_Dtsec->macId, e_FM_INTR_TYPE_NORMAL);
472296177Sjhibbits
473296177Sjhibbits    /* release the driver's group hash table */
474296177Sjhibbits    FreeHashTable(p_Dtsec->p_MulticastAddrHash);
475296177Sjhibbits    p_Dtsec->p_MulticastAddrHash =   NULL;
476296177Sjhibbits
477296177Sjhibbits    /* release the driver's individual hash table */
478296177Sjhibbits    FreeHashTable(p_Dtsec->p_UnicastAddrHash);
479296177Sjhibbits    p_Dtsec->p_UnicastAddrHash =     NULL;
480296177Sjhibbits}
481296177Sjhibbits
482296177Sjhibbits/* ........................................................................... */
483296177Sjhibbits
484296177Sjhibbitsstatic void HardwareClearAddrInPaddr(t_Dtsec *p_Dtsec, uint8_t paddrNum)
485296177Sjhibbits{
486296177Sjhibbits    WRITE_UINT32(((t_DtsecMemMap*)p_Dtsec->p_MemMap)->macaddr[paddrNum].exact_match1, 0x0);
487296177Sjhibbits    WRITE_UINT32(((t_DtsecMemMap*)p_Dtsec->p_MemMap)->macaddr[paddrNum].exact_match2, 0x0);
488296177Sjhibbits}
489296177Sjhibbits
490296177Sjhibbits/* ........................................................................... */
491296177Sjhibbits
492296177Sjhibbitsstatic void HardwareAddAddrInPaddr(t_Dtsec *p_Dtsec, uint64_t *p_Addr, uint8_t paddrNum)
493296177Sjhibbits{
494296177Sjhibbits    uint32_t        tmpReg32        = 0;
495296177Sjhibbits    uint64_t        addr            = *p_Addr;
496296177Sjhibbits    t_DtsecMemMap   *p_DtsecMemMap  = (t_DtsecMemMap*)p_Dtsec->p_MemMap;
497296177Sjhibbits
498296177Sjhibbits    tmpReg32 = (uint32_t)(addr);
499296177Sjhibbits    SwapUint32P(&tmpReg32);
500296177Sjhibbits    WRITE_UINT32(p_DtsecMemMap->macaddr[paddrNum].exact_match1, tmpReg32);
501296177Sjhibbits
502296177Sjhibbits    tmpReg32 = (uint32_t)(addr>>32);
503296177Sjhibbits    SwapUint32P(&tmpReg32);
504296177Sjhibbits    WRITE_UINT32(p_DtsecMemMap->macaddr[paddrNum].exact_match2, tmpReg32);
505296177Sjhibbits}
506296177Sjhibbits
507296177Sjhibbits/* ........................................................................... */
508296177Sjhibbits
509296177Sjhibbitsstatic t_Error GracefulStop(t_Dtsec *p_Dtsec, e_CommMode mode)
510296177Sjhibbits{
511296177Sjhibbits    t_DtsecMemMap   *p_MemMap;
512296177Sjhibbits
513296177Sjhibbits    ASSERT_COND(p_Dtsec);
514296177Sjhibbits
515296177Sjhibbits    p_MemMap= (t_DtsecMemMap*)(p_Dtsec->p_MemMap);
516296177Sjhibbits    ASSERT_COND(p_MemMap);
517296177Sjhibbits
518296177Sjhibbits    /* Assert the graceful transmit stop bit */
519296177Sjhibbits    if (mode & e_COMM_MODE_RX)
520296177Sjhibbits        WRITE_UINT32(p_MemMap->rctrl,
521296177Sjhibbits                     GET_UINT32(p_MemMap->rctrl) | RCTRL_GRS);
522296177Sjhibbits
523296177Sjhibbits#ifdef FM_GRS_ERRATA_DTSEC_A002
524296177Sjhibbits    XX_UDelay(100);
525296177Sjhibbits#endif /* FM_GRS_ERRATA_DTSEC_A002 */
526296177Sjhibbits
527296177Sjhibbits#ifdef FM_GTS_ERRATA_DTSEC_A004
528296177Sjhibbits    DBG(INFO, ("GTS not supported due to DTSEC_A004 errata."));
529296177Sjhibbits#else  /* not FM_GTS_ERRATA_DTSEC_A004 */
530296177Sjhibbits    if (mode & e_COMM_MODE_TX)
531296177Sjhibbits        WRITE_UINT32(p_MemMap->tctrl,
532296177Sjhibbits                     GET_UINT32(p_MemMap->tctrl) | TCTRL_GTS);
533296177Sjhibbits#endif /* not FM_GTS_ERRATA_DTSEC_A004 */
534296177Sjhibbits
535296177Sjhibbits    return E_OK;
536296177Sjhibbits}
537296177Sjhibbits
538296177Sjhibbits/* .............................................................................. */
539296177Sjhibbits
540296177Sjhibbitsstatic t_Error GracefulRestart(t_Dtsec *p_Dtsec, e_CommMode mode)
541296177Sjhibbits{
542296177Sjhibbits    t_DtsecMemMap   *p_MemMap;
543296177Sjhibbits
544296177Sjhibbits    ASSERT_COND(p_Dtsec);
545296177Sjhibbits
546296177Sjhibbits    p_MemMap= (t_DtsecMemMap*)(p_Dtsec->p_MemMap);
547296177Sjhibbits    ASSERT_COND(p_MemMap);
548296177Sjhibbits
549296177Sjhibbits    /* clear the graceful receive stop bit */
550296177Sjhibbits    if(mode & e_COMM_MODE_TX)
551296177Sjhibbits        WRITE_UINT32(p_MemMap->tctrl,
552296177Sjhibbits                      GET_UINT32(p_MemMap->tctrl) & ~TCTRL_GTS);
553296177Sjhibbits
554296177Sjhibbits    if(mode & e_COMM_MODE_RX)
555296177Sjhibbits        WRITE_UINT32(p_MemMap->rctrl,
556296177Sjhibbits                      GET_UINT32(p_MemMap->rctrl) & ~RCTRL_GRS);
557296177Sjhibbits
558296177Sjhibbits    return E_OK;
559296177Sjhibbits}
560296177Sjhibbits
561296177Sjhibbits
562296177Sjhibbits/*****************************************************************************/
563296177Sjhibbits/*                      dTSEC Configs modification functions                 */
564296177Sjhibbits/*****************************************************************************/
565296177Sjhibbits
566296177Sjhibbits
567296177Sjhibbits/* .............................................................................. */
568296177Sjhibbits
569296177Sjhibbitsstatic t_Error DtsecConfigLoopback(t_Handle h_Dtsec, bool newVal)
570296177Sjhibbits{
571296177Sjhibbits
572296177Sjhibbits    t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
573296177Sjhibbits
574296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
575296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
576296177Sjhibbits
577296177Sjhibbits    p_Dtsec->p_DtsecDriverParam->loopback = newVal;
578296177Sjhibbits
579296177Sjhibbits    return E_OK;
580296177Sjhibbits}
581296177Sjhibbits
582296177Sjhibbits/* .............................................................................. */
583296177Sjhibbits
584296177Sjhibbitsstatic t_Error DtsecConfigMaxFrameLength(t_Handle h_Dtsec, uint16_t newVal)
585296177Sjhibbits{
586296177Sjhibbits    t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
587296177Sjhibbits
588296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
589296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
590296177Sjhibbits
591296177Sjhibbits    p_Dtsec->p_DtsecDriverParam->maxFrameLength = newVal;
592296177Sjhibbits
593296177Sjhibbits    return E_OK;
594296177Sjhibbits}
595296177Sjhibbits
596296177Sjhibbits/* .............................................................................. */
597296177Sjhibbits
598296177Sjhibbitsstatic t_Error DtsecConfigPadAndCrc(t_Handle h_Dtsec, bool newVal)
599296177Sjhibbits{
600296177Sjhibbits    t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
601296177Sjhibbits
602296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
603296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
604296177Sjhibbits
605296177Sjhibbits    p_Dtsec->p_DtsecDriverParam->padAndCrcEnable = newVal;
606296177Sjhibbits
607296177Sjhibbits    return E_OK;
608296177Sjhibbits}
609296177Sjhibbits
610296177Sjhibbits/* .............................................................................. */
611296177Sjhibbits
612296177Sjhibbitsstatic t_Error DtsecConfigHalfDuplex(t_Handle h_Dtsec, bool newVal)
613296177Sjhibbits{
614296177Sjhibbits    t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
615296177Sjhibbits
616296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
617296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
618296177Sjhibbits
619296177Sjhibbits    p_Dtsec->p_DtsecDriverParam->halfDuplex = newVal;
620296177Sjhibbits
621296177Sjhibbits    return E_OK;
622296177Sjhibbits}
623296177Sjhibbits
624296177Sjhibbits/* .............................................................................. */
625296177Sjhibbits
626296177Sjhibbitsstatic t_Error DtsecConfigLengthCheck(t_Handle h_Dtsec, bool newVal)
627296177Sjhibbits{
628296177Sjhibbits#ifdef FM_LEN_CHECK_ERRATA_FMAN_SW002
629296177SjhibbitsUNUSED(h_Dtsec);
630296177Sjhibbits    RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("LengthCheck!"));
631296177Sjhibbits
632296177Sjhibbits#else
633296177Sjhibbits    t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
634296177Sjhibbits
635296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
636296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
637296177Sjhibbits
638296177Sjhibbits    p_Dtsec->p_DtsecDriverParam->lengthCheckEnable = newVal;
639296177Sjhibbits
640296177Sjhibbits    return E_OK;
641296177Sjhibbits#endif /* FM_LEN_CHECK_ERRATA_FMAN_SW002 */
642296177Sjhibbits}
643296177Sjhibbits
644296177Sjhibbitsstatic t_Error DtsecConfigException(t_Handle h_Dtsec, e_FmMacExceptions exception, bool enable)
645296177Sjhibbits{
646296177Sjhibbits    t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
647296177Sjhibbits    uint32_t    bitMask = 0;
648296177Sjhibbits
649296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
650296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
651296177Sjhibbits
652296177Sjhibbits    if(exception != e_FM_MAC_EX_1G_1588_TS_RX_ERR)
653296177Sjhibbits    {
654296177Sjhibbits        GET_EXCEPTION_FLAG(bitMask, exception);
655296177Sjhibbits        if(bitMask)
656296177Sjhibbits        {
657296177Sjhibbits            if (enable)
658296177Sjhibbits                p_Dtsec->exceptions |= bitMask;
659296177Sjhibbits            else
660296177Sjhibbits                p_Dtsec->exceptions &= ~bitMask;
661296177Sjhibbits        }
662296177Sjhibbits        else
663296177Sjhibbits            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined exception"));
664296177Sjhibbits    }
665296177Sjhibbits    else
666296177Sjhibbits    {
667296177Sjhibbits        if(!p_Dtsec->ptpTsuEnabled)
668296177Sjhibbits            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Exception valid for 1588 only"));
669296177Sjhibbits        switch(exception){
670296177Sjhibbits        case(e_FM_MAC_EX_1G_1588_TS_RX_ERR):
671296177Sjhibbits            if(enable)
672296177Sjhibbits                p_Dtsec->enTsuErrExeption = TRUE;
673296177Sjhibbits            else
674296177Sjhibbits                p_Dtsec->enTsuErrExeption = FALSE;
675296177Sjhibbits            break;
676296177Sjhibbits        default:
677296177Sjhibbits            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined exception"));
678296177Sjhibbits        }
679296177Sjhibbits    }
680296177Sjhibbits    return E_OK;
681296177Sjhibbits}
682296177Sjhibbits/*****************************************************************************/
683296177Sjhibbits/*                      dTSEC Run Time API functions                         */
684296177Sjhibbits/*****************************************************************************/
685296177Sjhibbits
686296177Sjhibbits/* .............................................................................. */
687296177Sjhibbits
688296177Sjhibbitsstatic t_Error DtsecEnable(t_Handle h_Dtsec,  e_CommMode mode)
689296177Sjhibbits{
690296177Sjhibbits    t_Dtsec             *p_Dtsec = (t_Dtsec *)h_Dtsec;
691296177Sjhibbits    t_DtsecMemMap       *p_MemMap ;
692296177Sjhibbits    uint32_t            tmpReg32 = 0;
693296177Sjhibbits
694296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
695296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_MemMap, E_INVALID_HANDLE);
696296177Sjhibbits
697296177Sjhibbits    p_MemMap= (t_DtsecMemMap*)(p_Dtsec->p_MemMap);
698296177Sjhibbits
699296177Sjhibbits    tmpReg32 = GET_UINT32(p_MemMap->maccfg1);
700296177Sjhibbits    if (mode & e_COMM_MODE_RX)
701296177Sjhibbits        tmpReg32 |= MACCFG1_RX_EN;
702296177Sjhibbits    if (mode & e_COMM_MODE_TX)
703296177Sjhibbits        tmpReg32 |= MACCFG1_TX_EN;
704296177Sjhibbits    WRITE_UINT32(p_MemMap->maccfg1, tmpReg32);
705296177Sjhibbits
706296177Sjhibbits    GracefulRestart(p_Dtsec, mode);
707296177Sjhibbits
708296177Sjhibbits    return E_OK;
709296177Sjhibbits}
710296177Sjhibbits
711296177Sjhibbits/* .............................................................................. */
712296177Sjhibbits
713296177Sjhibbitsstatic t_Error DtsecDisable (t_Handle h_Dtsec, e_CommMode mode)
714296177Sjhibbits{
715296177Sjhibbits    t_Dtsec             *p_Dtsec = (t_Dtsec *)h_Dtsec;
716296177Sjhibbits    t_DtsecMemMap       *p_MemMap ;
717296177Sjhibbits    uint32_t            tmpReg32 = 0;
718296177Sjhibbits
719296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
720296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_MemMap, E_INVALID_HANDLE);
721296177Sjhibbits
722296177Sjhibbits    p_MemMap = (t_DtsecMemMap*)(p_Dtsec->p_MemMap);
723296177Sjhibbits
724296177Sjhibbits    GracefulStop(p_Dtsec, mode);
725296177Sjhibbits
726296177Sjhibbits    tmpReg32 = GET_UINT32(p_MemMap->maccfg1);
727296177Sjhibbits    if (mode & e_COMM_MODE_RX)
728296177Sjhibbits        tmpReg32 &= ~MACCFG1_RX_EN;
729296177Sjhibbits    if (mode & e_COMM_MODE_TX)
730296177Sjhibbits        tmpReg32 &= ~MACCFG1_TX_EN;
731296177Sjhibbits    WRITE_UINT32(p_MemMap->maccfg1, tmpReg32);
732296177Sjhibbits
733296177Sjhibbits    return E_OK;
734296177Sjhibbits}
735296177Sjhibbits
736296177Sjhibbits/* .............................................................................. */
737296177Sjhibbits
738296177Sjhibbitsstatic t_Error DtsecTxMacPause(t_Handle h_Dtsec, uint16_t pauseTime)
739296177Sjhibbits{
740296177Sjhibbits    t_Dtsec         *p_Dtsec = (t_Dtsec *)h_Dtsec;
741296177Sjhibbits    uint32_t        ptv = 0;
742296177Sjhibbits    t_DtsecMemMap   *p_MemMap;
743296177Sjhibbits
744296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_STATE);
745296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
746296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_MemMap, E_INVALID_STATE);
747296177Sjhibbits
748296177Sjhibbits    p_MemMap = (t_DtsecMemMap*)(p_Dtsec->p_MemMap);
749296177Sjhibbits
750296177Sjhibbits    if (pauseTime)
751296177Sjhibbits    {
752296177Sjhibbits#ifdef FM_BAD_TX_TS_IN_B_2_B_ERRATA_DTSEC_A003
753296177Sjhibbits        {
754296177Sjhibbits            if (pauseTime <= 320)
755296177Sjhibbits                RETURN_ERROR(MINOR, E_INVALID_VALUE,
756296177Sjhibbits                             ("This pause-time value of %d is illegal due to errata dTSEC-A003!"
757296177Sjhibbits                              " value should be greater than 320."));
758296177Sjhibbits        }
759296177Sjhibbits#endif /* FM_BAD_TX_TS_IN_B_2_B_ERRATA_DTSEC_A003 */
760296177Sjhibbits
761296177Sjhibbits#ifdef FM_SHORT_PAUSE_TIME_ERRATA_DTSEC1
762296177Sjhibbits        {
763296177Sjhibbits            t_FmRevisionInfo revInfo;
764296177Sjhibbits            FM_GetRevision(p_Dtsec->fmMacControllerDriver.h_Fm, &revInfo);
765296177Sjhibbits            if ((revInfo.majorRev == 1) && (revInfo.minorRev == 0))
766296177Sjhibbits                pauseTime += 2;
767296177Sjhibbits        }
768296177Sjhibbits#endif /* FM_SHORT_PAUSE_TIME_ERRATA_DTSEC1 */
769296177Sjhibbits
770296177Sjhibbits        ptv = GET_UINT32(p_MemMap->ptv);
771296177Sjhibbits        ptv |= pauseTime;
772296177Sjhibbits        WRITE_UINT32(p_MemMap->ptv, ptv);
773296177Sjhibbits
774296177Sjhibbits        /* trigger the transmission of a flow-control pause frame */
775296177Sjhibbits        WRITE_UINT32(p_MemMap->maccfg1,
776296177Sjhibbits                     GET_UINT32(p_MemMap->maccfg1) | MACCFG1_TX_FLOW);
777296177Sjhibbits    }
778296177Sjhibbits    else
779296177Sjhibbits    {
780296177Sjhibbits        WRITE_UINT32(p_MemMap->maccfg1,
781296177Sjhibbits                     GET_UINT32(p_MemMap->maccfg1) & ~MACCFG1_TX_FLOW);
782296177Sjhibbits    }
783296177Sjhibbits
784296177Sjhibbits    return E_OK;
785296177Sjhibbits}
786296177Sjhibbits
787296177Sjhibbits/* .............................................................................. */
788296177Sjhibbits
789296177Sjhibbitsstatic t_Error DtsecRxIgnoreMacPause(t_Handle h_Dtsec, bool en)
790296177Sjhibbits{
791296177Sjhibbits    t_Dtsec         *p_Dtsec = (t_Dtsec *)h_Dtsec;
792296177Sjhibbits    t_DtsecMemMap   *p_MemMap;
793296177Sjhibbits    uint32_t        tmpReg32;
794296177Sjhibbits
795296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_STATE);
796296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
797296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_MemMap, E_INVALID_STATE);
798296177Sjhibbits
799296177Sjhibbits    p_MemMap = (t_DtsecMemMap*)(p_Dtsec->p_MemMap);
800296177Sjhibbits
801296177Sjhibbits    tmpReg32 = GET_UINT32(p_MemMap->maccfg1);
802296177Sjhibbits    if (en)
803296177Sjhibbits        tmpReg32 &= ~MACCFG1_RX_FLOW;
804296177Sjhibbits    else
805296177Sjhibbits        tmpReg32 |= MACCFG1_RX_FLOW;
806296177Sjhibbits    WRITE_UINT32(p_MemMap->maccfg1, tmpReg32);
807296177Sjhibbits
808296177Sjhibbits    return E_OK;
809296177Sjhibbits}
810296177Sjhibbits
811296177Sjhibbits
812296177Sjhibbits/* .............................................................................. */
813296177Sjhibbits
814296177Sjhibbitsstatic t_Error DtsecEnable1588TimeStamp(t_Handle h_Dtsec)
815296177Sjhibbits{
816296177Sjhibbits    t_Dtsec          *p_Dtsec = (t_Dtsec *)h_Dtsec;
817296177Sjhibbits
818296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
819296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
820296177Sjhibbits#ifdef FM_10_100_SGMII_NO_TS_ERRATA_DTSEC3
821296177Sjhibbits    if((p_Dtsec->enetMode == e_ENET_MODE_SGMII_10) || (p_Dtsec->enetMode == e_ENET_MODE_SGMII_100))
822296177Sjhibbits        RETURN_ERROR(MINOR, E_NOT_SUPPORTED, ("1588TimeStamp in 10/100 SGMII"));
823296177Sjhibbits#endif /* FM_10_100_SGMII_NO_TS_ERRATA_DTSEC3 */
824296177Sjhibbits    p_Dtsec->ptpTsuEnabled = TRUE;
825296177Sjhibbits    WRITE_UINT32(p_Dtsec->p_MemMap->rctrl, GET_UINT32(p_Dtsec->p_MemMap->rctrl) | RCTRL_RTSE);
826296177Sjhibbits    WRITE_UINT32(p_Dtsec->p_MemMap->tctrl, GET_UINT32(p_Dtsec->p_MemMap->tctrl) | TCTRL_TTSE);
827296177Sjhibbits
828296177Sjhibbits    return E_OK;
829296177Sjhibbits}
830296177Sjhibbits
831296177Sjhibbitsstatic t_Error DtsecDisable1588TimeStamp(t_Handle h_Dtsec)
832296177Sjhibbits{
833296177Sjhibbits    t_Dtsec          *p_Dtsec = (t_Dtsec *)h_Dtsec;
834296177Sjhibbits
835296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
836296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
837296177Sjhibbits
838296177Sjhibbits    p_Dtsec->ptpTsuEnabled = FALSE;
839296177Sjhibbits    WRITE_UINT32(p_Dtsec->p_MemMap->rctrl, GET_UINT32(p_Dtsec->p_MemMap->rctrl) & ~RCTRL_RTSE);
840296177Sjhibbits    WRITE_UINT32(p_Dtsec->p_MemMap->tctrl, GET_UINT32(p_Dtsec->p_MemMap->tctrl) & ~TCTRL_TTSE);
841296177Sjhibbits
842296177Sjhibbits    return E_OK;
843296177Sjhibbits}
844296177Sjhibbits
845296177Sjhibbits/* .............................................................................. */
846296177Sjhibbits
847296177Sjhibbitsstatic t_Error DtsecGetStatistics(t_Handle h_Dtsec, t_FmMacStatistics *p_Statistics)
848296177Sjhibbits{
849296177Sjhibbits    t_Dtsec             *p_Dtsec = (t_Dtsec *)h_Dtsec;
850296177Sjhibbits    t_DtsecMemMap       *p_DtsecMemMap;
851296177Sjhibbits
852296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
853296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_MemMap, E_NULL_POINTER);
854296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Statistics, E_NULL_POINTER);
855296177Sjhibbits
856296177Sjhibbits    if (p_Dtsec->statisticsLevel == e_FM_MAC_NONE_STATISTICS)
857296177Sjhibbits        RETURN_ERROR(MINOR, E_INVALID_STATE, ("Statistics disabled"));
858296177Sjhibbits
859296177Sjhibbits    p_DtsecMemMap = p_Dtsec->p_MemMap;
860296177Sjhibbits    memset(p_Statistics, 0xff, sizeof(t_FmMacStatistics));
861296177Sjhibbits
862296177Sjhibbits    if (p_Dtsec->statisticsLevel == e_FM_MAC_FULL_STATISTICS)
863296177Sjhibbits    {
864296177Sjhibbits        p_Statistics->eStatPkts64           = (MASK22BIT & GET_UINT32(p_DtsecMemMap->tr64))
865296177Sjhibbits                                                + p_Dtsec->internalStatistics.tr64;      /**< r-10G tr-DT 64 byte frame counter */
866296177Sjhibbits        p_Statistics->eStatPkts65to127      = (MASK22BIT & GET_UINT32(p_DtsecMemMap->tr127))
867296177Sjhibbits                                                + p_Dtsec->internalStatistics.tr127;     /**< r-10G 65 to 127 byte frame counter */
868296177Sjhibbits        p_Statistics->eStatPkts128to255     = (MASK22BIT & GET_UINT32(p_DtsecMemMap->tr255))
869296177Sjhibbits                                                + p_Dtsec->internalStatistics.tr255;     /**< r-10G 128 to 255 byte frame counter */
870296177Sjhibbits        p_Statistics->eStatPkts256to511     = (MASK22BIT & GET_UINT32(p_DtsecMemMap->tr511))
871296177Sjhibbits                                                + p_Dtsec->internalStatistics.tr511;     /**< r-10G 256 to 511 byte frame counter */
872296177Sjhibbits        p_Statistics->eStatPkts512to1023    = (MASK22BIT & GET_UINT32(p_DtsecMemMap->tr1k))
873296177Sjhibbits                                                + p_Dtsec->internalStatistics.tr1k;      /**< r-10G 512 to 1023 byte frame counter */
874296177Sjhibbits        p_Statistics->eStatPkts1024to1518   = (MASK22BIT & GET_UINT32(p_DtsecMemMap->trmax))
875296177Sjhibbits                                                + p_Dtsec->internalStatistics.trmax;     /**< r-10G 1024 to 1518 byte frame counter */
876296177Sjhibbits        p_Statistics->eStatPkts1519to1522   = (MASK22BIT & GET_UINT32(p_DtsecMemMap->trmgv))
877296177Sjhibbits                                                + p_Dtsec->internalStatistics.trmgv;     /**< r-10G 1519 to 1522 byte good frame count */
878296177Sjhibbits        /* MIB II */
879296177Sjhibbits        p_Statistics->ifInOctets            = GET_UINT32(p_DtsecMemMap->rbyt)
880296177Sjhibbits                                                + p_Dtsec->internalStatistics.rbyt;                  /**< Total number of byte received. */
881296177Sjhibbits        p_Statistics->ifInPkts              = (MASK22BIT & GET_UINT32(p_DtsecMemMap->rpkt))
882296177Sjhibbits                                                + p_Dtsec->internalStatistics.rpkt;    /**< Total number of packets received.*/
883296177Sjhibbits        p_Statistics->ifInMcastPkts         = (MASK22BIT & GET_UINT32(p_DtsecMemMap->rmca))
884296177Sjhibbits                                                + p_Dtsec->internalStatistics.rmca;    /**< Total number of multicast frame received*/
885296177Sjhibbits        p_Statistics->ifInBcastPkts         = (MASK22BIT & GET_UINT32(p_DtsecMemMap->rbca))
886296177Sjhibbits                                                + p_Dtsec->internalStatistics.rbca;    /**< Total number of broadcast frame received */
887296177Sjhibbits        p_Statistics->ifOutOctets           = GET_UINT32(p_DtsecMemMap->tbyt)
888296177Sjhibbits                                                + p_Dtsec->internalStatistics.tbyt;                  /**< Total number of byte sent. */
889296177Sjhibbits        p_Statistics->ifOutPkts             = (MASK22BIT & GET_UINT32(p_DtsecMemMap->tpkt))
890296177Sjhibbits                                                + p_Dtsec->internalStatistics.tpkt;    /**< Total number of packets sent .*/
891296177Sjhibbits        p_Statistics->ifOutMcastPkts        = (MASK22BIT & GET_UINT32(p_DtsecMemMap->tmca))
892296177Sjhibbits                                                + p_Dtsec->internalStatistics.tmca;    /**< Total number of multicast frame sent */
893296177Sjhibbits        p_Statistics->ifOutBcastPkts        = (MASK22BIT & GET_UINT32(p_DtsecMemMap->tbca))
894296177Sjhibbits                                                + p_Dtsec->internalStatistics.tbca;    /**< Total number of multicast frame sent */
895296177Sjhibbits    }
896296177Sjhibbits/* */
897296177Sjhibbits    p_Statistics->eStatFragments        = (MASK16BIT & GET_UINT32(p_DtsecMemMap->rfrg))
898296177Sjhibbits                                            + p_Dtsec->internalStatistics.rfrg;      /**< Total number of packets that were less than 64 octets long with a wrong CRC.*/
899296177Sjhibbits    p_Statistics->eStatJabbers          = (MASK16BIT & GET_UINT32(p_DtsecMemMap->rjbr))
900296177Sjhibbits                                            + p_Dtsec->internalStatistics.rjbr;      /**< Total number of packets longer than valid maximum length octets */
901296177Sjhibbits
902296177Sjhibbits    p_Statistics->eStatsDropEvents      = (MASK16BIT & GET_UINT32(p_DtsecMemMap->rdrp))
903296177Sjhibbits                                            + p_Dtsec->internalStatistics.rdrp;      /**< number of dropped packets due to internal errors of the MAC Client. */
904296177Sjhibbits    p_Statistics->eStatCRCAlignErrors   = (MASK16BIT & GET_UINT32(p_DtsecMemMap->raln))
905296177Sjhibbits                                            + p_Dtsec->internalStatistics.raln;      /**< Incremented when frames of correct length but with CRC error are received.*/
906296177Sjhibbits
907296177Sjhibbits    p_Statistics->eStatUndersizePkts    = (MASK16BIT & GET_UINT32(p_DtsecMemMap->rund))
908296177Sjhibbits                                            + p_Dtsec->internalStatistics.rund;      /**< Total number of packets that were less than 64 octets long with a good CRC.*/
909296177Sjhibbits    p_Statistics->eStatOversizePkts     = (MASK16BIT & GET_UINT32(p_DtsecMemMap->rovr))
910296177Sjhibbits                                            + p_Dtsec->internalStatistics.rovr;      /**< T,B.D*/
911296177Sjhibbits/* Pause */
912296177Sjhibbits    p_Statistics->reStatPause           = (MASK16BIT & GET_UINT32(p_DtsecMemMap->rxpf))
913296177Sjhibbits                                            + p_Dtsec->internalStatistics.rxpf;      /**< Pause MAC Control received */
914296177Sjhibbits    p_Statistics->teStatPause           = (MASK16BIT & GET_UINT32(p_DtsecMemMap->txpf))
915296177Sjhibbits                                            + p_Dtsec->internalStatistics.txpf;      /**< Pause MAC Control sent */
916296177Sjhibbits
917296177Sjhibbits    p_Statistics->ifInDiscards          = p_Statistics->eStatsDropEvents;                    /**< Frames received, but discarded due to problems within the MAC RX. */
918296177Sjhibbits
919296177Sjhibbits    p_Statistics->ifInErrors            = p_Statistics->eStatsDropEvents
920296177Sjhibbits                                        + p_Statistics->eStatCRCAlignErrors
921296177Sjhibbits                                        + (MASK16BIT & GET_UINT32(p_DtsecMemMap->rflr))
922296177Sjhibbits                                        + p_Dtsec->internalStatistics.rflr
923296177Sjhibbits                                        + (MASK16BIT & GET_UINT32(p_DtsecMemMap->rcde))
924296177Sjhibbits                                        + p_Dtsec->internalStatistics.rcde
925296177Sjhibbits                                        + (MASK16BIT & GET_UINT32(p_DtsecMemMap->rcse))
926296177Sjhibbits                                        + p_Dtsec->internalStatistics.rcse;
927296177Sjhibbits
928296177Sjhibbits    p_Statistics->ifOutDiscards         = (MASK16BIT & GET_UINT32(p_DtsecMemMap->tdrp))
929296177Sjhibbits                                            + p_Dtsec->internalStatistics.tdrp;     /**< Frames received, but discarded due to problems within the MAC TX N/A!.*/
930296177Sjhibbits    p_Statistics->ifOutErrors           = p_Statistics->ifOutDiscards                                           /**< Number of frames transmitted with error: */
931296177Sjhibbits                                        + (MASK12BIT & GET_UINT32(p_DtsecMemMap->tfcs))
932296177Sjhibbits                                        + p_Dtsec->internalStatistics.tfcs;
933296177Sjhibbits
934296177Sjhibbits    return E_OK;
935296177Sjhibbits}
936296177Sjhibbits
937296177Sjhibbits/* .............................................................................. */
938296177Sjhibbits
939296177Sjhibbitsstatic t_Error DtsecModifyMacAddress (t_Handle h_Dtsec, t_EnetAddr *p_EnetAddr)
940296177Sjhibbits{
941296177Sjhibbits    t_Dtsec              *p_Dtsec = (t_Dtsec *)h_Dtsec;
942296177Sjhibbits    t_DtsecMemMap        *p_DtsecMemMap;
943296177Sjhibbits    uint32_t              tmpReg32 = 0;
944296177Sjhibbits    uint64_t              addr;
945296177Sjhibbits
946296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
947296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_MemMap, E_NULL_POINTER);
948296177Sjhibbits
949296177Sjhibbits    p_DtsecMemMap = p_Dtsec->p_MemMap;
950296177Sjhibbits    /* Initialize MAC Station Address registers (1 & 2)    */
951296177Sjhibbits    /* Station address have to be swapped (big endian to little endian */
952296177Sjhibbits    addr = ((*(uint64_t *)p_EnetAddr) >> 16);
953296177Sjhibbits    p_Dtsec->addr = addr;
954296177Sjhibbits
955296177Sjhibbits    tmpReg32 = (uint32_t)(addr);
956296177Sjhibbits    SwapUint32P(&tmpReg32);
957296177Sjhibbits    WRITE_UINT32(p_DtsecMemMap->macstnaddr1, tmpReg32);
958296177Sjhibbits
959296177Sjhibbits    tmpReg32 = (uint32_t)(addr>>32);
960296177Sjhibbits    SwapUint32P(&tmpReg32);
961296177Sjhibbits    WRITE_UINT32(p_DtsecMemMap->macstnaddr2, tmpReg32);
962296177Sjhibbits
963296177Sjhibbits    return E_OK;
964296177Sjhibbits}
965296177Sjhibbits
966296177Sjhibbits/* .............................................................................. */
967296177Sjhibbits
968296177Sjhibbitsstatic t_Error DtsecResetCounters (t_Handle h_Dtsec)
969296177Sjhibbits{
970296177Sjhibbits    t_Dtsec          *p_Dtsec = (t_Dtsec *)h_Dtsec;
971296177Sjhibbits
972296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
973296177Sjhibbits
974296177Sjhibbits    /* clear HW counters */
975296177Sjhibbits    WRITE_UINT32(p_Dtsec->p_MemMap->ecntrl, GET_UINT32(p_Dtsec->p_MemMap->ecntrl) | ECNTRL_CLRCNT);
976296177Sjhibbits
977296177Sjhibbits    /* clear SW counters holding carries */
978296177Sjhibbits    memset((char *)&p_Dtsec->internalStatistics, (char)0x0, sizeof(t_InternalStatistics));
979296177Sjhibbits
980296177Sjhibbits    return E_OK;
981296177Sjhibbits}
982296177Sjhibbits
983296177Sjhibbits/* .............................................................................. */
984296177Sjhibbits
985296177Sjhibbitsstatic t_Error DtsecAddExactMatchMacAddress(t_Handle h_Dtsec, t_EnetAddr *p_EthAddr)
986296177Sjhibbits{
987296177Sjhibbits    t_Dtsec   *p_Dtsec = (t_Dtsec *) h_Dtsec;
988296177Sjhibbits    uint64_t  ethAddr;
989296177Sjhibbits    uint8_t   paddrNum;
990296177Sjhibbits
991296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
992296177Sjhibbits
993296177Sjhibbits    ethAddr = ((*(uint64_t *)p_EthAddr) >> 16);
994296177Sjhibbits
995296177Sjhibbits    if (ethAddr & GROUP_ADDRESS)
996296177Sjhibbits        /* Multicast address has no effect in PADDR */
997296177Sjhibbits        RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Multicast address"));
998296177Sjhibbits
999296177Sjhibbits    /* Make sure no PADDR contains this address */
1000296177Sjhibbits    for (paddrNum = 0; paddrNum < DTSEC_NUM_OF_PADDRS; paddrNum++)
1001296177Sjhibbits        if (p_Dtsec->indAddrRegUsed[paddrNum])
1002296177Sjhibbits            if (p_Dtsec->paddr[paddrNum] == ethAddr)
1003296177Sjhibbits                RETURN_ERROR(MAJOR, E_ALREADY_EXISTS, NO_MSG);
1004296177Sjhibbits
1005296177Sjhibbits    /* Find first unused PADDR */
1006296177Sjhibbits    for (paddrNum = 0; paddrNum < DTSEC_NUM_OF_PADDRS; paddrNum++)
1007296177Sjhibbits        if (!(p_Dtsec->indAddrRegUsed[paddrNum]))
1008296177Sjhibbits        {
1009296177Sjhibbits            /* mark this PADDR as used */
1010296177Sjhibbits            p_Dtsec->indAddrRegUsed[paddrNum] = TRUE;
1011296177Sjhibbits            /* store address */
1012296177Sjhibbits            p_Dtsec->paddr[paddrNum] = ethAddr;
1013296177Sjhibbits
1014296177Sjhibbits            /* put in hardware */
1015296177Sjhibbits            HardwareAddAddrInPaddr(p_Dtsec, &ethAddr, paddrNum);
1016296177Sjhibbits            p_Dtsec->numOfIndAddrInRegs++;
1017296177Sjhibbits
1018296177Sjhibbits            return E_OK;
1019296177Sjhibbits        }
1020296177Sjhibbits
1021296177Sjhibbits    /* No free PADDR */
1022296177Sjhibbits    RETURN_ERROR(MAJOR, E_FULL, NO_MSG);
1023296177Sjhibbits}
1024296177Sjhibbits
1025296177Sjhibbits/* .............................................................................. */
1026296177Sjhibbits
1027296177Sjhibbitsstatic t_Error DtsecDelExactMatchMacAddress(t_Handle h_Dtsec, t_EnetAddr *p_EthAddr)
1028296177Sjhibbits{
1029296177Sjhibbits    t_Dtsec   *p_Dtsec = (t_Dtsec *) h_Dtsec;
1030296177Sjhibbits    uint64_t  ethAddr;
1031296177Sjhibbits    uint8_t   paddrNum;
1032296177Sjhibbits
1033296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
1034296177Sjhibbits
1035296177Sjhibbits    ethAddr = ((*(uint64_t *)p_EthAddr) >> 16);
1036296177Sjhibbits
1037296177Sjhibbits    /* Find used PADDR containing this address */
1038296177Sjhibbits    for (paddrNum = 0; paddrNum < DTSEC_NUM_OF_PADDRS; paddrNum++)
1039296177Sjhibbits    {
1040296177Sjhibbits        if ((p_Dtsec->indAddrRegUsed[paddrNum]) &&
1041296177Sjhibbits            (p_Dtsec->paddr[paddrNum] == ethAddr))
1042296177Sjhibbits        {
1043296177Sjhibbits            /* mark this PADDR as not used */
1044296177Sjhibbits            p_Dtsec->indAddrRegUsed[paddrNum] = FALSE;
1045296177Sjhibbits            /* clear in hardware */
1046296177Sjhibbits            HardwareClearAddrInPaddr(p_Dtsec, paddrNum);
1047296177Sjhibbits            p_Dtsec->numOfIndAddrInRegs--;
1048296177Sjhibbits
1049296177Sjhibbits            return E_OK;
1050296177Sjhibbits        }
1051296177Sjhibbits    }
1052296177Sjhibbits
1053296177Sjhibbits    RETURN_ERROR(MAJOR, E_NOT_FOUND, NO_MSG);
1054296177Sjhibbits}
1055296177Sjhibbits
1056296177Sjhibbits/* .............................................................................. */
1057296177Sjhibbits
1058296177Sjhibbitsstatic t_Error DtsecAddHashMacAddress(t_Handle h_Dtsec, t_EnetAddr *p_EthAddr)
1059296177Sjhibbits{
1060296177Sjhibbits    t_Dtsec         *p_Dtsec = (t_Dtsec *)h_Dtsec;
1061296177Sjhibbits    t_DtsecMemMap   *p_DtsecMemMap;
1062296177Sjhibbits    uint32_t        crc;
1063296177Sjhibbits    uint8_t         crcMirror, reg;
1064296177Sjhibbits    uint32_t        bitMask;
1065296177Sjhibbits    t_EthHashEntry  *p_HashEntry;
1066296177Sjhibbits    uint64_t        ethAddr;
1067296177Sjhibbits
1068296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
1069296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_MemMap, E_NULL_POINTER);
1070296177Sjhibbits
1071296177Sjhibbits    p_DtsecMemMap = p_Dtsec->p_MemMap;
1072296177Sjhibbits
1073296177Sjhibbits    ethAddr = ((*(uint64_t *)p_EthAddr) >> 16);
1074296177Sjhibbits
1075296177Sjhibbits    /* CRC calculation */
1076296177Sjhibbits    GET_MAC_ADDR_CRC(ethAddr, crc);
1077296177Sjhibbits
1078296177Sjhibbits    /* calculate the "crc mirror" */
1079296177Sjhibbits    crcMirror = MIRROR((uint8_t)crc);
1080296177Sjhibbits
1081296177Sjhibbits    /* 3 MSB bits define the register */
1082296177Sjhibbits    reg = (uint8_t)(crcMirror >> 5);
1083296177Sjhibbits    /* 5 LSB bits define the bit within the register */
1084296177Sjhibbits    bitMask =  0x80000000 >> (crcMirror & 0x1f);
1085296177Sjhibbits
1086296177Sjhibbits    /* Create element to be added to the driver hash table */
1087296177Sjhibbits    p_HashEntry = (t_EthHashEntry *)XX_Malloc(sizeof(t_EthHashEntry));
1088296177Sjhibbits    p_HashEntry->addr = ethAddr;
1089296177Sjhibbits    INIT_LIST(&p_HashEntry->node);
1090296177Sjhibbits
1091296177Sjhibbits    if (ethAddr & GROUP_ADDRESS)
1092296177Sjhibbits    {
1093296177Sjhibbits        /* Group Address */
1094296177Sjhibbits        LIST_AddToTail(&(p_HashEntry->node), &(p_Dtsec->p_MulticastAddrHash->p_Lsts[crcMirror]));
1095296177Sjhibbits        /* Set the appropriate bit in GADDR0-7 */
1096296177Sjhibbits        WRITE_UINT32(p_DtsecMemMap->gaddr[reg],
1097296177Sjhibbits                     GET_UINT32(p_DtsecMemMap->gaddr[reg]) | bitMask);
1098296177Sjhibbits    }
1099296177Sjhibbits    else
1100296177Sjhibbits    {
1101296177Sjhibbits        LIST_AddToTail(&(p_HashEntry->node), &(p_Dtsec->p_UnicastAddrHash->p_Lsts[crcMirror]));
1102296177Sjhibbits        /* Set the appropriate bit in IADDR0-7 */
1103296177Sjhibbits        WRITE_UINT32(p_DtsecMemMap->igaddr[reg],
1104296177Sjhibbits                     GET_UINT32(p_DtsecMemMap->igaddr[reg]) | bitMask);
1105296177Sjhibbits    }
1106296177Sjhibbits
1107296177Sjhibbits    return E_OK;
1108296177Sjhibbits}
1109296177Sjhibbits
1110296177Sjhibbits/* .............................................................................. */
1111296177Sjhibbits
1112296177Sjhibbitsstatic t_Error DtsecDelHashMacAddress(t_Handle h_Dtsec, t_EnetAddr *p_EthAddr)
1113296177Sjhibbits{
1114296177Sjhibbits    t_Dtsec         *p_Dtsec = (t_Dtsec *)h_Dtsec;
1115296177Sjhibbits    t_DtsecMemMap   *p_DtsecMemMap;
1116296177Sjhibbits    t_List          *p_Pos;
1117296177Sjhibbits    uint32_t        crc;
1118296177Sjhibbits    uint8_t         crcMirror, reg;
1119296177Sjhibbits    uint32_t        bitMask;
1120296177Sjhibbits    t_EthHashEntry  *p_HashEntry = NULL;
1121296177Sjhibbits    uint64_t        ethAddr;
1122296177Sjhibbits
1123296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
1124296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_MemMap, E_NULL_POINTER);
1125296177Sjhibbits
1126296177Sjhibbits    p_DtsecMemMap = p_Dtsec->p_MemMap;
1127296177Sjhibbits
1128296177Sjhibbits    ethAddr = ((*(uint64_t *)p_EthAddr) >> 16);
1129296177Sjhibbits
1130296177Sjhibbits    /* CRC calculation */
1131296177Sjhibbits    GET_MAC_ADDR_CRC(ethAddr, crc);
1132296177Sjhibbits
1133296177Sjhibbits    /* calculate the "crc mirror" */
1134296177Sjhibbits    crcMirror = MIRROR((uint8_t)crc);
1135296177Sjhibbits
1136296177Sjhibbits    /* 3 MSB bits define the register */
1137296177Sjhibbits    reg =(uint8_t)( crcMirror >> 5);
1138296177Sjhibbits    /* 5 LSB bits define the bit within the register */
1139296177Sjhibbits    bitMask =  0x80000000 >> (crcMirror & 0x1f);
1140296177Sjhibbits
1141296177Sjhibbits    if (ethAddr & GROUP_ADDRESS)
1142296177Sjhibbits    {
1143296177Sjhibbits        /* Group Address */
1144296177Sjhibbits        LIST_FOR_EACH(p_Pos, &(p_Dtsec->p_MulticastAddrHash->p_Lsts[crcMirror]))
1145296177Sjhibbits        {
1146296177Sjhibbits            p_HashEntry = ETH_HASH_ENTRY_OBJ(p_Pos);
1147296177Sjhibbits            if(p_HashEntry->addr == ethAddr)
1148296177Sjhibbits            {
1149296177Sjhibbits                LIST_DelAndInit(&p_HashEntry->node);
1150296177Sjhibbits                XX_Free(p_HashEntry);
1151296177Sjhibbits                break;
1152296177Sjhibbits            }
1153296177Sjhibbits        }
1154296177Sjhibbits        if(LIST_IsEmpty(&p_Dtsec->p_MulticastAddrHash->p_Lsts[crcMirror]))
1155296177Sjhibbits            WRITE_UINT32(p_DtsecMemMap->gaddr[reg],
1156296177Sjhibbits                         GET_UINT32(p_DtsecMemMap->gaddr[reg]) & ~bitMask);
1157296177Sjhibbits    }
1158296177Sjhibbits    else
1159296177Sjhibbits    {
1160296177Sjhibbits        /* Individual Address */
1161296177Sjhibbits        LIST_FOR_EACH(p_Pos, &(p_Dtsec->p_UnicastAddrHash->p_Lsts[crcMirror]))
1162296177Sjhibbits        {
1163296177Sjhibbits            p_HashEntry = ETH_HASH_ENTRY_OBJ(p_Pos);
1164296177Sjhibbits            if(p_HashEntry->addr == ethAddr)
1165296177Sjhibbits            {
1166296177Sjhibbits                LIST_DelAndInit(&p_HashEntry->node);
1167296177Sjhibbits                XX_Free(p_HashEntry);
1168296177Sjhibbits                break;
1169296177Sjhibbits            }
1170296177Sjhibbits        }
1171296177Sjhibbits        if(LIST_IsEmpty(&p_Dtsec->p_UnicastAddrHash->p_Lsts[crcMirror]))
1172296177Sjhibbits            WRITE_UINT32(p_DtsecMemMap->igaddr[reg],
1173296177Sjhibbits                         GET_UINT32(p_DtsecMemMap->igaddr[reg]) & ~bitMask);
1174296177Sjhibbits    }
1175296177Sjhibbits
1176296177Sjhibbits    /* address does not exist */
1177296177Sjhibbits    ASSERT_COND(p_HashEntry != NULL);
1178296177Sjhibbits
1179296177Sjhibbits    return E_OK;
1180296177Sjhibbits}
1181296177Sjhibbits
1182296177Sjhibbits
1183296177Sjhibbits/* .............................................................................. */
1184296177Sjhibbits
1185296177Sjhibbitsstatic t_Error DtsecSetPromiscuous(t_Handle h_Dtsec, bool newVal)
1186296177Sjhibbits{
1187296177Sjhibbits    t_Dtsec         *p_Dtsec = (t_Dtsec *)h_Dtsec;
1188296177Sjhibbits    t_DtsecMemMap   *p_DtsecMemMap;
1189296177Sjhibbits    uint32_t        tmpReg32;
1190296177Sjhibbits
1191296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
1192296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_HANDLE);
1193296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_MemMap, E_NULL_POINTER);
1194296177Sjhibbits
1195296177Sjhibbits    p_DtsecMemMap = p_Dtsec->p_MemMap;
1196296177Sjhibbits
1197296177Sjhibbits    tmpReg32 = GET_UINT32(p_DtsecMemMap->rctrl);
1198296177Sjhibbits
1199296177Sjhibbits    if (newVal)
1200296177Sjhibbits        tmpReg32 |= RCTRL_PROM;
1201296177Sjhibbits    else
1202296177Sjhibbits        tmpReg32 &= ~RCTRL_PROM;
1203296177Sjhibbits
1204296177Sjhibbits    WRITE_UINT32(p_DtsecMemMap->rctrl, tmpReg32);
1205296177Sjhibbits
1206296177Sjhibbits    return E_OK;
1207296177Sjhibbits}
1208296177Sjhibbits
1209296177Sjhibbits/* .............................................................................. */
1210296177Sjhibbits
1211296177Sjhibbitsstatic t_Error DtsecSetStatistics(t_Handle h_Dtsec, e_FmMacStatisticsLevel statisticsLevel)
1212296177Sjhibbits{
1213296177Sjhibbits    t_Dtsec         *p_Dtsec = (t_Dtsec *)h_Dtsec;
1214296177Sjhibbits    t_DtsecMemMap   *p_DtsecMemMap;
1215296177Sjhibbits
1216296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
1217296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_MemMap, E_NULL_POINTER);
1218296177Sjhibbits
1219296177Sjhibbits    p_DtsecMemMap = p_Dtsec->p_MemMap;
1220296177Sjhibbits
1221296177Sjhibbits    p_Dtsec->statisticsLevel = statisticsLevel;
1222296177Sjhibbits
1223296177Sjhibbits    switch (p_Dtsec->statisticsLevel)
1224296177Sjhibbits    {
1225296177Sjhibbits        case(e_FM_MAC_NONE_STATISTICS):
1226296177Sjhibbits            WRITE_UINT32(p_DtsecMemMap->cam1,0xffffffff);
1227296177Sjhibbits            WRITE_UINT32(p_DtsecMemMap->cam2,0xffffffff);
1228296177Sjhibbits            WRITE_UINT32(p_DtsecMemMap->ecntrl, GET_UINT32(p_DtsecMemMap->ecntrl) & ~ECNTRL_STEN);
1229296177Sjhibbits            WRITE_UINT32(p_DtsecMemMap->imask, GET_UINT32(p_DtsecMemMap->imask) & ~IMASK_MSROEN);
1230296177Sjhibbits            p_Dtsec->exceptions &= ~IMASK_MSROEN;
1231296177Sjhibbits            break;
1232296177Sjhibbits        case(e_FM_MAC_PARTIAL_STATISTICS):
1233296177Sjhibbits            WRITE_UINT32(p_DtsecMemMap->cam1, CAM1_ERRORS_ONLY);
1234296177Sjhibbits            WRITE_UINT32(p_DtsecMemMap->cam2, CAM2_ERRORS_ONLY);
1235296177Sjhibbits            WRITE_UINT32(p_DtsecMemMap->ecntrl, GET_UINT32(p_DtsecMemMap->ecntrl) | ECNTRL_STEN);
1236296177Sjhibbits            WRITE_UINT32(p_DtsecMemMap->imask, GET_UINT32(p_DtsecMemMap->imask) | IMASK_MSROEN);
1237296177Sjhibbits            p_Dtsec->exceptions |= IMASK_MSROEN;
1238296177Sjhibbits            break;
1239296177Sjhibbits        case(e_FM_MAC_FULL_STATISTICS):
1240296177Sjhibbits            WRITE_UINT32(p_DtsecMemMap->cam1,0);
1241296177Sjhibbits            WRITE_UINT32(p_DtsecMemMap->cam2,0);
1242296177Sjhibbits            WRITE_UINT32(p_DtsecMemMap->ecntrl, GET_UINT32(p_DtsecMemMap->ecntrl) | ECNTRL_STEN);
1243296177Sjhibbits            WRITE_UINT32(p_DtsecMemMap->imask, GET_UINT32(p_DtsecMemMap->imask) | IMASK_MSROEN);
1244296177Sjhibbits            p_Dtsec->exceptions |= IMASK_MSROEN;
1245296177Sjhibbits            break;
1246296177Sjhibbits        default:
1247296177Sjhibbits            RETURN_ERROR(MINOR, E_INVALID_SELECTION, NO_MSG);
1248296177Sjhibbits    }
1249296177Sjhibbits
1250296177Sjhibbits    return E_OK;
1251296177Sjhibbits}
1252296177Sjhibbits
1253296177Sjhibbits/* .............................................................................. */
1254296177Sjhibbits
1255296177Sjhibbitsstatic t_Error DtsecAdjustLink(t_Handle h_Dtsec, e_EnetSpeed speed, bool fullDuplex)
1256296177Sjhibbits{
1257296177Sjhibbits    t_Dtsec         *p_Dtsec = (t_Dtsec *)h_Dtsec;
1258296177Sjhibbits    t_DtsecMemMap   *p_DtsecMemMap;
1259296177Sjhibbits    uint32_t        tmpReg32;
1260296177Sjhibbits
1261296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
1262296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_HANDLE);
1263296177Sjhibbits    p_DtsecMemMap = p_Dtsec->p_MemMap;
1264296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_DtsecMemMap, E_INVALID_HANDLE);
1265296177Sjhibbits
1266296177Sjhibbits    if ((!fullDuplex) && (speed >= e_ENET_SPEED_1000))
1267296177Sjhibbits        RETURN_ERROR(MAJOR, E_CONFLICT, ("Ethernet interface does not support Half Duplex mode"));
1268296177Sjhibbits
1269296177Sjhibbits    p_Dtsec->enetMode = MAKE_ENET_MODE(ENET_INTERFACE_FROM_MODE(p_Dtsec->enetMode), speed);
1270296177Sjhibbits    p_Dtsec->halfDuplex = !fullDuplex;
1271296177Sjhibbits
1272296177Sjhibbits    tmpReg32 = GET_UINT32(p_DtsecMemMap->maccfg2);
1273296177Sjhibbits    if(p_Dtsec->halfDuplex)
1274296177Sjhibbits        tmpReg32 &= ~MACCFG2_FULL_DUPLEX;
1275296177Sjhibbits    else
1276296177Sjhibbits        tmpReg32 |= MACCFG2_FULL_DUPLEX;
1277296177Sjhibbits
1278296177Sjhibbits    tmpReg32 &= ~(MACCFG2_NIBBLE_MODE | MACCFG2_BYTE_MODE);
1279296177Sjhibbits    if((p_Dtsec->enetMode == e_ENET_MODE_RGMII_10) ||
1280296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_RGMII_100)||
1281296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_SGMII_10) ||
1282296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_SGMII_100))
1283296177Sjhibbits            tmpReg32 |= MACCFG2_NIBBLE_MODE;
1284296177Sjhibbits    else if((p_Dtsec->enetMode == e_ENET_MODE_RGMII_1000) ||
1285296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_SGMII_1000)||
1286296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_GMII_1000))
1287296177Sjhibbits            tmpReg32 |= MACCFG2_BYTE_MODE;
1288296177Sjhibbits    WRITE_UINT32(p_DtsecMemMap->maccfg2, tmpReg32);
1289296177Sjhibbits
1290296177Sjhibbits    tmpReg32 = GET_UINT32(p_DtsecMemMap->ecntrl);
1291296177Sjhibbits    if (!(tmpReg32 & ECNTRL_CFG_RO))
1292296177Sjhibbits    {
1293296177Sjhibbits        if ((p_Dtsec->enetMode == e_ENET_MODE_RGMII_100) ||
1294296177Sjhibbits            (p_Dtsec->enetMode == e_ENET_MODE_SGMII_100))
1295296177Sjhibbits            tmpReg32 |= ECNTRL_R100M;
1296296177Sjhibbits        else
1297296177Sjhibbits            tmpReg32 &= ~ECNTRL_R100M;
1298296177Sjhibbits        WRITE_UINT32(p_DtsecMemMap->ecntrl, tmpReg32);
1299296177Sjhibbits    }
1300296177Sjhibbits
1301296177Sjhibbits    return E_OK;
1302296177Sjhibbits}
1303296177Sjhibbits
1304296177Sjhibbits/* .............................................................................. */
1305296177Sjhibbits
1306296177Sjhibbitsstatic t_Error DtsecGetId(t_Handle h_Dtsec, uint32_t *macId)
1307296177Sjhibbits{
1308296177Sjhibbits    t_Dtsec              *p_Dtsec = (t_Dtsec *)h_Dtsec;
1309296177Sjhibbits
1310296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
1311296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_HANDLE);
1312296177Sjhibbits
1313296177Sjhibbits    *macId = p_Dtsec->macId;
1314296177Sjhibbits
1315296177Sjhibbits    return E_OK;
1316296177Sjhibbits}
1317296177Sjhibbits
1318296177Sjhibbits/* .............................................................................. */
1319296177Sjhibbits
1320296177Sjhibbitsstatic t_Error DtsecGetVersion(t_Handle h_Dtsec, uint32_t *macVersion)
1321296177Sjhibbits{
1322296177Sjhibbits    t_Dtsec              *p_Dtsec = (t_Dtsec *)h_Dtsec;
1323296177Sjhibbits    t_DtsecMemMap        *p_DtsecMemMap;
1324296177Sjhibbits
1325296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
1326296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_HANDLE);
1327296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_MemMap, E_NULL_POINTER);
1328296177Sjhibbits
1329296177Sjhibbits    p_DtsecMemMap = p_Dtsec->p_MemMap;
1330296177Sjhibbits    *macVersion = GET_UINT32(p_DtsecMemMap->tsec_id1);
1331296177Sjhibbits
1332296177Sjhibbits    return E_OK;
1333296177Sjhibbits}
1334296177Sjhibbits
1335296177Sjhibbits/* .............................................................................. */
1336296177Sjhibbits
1337296177Sjhibbitsstatic t_Error DtsecSetException(t_Handle h_Dtsec, e_FmMacExceptions exception, bool enable)
1338296177Sjhibbits{
1339296177Sjhibbits    t_Dtsec             *p_Dtsec = (t_Dtsec *)h_Dtsec;
1340296177Sjhibbits    uint32_t            tmpReg, bitMask = 0;
1341296177Sjhibbits    t_DtsecMemMap       *p_DtsecMemMap;
1342296177Sjhibbits
1343296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
1344296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(!p_Dtsec->p_DtsecDriverParam, E_INVALID_HANDLE);
1345296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_MemMap, E_NULL_POINTER);
1346296177Sjhibbits
1347296177Sjhibbits    p_DtsecMemMap = p_Dtsec->p_MemMap;
1348296177Sjhibbits
1349296177Sjhibbits    if(exception != e_FM_MAC_EX_1G_1588_TS_RX_ERR)
1350296177Sjhibbits    {
1351296177Sjhibbits        GET_EXCEPTION_FLAG(bitMask, exception);
1352296177Sjhibbits        if(bitMask)
1353296177Sjhibbits        {
1354296177Sjhibbits            if (enable)
1355296177Sjhibbits                p_Dtsec->exceptions |= bitMask;
1356296177Sjhibbits            else
1357296177Sjhibbits                p_Dtsec->exceptions &= ~bitMask;
1358296177Sjhibbits       }
1359296177Sjhibbits        else
1360296177Sjhibbits            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined exception"));
1361296177Sjhibbits
1362296177Sjhibbits        tmpReg = GET_UINT32(p_DtsecMemMap->imask);
1363296177Sjhibbits        if(enable)
1364296177Sjhibbits            tmpReg |= bitMask;
1365296177Sjhibbits        else
1366296177Sjhibbits            tmpReg &= ~bitMask;
1367296177Sjhibbits        WRITE_UINT32(p_DtsecMemMap->imask, tmpReg);
1368296177Sjhibbits
1369296177Sjhibbits        /* warn if MIB OVFL is disabled and statistic gathering is enabled */
1370296177Sjhibbits        if((exception == e_FM_MAC_EX_1G_RX_MIB_CNT_OVFL) &&
1371296177Sjhibbits                !enable &&
1372296177Sjhibbits                (p_Dtsec->statisticsLevel != e_FM_MAC_NONE_STATISTICS))
1373296177Sjhibbits            DBG(WARNING, ("Disabled MIB counters overflow exceptions. Counters value may be inaccurate due to unregistered overflow"));
1374296177Sjhibbits
1375296177Sjhibbits    }
1376296177Sjhibbits    else
1377296177Sjhibbits    {
1378296177Sjhibbits        if(!p_Dtsec->ptpTsuEnabled)
1379296177Sjhibbits            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Exception valid for 1588 only"));
1380296177Sjhibbits        tmpReg = GET_UINT32(p_DtsecMemMap->tmr_pemask);
1381296177Sjhibbits        switch(exception){
1382296177Sjhibbits        case(e_FM_MAC_EX_1G_1588_TS_RX_ERR):
1383296177Sjhibbits            if(enable)
1384296177Sjhibbits            {
1385296177Sjhibbits                p_Dtsec->enTsuErrExeption = TRUE;
1386296177Sjhibbits                WRITE_UINT32(p_DtsecMemMap->tmr_pemask, tmpReg | PEMASK_TSRE);
1387296177Sjhibbits            }
1388296177Sjhibbits            else
1389296177Sjhibbits            {
1390296177Sjhibbits                p_Dtsec->enTsuErrExeption = FALSE;
1391296177Sjhibbits                WRITE_UINT32(p_DtsecMemMap->tmr_pemask, tmpReg & ~PEMASK_TSRE);
1392296177Sjhibbits            }
1393296177Sjhibbits            break;
1394296177Sjhibbits        default:
1395296177Sjhibbits            RETURN_ERROR(MAJOR, E_INVALID_VALUE, ("Undefined exception"));
1396296177Sjhibbits        }
1397296177Sjhibbits    }
1398296177Sjhibbits
1399296177Sjhibbits    return E_OK;
1400296177Sjhibbits}
1401296177Sjhibbits
1402296177Sjhibbits/* ........................................................................... */
1403296177Sjhibbits
1404296177Sjhibbits#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
1405296177Sjhibbitsstatic t_Error DtsecDumpRegs(t_Handle h_Dtsec)
1406296177Sjhibbits{
1407296177Sjhibbits    t_Dtsec *p_Dtsec = (t_Dtsec *)h_Dtsec;
1408296177Sjhibbits    int i = 0;
1409296177Sjhibbits
1410296177Sjhibbits    DECLARE_DUMP;
1411296177Sjhibbits
1412296177Sjhibbits    if (p_Dtsec->p_MemMap)
1413296177Sjhibbits    {
1414296177Sjhibbits
1415296177Sjhibbits        DUMP_TITLE(p_Dtsec->p_MemMap, ("MAC %d: ", p_Dtsec->macId));
1416296177Sjhibbits        DUMP_VAR(p_Dtsec->p_MemMap, tsec_id1);
1417296177Sjhibbits        DUMP_VAR(p_Dtsec->p_MemMap, tsec_id2);
1418296177Sjhibbits        DUMP_VAR(p_Dtsec->p_MemMap, ievent);
1419296177Sjhibbits        DUMP_VAR(p_Dtsec->p_MemMap, imask);
1420296177Sjhibbits        DUMP_VAR(p_Dtsec->p_MemMap, edis);
1421296177Sjhibbits        DUMP_VAR(p_Dtsec->p_MemMap, ecntrl);
1422296177Sjhibbits        DUMP_VAR(p_Dtsec->p_MemMap, ptv);
1423296177Sjhibbits        DUMP_VAR(p_Dtsec->p_MemMap, tmr_ctrl);
1424296177Sjhibbits        DUMP_VAR(p_Dtsec->p_MemMap, tmr_pevent);
1425296177Sjhibbits        DUMP_VAR(p_Dtsec->p_MemMap, tmr_pemask);
1426296177Sjhibbits        DUMP_VAR(p_Dtsec->p_MemMap, tctrl);
1427296177Sjhibbits        DUMP_VAR(p_Dtsec->p_MemMap, rctrl);
1428296177Sjhibbits        DUMP_VAR(p_Dtsec->p_MemMap, maccfg1);
1429296177Sjhibbits        DUMP_VAR(p_Dtsec->p_MemMap, maccfg2);
1430296177Sjhibbits        DUMP_VAR(p_Dtsec->p_MemMap, ipgifg);
1431296177Sjhibbits        DUMP_VAR(p_Dtsec->p_MemMap, hafdup);
1432296177Sjhibbits        DUMP_VAR(p_Dtsec->p_MemMap, maxfrm);
1433296177Sjhibbits
1434296177Sjhibbits        DUMP_VAR(p_Dtsec->p_MemMap, macstnaddr1);
1435296177Sjhibbits        DUMP_VAR(p_Dtsec->p_MemMap, macstnaddr2);
1436296177Sjhibbits
1437296177Sjhibbits        DUMP_SUBSTRUCT_ARRAY(i, 8)
1438296177Sjhibbits        {
1439296177Sjhibbits            DUMP_VAR(p_Dtsec->p_MemMap, macaddr[i].exact_match1);
1440296177Sjhibbits            DUMP_VAR(p_Dtsec->p_MemMap, macaddr[i].exact_match2);
1441296177Sjhibbits        }
1442296177Sjhibbits    }
1443296177Sjhibbits
1444296177Sjhibbits    return E_OK;
1445296177Sjhibbits}
1446296177Sjhibbits#endif /* (defined(DEBUG_ERRORS) && ... */
1447296177Sjhibbits
1448296177Sjhibbits
1449296177Sjhibbits/*****************************************************************************/
1450296177Sjhibbits/*                      FM Init & Free API                                   */
1451296177Sjhibbits/*****************************************************************************/
1452296177Sjhibbits
1453296177Sjhibbits/* .............................................................................. */
1454296177Sjhibbits
1455296177Sjhibbitsstatic t_Error DtsecInit(t_Handle h_Dtsec)
1456296177Sjhibbits{
1457296177Sjhibbits    t_Dtsec             *p_Dtsec = (t_Dtsec *)h_Dtsec;
1458296177Sjhibbits    t_DtsecDriverParam  *p_DtsecDriverParam;
1459296177Sjhibbits    t_DtsecMemMap       *p_DtsecMemMap;
1460296177Sjhibbits    int                 i;
1461296177Sjhibbits    uint32_t            tmpReg32;
1462296177Sjhibbits    uint64_t            addr;
1463296177Sjhibbits    t_Error             err;
1464296177Sjhibbits
1465296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
1466296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_DtsecDriverParam, E_INVALID_STATE);
1467296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec->p_MemMap, E_INVALID_STATE);
1468296177Sjhibbits
1469296177Sjhibbits    CHECK_INIT_PARAMETERS(p_Dtsec, CheckInitParameters);
1470296177Sjhibbits
1471296177Sjhibbits    p_DtsecDriverParam  = p_Dtsec->p_DtsecDriverParam;
1472296177Sjhibbits    p_Dtsec->halfDuplex = p_DtsecDriverParam->halfDuplex;
1473296177Sjhibbits    p_Dtsec->debugMode  = p_DtsecDriverParam->debugMode;
1474296177Sjhibbits    p_DtsecMemMap       = p_Dtsec->p_MemMap;
1475296177Sjhibbits
1476296177Sjhibbits    /*************dtsec_id2******************/
1477296177Sjhibbits    tmpReg32 =  GET_UINT32(p_DtsecMemMap->tsec_id2);
1478296177Sjhibbits
1479296177Sjhibbits    if ((p_Dtsec->enetMode == e_ENET_MODE_RGMII_10) ||
1480296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_RGMII_100) ||
1481296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_RGMII_1000) ||
1482296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_RMII_10) ||
1483296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_RMII_100))
1484296177Sjhibbits        if(tmpReg32 & ID2_INT_REDUCED_OFF)
1485296177Sjhibbits        {
1486296177Sjhibbits             RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("no support for reduced interface in current DTSEC version"));
1487296177Sjhibbits        }
1488296177Sjhibbits
1489296177Sjhibbits    if ((p_Dtsec->enetMode == e_ENET_MODE_SGMII_10) ||
1490296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_SGMII_100) ||
1491296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_SGMII_1000)||
1492296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_MII_10)    ||
1493296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_MII_100))
1494296177Sjhibbits        if(tmpReg32 & ID2_INT_NORMAL_OFF)
1495296177Sjhibbits        {
1496296177Sjhibbits             RETURN_ERROR(MAJOR, E_NOT_SUPPORTED, ("no support for normal interface in current DTSEC version"));
1497296177Sjhibbits        }
1498296177Sjhibbits    /*************dtsec_id2******************/
1499296177Sjhibbits
1500296177Sjhibbits    /***************EDIS************************/
1501296177Sjhibbits    WRITE_UINT32(p_DtsecMemMap->edis, p_DtsecDriverParam->errorDisabled);
1502296177Sjhibbits    /***************EDIS************************/
1503296177Sjhibbits
1504296177Sjhibbits    /***************ECNTRL************************/
1505296177Sjhibbits    tmpReg32 = 0;
1506296177Sjhibbits    if ((p_Dtsec->enetMode == e_ENET_MODE_RGMII_10) ||
1507296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_RGMII_100) ||
1508296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_RGMII_1000) ||
1509296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_GMII_1000))
1510296177Sjhibbits        tmpReg32 |= ECNTRL_GMIIM;
1511296177Sjhibbits    if ((p_Dtsec->enetMode == e_ENET_MODE_SGMII_10)   ||
1512296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_SGMII_100)  ||
1513296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_SGMII_1000))
1514296177Sjhibbits        tmpReg32 |= (ECNTRL_SGMIIM | ECNTRL_TBIM);
1515296177Sjhibbits    if (p_Dtsec->enetMode == e_ENET_MODE_QSGMII_1000)
1516296177Sjhibbits        tmpReg32 |= (ECNTRL_SGMIIM | ECNTRL_TBIM | ECNTRL_QSGMIIM);
1517296177Sjhibbits    if ((p_Dtsec->enetMode == e_ENET_MODE_RGMII_1000) ||
1518296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_RGMII_10)||
1519296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_RGMII_100))
1520296177Sjhibbits        tmpReg32 |= ECNTRL_RPM;
1521296177Sjhibbits    if ((p_Dtsec->enetMode == e_ENET_MODE_RGMII_100) ||
1522296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_SGMII_100) ||
1523296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_RMII_100))
1524296177Sjhibbits        tmpReg32 |= ECNTRL_R100M;
1525296177Sjhibbits    if ((p_Dtsec->enetMode == e_ENET_MODE_RMII_10) || (p_Dtsec->enetMode == e_ENET_MODE_RMII_100))
1526296177Sjhibbits        tmpReg32 |= ECNTRL_RMM;
1527296177Sjhibbits    WRITE_UINT32(p_DtsecMemMap->ecntrl, tmpReg32);
1528296177Sjhibbits    /***************ECNTRL************************/
1529296177Sjhibbits
1530296177Sjhibbits    /***************PTV************************/
1531296177Sjhibbits    tmpReg32 = 0;
1532296177Sjhibbits#ifdef FM_SHORT_PAUSE_TIME_ERRATA_DTSEC1
1533296177Sjhibbits    {
1534296177Sjhibbits        t_FmRevisionInfo revInfo;
1535296177Sjhibbits        FM_GetRevision(p_Dtsec->fmMacControllerDriver.h_Fm, &revInfo);
1536296177Sjhibbits        if ((revInfo.majorRev == 1) && (revInfo.minorRev == 0))
1537296177Sjhibbits            p_DtsecDriverParam->pauseTime += 2;
1538296177Sjhibbits    }
1539296177Sjhibbits#endif /* FM_SHORT_PAUSE_TIME_ERRATA_DTSEC1 */
1540296177Sjhibbits    if (p_DtsecDriverParam->pauseTime)
1541296177Sjhibbits        tmpReg32 |= (uint32_t)p_DtsecDriverParam->pauseTime;
1542296177Sjhibbits
1543296177Sjhibbits    if (p_DtsecDriverParam->pauseExtended)
1544296177Sjhibbits        tmpReg32 |= ((uint32_t)p_DtsecDriverParam->pauseExtended) << PTV_PTE_OFST;
1545296177Sjhibbits    WRITE_UINT32(p_DtsecMemMap->ptv, tmpReg32);
1546296177Sjhibbits    /***************PTV************************/
1547296177Sjhibbits
1548296177Sjhibbits    /***************TCTRL************************/
1549296177Sjhibbits    tmpReg32 = 0;
1550296177Sjhibbits    if(p_DtsecDriverParam->halfDuplex)
1551296177Sjhibbits    {
1552296177Sjhibbits        if(p_DtsecDriverParam->halfDulexFlowControlEn)
1553296177Sjhibbits            tmpReg32 |= TCTRL_THDF;
1554296177Sjhibbits    }
1555296177Sjhibbits    else
1556296177Sjhibbits    {
1557296177Sjhibbits        if(p_DtsecDriverParam->txTimeStampEn)
1558296177Sjhibbits            tmpReg32 |= TCTRL_TTSE;
1559296177Sjhibbits    }
1560296177Sjhibbits    WRITE_UINT32(p_DtsecMemMap->tctrl, tmpReg32);
1561296177Sjhibbits    /***************TCTRL************************/
1562296177Sjhibbits
1563296177Sjhibbits    /***************RCTRL************************/
1564296177Sjhibbits    tmpReg32 = 0;
1565296177Sjhibbits    if (p_DtsecDriverParam->packetAlignmentPadding)
1566296177Sjhibbits        tmpReg32 |= ((uint32_t)(0x0000001f & p_DtsecDriverParam->packetAlignmentPadding)) << 16;
1567296177Sjhibbits    if (p_DtsecDriverParam->controlFrameAccept)
1568296177Sjhibbits        tmpReg32 |= RCTRL_CFA;
1569296177Sjhibbits    if (p_DtsecDriverParam->groupHashExtend)
1570296177Sjhibbits        tmpReg32 |= RCTRL_GHTX;
1571296177Sjhibbits    if(p_DtsecDriverParam->rxTimeStampEn)
1572296177Sjhibbits        tmpReg32 |= RCTRL_RTSE;
1573296177Sjhibbits    if (p_DtsecDriverParam->broadcReject)
1574296177Sjhibbits        tmpReg32 |= RCTRL_BC_REJ;
1575296177Sjhibbits    if (p_DtsecDriverParam->rxShortFrame)
1576296177Sjhibbits        tmpReg32 |= RCTRL_RSF;
1577296177Sjhibbits    if (p_DtsecDriverParam->promiscuousEnable)
1578296177Sjhibbits        tmpReg32 |= RCTRL_PROM;
1579296177Sjhibbits    if (p_DtsecDriverParam->exactMatch)
1580296177Sjhibbits        tmpReg32 |= RCTRL_EMEN;
1581296177Sjhibbits
1582296177Sjhibbits    WRITE_UINT32(p_DtsecMemMap->rctrl, tmpReg32);
1583296177Sjhibbits    /***************RCTRL************************/
1584296177Sjhibbits
1585296177Sjhibbits    /* Assign a Phy Address to the TBI (TBIPA).            */
1586296177Sjhibbits    /* Done also in case that TBI is not selected to avoid */
1587296177Sjhibbits    /* conflict with the external PHY�s Physical address   */
1588296177Sjhibbits    WRITE_UINT32(p_DtsecMemMap->tbipa, p_DtsecDriverParam->tbiPhyAddr);
1589296177Sjhibbits
1590296177Sjhibbits    /* Reset the management interface */
1591296177Sjhibbits    WRITE_UINT32(p_Dtsec->p_MiiMemMap->miimcfg, MIIMCFG_RESET_MGMT);
1592296177Sjhibbits    WRITE_UINT32(p_Dtsec->p_MiiMemMap->miimcfg, ~MIIMCFG_RESET_MGMT);
1593296177Sjhibbits    /* Setup the MII Mgmt clock speed */
1594296177Sjhibbits    WRITE_UINT32(p_Dtsec->p_MiiMemMap->miimcfg,
1595296177Sjhibbits                 (uint32_t)GetMiiDiv((int32_t)(((p_Dtsec->fmMacControllerDriver.clkFreq*10)/2)/8)));
1596296177Sjhibbits
1597296177Sjhibbits    if(p_Dtsec->enetMode == e_ENET_MODE_SGMII_1000)
1598296177Sjhibbits    {
1599296177Sjhibbits        uint16_t            tmpReg16;
1600296177Sjhibbits
1601296177Sjhibbits        /* Configure the TBI PHY Control Register */
1602296177Sjhibbits        tmpReg16 = PHY_TBICON_SPEED2 | PHY_TBICON_SRESET;
1603296177Sjhibbits
1604296177Sjhibbits        DTSEC_MII_WritePhyReg(p_Dtsec, p_DtsecDriverParam->tbiPhyAddr, 17, tmpReg16);
1605296177Sjhibbits
1606296177Sjhibbits        tmpReg16 = PHY_TBICON_SPEED2;
1607296177Sjhibbits
1608296177Sjhibbits        DTSEC_MII_WritePhyReg(p_Dtsec, p_DtsecDriverParam->tbiPhyAddr, 17, tmpReg16);
1609296177Sjhibbits
1610296177Sjhibbits        if(!p_DtsecDriverParam->halfDuplex)
1611296177Sjhibbits            tmpReg16 |= PHY_CR_FULLDUPLEX | 0x8000 | PHY_CR_ANE;
1612296177Sjhibbits
1613296177Sjhibbits        DTSEC_MII_WritePhyReg(p_Dtsec, p_DtsecDriverParam->tbiPhyAddr, 0, tmpReg16);
1614296177Sjhibbits
1615296177Sjhibbits        tmpReg16 = 0x01a0;
1616296177Sjhibbits        DTSEC_MII_WritePhyReg(p_Dtsec, p_DtsecDriverParam->tbiPhyAddr, 4, tmpReg16);
1617296177Sjhibbits
1618296177Sjhibbits        tmpReg16 = 0x1340;
1619296177Sjhibbits        DTSEC_MII_WritePhyReg(p_Dtsec, p_DtsecDriverParam->tbiPhyAddr, 0, tmpReg16);
1620296177Sjhibbits    }
1621296177Sjhibbits
1622296177Sjhibbits    /***************TMR_CTL************************/
1623296177Sjhibbits    WRITE_UINT32(p_DtsecMemMap->tmr_ctrl, 0);
1624296177Sjhibbits
1625296177Sjhibbits    if(p_Dtsec->ptpTsuEnabled)
1626296177Sjhibbits    {
1627296177Sjhibbits        tmpReg32 = 0;
1628296177Sjhibbits        if (p_Dtsec->enTsuErrExeption)
1629296177Sjhibbits            tmpReg32 |= PEMASK_TSRE;
1630296177Sjhibbits        WRITE_UINT32(p_DtsecMemMap->tmr_pemask, tmpReg32);
1631296177Sjhibbits        WRITE_UINT32(p_DtsecMemMap->tmr_pevent, tmpReg32);
1632296177Sjhibbits    }
1633296177Sjhibbits
1634296177Sjhibbits    /***************DEBUG************************/
1635296177Sjhibbits    tmpReg32 = 0;
1636296177Sjhibbits    if(p_DtsecDriverParam->debugMode)
1637296177Sjhibbits        WRITE_UINT32(p_DtsecMemMap->tsec_id1, TSEC_ID1_DEBUG);
1638296177Sjhibbits    /***************DEBUG************************/
1639296177Sjhibbits
1640296177Sjhibbits    /***************MACCFG1***********************/
1641296177Sjhibbits    WRITE_UINT32(p_DtsecMemMap->maccfg1, MACCFG1_SOFT_RESET);
1642296177Sjhibbits    WRITE_UINT32(p_DtsecMemMap->maccfg1, 0);
1643296177Sjhibbits    tmpReg32 = 0;
1644296177Sjhibbits    if(p_DtsecDriverParam->loopback)
1645296177Sjhibbits        tmpReg32 |= MACCFG1_LOOPBACK;
1646296177Sjhibbits    if(p_DtsecDriverParam->actOnRxPauseFrame)
1647296177Sjhibbits        tmpReg32 |= MACCFG1_RX_FLOW;
1648296177Sjhibbits    if(p_DtsecDriverParam->actOnTxPauseFrame)
1649296177Sjhibbits        tmpReg32 |= MACCFG1_TX_FLOW;
1650296177Sjhibbits    WRITE_UINT32(p_DtsecMemMap->maccfg1, tmpReg32);
1651296177Sjhibbits    /***************MACCFG1***********************/
1652296177Sjhibbits
1653296177Sjhibbits    /***************MACCFG2***********************/
1654296177Sjhibbits    tmpReg32 = 0;
1655296177Sjhibbits    if( (p_Dtsec->enetMode == e_ENET_MODE_RMII_10)  ||
1656296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_RMII_100) ||
1657296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_MII_10)   ||
1658296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_MII_100)  ||
1659296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_RGMII_10) ||
1660296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_RGMII_100)||
1661296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_SGMII_10) ||
1662296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_SGMII_100))
1663296177Sjhibbits            tmpReg32 |= MACCFG2_NIBBLE_MODE;
1664296177Sjhibbits    else if((p_Dtsec->enetMode == e_ENET_MODE_RGMII_1000) ||
1665296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_SGMII_1000)||
1666296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_GMII_1000)||
1667296177Sjhibbits        (p_Dtsec->enetMode == e_ENET_MODE_QSGMII_1000))
1668296177Sjhibbits            tmpReg32 |= MACCFG2_BYTE_MODE;
1669296177Sjhibbits
1670296177Sjhibbits    tmpReg32 |= (((uint32_t)p_DtsecDriverParam->preambleLength) & 0x0000000f)<< PREAMBLE_LENGTH_SHIFT;
1671296177Sjhibbits
1672296177Sjhibbits    if(p_DtsecDriverParam->preambleRxEn)
1673296177Sjhibbits        tmpReg32 |= MACCFG2_PRE_AM_Rx_EN;
1674296177Sjhibbits    if(p_DtsecDriverParam->preambleTxEn)
1675296177Sjhibbits        tmpReg32 |= MACCFG2_PRE_AM_Tx_EN;
1676296177Sjhibbits    if(p_DtsecDriverParam->lengthCheckEnable)
1677296177Sjhibbits        tmpReg32 |= MACCFG2_LENGTH_CHECK;
1678296177Sjhibbits    if(p_DtsecDriverParam->padAndCrcEnable)
1679296177Sjhibbits        tmpReg32 |=  MACCFG2_PAD_CRC_EN;
1680296177Sjhibbits    if(p_DtsecDriverParam->crcEnable)
1681296177Sjhibbits        tmpReg32 |= MACCFG2_CRC_EN;
1682296177Sjhibbits    if(!p_DtsecDriverParam->halfDuplex)
1683296177Sjhibbits        tmpReg32 |= MACCFG2_FULL_DUPLEX;
1684296177Sjhibbits    WRITE_UINT32(p_DtsecMemMap->maccfg2, tmpReg32);
1685296177Sjhibbits    /***************MACCFG2***********************/
1686296177Sjhibbits
1687296177Sjhibbits    /***************IPGIFG************************/
1688296177Sjhibbits    tmpReg32 = 0;
1689296177Sjhibbits    ASSERT_COND(p_DtsecDriverParam->nonBackToBackIpg1 <= p_DtsecDriverParam->nonBackToBackIpg2);
1690296177Sjhibbits    tmpReg32 = (uint32_t)((((uint32_t)p_DtsecDriverParam->nonBackToBackIpg1 <<
1691296177Sjhibbits               IPGIFG_NON_BACK_TO_BACK_IPG_1_SHIFT) & IPGIFG_NON_BACK_TO_BACK_IPG_1) |
1692296177Sjhibbits              (((uint32_t)p_DtsecDriverParam->nonBackToBackIpg2  <<
1693296177Sjhibbits                IPGIFG_NON_BACK_TO_BACK_IPG_2_SHIFT) & IPGIFG_NON_BACK_TO_BACK_IPG_2) |
1694296177Sjhibbits              (((uint32_t)p_DtsecDriverParam->minIfgEnforcement <<
1695296177Sjhibbits                IPGIFG_MIN_IFG_ENFORCEMENT_SHIFT) & IPGIFG_MIN_IFG_ENFORCEMENT) |
1696296177Sjhibbits              ((uint32_t)p_DtsecDriverParam->backToBackIpg & IPGIFG_BACK_TO_BACK_IPG));
1697296177Sjhibbits    WRITE_UINT32(p_DtsecMemMap->ipgifg, tmpReg32);
1698296177Sjhibbits    /***************IPGIFG************************/
1699296177Sjhibbits
1700296177Sjhibbits    /***************HAFDUP************************/
1701296177Sjhibbits    tmpReg32 = 0;
1702296177Sjhibbits    if(p_DtsecDriverParam->alternateBackoffEnable)
1703296177Sjhibbits    {
1704296177Sjhibbits        tmpReg32 = (uint32_t) (HAFDUP_ALT_BEB  | (((uint32_t)p_DtsecDriverParam->alternateBackoffVal & 0x0000000f) <<
1705296177Sjhibbits                                    HAFDUP_ALTERNATE_BEB_TRUNCATION_SHIFT));
1706296177Sjhibbits    }
1707296177Sjhibbits
1708296177Sjhibbits    if(p_DtsecDriverParam->backPressureNoBackoff)
1709296177Sjhibbits        tmpReg32 |= HAFDUP_BP_NO_BACKOFF;
1710296177Sjhibbits    if(p_DtsecDriverParam->noBackoff)
1711296177Sjhibbits        tmpReg32 |= HAFDUP_NO_BACKOFF;
1712296177Sjhibbits    if(p_DtsecDriverParam->excessDefer)
1713296177Sjhibbits        tmpReg32 |= HAFDUP_EXCESS_DEFER;
1714296177Sjhibbits    tmpReg32 |= (((uint32_t)p_DtsecDriverParam->maxRetransmission <<
1715296177Sjhibbits                HAFDUP_RETRANSMISSION_MAX_SHIFT )& HAFDUP_RETRANSMISSION_MAX);
1716296177Sjhibbits    tmpReg32|= ((uint32_t)p_DtsecDriverParam->collisionWindow & HAFDUP_COLLISION_WINDOW);
1717296177Sjhibbits
1718296177Sjhibbits    WRITE_UINT32(p_DtsecMemMap->hafdup, tmpReg32);
1719296177Sjhibbits    /***************HAFDUP************************/
1720296177Sjhibbits
1721296177Sjhibbits    /***************MAXFRM************************/
1722296177Sjhibbits    /* Initialize MAXFRM */
1723296177Sjhibbits    WRITE_UINT32(p_DtsecMemMap->maxfrm,
1724296177Sjhibbits                 p_DtsecDriverParam->maxFrameLength);
1725296177Sjhibbits    err = FmSetMacMaxFrame(p_Dtsec->fmMacControllerDriver.h_Fm,
1726296177Sjhibbits                           e_FM_MAC_1G,
1727296177Sjhibbits                           p_Dtsec->fmMacControllerDriver.macId,
1728296177Sjhibbits                           p_DtsecDriverParam->maxFrameLength);
1729296177Sjhibbits    if (err)
1730296177Sjhibbits        RETURN_ERROR(MAJOR, err, NO_MSG);
1731296177Sjhibbits    /***************MAXFRM************************/
1732296177Sjhibbits
1733296177Sjhibbits    /***************CAM1************************/
1734296177Sjhibbits    WRITE_UINT32(p_DtsecMemMap->cam1,0xffffffff);
1735296177Sjhibbits    WRITE_UINT32(p_DtsecMemMap->cam2,0xffffffff);
1736296177Sjhibbits
1737296177Sjhibbits    /***************IMASK************************/
1738296177Sjhibbits    WRITE_UINT32(p_DtsecMemMap->imask, p_Dtsec->exceptions);
1739296177Sjhibbits    /***************IMASK************************/
1740296177Sjhibbits
1741296177Sjhibbits    /***************IEVENT************************/
1742296177Sjhibbits    WRITE_UINT32(p_DtsecMemMap->ievent, EVENTS_MASK);
1743296177Sjhibbits
1744296177Sjhibbits    /***************MACSTNADDR1/2*****************/
1745296177Sjhibbits    /*  Initialize MAC Station Address registers (1 & 2)    */
1746296177Sjhibbits    /*  Station address have to be swapped (big endian to little endian */
1747296177Sjhibbits    addr = p_Dtsec->addr;
1748296177Sjhibbits
1749296177Sjhibbits    tmpReg32 = (uint32_t)(addr);
1750296177Sjhibbits    SwapUint32P(&tmpReg32);
1751296177Sjhibbits    WRITE_UINT32(p_DtsecMemMap->macstnaddr1, tmpReg32);
1752296177Sjhibbits
1753296177Sjhibbits    tmpReg32 = (uint32_t)(addr>>32);
1754296177Sjhibbits    SwapUint32P(&tmpReg32);
1755296177Sjhibbits    WRITE_UINT32(p_DtsecMemMap->macstnaddr2, tmpReg32);
1756296177Sjhibbits    /***************MACSTNADDR1/2*****************/
1757296177Sjhibbits
1758296177Sjhibbits    /***************DEBUG*****************/
1759296177Sjhibbits    WRITE_UINT32(p_DtsecMemMap->tx_threshold,       (uint32_t)(p_DtsecDriverParam->fifoTxThr & 0x7f));
1760296177Sjhibbits    WRITE_UINT32(p_DtsecMemMap->tx_watermark_high,  (uint32_t)(p_DtsecDriverParam->fifoTxWatermarkH & 0x7f));
1761296177Sjhibbits    WRITE_UINT32(p_DtsecMemMap->rx_watermark_low,   (uint32_t)(p_DtsecDriverParam->fifoRxWatermarkL & 0x7f));
1762296177Sjhibbits    /***************DEBUG*****************/
1763296177Sjhibbits
1764296177Sjhibbits    /*****************HASH************************/
1765296177Sjhibbits    for(i=0 ; i<NUM_OF_HASH_REGS ; i++)
1766296177Sjhibbits    {
1767296177Sjhibbits        /* Initialize IADDRx */
1768296177Sjhibbits        WRITE_UINT32(p_DtsecMemMap->igaddr[i], 0);
1769296177Sjhibbits        /* Initialize GADDRx */
1770296177Sjhibbits        WRITE_UINT32(p_DtsecMemMap->gaddr[i], 0);
1771296177Sjhibbits    }
1772296177Sjhibbits
1773296177Sjhibbits    p_Dtsec->p_MulticastAddrHash = AllocHashTable(HASH_TABLE_SIZE);
1774296177Sjhibbits    if(!p_Dtsec->p_MulticastAddrHash)
1775296177Sjhibbits    {
1776296177Sjhibbits        FreeInitResources(p_Dtsec);
1777296177Sjhibbits        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("MC hash table is FAILED"));
1778296177Sjhibbits    }
1779296177Sjhibbits
1780296177Sjhibbits    p_Dtsec->p_UnicastAddrHash = AllocHashTable(HASH_TABLE_SIZE);
1781296177Sjhibbits    if(!p_Dtsec->p_UnicastAddrHash)
1782296177Sjhibbits    {
1783296177Sjhibbits        FreeInitResources(p_Dtsec);
1784296177Sjhibbits        RETURN_ERROR(MAJOR, E_NO_MEMORY, ("UC hash table is FAILED"));
1785296177Sjhibbits    }
1786296177Sjhibbits
1787296177Sjhibbits    /* register err intr handler for dtsec to FPM (err)*/
1788296177Sjhibbits    FmRegisterIntr(p_Dtsec->fmMacControllerDriver.h_Fm, e_FM_MOD_1G_MAC, p_Dtsec->macId, e_FM_INTR_TYPE_ERR, DtsecErrException , p_Dtsec);
1789296177Sjhibbits    /* register 1588 intr handler for TMR to FPM (normal)*/
1790296177Sjhibbits    FmRegisterIntr(p_Dtsec->fmMacControllerDriver.h_Fm, e_FM_MOD_1G_MAC_TMR, p_Dtsec->macId, e_FM_INTR_TYPE_NORMAL, Dtsec1588Exception , p_Dtsec);
1791296177Sjhibbits    /* register normal intr handler for dtsec to main interrupt controller. */
1792296177Sjhibbits    if (p_Dtsec->mdioIrq != NO_IRQ)
1793296177Sjhibbits    {
1794296177Sjhibbits        XX_SetIntr(p_Dtsec->mdioIrq, DtsecException, p_Dtsec);
1795296177Sjhibbits        XX_EnableIntr(p_Dtsec->mdioIrq);
1796296177Sjhibbits    }
1797296177Sjhibbits
1798296177Sjhibbits    XX_Free(p_DtsecDriverParam);
1799296177Sjhibbits    p_Dtsec->p_DtsecDriverParam = NULL;
1800296177Sjhibbits
1801296177Sjhibbits    err = DtsecSetStatistics(p_Dtsec, e_FM_MAC_FULL_STATISTICS);
1802296177Sjhibbits    if(err)
1803296177Sjhibbits    {
1804296177Sjhibbits        FreeInitResources(p_Dtsec);
1805296177Sjhibbits        RETURN_ERROR(MAJOR, err, NO_MSG);
1806296177Sjhibbits    }
1807296177Sjhibbits
1808296177Sjhibbits    return E_OK;
1809296177Sjhibbits}
1810296177Sjhibbits
1811296177Sjhibbits/* ........................................................................... */
1812296177Sjhibbits
1813296177Sjhibbitsstatic t_Error DtsecFree(t_Handle h_Dtsec)
1814296177Sjhibbits{
1815296177Sjhibbits    t_Dtsec      *p_Dtsec = (t_Dtsec *)h_Dtsec;
1816296177Sjhibbits
1817296177Sjhibbits    SANITY_CHECK_RETURN_ERROR(p_Dtsec, E_INVALID_HANDLE);
1818296177Sjhibbits
1819296177Sjhibbits    FreeInitResources(p_Dtsec);
1820296177Sjhibbits
1821296177Sjhibbits    if (p_Dtsec->p_DtsecDriverParam)
1822296177Sjhibbits    {
1823296177Sjhibbits        XX_Free(p_Dtsec->p_DtsecDriverParam);
1824296177Sjhibbits        p_Dtsec->p_DtsecDriverParam = NULL;
1825296177Sjhibbits    }
1826296177Sjhibbits    XX_Free (h_Dtsec);
1827296177Sjhibbits
1828296177Sjhibbits    return E_OK;
1829296177Sjhibbits}
1830296177Sjhibbits
1831296177Sjhibbits/* .............................................................................. */
1832296177Sjhibbits
1833296177Sjhibbitsstatic void InitFmMacControllerDriver(t_FmMacControllerDriver *p_FmMacControllerDriver)
1834296177Sjhibbits{
1835296177Sjhibbits    p_FmMacControllerDriver->f_FM_MAC_Init                      = DtsecInit;
1836296177Sjhibbits    p_FmMacControllerDriver->f_FM_MAC_Free                      = DtsecFree;
1837296177Sjhibbits
1838296177Sjhibbits    p_FmMacControllerDriver->f_FM_MAC_SetStatistics             = DtsecSetStatistics;
1839296177Sjhibbits    p_FmMacControllerDriver->f_FM_MAC_ConfigLoopback            = DtsecConfigLoopback;
1840296177Sjhibbits    p_FmMacControllerDriver->f_FM_MAC_ConfigMaxFrameLength      = DtsecConfigMaxFrameLength;
1841296177Sjhibbits
1842296177Sjhibbits    p_FmMacControllerDriver->f_FM_MAC_ConfigWan                 = NULL; /* Not supported on dTSEC */
1843296177Sjhibbits
1844296177Sjhibbits    p_FmMacControllerDriver->f_FM_MAC_ConfigPadAndCrc           = DtsecConfigPadAndCrc;
1845296177Sjhibbits    p_FmMacControllerDriver->f_FM_MAC_ConfigHalfDuplex          = DtsecConfigHalfDuplex;
1846296177Sjhibbits    p_FmMacControllerDriver->f_FM_MAC_ConfigLengthCheck         = DtsecConfigLengthCheck;
1847296177Sjhibbits    p_FmMacControllerDriver->f_FM_MAC_ConfigException           = DtsecConfigException;
1848296177Sjhibbits
1849296177Sjhibbits    p_FmMacControllerDriver->f_FM_MAC_Enable                    = DtsecEnable;
1850296177Sjhibbits    p_FmMacControllerDriver->f_FM_MAC_Disable                   = DtsecDisable;
1851296177Sjhibbits
1852296177Sjhibbits    p_FmMacControllerDriver->f_FM_MAC_SetException              = DtsecSetException;
1853296177Sjhibbits
1854296177Sjhibbits    p_FmMacControllerDriver->f_FM_MAC_SetPromiscuous            = DtsecSetPromiscuous;
1855296177Sjhibbits    p_FmMacControllerDriver->f_FM_MAC_AdjustLink                = DtsecAdjustLink;
1856296177Sjhibbits
1857296177Sjhibbits    p_FmMacControllerDriver->f_FM_MAC_Enable1588TimeStamp       = DtsecEnable1588TimeStamp;
1858296177Sjhibbits    p_FmMacControllerDriver->f_FM_MAC_Disable1588TimeStamp      = DtsecDisable1588TimeStamp;
1859296177Sjhibbits
1860296177Sjhibbits    p_FmMacControllerDriver->f_FM_MAC_SetTxAutoPauseFrames      = DtsecTxMacPause;
1861296177Sjhibbits    p_FmMacControllerDriver->f_FM_MAC_SetRxIgnorePauseFrames    = DtsecRxIgnoreMacPause;
1862296177Sjhibbits
1863296177Sjhibbits    p_FmMacControllerDriver->f_FM_MAC_ResetCounters             = DtsecResetCounters;
1864296177Sjhibbits    p_FmMacControllerDriver->f_FM_MAC_GetStatistics             = DtsecGetStatistics;
1865296177Sjhibbits
1866296177Sjhibbits    p_FmMacControllerDriver->f_FM_MAC_ModifyMacAddr             = DtsecModifyMacAddress;
1867296177Sjhibbits    p_FmMacControllerDriver->f_FM_MAC_AddHashMacAddr            = DtsecAddHashMacAddress;
1868296177Sjhibbits    p_FmMacControllerDriver->f_FM_MAC_RemoveHashMacAddr         = DtsecDelHashMacAddress;
1869296177Sjhibbits    p_FmMacControllerDriver->f_FM_MAC_AddExactMatchMacAddr      = DtsecAddExactMatchMacAddress;
1870296177Sjhibbits    p_FmMacControllerDriver->f_FM_MAC_RemovelExactMatchMacAddr  = DtsecDelExactMatchMacAddress;
1871296177Sjhibbits    p_FmMacControllerDriver->f_FM_MAC_GetId                     = DtsecGetId;
1872296177Sjhibbits    p_FmMacControllerDriver->f_FM_MAC_GetVersion                = DtsecGetVersion;
1873296177Sjhibbits    p_FmMacControllerDriver->f_FM_MAC_GetMaxFrameLength         = DtsecGetMaxFrameLength;
1874296177Sjhibbits
1875296177Sjhibbits    p_FmMacControllerDriver->f_FM_MAC_MII_WritePhyReg           = DTSEC_MII_WritePhyReg;
1876296177Sjhibbits    p_FmMacControllerDriver->f_FM_MAC_MII_ReadPhyReg            = DTSEC_MII_ReadPhyReg;
1877296177Sjhibbits
1878296177Sjhibbits#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))
1879296177Sjhibbits    p_FmMacControllerDriver->f_FM_MAC_DumpRegs                  = DtsecDumpRegs;
1880296177Sjhibbits#endif /* (defined(DEBUG_ERRORS) && ... */
1881296177Sjhibbits}
1882296177Sjhibbits
1883296177Sjhibbits
1884296177Sjhibbits/*****************************************************************************/
1885296177Sjhibbits/*                      dTSEC Config  Main Entry                             */
1886296177Sjhibbits/*****************************************************************************/
1887296177Sjhibbits
1888296177Sjhibbits/* .............................................................................. */
1889296177Sjhibbits
1890296177Sjhibbitst_Handle  DTSEC_Config(t_FmMacParams *p_FmMacParam)
1891296177Sjhibbits{
1892296177Sjhibbits    t_Dtsec             *p_Dtsec;
1893296177Sjhibbits    t_DtsecDriverParam  *p_DtsecDriverParam;
1894296177Sjhibbits    uintptr_t           baseAddr;
1895296177Sjhibbits    uint8_t             i;
1896296177Sjhibbits
1897296177Sjhibbits    SANITY_CHECK_RETURN_VALUE(p_FmMacParam, E_NULL_POINTER, NULL);
1898296177Sjhibbits
1899296177Sjhibbits    baseAddr = p_FmMacParam->baseAddr;
1900296177Sjhibbits    /* allocate memory for the UCC GETH data structure. */
1901296177Sjhibbits    p_Dtsec = (t_Dtsec *) XX_Malloc(sizeof(t_Dtsec));
1902296177Sjhibbits    if (!p_Dtsec)
1903296177Sjhibbits    {
1904296177Sjhibbits        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("dTSEC driver structure"));
1905296177Sjhibbits        return NULL;
1906296177Sjhibbits    }
1907296177Sjhibbits    /* Zero out * p_Dtsec */
1908296177Sjhibbits    memset(p_Dtsec, 0, sizeof(t_Dtsec));
1909296177Sjhibbits    InitFmMacControllerDriver(&p_Dtsec->fmMacControllerDriver);
1910296177Sjhibbits
1911296177Sjhibbits    /* allocate memory for the dTSEC driver parameters data structure. */
1912296177Sjhibbits    p_DtsecDriverParam = (t_DtsecDriverParam *) XX_Malloc(sizeof(t_DtsecDriverParam));
1913296177Sjhibbits    if (!p_DtsecDriverParam)
1914296177Sjhibbits    {
1915296177Sjhibbits        XX_Free(p_Dtsec);
1916296177Sjhibbits        REPORT_ERROR(MAJOR, E_NO_MEMORY, ("dTSEC driver parameters"));
1917296177Sjhibbits        return NULL;
1918296177Sjhibbits    }
1919296177Sjhibbits    /* Zero out */
1920296177Sjhibbits    memset(p_DtsecDriverParam, 0, sizeof(t_DtsecDriverParam));
1921296177Sjhibbits
1922296177Sjhibbits    /* Plant parameter structure pointer */
1923296177Sjhibbits    p_Dtsec->p_DtsecDriverParam = p_DtsecDriverParam;
1924296177Sjhibbits
1925296177Sjhibbits    SetDefaultParam(p_DtsecDriverParam);
1926296177Sjhibbits
1927296177Sjhibbits    for (i=0; i < sizeof(p_FmMacParam->addr); i++)
1928296177Sjhibbits        p_Dtsec->addr |= ((uint64_t)p_FmMacParam->addr[i] << ((5-i) * 8));
1929296177Sjhibbits
1930296177Sjhibbits    p_Dtsec->p_MemMap           = (t_DtsecMemMap *)UINT_TO_PTR(baseAddr);
1931296177Sjhibbits    p_Dtsec->p_MiiMemMap        = (t_MiiAccessMemMap *)UINT_TO_PTR(baseAddr + DTSEC_TO_MII_OFFSET);
1932296177Sjhibbits    p_Dtsec->enetMode           = p_FmMacParam->enetMode;
1933296177Sjhibbits    p_Dtsec->macId              = p_FmMacParam->macId;
1934296177Sjhibbits    p_Dtsec->exceptions         = DEFAULT_exceptions;
1935296177Sjhibbits    p_Dtsec->mdioIrq            = p_FmMacParam->mdioIrq;
1936296177Sjhibbits    p_Dtsec->f_Exception        = p_FmMacParam->f_Exception;
1937296177Sjhibbits    p_Dtsec->f_Event            = p_FmMacParam->f_Event;
1938296177Sjhibbits    p_Dtsec->h_App              = p_FmMacParam->h_App;
1939296177Sjhibbits
1940296177Sjhibbits    return p_Dtsec;
1941296177Sjhibbits}
1942