1250003Sadrian/* 2250003Sadrian * Copyright (c) 2013 Qualcomm Atheros, Inc. 3250003Sadrian * 4250003Sadrian * Permission to use, copy, modify, and/or distribute this software for any 5250003Sadrian * purpose with or without fee is hereby granted, provided that the above 6250003Sadrian * copyright notice and this permission notice appear in all copies. 7250003Sadrian * 8250003Sadrian * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH 9250003Sadrian * REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY 10250003Sadrian * AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, 11250003Sadrian * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM 12250003Sadrian * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR 13250003Sadrian * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 14250003Sadrian * PERFORMANCE OF THIS SOFTWARE. 15250003Sadrian */ 16250003Sadrian 17250003Sadrian/* */ 18250003Sadrian/* File: /trees/yli/yli-dev/chips/osprey/2.0/blueprint/top/osprey_reg_map.h*/ 19250003Sadrian/* Creator: yli */ 20250003Sadrian/* Time: Wednesday Jan 6, 2010 [2:09:02 pm] */ 21250003Sadrian/* */ 22250003Sadrian/* Path: /trees/yli/yli-dev/chips/osprey/2.0/blueprint/top */ 23250003Sadrian/* Arguments: /cad/denali/blueprint/3.7//Linux/blueprint -codegen */ 24250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/env/blueprint/ath_ansic.codegen*/ 25250003Sadrian/* -ath_ansic -Wdesc -I */ 26250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/blueprint/top -I */ 27250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/blueprint -I */ 28250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/env/blueprint -I */ 29250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/blueprint/sysconfig -odir */ 30250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/blueprint/top -eval */ 31250003Sadrian/* {$INCLUDE_SYSCONFIG_FILES=1} -eval */ 32250003Sadrian/* $WAR_EV58615_for_ansic_codegen=1 osprey_reg.rdl */ 33250003Sadrian/* */ 34250003Sadrian/* Sources: /trees/yli/yli-dev/chips/osprey/2.0/blueprint/top/emulation_misc.rdl*/ 35250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/blueprint/sysconfig/mac_dma_reg_sysconfig.rdl*/ 36250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/rtl/amba_mac/svd/blueprint/svd_reg.rdl*/ 37250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/blueprint/sysconfig/mac_pcu_reg_sysconfig.rdl*/ 38250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/blueprint/top/merlin2_0_radio_reg_map.rdl*/ 39250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/rtl/mac/rtl/mac_dma/blueprint/mac_dma_reg.rdl*/ 40250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/rtl/host_intf/rtl/blueprint/efuse_reg.rdl*/ 41250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/rtl/mac/rtl/mac_dma/blueprint/mac_dcu_reg.rdl*/ 42250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/ip/pcie_axi/blueprint/DWC_pcie_ep.rdl*/ 43250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/rtl/apb_analog/analog_intf_reg.rdl*/ 44250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/rtl/mac/rtl/mac_pcu/blueprint/mac_pcu_reg.rdl*/ 45250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/rtl/rtc/blueprint/rtc_reg.rdl*/ 46250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/blueprint/sysconfig/DWC_pcie_dbi_axi_sysconfig.rdl*/ 47250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/rtl/host_intf/rtl/blueprint/host_intf_reg.rdl*/ 48250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/rtl/mac/rtl/mac_dma/blueprint/mac_qcu_reg.rdl*/ 49250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/rtl/bb/blueprint/bb_reg_map.rdl*/ 50250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/blueprint/sysconfig/rtc_reg_sysconfig.rdl*/ 51250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/blueprint/sysconfig/efuse_reg_sysconfig.rdl*/ 52250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/blueprint/sysconfig/bb_reg_map_sysconfig.rdl*/ 53250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/blueprint/sysconfig/osprey_pcieconfig.rdl*/ 54250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/blueprint/top/osprey_reg.rdl*/ 55250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/blueprint/sysconfig/radio_65_reg_sysconfig.rdl*/ 56250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/blueprint/sysconfig/merlin2_0_radio_reg_sysconfig.rdl*/ 57250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/blueprint/sysconfig/mac_qcu_reg_sysconfig.rdl*/ 58250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/blueprint/sysconfig/mac_dcu_reg_sysconfig.rdl*/ 59250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/rtl/amba_mac/blueprint/rtc_sync_reg.rdl*/ 60250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/blueprint/sysconfig/analog_intf_reg_sysconfig.rdl*/ 61250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/blueprint/sysconfig/svd_reg_sysconfig.rdl*/ 62250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/blueprint/top/osprey_radio_reg.rdl*/ 63250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/blueprint/sysconfig/host_intf_reg_sysconfig.rdl*/ 64250003Sadrian/* /trees/yli/yli-dev/chips/osprey/2.0/env/blueprint/ath_ansic.pm*/ 65250003Sadrian/* /cad/local/lib/perl/Pinfo.pm */ 66250003Sadrian/* */ 67250003Sadrian/* Blueprint: 3.7 (Fri Oct 5 10:32:33 PDT 2007) */ 68250003Sadrian/* Machine: artemis */ 69250003Sadrian/* OS: Linux 2.6.9-78.0.5.ELlargesmp */ 70250003Sadrian/* Description: */ 71250003Sadrian/* */ 72250003Sadrian/*This Register Map contains the complete register set for OSPREY. */ 73250003Sadrian/* */ 74250003Sadrian/* Copyright (C) 2010 Denali Software Inc. All rights reserved */ 75250003Sadrian/* THIS FILE IS AUTOMATICALLY GENERATED BY DENALI BLUEPRINT, DO NOT EDIT */ 76250003Sadrian/* */ 77250003Sadrian 78250003Sadrian 79250003Sadrian#ifndef __REG_OSPREY_REG_MAP_H__ 80250003Sadrian#define __REG_OSPREY_REG_MAP_H__ 81250003Sadrian 82250003Sadrian#include "osprey_reg_map_macro.h" 83250003Sadrian#include "poseidon_reg_map_macro.h" 84250003Sadrian 85250003Sadrianstruct mac_dma_reg { 86250003Sadrian volatile char pad__0[0x8]; /* 0x0 - 0x8 */ 87250003Sadrian volatile u_int32_t MAC_DMA_CR; /* 0x8 - 0xc */ 88250003Sadrian volatile char pad__1[0x8]; /* 0xc - 0x14 */ 89250003Sadrian volatile u_int32_t MAC_DMA_CFG; /* 0x14 - 0x18 */ 90250003Sadrian volatile u_int32_t MAC_DMA_RXBUFPTR_THRESH; /* 0x18 - 0x1c */ 91250003Sadrian volatile u_int32_t MAC_DMA_TXDPPTR_THRESH; /* 0x1c - 0x20 */ 92250003Sadrian volatile u_int32_t MAC_DMA_MIRT; /* 0x20 - 0x24 */ 93250003Sadrian volatile u_int32_t MAC_DMA_GLOBAL_IER; /* 0x24 - 0x28 */ 94250003Sadrian volatile u_int32_t MAC_DMA_TIMT; /* 0x28 - 0x2c */ 95250003Sadrian volatile u_int32_t MAC_DMA_RIMT; /* 0x2c - 0x30 */ 96250003Sadrian volatile u_int32_t MAC_DMA_TXCFG; /* 0x30 - 0x34 */ 97250003Sadrian volatile u_int32_t MAC_DMA_RXCFG; /* 0x34 - 0x38 */ 98250003Sadrian volatile u_int32_t MAC_DMA_RXJLA; /* 0x38 - 0x3c */ 99250003Sadrian volatile char pad__2[0x4]; /* 0x3c - 0x40 */ 100250003Sadrian volatile u_int32_t MAC_DMA_MIBC; /* 0x40 - 0x44 */ 101250003Sadrian volatile u_int32_t MAC_DMA_TOPS; /* 0x44 - 0x48 */ 102250003Sadrian volatile u_int32_t MAC_DMA_RXNPTO; /* 0x48 - 0x4c */ 103250003Sadrian volatile u_int32_t MAC_DMA_TXNPTO; /* 0x4c - 0x50 */ 104250003Sadrian volatile u_int32_t MAC_DMA_RPGTO; /* 0x50 - 0x54 */ 105250003Sadrian volatile char pad__3[0x4]; /* 0x54 - 0x58 */ 106250003Sadrian volatile u_int32_t MAC_DMA_MACMISC; /* 0x58 - 0x5c */ 107250003Sadrian volatile u_int32_t MAC_DMA_INTER; /* 0x5c - 0x60 */ 108250003Sadrian volatile u_int32_t MAC_DMA_DATABUF; /* 0x60 - 0x64 */ 109250003Sadrian volatile u_int32_t MAC_DMA_GTT; /* 0x64 - 0x68 */ 110250003Sadrian volatile u_int32_t MAC_DMA_GTTM; /* 0x68 - 0x6c */ 111250003Sadrian volatile u_int32_t MAC_DMA_CST; /* 0x6c - 0x70 */ 112250003Sadrian volatile u_int32_t MAC_DMA_RXDP_SIZE; /* 0x70 - 0x74 */ 113250003Sadrian volatile u_int32_t MAC_DMA_RX_QUEUE_HP_RXDP; /* 0x74 - 0x78 */ 114250003Sadrian volatile u_int32_t MAC_DMA_RX_QUEUE_LP_RXDP; /* 0x78 - 0x7c */ 115250003Sadrian volatile char pad__4[0x4]; /* 0x7c - 0x80 */ 116250003Sadrian volatile u_int32_t MAC_DMA_ISR_P; /* 0x80 - 0x84 */ 117250003Sadrian volatile u_int32_t MAC_DMA_ISR_S0; /* 0x84 - 0x88 */ 118250003Sadrian volatile u_int32_t MAC_DMA_ISR_S1; /* 0x88 - 0x8c */ 119250003Sadrian volatile u_int32_t MAC_DMA_ISR_S2; /* 0x8c - 0x90 */ 120250003Sadrian volatile u_int32_t MAC_DMA_ISR_S3; /* 0x90 - 0x94 */ 121250003Sadrian volatile u_int32_t MAC_DMA_ISR_S4; /* 0x94 - 0x98 */ 122250003Sadrian volatile u_int32_t MAC_DMA_ISR_S5; /* 0x98 - 0x9c */ 123250003Sadrian /* Jupiter */ 124250003Sadrian volatile u_int32_t MAC_DMA_ISR_S6; /* 0x9c - 0xa0 */ 125250003Sadrian volatile u_int32_t MAC_DMA_IMR_P; /* 0xa0 - 0xa4 */ 126250003Sadrian volatile u_int32_t MAC_DMA_IMR_S0; /* 0xa4 - 0xa8 */ 127250003Sadrian volatile u_int32_t MAC_DMA_IMR_S1; /* 0xa8 - 0xac */ 128250003Sadrian volatile u_int32_t MAC_DMA_IMR_S2; /* 0xac - 0xb0 */ 129250003Sadrian volatile u_int32_t MAC_DMA_IMR_S3; /* 0xb0 - 0xb4 */ 130250003Sadrian volatile u_int32_t MAC_DMA_IMR_S4; /* 0xb4 - 0xb8 */ 131250003Sadrian volatile u_int32_t MAC_DMA_IMR_S5; /* 0xb8 - 0xbc */ 132250003Sadrian /* Jupiter */ 133250003Sadrian volatile u_int32_t MAC_DMA_IMR_S6; /* 0xbc - 0xc0 */ 134250003Sadrian volatile u_int32_t MAC_DMA_ISR_P_RAC; /* 0xc0 - 0xc4 */ 135250003Sadrian volatile u_int32_t MAC_DMA_ISR_S0_S; /* 0xc4 - 0xc8 */ 136250003Sadrian volatile u_int32_t MAC_DMA_ISR_S1_S; /* 0xc8 - 0xcc */ 137250003Sadrian /* Jupiter */ 138250003Sadrian volatile u_int32_t MAC_DMA_ISR_S6_S; /* 0xcc - 0xd0 */ 139250003Sadrian volatile u_int32_t MAC_DMA_ISR_S2_S; /* 0xd0 - 0xd4 */ 140250003Sadrian volatile u_int32_t MAC_DMA_ISR_S3_S; /* 0xd4 - 0xd8 */ 141250003Sadrian volatile u_int32_t MAC_DMA_ISR_S4_S; /* 0xd8 - 0xdc */ 142250003Sadrian volatile u_int32_t MAC_DMA_ISR_S5_S; /* 0xdc - 0xe0 */ 143250003Sadrian volatile u_int32_t MAC_DMA_DMADBG_0; /* 0xe0 - 0xe4 */ 144250003Sadrian volatile u_int32_t MAC_DMA_DMADBG_1; /* 0xe4 - 0xe8 */ 145250003Sadrian volatile u_int32_t MAC_DMA_DMADBG_2; /* 0xe8 - 0xec */ 146250003Sadrian volatile u_int32_t MAC_DMA_DMADBG_3; /* 0xec - 0xf0 */ 147250003Sadrian volatile u_int32_t MAC_DMA_DMADBG_4; /* 0xf0 - 0xf4 */ 148250003Sadrian volatile u_int32_t MAC_DMA_DMADBG_5; /* 0xf4 - 0xf8 */ 149250003Sadrian volatile u_int32_t MAC_DMA_DMADBG_6; /* 0xf8 - 0xfc */ 150250003Sadrian volatile u_int32_t MAC_DMA_DMADBG_7; /* 0xfc - 0x100 */ 151250003Sadrian volatile u_int32_t MAC_DMA_QCU_TXDP_REMAINING_QCU_7_0; 152250003Sadrian /* 0x100 - 0x104 */ 153250003Sadrian volatile u_int32_t MAC_DMA_QCU_TXDP_REMAINING_QCU_9_8; 154250003Sadrian /* 0x104 - 0x108 */ 155250003Sadrian}; 156250003Sadrian 157250003Sadrianstruct mac_qcu_reg { 158250003Sadrian volatile char pad__0[0x800]; /* 0x0 - 0x800 */ 159250003Sadrian volatile u_int32_t MAC_QCU_TXDP[10]; /* 0x800 - 0x828 */ 160250003Sadrian volatile char pad__1[0x8]; /* 0x828 - 0x830 */ 161250003Sadrian volatile u_int32_t MAC_QCU_STATUS_RING_START; /* 0x830 - 0x834 */ 162250003Sadrian volatile u_int32_t MAC_QCU_STATUS_RING_END; /* 0x834 - 0x838 */ 163250003Sadrian volatile u_int32_t MAC_QCU_STATUS_RING_CURRENT; /* 0x838 - 0x83c */ 164250003Sadrian volatile char pad__2[0x4]; /* 0x83c - 0x840 */ 165250003Sadrian volatile u_int32_t MAC_QCU_TXE; /* 0x840 - 0x844 */ 166250003Sadrian volatile char pad__3[0x3c]; /* 0x844 - 0x880 */ 167250003Sadrian volatile u_int32_t MAC_QCU_TXD; /* 0x880 - 0x884 */ 168250003Sadrian volatile char pad__4[0x3c]; /* 0x884 - 0x8c0 */ 169250003Sadrian volatile u_int32_t MAC_QCU_CBR[10]; /* 0x8c0 - 0x8e8 */ 170250003Sadrian volatile char pad__5[0x18]; /* 0x8e8 - 0x900 */ 171250003Sadrian volatile u_int32_t MAC_QCU_RDYTIME[10]; /* 0x900 - 0x928 */ 172250003Sadrian volatile char pad__6[0x18]; /* 0x928 - 0x940 */ 173250003Sadrian volatile u_int32_t MAC_QCU_ONESHOT_ARM_SC; /* 0x940 - 0x944 */ 174250003Sadrian volatile char pad__7[0x3c]; /* 0x944 - 0x980 */ 175250003Sadrian volatile u_int32_t MAC_QCU_ONESHOT_ARM_CC; /* 0x980 - 0x984 */ 176250003Sadrian volatile char pad__8[0x3c]; /* 0x984 - 0x9c0 */ 177250003Sadrian volatile u_int32_t MAC_QCU_MISC[10]; /* 0x9c0 - 0x9e8 */ 178250003Sadrian volatile char pad__9[0x18]; /* 0x9e8 - 0xa00 */ 179250003Sadrian volatile u_int32_t MAC_QCU_CNT[10]; /* 0xa00 - 0xa28 */ 180250003Sadrian volatile char pad__10[0x18]; /* 0xa28 - 0xa40 */ 181250003Sadrian volatile u_int32_t MAC_QCU_RDYTIME_SHDN; /* 0xa40 - 0xa44 */ 182250003Sadrian volatile u_int32_t MAC_QCU_DESC_CRC_CHK; /* 0xa44 - 0xa48 */ 183250003Sadrian /* Jupiter_20 */ 184250003Sadrian volatile u_int32_t MAC_QCU_EOL; /* 0xa48 - 0xa4c */ 185250003Sadrian}; 186250003Sadrian 187250003Sadrianstruct mac_dcu_reg { 188250003Sadrian volatile char pad__0[0x1000]; /* 0x0 - 0x1000 */ 189250003Sadrian volatile u_int32_t MAC_DCU_QCUMASK[10]; /* 0x1000 - 0x1028 */ 190250003Sadrian volatile char pad__1[0x8]; /* 0x1028 - 0x1030 */ 191250003Sadrian volatile u_int32_t MAC_DCU_GBL_IFS_SIFS; /* 0x1030 - 0x1034 */ 192250003Sadrian volatile char pad__2[0x4]; /* 0x1034 - 0x1038 */ 193250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU0_31_0; /* 0x1038 - 0x103c */ 194250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU8_31_0; /* 0x103c - 0x1040 */ 195250003Sadrian volatile u_int32_t MAC_DCU_LCL_IFS[10]; /* 0x1040 - 0x1068 */ 196250003Sadrian volatile char pad__3[0x8]; /* 0x1068 - 0x1070 */ 197250003Sadrian volatile u_int32_t MAC_DCU_GBL_IFS_SLOT; /* 0x1070 - 0x1074 */ 198250003Sadrian volatile char pad__4[0x4]; /* 0x1074 - 0x1078 */ 199250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU0_63_32; /* 0x1078 - 0x107c */ 200250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU8_63_32; /* 0x107c - 0x1080 */ 201250003Sadrian volatile u_int32_t MAC_DCU_RETRY_LIMIT[10]; /* 0x1080 - 0x10a8 */ 202250003Sadrian volatile char pad__5[0x8]; /* 0x10a8 - 0x10b0 */ 203250003Sadrian volatile u_int32_t MAC_DCU_GBL_IFS_EIFS; /* 0x10b0 - 0x10b4 */ 204250003Sadrian volatile char pad__6[0x4]; /* 0x10b4 - 0x10b8 */ 205250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU0_95_64; /* 0x10b8 - 0x10bc */ 206250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU8_95_64; /* 0x10bc - 0x10c0 */ 207250003Sadrian volatile u_int32_t MAC_DCU_CHANNEL_TIME[10]; /* 0x10c0 - 0x10e8 */ 208250003Sadrian volatile char pad__7[0x8]; /* 0x10e8 - 0x10f0 */ 209250003Sadrian volatile u_int32_t MAC_DCU_GBL_IFS_MISC; /* 0x10f0 - 0x10f4 */ 210250003Sadrian volatile char pad__8[0x4]; /* 0x10f4 - 0x10f8 */ 211250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU0_127_96; 212250003Sadrian /* 0x10f8 - 0x10fc */ 213250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU8_127_96; 214250003Sadrian /* 0x10fc - 0x1100 */ 215250003Sadrian volatile u_int32_t MAC_DCU_MISC[10]; /* 0x1100 - 0x1128 */ 216250003Sadrian volatile char pad__9[0x10]; /* 0x1128 - 0x1138 */ 217250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU1_31_0; /* 0x1138 - 0x113c */ 218250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU9_31_0; /* 0x113c - 0x1140 */ 219250003Sadrian volatile u_int32_t MAC_DCU_SEQ; /* 0x1140 - 0x1144 */ 220250003Sadrian volatile char pad__10[0x34]; /* 0x1144 - 0x1178 */ 221250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU1_63_32; /* 0x1178 - 0x117c */ 222250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU9_63_32; /* 0x117c - 0x1180 */ 223250003Sadrian volatile char pad__11[0x38]; /* 0x1180 - 0x11b8 */ 224250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU1_95_64; /* 0x11b8 - 0x11bc */ 225250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU9_95_64; /* 0x11bc - 0x11c0 */ 226250003Sadrian volatile char pad__12[0x38]; /* 0x11c0 - 0x11f8 */ 227250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU1_127_96; 228250003Sadrian /* 0x11f8 - 0x11fc */ 229250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU9_127_96; 230250003Sadrian /* 0x11fc - 0x1200 */ 231250003Sadrian volatile char pad__13[0x38]; /* 0x1200 - 0x1238 */ 232250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU2_31_0; /* 0x1238 - 0x123c */ 233250003Sadrian volatile char pad__14[0x34]; /* 0x123c - 0x1270 */ 234250003Sadrian volatile u_int32_t MAC_DCU_PAUSE; /* 0x1270 - 0x1274 */ 235250003Sadrian volatile char pad__15[0x4]; /* 0x1274 - 0x1278 */ 236250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU2_63_32; /* 0x1278 - 0x127c */ 237250003Sadrian volatile char pad__16[0x34]; /* 0x127c - 0x12b0 */ 238250003Sadrian volatile u_int32_t MAC_DCU_WOW_KACFG; /* 0x12b0 - 0x12b4 */ 239250003Sadrian volatile char pad__17[0x4]; /* 0x12b4 - 0x12b8 */ 240250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU2_95_64; /* 0x12b8 - 0x12bc */ 241250003Sadrian volatile char pad__18[0x34]; /* 0x12bc - 0x12f0 */ 242250003Sadrian volatile u_int32_t MAC_DCU_TXSLOT; /* 0x12f0 - 0x12f4 */ 243250003Sadrian volatile char pad__19[0x4]; /* 0x12f4 - 0x12f8 */ 244250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU2_127_96; 245250003Sadrian /* 0x12f8 - 0x12fc */ 246250003Sadrian volatile char pad__20[0x3c]; /* 0x12fc - 0x1338 */ 247250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU3_31_0; /* 0x1338 - 0x133c */ 248250003Sadrian volatile char pad__21[0x3c]; /* 0x133c - 0x1378 */ 249250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU3_63_32; /* 0x1378 - 0x137c */ 250250003Sadrian volatile char pad__22[0x3c]; /* 0x137c - 0x13b8 */ 251250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU3_95_64; /* 0x13b8 - 0x13bc */ 252250003Sadrian volatile char pad__23[0x3c]; /* 0x13bc - 0x13f8 */ 253250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU3_127_96; 254250003Sadrian /* 0x13f8 - 0x13fc */ 255250003Sadrian volatile char pad__24[0x3c]; /* 0x13fc - 0x1438 */ 256250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU4_31_0; /* 0x1438 - 0x143c */ 257250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_CLEAR; /* 0x143c - 0x1440 */ 258250003Sadrian volatile char pad__25[0x38]; /* 0x1440 - 0x1478 */ 259250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU4_63_32; /* 0x1478 - 0x147c */ 260250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_SET; /* 0x147c - 0x1480 */ 261250003Sadrian volatile char pad__26[0x38]; /* 0x1480 - 0x14b8 */ 262250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU4_95_64; /* 0x14b8 - 0x14bc */ 263250003Sadrian volatile char pad__27[0x3c]; /* 0x14bc - 0x14f8 */ 264250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU4_127_96; 265250003Sadrian /* 0x14f8 - 0x14fc */ 266250003Sadrian volatile char pad__28[0x3c]; /* 0x14fc - 0x1538 */ 267250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU5_31_0; /* 0x1538 - 0x153c */ 268250003Sadrian volatile char pad__29[0x3c]; /* 0x153c - 0x1578 */ 269250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU5_63_32; /* 0x1578 - 0x157c */ 270250003Sadrian volatile char pad__30[0x3c]; /* 0x157c - 0x15b8 */ 271250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU5_95_64; /* 0x15b8 - 0x15bc */ 272250003Sadrian volatile char pad__31[0x3c]; /* 0x15bc - 0x15f8 */ 273250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU5_127_96; 274250003Sadrian /* 0x15f8 - 0x15fc */ 275250003Sadrian volatile char pad__32[0x3c]; /* 0x15fc - 0x1638 */ 276250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU6_31_0; /* 0x1638 - 0x163c */ 277250003Sadrian volatile char pad__33[0x3c]; /* 0x163c - 0x1678 */ 278250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU6_63_32; /* 0x1678 - 0x167c */ 279250003Sadrian volatile char pad__34[0x3c]; /* 0x167c - 0x16b8 */ 280250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU6_95_64; /* 0x16b8 - 0x16bc */ 281250003Sadrian volatile char pad__35[0x3c]; /* 0x16bc - 0x16f8 */ 282250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU6_127_96; 283250003Sadrian /* 0x16f8 - 0x16fc */ 284250003Sadrian volatile char pad__36[0x3c]; /* 0x16fc - 0x1738 */ 285250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU7_31_0; /* 0x1738 - 0x173c */ 286250003Sadrian volatile char pad__37[0x3c]; /* 0x173c - 0x1778 */ 287250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU7_63_32; /* 0x1778 - 0x177c */ 288250003Sadrian volatile char pad__38[0x3c]; /* 0x177c - 0x17b8 */ 289250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU7_95_64; /* 0x17b8 - 0x17bc */ 290250003Sadrian volatile char pad__39[0x3c]; /* 0x17bc - 0x17f8 */ 291250003Sadrian volatile u_int32_t MAC_DCU_TXFILTER_DCU7_127_96; 292250003Sadrian /* 0x17f8 - 0x17fc */ 293250003Sadrian}; 294250003Sadrian 295250003Sadrianstruct host_intf_reg { 296250003Sadrian volatile char pad__0[0x4000]; /* 0x0 - 0x4000 */ 297250003Sadrian volatile u_int32_t HOST_INTF_RESET_CONTROL; /* 0x4000 - 0x4004 */ 298250003Sadrian volatile u_int32_t HOST_INTF_WORK_AROUND; /* 0x4004 - 0x4008 */ 299250003Sadrian volatile u_int32_t HOST_INTF_PM_STATE; /* 0x4008 - 0x400c */ 300250003Sadrian volatile u_int32_t HOST_INTF_CXPL_DEBUG_INFOL; /* 0x400c - 0x4010 */ 301250003Sadrian volatile u_int32_t HOST_INTF_CXPL_DEBUG_INFOH; /* 0x4010 - 0x4014 */ 302250003Sadrian volatile u_int32_t HOST_INTF_PM_CTRL; /* 0x4014 - 0x4018 */ 303250003Sadrian volatile u_int32_t HOST_INTF_TIMEOUT; /* 0x4018 - 0x401c */ 304250003Sadrian volatile u_int32_t HOST_INTF_EEPROM_CTRL; /* 0x401c - 0x4020 */ 305250003Sadrian volatile u_int32_t HOST_INTF_SREV; /* 0x4020 - 0x4024 */ 306250003Sadrian volatile char pad__1[0x4]; /* 0x4024 - 0x4028 */ 307250003Sadrian volatile u_int32_t HOST_INTF_INTR_SYNC_CAUSE; /* 0x4028 - 0x402c */ 308250003Sadrian volatile u_int32_t HOST_INTF_INTR_SYNC_ENABLE; /* 0x402c - 0x4030 */ 309250003Sadrian volatile u_int32_t HOST_INTF_INTR_ASYNC_MASK; /* 0x4030 - 0x4034 */ 310250003Sadrian volatile u_int32_t HOST_INTF_INTR_SYNC_MASK; /* 0x4034 - 0x4038 */ 311250003Sadrian volatile u_int32_t HOST_INTF_INTR_ASYNC_CAUSE; /* 0x4038 - 0x403c */ 312250003Sadrian volatile u_int32_t HOST_INTF_INTR_ASYNC_ENABLE; /* 0x403c - 0x4040 */ 313250003Sadrian volatile u_int32_t HOST_INTF_PCIE_PHY_RW; /* 0x4040 - 0x4044 */ 314250003Sadrian volatile u_int32_t HOST_INTF_PCIE_PHY_LOAD; /* 0x4044 - 0x4048 */ 315250003Sadrian volatile u_int32_t HOST_INTF_GPIO_OUT; /* 0x4048 - 0x404c */ 316250003Sadrian volatile u_int32_t HOST_INTF_GPIO_IN; /* 0x404c - 0x4050 */ 317250003Sadrian volatile u_int32_t HOST_INTF_GPIO_OE; /* 0x4050 - 0x4054 */ 318250003Sadrian volatile u_int32_t HOST_INTF_GPIO_OE1; /* 0x4054 - 0x4058 */ 319250003Sadrian volatile u_int32_t HOST_INTF_GPIO_INTR_POLAR; /* 0x4058 - 0x405c */ 320250003Sadrian volatile u_int32_t HOST_INTF_GPIO_INPUT_VALUE; /* 0x405c - 0x4060 */ 321250003Sadrian volatile u_int32_t HOST_INTF_GPIO_INPUT_MUX1; /* 0x4060 - 0x4064 */ 322250003Sadrian volatile u_int32_t HOST_INTF_GPIO_INPUT_MUX2; /* 0x4064 - 0x4068 */ 323250003Sadrian volatile u_int32_t HOST_INTF_GPIO_OUTPUT_MUX1; /* 0x4068 - 0x406c */ 324250003Sadrian volatile u_int32_t HOST_INTF_GPIO_OUTPUT_MUX2; /* 0x406c - 0x4070 */ 325250003Sadrian volatile u_int32_t HOST_INTF_GPIO_OUTPUT_MUX3; /* 0x4070 - 0x4074 */ 326250003Sadrian volatile u_int32_t HOST_INTF_GPIO_INPUT_STATE; /* 0x4074 - 0x4078 */ 327250003Sadrian volatile u_int32_t HOST_INTF_SPARE; /* 0x4078 - 0x407c */ 328250003Sadrian volatile u_int32_t HOST_INTF_PCIE_CORE_RST_EN; /* 0x407c - 0x4080 */ 329250003Sadrian volatile u_int32_t HOST_INTF_CLKRUN; /* 0x4080 - 0x4084 */ 330250003Sadrian volatile u_int32_t HOST_INTF_EEPROM_STS; /* 0x4084 - 0x4088 */ 331250003Sadrian volatile u_int32_t HOST_INTF_OBS_CTRL; /* 0x4088 - 0x408c */ 332250003Sadrian volatile u_int32_t HOST_INTF_RFSILENT; /* 0x408c - 0x4090 */ 333250003Sadrian volatile u_int32_t HOST_INTF_GPIO_PDPU; /* 0x4090 - 0x4094 */ 334250003Sadrian volatile u_int32_t HOST_INTF_GPIO_PDPU1; /* 0x4094 - 0x4098 */ 335250003Sadrian volatile u_int32_t HOST_INTF_GPIO_DS; /* 0x4098 - 0x409c */ 336250003Sadrian volatile u_int32_t HOST_INTF_GPIO_DS1; /* 0x409c - 0x40a0 */ 337250003Sadrian volatile u_int32_t HOST_INTF_MISC; /* 0x40a0 - 0x40a4 */ 338250003Sadrian volatile u_int32_t HOST_INTF_PCIE_MSI; /* 0x40a4 - 0x40a8 */ 339250003Sadrian volatile char pad__2[0x8]; /* 0x40a8 - 0x40b0 */ 340250003Sadrian volatile u_int32_t HOST_INTF_PCIE_PHY_LATENCY_NFTS_ADJ; 341250003Sadrian /* 0x40b0 - 0x40b4 */ 342250003Sadrian volatile u_int32_t HOST_INTF_MAC_TDMA_CCA_CNTL; /* 0x40b4 - 0x40b8 */ 343250003Sadrian volatile u_int32_t HOST_INTF_MAC_TXAPSYNC; /* 0x40b8 - 0x40bc */ 344250003Sadrian volatile u_int32_t HOST_INTF_MAC_TXSYNC_INITIAL_SYNC_TMR; 345250003Sadrian /* 0x40bc - 0x40c0 */ 346250003Sadrian volatile u_int32_t HOST_INTF_INTR_PRIORITY_SYNC_CAUSE; 347250003Sadrian /* 0x40c0 - 0x40c4 */ 348250003Sadrian volatile u_int32_t HOST_INTF_INTR_PRIORITY_SYNC_ENABLE; 349250003Sadrian /* 0x40c4 - 0x40c8 */ 350250003Sadrian volatile u_int32_t HOST_INTF_INTR_PRIORITY_ASYNC_MASK; 351250003Sadrian /* 0x40c8 - 0x40cc */ 352250003Sadrian volatile u_int32_t HOST_INTF_INTR_PRIORITY_SYNC_MASK; 353250003Sadrian /* 0x40cc - 0x40d0 */ 354250003Sadrian volatile u_int32_t HOST_INTF_INTR_PRIORITY_ASYNC_CAUSE; 355250003Sadrian /* 0x40d0 - 0x40d4 */ 356250003Sadrian volatile u_int32_t HOST_INTF_INTR_PRIORITY_ASYNC_ENABLE; 357250003Sadrian /* 0x40d4 - 0x40d8 */ 358250003Sadrian volatile u_int32_t HOST_INTF_OTP; /* 0x40d8 - 0x40dc */ 359250003Sadrian volatile char pad__3[0x4]; /* 0x40dc - 0x40e0 */ 360250003Sadrian volatile u_int32_t PCIE_CO_ERR_CTR0; /* 0x40e0 - 0x40e4 */ 361250003Sadrian volatile u_int32_t PCIE_CO_ERR_CTR1; /* 0x40e4 - 0x40e8 */ 362250003Sadrian volatile u_int32_t PCIE_CO_ERR_CTR_CTRL; /* 0x40e8 - 0x40ec */ 363250003Sadrian /* Poseidon, Jupiter */ 364250003Sadrian volatile u_int32_t AXI_INTERCONNECT_CTRL; /* 0x40ec - 0x40f0 */ 365250003Sadrian /* Jupiter */ 366250003Sadrian volatile u_int32_t PCIE_AXI_BRIDGE_CTRL; /* 0x40f0 - 0x40f4 */ 367250003Sadrian}; 368250003Sadrian 369250003Sadrianstruct emulation_misc_regs { 370250003Sadrian volatile char pad__0[0x4f00]; /* 0x0 - 0x4f00 */ 371250003Sadrian volatile u_int32_t FPGA_PHY_LAYER_REVID; /* 0x4f00 - 0x4f04 */ 372250003Sadrian volatile u_int32_t FPGA_LINK_LAYER_REVID; /* 0x4f04 - 0x4f08 */ 373250003Sadrian volatile u_int32_t FPGA_REG1; /* 0x4f08 - 0x4f0c */ 374250003Sadrian volatile u_int32_t FPGA_REG2; /* 0x4f0c - 0x4f10 */ 375250003Sadrian volatile u_int32_t FPGA_REG3; /* 0x4f10 - 0x4f14 */ 376250003Sadrian volatile u_int32_t FPGA_REG4; /* 0x4f14 - 0x4f18 */ 377250003Sadrian volatile u_int32_t FPGA_REG5; /* 0x4f18 - 0x4f1c */ 378250003Sadrian volatile u_int32_t FPGA_REG6; /* 0x4f1c - 0x4f20 */ 379250003Sadrian volatile u_int32_t FPGA_REG7; /* 0x4f20 - 0x4f24 */ 380250003Sadrian volatile u_int32_t FPGA_REG8; /* 0x4f24 - 0x4f28 */ 381250003Sadrian volatile u_int32_t FPGA_REG9; /* 0x4f28 - 0x4f2c */ 382250003Sadrian volatile u_int32_t FPGA_REG10; /* 0x4f2c - 0x4f30 */ 383250003Sadrian /* Aphrodite-start */ 384250003Sadrian volatile u_int32_t FPGA_REG11; /* 0x4f30 - 0x4f34 */ 385250003Sadrian volatile u_int32_t FPGA_REG12; /* 0x4f34 - 0x4f38 */ 386250003Sadrian volatile u_int32_t FPGA_REG13; /* 0x4f38 - 0x4f3c */ 387250003Sadrian volatile u_int32_t FPGA_REG14; /* 0x4f3c - 0x4f40 */ 388250003Sadrian /* Aphrodite-end */ 389250003Sadrian}; 390250003Sadrian 391250003Sadrianstruct DWC_pcie_dbi_axi__DWC_pcie_dbi_axi_0 { 392250003Sadrian volatile u_int32_t ID; /* 0x0 - 0x4 */ 393250003Sadrian volatile u_int32_t STS_CMD_RGSTR; /* 0x4 - 0x8 */ 394250003Sadrian volatile u_int32_t CLS_REV_ID; /* 0x8 - 0xc */ 395250003Sadrian volatile u_int32_t BIST_HEAD_LAT_CACH; /* 0xc - 0x10 */ 396250003Sadrian volatile u_int32_t BAS_ADR_0; /* 0x10 - 0x14 */ 397250003Sadrian volatile u_int32_t BAS_ADR_1; /* 0x14 - 0x18 */ 398250003Sadrian volatile u_int32_t BAS_ADR_2; /* 0x18 - 0x1c */ 399250003Sadrian volatile u_int32_t BAS_ADR_3; /* 0x1c - 0x20 */ 400250003Sadrian volatile u_int32_t BAS_ADR_4; /* 0x20 - 0x24 */ 401250003Sadrian volatile u_int32_t BAS_ADR_5; /* 0x24 - 0x28 */ 402250003Sadrian volatile u_int32_t CRD_CIS_PTR; /* 0x28 - 0x2c */ 403250003Sadrian volatile u_int32_t Sub_VenID; /* 0x2c - 0x30 */ 404250003Sadrian volatile u_int32_t EXP_ROM_ADDR; /* 0x30 - 0x34 */ 405250003Sadrian volatile u_int32_t CAPPTR; /* 0x34 - 0x38 */ 406250003Sadrian volatile u_int32_t RESERVE2; /* 0x38 - 0x3c */ 407250003Sadrian volatile u_int32_t LAT_INT; /* 0x3c - 0x40 */ 408250003Sadrian}; 409250003Sadrian 410250003Sadrianstruct DWC_pcie_dbi_axi__DWC_pcie_dbi_axi_1 { 411250003Sadrian volatile u_int32_t CFG_PWR_CAP; /* 0x0 - 0x4 */ 412250003Sadrian volatile u_int32_t PWR_CSR; /* 0x4 - 0x8 */ 413250003Sadrian}; 414250003Sadrian 415250003Sadrianstruct DWC_pcie_dbi_axi__DWC_pcie_dbi_axi_2 { 416250003Sadrian volatile u_int32_t MSG_CTR; /* 0x0 - 0x4 */ 417250003Sadrian volatile u_int32_t MSI_L32; /* 0x4 - 0x8 */ 418250003Sadrian volatile u_int32_t MSI_U32; /* 0x8 - 0xc */ 419250003Sadrian volatile u_int32_t MSI_DATA; /* 0xc - 0x10 */ 420250003Sadrian}; 421250003Sadrian 422250003Sadrianstruct DWC_pcie_dbi_axi__DWC_pcie_dbi_axi_3 { 423250003Sadrian volatile u_int32_t PCIE_CAP; /* 0x0 - 0x4 */ 424250003Sadrian volatile u_int32_t DEV_CAP; /* 0x4 - 0x8 */ 425250003Sadrian volatile u_int32_t DEV_STS_CTRL; /* 0x8 - 0xc */ 426250003Sadrian volatile u_int32_t LNK_CAP; /* 0xc - 0x10 */ 427250003Sadrian volatile u_int32_t LNK_STS_CTRL; /* 0x10 - 0x14 */ 428250003Sadrian volatile u_int32_t SLT_CAP; /* 0x14 - 0x18 */ 429250003Sadrian volatile u_int32_t SLT_STS_CTRL; /* 0x18 - 0x1c */ 430250003Sadrian}; 431250003Sadrian 432250003Sadrianstruct DWC_pcie_dbi_axi__DWC_pcie_dbi_axi_5 { 433250003Sadrian volatile u_int32_t VPD_CAP; /* 0x0 - 0x4 */ 434250003Sadrian volatile u_int32_t VPD_DATA; /* 0x4 - 0x8 */ 435250003Sadrian}; 436250003Sadrian 437250003Sadrianstruct DWC_pcie_dbi_axi__DWC_pcie_dbi_axi_6 { 438250003Sadrian volatile u_int32_t PCIE_EN_CAP_AER; /* 0x0 - 0x4 */ 439250003Sadrian volatile u_int32_t UN_ERR_ST_R; /* 0x4 - 0x8 */ 440250003Sadrian volatile u_int32_t UN_ERR_MS_R; /* 0x8 - 0xc */ 441250003Sadrian volatile u_int32_t UN_ERR_SV_R; /* 0xc - 0x10 */ 442250003Sadrian volatile u_int32_t CO_ERR_ST_R; /* 0x10 - 0x14 */ 443250003Sadrian volatile u_int32_t CO_ERR_MS_R; /* 0x14 - 0x18 */ 444250003Sadrian volatile u_int32_t ADERR_CAP_CR; /* 0x18 - 0x1c */ 445250003Sadrian volatile u_int32_t HD_L_R0; /* 0x1c - 0x20 */ 446250003Sadrian volatile u_int32_t HD_L_R4; /* 0x20 - 0x24 */ 447250003Sadrian volatile u_int32_t HD_L_R8; /* 0x24 - 0x28 */ 448250003Sadrian volatile u_int32_t HD_L_R12; /* 0x28 - 0x2c */ 449250003Sadrian}; 450250003Sadrian 451250003Sadrianstruct DWC_pcie_dbi_axi__DWC_pcie_dbi_axi_7 { 452250003Sadrian volatile u_int32_t PCIE_EN_CAP_VC; /* 0x0 - 0x4 */ 453250003Sadrian volatile u_int32_t PVC_CAP_R1; /* 0x4 - 0x8 */ 454250003Sadrian volatile u_int32_t P_CAP_R2; /* 0x8 - 0xc */ 455250003Sadrian volatile u_int32_t PVC_STS_CTRL; /* 0xc - 0x10 */ 456250003Sadrian volatile u_int32_t VC_CAP_R; /* 0x10 - 0x14 */ 457250003Sadrian volatile u_int32_t VC_CTL_R; /* 0x14 - 0x18 */ 458250003Sadrian volatile u_int32_t VC_STS_RSV; /* 0x18 - 0x1c */ 459250003Sadrian volatile u_int32_t VCR_CAP_R1; /* 0x1c - 0x20 */ 460250003Sadrian volatile u_int32_t VCR_CTRL_R1; /* 0x20 - 0x24 */ 461250003Sadrian volatile u_int32_t VCR_STS_R1; /* 0x24 - 0x28 */ 462250003Sadrian}; 463250003Sadrian 464250003Sadrianstruct DWC_pcie_dbi_axi__DWC_pcie_dbi_axi_7_Jupiter { 465250003Sadrian volatile u_int32_t PCIE_EN_CAP_VC; /* 0x0 - 0x4 */ 466250003Sadrian volatile u_int32_t PVC_CAP_R1; /* 0x4 - 0x8 */ 467250003Sadrian volatile u_int32_t P_CAP_R2; /* 0x8 - 0xc */ 468250003Sadrian volatile u_int32_t PVC_STS_CTRL; /* 0xc - 0x10 */ 469250003Sadrian volatile u_int32_t VC_CAP_R; /* 0x10 - 0x14 */ 470250003Sadrian volatile u_int32_t VC_CTL_R; /* 0x14 - 0x18 */ 471250003Sadrian volatile u_int32_t VC_STS_RSV; /* 0x18 - 0x1c */ 472250003Sadrian}; 473250003Sadrian 474250003Sadrianstruct DWC_pcie_dbi_axi__DWC_pcie_dbi_axi_8 { 475250003Sadrian volatile u_int32_t DEV_EN_CAP; /* 0x0 - 0x4 */ 476250003Sadrian volatile u_int32_t SN_R1; /* 0x4 - 0x8 */ 477250003Sadrian volatile u_int32_t SN_R2; /* 0x8 - 0xc */ 478250003Sadrian}; 479250003Sadrian 480250003Sadrianstruct DWC_pcie_dbi_axi__DWC_pcie_dbi_axi_9 { 481250003Sadrian volatile u_int32_t LAT_REL_TIM; /* 0x0 - 0x4 */ 482250003Sadrian volatile u_int32_t OT_MSG_R; /* 0x4 - 0x8 */ 483250003Sadrian volatile u_int32_t PT_LNK_R; /* 0x8 - 0xc */ 484250003Sadrian volatile u_int32_t ACk_FREQ_R; /* 0xc - 0x10 */ 485250003Sadrian volatile u_int32_t PT_LNK_CTRL_R; /* 0x10 - 0x14 */ 486250003Sadrian volatile u_int32_t LN_SKW_R; /* 0x14 - 0x18 */ 487250003Sadrian volatile u_int32_t SYMB_N_R; /* 0x18 - 0x1c */ 488250003Sadrian volatile u_int32_t SYMB_T_R; /* 0x1c - 0x20 */ 489250003Sadrian volatile u_int32_t FL_MSK_R2; /* 0x20 - 0x24 */ 490250003Sadrian volatile char pad__0[0x4]; /* 0x24 - 0x28 */ 491250003Sadrian volatile u_int32_t DB_R0; /* 0x28 - 0x2c */ 492250003Sadrian volatile u_int32_t DB_R1; /* 0x2c - 0x30 */ 493250003Sadrian volatile u_int32_t TR_P_STS_R; /* 0x30 - 0x34 */ 494250003Sadrian volatile u_int32_t TR_NP_STS_R; /* 0x34 - 0x38 */ 495250003Sadrian volatile u_int32_t TR_C_STS_R; /* 0x38 - 0x3c */ 496250003Sadrian volatile u_int32_t Q_STS_R; /* 0x3c - 0x40 */ 497250003Sadrian volatile u_int32_t VC_TR_A_R1; /* 0x40 - 0x44 */ 498250003Sadrian volatile u_int32_t VC_TR_A_R2; /* 0x44 - 0x48 */ 499250003Sadrian volatile u_int32_t VC0_PR_Q_C; /* 0x48 - 0x4c */ 500250003Sadrian volatile u_int32_t VC0_NPR_Q_C; /* 0x4c - 0x50 */ 501250003Sadrian volatile u_int32_t VC0_CR_Q_C; /* 0x50 - 0x54 */ 502250003Sadrian volatile u_int32_t VC1_PR_Q_C; /* 0x54 - 0x58 */ 503250003Sadrian volatile u_int32_t VC1_NPR_Q_C; /* 0x58 - 0x5c */ 504250003Sadrian volatile u_int32_t VC1_CR_Q_C; /* 0x5c - 0x60 */ 505250003Sadrian volatile u_int32_t VC2_PR_Q_C; /* 0x60 - 0x64 */ 506250003Sadrian volatile u_int32_t VC2_NPR_Q_C; /* 0x64 - 0x68 */ 507250003Sadrian volatile u_int32_t VC2_CR_Q_C; /* 0x68 - 0x6c */ 508250003Sadrian volatile u_int32_t VC3_PR_Q_C; /* 0x6c - 0x70 */ 509250003Sadrian volatile u_int32_t VC3_NPR_Q_C; /* 0x70 - 0x74 */ 510250003Sadrian volatile u_int32_t VC3_CR_Q_C; /* 0x74 - 0x78 */ 511250003Sadrian volatile u_int32_t VC4_PR_Q_C; /* 0x78 - 0x7c */ 512250003Sadrian volatile u_int32_t VC4_NPR_Q_C; /* 0x7c - 0x80 */ 513250003Sadrian volatile u_int32_t VC4_CR_Q_C; /* 0x80 - 0x84 */ 514250003Sadrian volatile u_int32_t VC5_PR_Q_C; /* 0x84 - 0x88 */ 515250003Sadrian volatile u_int32_t VC5_NPR_Q_C; /* 0x88 - 0x8c */ 516250003Sadrian volatile u_int32_t VC5_CR_Q_C; /* 0x8c - 0x90 */ 517250003Sadrian volatile u_int32_t VC6_PR_Q_C; /* 0x90 - 0x94 */ 518250003Sadrian volatile u_int32_t VC6_NPR_Q_C; /* 0x94 - 0x98 */ 519250003Sadrian volatile u_int32_t VC6_CR_Q_C; /* 0x98 - 0x9c */ 520250003Sadrian volatile u_int32_t VC7_PR_Q_C; /* 0x9c - 0xa0 */ 521250003Sadrian volatile u_int32_t VC7_NPR_Q_C; /* 0xa0 - 0xa4 */ 522250003Sadrian volatile u_int32_t VC7_CR_Q_C; /* 0xa4 - 0xa8 */ 523250003Sadrian volatile u_int32_t VC0_PB_D; /* 0xa8 - 0xac */ 524250003Sadrian volatile u_int32_t VC0_NPB_D; /* 0xac - 0xb0 */ 525250003Sadrian volatile u_int32_t VC0_CB_D; /* 0xb0 - 0xb4 */ 526250003Sadrian volatile u_int32_t VC1_PB_D; /* 0xb4 - 0xb8 */ 527250003Sadrian volatile u_int32_t VC1_NPB_D; /* 0xb8 - 0xbc */ 528250003Sadrian volatile u_int32_t VC1_CB_D; /* 0xbc - 0xc0 */ 529250003Sadrian volatile u_int32_t VC2_PB_D; /* 0xc0 - 0xc4 */ 530250003Sadrian volatile u_int32_t VC2_NPB_D; /* 0xc4 - 0xc8 */ 531250003Sadrian volatile u_int32_t VC2_CB_D; /* 0xc8 - 0xcc */ 532250003Sadrian volatile u_int32_t VC3_PB_D; /* 0xcc - 0xd0 */ 533250003Sadrian volatile u_int32_t VC3_NPB_D; /* 0xd0 - 0xd4 */ 534250003Sadrian volatile u_int32_t VC3_CB_D; /* 0xd4 - 0xd8 */ 535250003Sadrian volatile u_int32_t VC4_PB_D; /* 0xd8 - 0xdc */ 536250003Sadrian volatile u_int32_t VC4_NPB_D; /* 0xdc - 0xe0 */ 537250003Sadrian volatile u_int32_t VC4_CB_D; /* 0xe0 - 0xe4 */ 538250003Sadrian volatile u_int32_t VC5_PB_D; /* 0xe4 - 0xe8 */ 539250003Sadrian volatile u_int32_t VC5_NPB_D; /* 0xe8 - 0xec */ 540250003Sadrian volatile u_int32_t VC5_CB_D; /* 0xec - 0xf0 */ 541250003Sadrian volatile u_int32_t VC6_PB_D; /* 0xf0 - 0xf4 */ 542250003Sadrian volatile u_int32_t VC6_NPB_D; /* 0xf4 - 0xf8 */ 543250003Sadrian volatile u_int32_t VC6_CB_D; /* 0xf8 - 0xfc */ 544250003Sadrian volatile u_int32_t VC7_PB_D; /* 0xfc - 0x100 */ 545250003Sadrian volatile u_int32_t VC7_NPB_D; /* 0x100 - 0x104 */ 546250003Sadrian volatile u_int32_t VC7_CB_D; /* 0x104 - 0x108 */ 547250003Sadrian volatile char pad__1[0x4]; /* 0x108 - 0x10c */ 548250003Sadrian volatile u_int32_t GEN2; /* 0x10c - 0x110 */ 549250003Sadrian volatile u_int32_t PHY_STS_R; /* 0x110 - 0x114 */ 550250003Sadrian volatile u_int32_t PHY_CTRL_R; /* 0x114 - 0x118 */ 551250003Sadrian}; 552250003Sadrian 553250003Sadrianstruct DWC_pcie_dbi_axi { 554250003Sadrian volatile char pad__0[0x5000]; /* 0x0 - 0x5000 */ 555250003Sadrian struct DWC_pcie_dbi_axi__DWC_pcie_dbi_axi_0 DWC_pcie_dbi_axi_0; 556250003Sadrian /* 0x5000 - 0x5040 */ 557250003Sadrian struct DWC_pcie_dbi_axi__DWC_pcie_dbi_axi_1 DWC_pcie_dbi_axi_1; 558250003Sadrian /* 0x5040 - 0x5048 */ 559250003Sadrian volatile char pad__1[0x8]; /* 0x5048 - 0x5050 */ 560250003Sadrian struct DWC_pcie_dbi_axi__DWC_pcie_dbi_axi_2 DWC_pcie_dbi_axi_2; 561250003Sadrian /* 0x5050 - 0x5060 */ 562250003Sadrian volatile char pad__2[0x10]; /* 0x5060 - 0x5070 */ 563250003Sadrian struct DWC_pcie_dbi_axi__DWC_pcie_dbi_axi_3 DWC_pcie_dbi_axi_3; 564250003Sadrian /* 0x5070 - 0x508c */ 565250003Sadrian volatile char pad__3[0x44]; /* 0x508c - 0x50d0 */ 566250003Sadrian struct DWC_pcie_dbi_axi__DWC_pcie_dbi_axi_5 DWC_pcie_dbi_axi_5; 567250003Sadrian /* 0x50d0 - 0x50d8 */ 568250003Sadrian volatile char pad__4[0x28]; /* 0x50d8 - 0x5100 */ 569250003Sadrian struct DWC_pcie_dbi_axi__DWC_pcie_dbi_axi_6 DWC_pcie_dbi_axi_6; 570250003Sadrian /* 0x5100 - 0x512c */ 571250003Sadrian volatile char pad__5[0x14]; /* 0x512c - 0x5140 */ 572250003Sadrian union { 573250003Sadrian struct { 574250003Sadrian struct DWC_pcie_dbi_axi__DWC_pcie_dbi_axi_7 DWC_pcie_dbi_axi_7; 575250003Sadrian /* 0x5140 - 0x5168 */ 576250003Sadrian volatile char pad__1[0x198]; /* 0x5168 - 0x5300 */ 577250003Sadrian struct DWC_pcie_dbi_axi__DWC_pcie_dbi_axi_8 DWC_pcie_dbi_axi_8; 578250003Sadrian /* 0x5300 - 0x530c */ 579250003Sadrian volatile char pad__2[0x3f4]; /* 0x530c - 0x5700 */ 580250003Sadrian } Osprey; 581250003Sadrian 582250003Sadrian struct pcie_dbi_axi { 583250003Sadrian struct DWC_pcie_dbi_axi__DWC_pcie_dbi_axi_7_Jupiter DWC_pcie_dbi_axi_7; 584250003Sadrian /* 0x5140 - 0x515c */ 585250003Sadrian volatile char pad__1[0x4]; /* 0x515c - 0x5160 */ 586250003Sadrian struct DWC_pcie_dbi_axi__DWC_pcie_dbi_axi_8 DWC_pcie_dbi_axi_8; 587250003Sadrian /* 0x5160 - 0x516c */ 588250003Sadrian volatile char pad__2[0x594]; /* 0x516c - 0x5700 */ 589250003Sadrian } Jupiter; 590250003Sadrian } overlay_0x5140; /* 0x5140 - 0x5700 */ 591250003Sadrian struct DWC_pcie_dbi_axi__DWC_pcie_dbi_axi_9 DWC_pcie_dbi_axi_9; 592250003Sadrian /* 0x5700 - 0x5818 */ 593250003Sadrian}; 594250003Sadrian 595250003Sadrianstruct rtc_reg { 596250003Sadrian volatile char pad__0[0x7000]; /* 0x0 - 0x7000 */ 597250003Sadrian volatile u_int32_t RESET_CONTROL; /* 0x7000 - 0x7004 */ 598250003Sadrian volatile u_int32_t XTAL_CONTROL; /* 0x7004 - 0x7008 */ 599250003Sadrian volatile u_int32_t REG_CONTROL0; /* 0x7008 - 0x700c */ 600250003Sadrian volatile u_int32_t REG_CONTROL1; /* 0x700c - 0x7010 */ 601250003Sadrian volatile u_int32_t QUADRATURE; /* 0x7010 - 0x7014 */ 602250003Sadrian volatile u_int32_t PLL_CONTROL; /* 0x7014 - 0x7018 */ 603250003Sadrian volatile u_int32_t PLL_SETTLE; /* 0x7018 - 0x701c */ 604250003Sadrian volatile u_int32_t XTAL_SETTLE; /* 0x701c - 0x7020 */ 605250003Sadrian volatile u_int32_t CLOCK_OUT; /* 0x7020 - 0x7024 */ 606250003Sadrian volatile u_int32_t BIAS_OVERRIDE; /* 0x7024 - 0x7028 */ 607250003Sadrian volatile u_int32_t RESET_CAUSE; /* 0x7028 - 0x702c */ 608250003Sadrian volatile u_int32_t SYSTEM_SLEEP; /* 0x702c - 0x7030 */ 609250003Sadrian volatile u_int32_t MAC_SLEEP_CONTROL; /* 0x7030 - 0x7034 */ 610250003Sadrian volatile u_int32_t KEEP_AWAKE; /* 0x7034 - 0x7038 */ 611250003Sadrian volatile u_int32_t DERIVED_RTC_CLK; /* 0x7038 - 0x703c */ 612250003Sadrian volatile u_int32_t PLL_CONTROL2; /* 0x703c - 0x7040 */ 613250003Sadrian}; 614250003Sadrian 615250003Sadrianstruct rtc_sync_reg { 616250003Sadrian volatile char pad__0[0x7040]; /* 0x0 - 0x7040 */ 617250003Sadrian volatile u_int32_t RTC_SYNC_RESET; /* 0x7040 - 0x7044 */ 618250003Sadrian volatile u_int32_t RTC_SYNC_STATUS; /* 0x7044 - 0x7048 */ 619250003Sadrian volatile u_int32_t RTC_SYNC_DERIVED; /* 0x7048 - 0x704c */ 620250003Sadrian volatile u_int32_t RTC_SYNC_FORCE_WAKE; /* 0x704c - 0x7050 */ 621250003Sadrian volatile u_int32_t RTC_SYNC_INTR_CAUSE; /* 0x7050 - 0x7054 */ 622250003Sadrian volatile u_int32_t RTC_SYNC_INTR_ENABLE; /* 0x7054 - 0x7058 */ 623250003Sadrian volatile u_int32_t RTC_SYNC_INTR_MASK; /* 0x7058 - 0x705c */ 624250003Sadrian}; 625250003Sadrian 626250003Sadrianstruct merlin2_0_radio_reg_map { 627250003Sadrian volatile char pad__0[0x7800]; /* 0x0 - 0x7800 */ 628250003Sadrian volatile u_int32_t RXTXBB1_CH1; /* 0x7800 - 0x7804 */ 629250003Sadrian volatile u_int32_t RXTXBB2_CH1; /* 0x7804 - 0x7808 */ 630250003Sadrian volatile u_int32_t RXTXBB3_CH1; /* 0x7808 - 0x780c */ 631250003Sadrian volatile u_int32_t RXTXBB4_CH1; /* 0x780c - 0x7810 */ 632250003Sadrian volatile u_int32_t RF2G1_CH1; /* 0x7810 - 0x7814 */ 633250003Sadrian volatile u_int32_t RF2G2_CH1; /* 0x7814 - 0x7818 */ 634250003Sadrian volatile u_int32_t RF5G1_CH1; /* 0x7818 - 0x781c */ 635250003Sadrian volatile u_int32_t RF5G2_CH1; /* 0x781c - 0x7820 */ 636250003Sadrian volatile u_int32_t RF5G3_CH1; /* 0x7820 - 0x7824 */ 637250003Sadrian volatile u_int32_t RXTXBB1_CH0; /* 0x7824 - 0x7828 */ 638250003Sadrian volatile u_int32_t RXTXBB2_CH0; /* 0x7828 - 0x782c */ 639250003Sadrian volatile u_int32_t RXTXBB3_CH0; /* 0x782c - 0x7830 */ 640250003Sadrian volatile u_int32_t RXTXBB4_CH0; /* 0x7830 - 0x7834 */ 641250003Sadrian volatile u_int32_t RF5G1_CH0; /* 0x7834 - 0x7838 */ 642250003Sadrian volatile u_int32_t RF5G2_CH0; /* 0x7838 - 0x783c */ 643250003Sadrian volatile u_int32_t RF5G3_CH0; /* 0x783c - 0x7840 */ 644250003Sadrian volatile u_int32_t RF2G1_CH0; /* 0x7840 - 0x7844 */ 645250003Sadrian volatile u_int32_t RF2G2_CH0; /* 0x7844 - 0x7848 */ 646250003Sadrian volatile u_int32_t SYNTH1; /* 0x7848 - 0x784c */ 647250003Sadrian volatile u_int32_t SYNTH2; /* 0x784c - 0x7850 */ 648250003Sadrian volatile u_int32_t SYNTH3; /* 0x7850 - 0x7854 */ 649250003Sadrian volatile u_int32_t SYNTH4; /* 0x7854 - 0x7858 */ 650250003Sadrian volatile u_int32_t SYNTH5; /* 0x7858 - 0x785c */ 651250003Sadrian volatile u_int32_t SYNTH6; /* 0x785c - 0x7860 */ 652250003Sadrian volatile u_int32_t SYNTH7; /* 0x7860 - 0x7864 */ 653250003Sadrian volatile u_int32_t SYNTH8; /* 0x7864 - 0x7868 */ 654250003Sadrian volatile u_int32_t SYNTH9; /* 0x7868 - 0x786c */ 655250003Sadrian volatile u_int32_t SYNTH10; /* 0x786c - 0x7870 */ 656250003Sadrian volatile u_int32_t SYNTH11; /* 0x7870 - 0x7874 */ 657250003Sadrian volatile u_int32_t BIAS1; /* 0x7874 - 0x7878 */ 658250003Sadrian volatile u_int32_t BIAS2; /* 0x7878 - 0x787c */ 659250003Sadrian volatile u_int32_t BIAS3; /* 0x787c - 0x7880 */ 660250003Sadrian volatile u_int32_t BIAS4; /* 0x7880 - 0x7884 */ 661250003Sadrian volatile u_int32_t GAIN0; /* 0x7884 - 0x7888 */ 662250003Sadrian volatile u_int32_t GAIN1; /* 0x7888 - 0x788c */ 663250003Sadrian volatile u_int32_t TOP0; /* 0x788c - 0x7890 */ 664250003Sadrian volatile u_int32_t TOP1; /* 0x7890 - 0x7894 */ 665250003Sadrian volatile u_int32_t TOP2; /* 0x7894 - 0x7898 */ 666250003Sadrian volatile u_int32_t TOP3; /* 0x7898 - 0x789c */ 667250003Sadrian}; 668250003Sadrian 669250003Sadrianstruct analog_intf_reg_csr { 670250003Sadrian volatile char pad__0[0x7900]; /* 0x0 - 0x7900 */ 671250003Sadrian volatile u_int32_t SW_OVERRIDE; /* 0x7900 - 0x7904 */ 672250003Sadrian volatile u_int32_t SIN_VAL; /* 0x7904 - 0x7908 */ 673250003Sadrian volatile u_int32_t SW_SCLK; /* 0x7908 - 0x790c */ 674250003Sadrian volatile u_int32_t SW_CNTL; /* 0x790c - 0x7910 */ 675250003Sadrian}; 676250003Sadrian 677250003Sadrianstruct mac_pcu_reg { 678250003Sadrian volatile char pad__0[0x8000]; /* 0x0 - 0x8000 */ 679250003Sadrian volatile u_int32_t MAC_PCU_STA_ADDR_L32; /* 0x8000 - 0x8004 */ 680250003Sadrian volatile u_int32_t MAC_PCU_STA_ADDR_U16; /* 0x8004 - 0x8008 */ 681250003Sadrian volatile u_int32_t MAC_PCU_BSSID_L32; /* 0x8008 - 0x800c */ 682250003Sadrian volatile u_int32_t MAC_PCU_BSSID_U16; /* 0x800c - 0x8010 */ 683250003Sadrian volatile u_int32_t MAC_PCU_BCN_RSSI_AVE; /* 0x8010 - 0x8014 */ 684250003Sadrian volatile u_int32_t MAC_PCU_ACK_CTS_TIMEOUT; /* 0x8014 - 0x8018 */ 685250003Sadrian volatile u_int32_t MAC_PCU_BCN_RSSI_CTL; /* 0x8018 - 0x801c */ 686250003Sadrian volatile u_int32_t MAC_PCU_USEC_LATENCY; /* 0x801c - 0x8020 */ 687250003Sadrian volatile u_int32_t MAC_PCU_RESET_TSF; /* 0x8020 - 0x8024 */ 688250003Sadrian volatile char pad__1[0x14]; /* 0x8024 - 0x8038 */ 689250003Sadrian volatile u_int32_t MAC_PCU_MAX_CFP_DUR; /* 0x8038 - 0x803c */ 690250003Sadrian volatile u_int32_t MAC_PCU_RX_FILTER; /* 0x803c - 0x8040 */ 691250003Sadrian volatile u_int32_t MAC_PCU_MCAST_FILTER_L32; /* 0x8040 - 0x8044 */ 692250003Sadrian volatile u_int32_t MAC_PCU_MCAST_FILTER_U32; /* 0x8044 - 0x8048 */ 693250003Sadrian volatile u_int32_t MAC_PCU_DIAG_SW; /* 0x8048 - 0x804c */ 694250003Sadrian volatile u_int32_t MAC_PCU_TSF_L32; /* 0x804c - 0x8050 */ 695250003Sadrian volatile u_int32_t MAC_PCU_TSF_U32; /* 0x8050 - 0x8054 */ 696250003Sadrian volatile u_int32_t MAC_PCU_TST_ADDAC; /* 0x8054 - 0x8058 */ 697250003Sadrian volatile u_int32_t MAC_PCU_DEF_ANTENNA; /* 0x8058 - 0x805c */ 698250003Sadrian volatile u_int32_t MAC_PCU_AES_MUTE_MASK_0; /* 0x805c - 0x8060 */ 699250003Sadrian volatile u_int32_t MAC_PCU_AES_MUTE_MASK_1; /* 0x8060 - 0x8064 */ 700250003Sadrian volatile u_int32_t MAC_PCU_GATED_CLKS; /* 0x8064 - 0x8068 */ 701250003Sadrian volatile u_int32_t MAC_PCU_OBS_BUS_2; /* 0x8068 - 0x806c */ 702250003Sadrian volatile u_int32_t MAC_PCU_OBS_BUS_1; /* 0x806c - 0x8070 */ 703250003Sadrian volatile u_int32_t MAC_PCU_DYM_MIMO_PWR_SAVE; /* 0x8070 - 0x8074 */ 704250003Sadrian volatile u_int32_t MAC_PCU_TDMA_TXFRAME_START_TIME_TRIGGER_LSB; 705250003Sadrian /* 0x8074 - 0x8078 */ 706250003Sadrian volatile u_int32_t MAC_PCU_TDMA_TXFRAME_START_TIME_TRIGGER_MSB; 707250003Sadrian /* 0x8078 - 0x807c */ 708250003Sadrian volatile char pad__2[0x4]; /* 0x807c - 0x8080 */ 709250003Sadrian volatile u_int32_t MAC_PCU_LAST_BEACON_TSF; /* 0x8080 - 0x8084 */ 710250003Sadrian volatile u_int32_t MAC_PCU_NAV; /* 0x8084 - 0x8088 */ 711250003Sadrian volatile u_int32_t MAC_PCU_RTS_SUCCESS_CNT; /* 0x8088 - 0x808c */ 712250003Sadrian volatile u_int32_t MAC_PCU_RTS_FAIL_CNT; /* 0x808c - 0x8090 */ 713250003Sadrian volatile u_int32_t MAC_PCU_ACK_FAIL_CNT; /* 0x8090 - 0x8094 */ 714250003Sadrian volatile u_int32_t MAC_PCU_FCS_FAIL_CNT; /* 0x8094 - 0x8098 */ 715250003Sadrian volatile u_int32_t MAC_PCU_BEACON_CNT; /* 0x8098 - 0x809c */ 716250003Sadrian volatile u_int32_t MAC_PCU_TDMA_SLOT_ALERT_CNTL; 717250003Sadrian /* 0x809c - 0x80a0 */ 718250003Sadrian volatile u_int32_t MAC_PCU_BASIC_SET; /* 0x80a0 - 0x80a4 */ 719250003Sadrian volatile u_int32_t MAC_PCU_MGMT_SEQ; /* 0x80a4 - 0x80a8 */ 720250003Sadrian volatile u_int32_t MAC_PCU_BF_RPT1; /* 0x80a8 - 0x80ac */ 721250003Sadrian volatile u_int32_t MAC_PCU_BF_RPT2; /* 0x80ac - 0x80b0 */ 722250003Sadrian volatile u_int32_t MAC_PCU_TX_ANT_1; /* 0x80b0 - 0x80b4 */ 723250003Sadrian volatile u_int32_t MAC_PCU_TX_ANT_2; /* 0x80b4 - 0x80b8 */ 724250003Sadrian volatile u_int32_t MAC_PCU_TX_ANT_3; /* 0x80b8 - 0x80bc */ 725250003Sadrian volatile u_int32_t MAC_PCU_TX_ANT_4; /* 0x80bc - 0x80c0 */ 726250003Sadrian volatile u_int32_t MAC_PCU_XRMODE; /* 0x80c0 - 0x80c4 */ 727250003Sadrian volatile u_int32_t MAC_PCU_XRDEL; /* 0x80c4 - 0x80c8 */ 728250003Sadrian volatile u_int32_t MAC_PCU_XRTO; /* 0x80c8 - 0x80cc */ 729250003Sadrian volatile u_int32_t MAC_PCU_XRCRP; /* 0x80cc - 0x80d0 */ 730250003Sadrian volatile u_int32_t MAC_PCU_XRSTMP; /* 0x80d0 - 0x80d4 */ 731250003Sadrian volatile u_int32_t MAC_PCU_SLP1; /* 0x80d4 - 0x80d8 */ 732250003Sadrian volatile u_int32_t MAC_PCU_SLP2; /* 0x80d8 - 0x80dc */ 733250003Sadrian volatile u_int32_t MAC_PCU_SELF_GEN_DEFAULT; /* 0x80dc - 0x80e0 */ 734250003Sadrian volatile u_int32_t MAC_PCU_ADDR1_MASK_L32; /* 0x80e0 - 0x80e4 */ 735250003Sadrian volatile u_int32_t MAC_PCU_ADDR1_MASK_U16; /* 0x80e4 - 0x80e8 */ 736250003Sadrian volatile u_int32_t MAC_PCU_TPC; /* 0x80e8 - 0x80ec */ 737250003Sadrian volatile u_int32_t MAC_PCU_TX_FRAME_CNT; /* 0x80ec - 0x80f0 */ 738250003Sadrian volatile u_int32_t MAC_PCU_RX_FRAME_CNT; /* 0x80f0 - 0x80f4 */ 739250003Sadrian volatile u_int32_t MAC_PCU_RX_CLEAR_CNT; /* 0x80f4 - 0x80f8 */ 740250003Sadrian volatile u_int32_t MAC_PCU_CYCLE_CNT; /* 0x80f8 - 0x80fc */ 741250003Sadrian volatile u_int32_t MAC_PCU_QUIET_TIME_1; /* 0x80fc - 0x8100 */ 742250003Sadrian volatile u_int32_t MAC_PCU_QUIET_TIME_2; /* 0x8100 - 0x8104 */ 743250003Sadrian volatile char pad__3[0x4]; /* 0x8104 - 0x8108 */ 744250003Sadrian volatile u_int32_t MAC_PCU_QOS_NO_ACK; /* 0x8108 - 0x810c */ 745250003Sadrian volatile u_int32_t MAC_PCU_PHY_ERROR_MASK; /* 0x810c - 0x8110 */ 746250003Sadrian volatile u_int32_t MAC_PCU_XRLAT; /* 0x8110 - 0x8114 */ 747250003Sadrian volatile u_int32_t MAC_PCU_RXBUF; /* 0x8114 - 0x8118 */ 748250003Sadrian volatile u_int32_t MAC_PCU_MIC_QOS_CONTROL; /* 0x8118 - 0x811c */ 749250003Sadrian volatile u_int32_t MAC_PCU_MIC_QOS_SELECT; /* 0x811c - 0x8120 */ 750250003Sadrian volatile u_int32_t MAC_PCU_MISC_MODE; /* 0x8120 - 0x8124 */ 751250003Sadrian volatile u_int32_t MAC_PCU_FILTER_OFDM_CNT; /* 0x8124 - 0x8128 */ 752250003Sadrian volatile u_int32_t MAC_PCU_FILTER_CCK_CNT; /* 0x8128 - 0x812c */ 753250003Sadrian volatile u_int32_t MAC_PCU_PHY_ERR_CNT_1; /* 0x812c - 0x8130 */ 754250003Sadrian volatile u_int32_t MAC_PCU_PHY_ERR_CNT_1_MASK; /* 0x8130 - 0x8134 */ 755250003Sadrian volatile u_int32_t MAC_PCU_PHY_ERR_CNT_2; /* 0x8134 - 0x8138 */ 756250003Sadrian volatile u_int32_t MAC_PCU_PHY_ERR_CNT_2_MASK; /* 0x8138 - 0x813c */ 757250003Sadrian volatile u_int32_t MAC_PCU_TSF_THRESHOLD; /* 0x813c - 0x8140 */ 758250003Sadrian volatile char pad__4[0x4]; /* 0x8140 - 0x8144 */ 759250003Sadrian volatile u_int32_t MAC_PCU_PHY_ERROR_EIFS_MASK; /* 0x8144 - 0x8148 */ 760250003Sadrian volatile char pad__5[0x20]; /* 0x8148 - 0x8168 */ 761250003Sadrian volatile u_int32_t MAC_PCU_PHY_ERR_CNT_3; /* 0x8168 - 0x816c */ 762250003Sadrian volatile u_int32_t MAC_PCU_PHY_ERR_CNT_3_MASK; /* 0x816c - 0x8170 */ 763250003Sadrian volatile u_int32_t MAC_PCU_BLUETOOTH_MODE; /* 0x8170 - 0x8174 */ 764250003Sadrian volatile u_int32_t MAC_PCU_BLUETOOTH_WL_WEIGHTS0; 765250003Sadrian /* 0x8174 - 0x8178 */ 766250003Sadrian volatile u_int32_t MAC_PCU_HCF_TIMEOUT; /* 0x8178 - 0x817c */ 767250003Sadrian volatile u_int32_t MAC_PCU_BLUETOOTH_MODE2; /* 0x817c - 0x8180 */ 768250003Sadrian volatile u_int32_t MAC_PCU_GENERIC_TIMERS2[16]; /* 0x8180 - 0x81c0 */ 769250003Sadrian volatile u_int32_t MAC_PCU_GENERIC_TIMERS2_MODE; 770250003Sadrian /* 0x81c0 - 0x81c4 */ 771250003Sadrian volatile u_int32_t MAC_PCU_BLUETOOTH_WL_WEIGHTS1; 772250003Sadrian /* 0x81c4 - 0x81c8 */ 773250003Sadrian volatile u_int32_t MAC_PCU_BLUETOOTH_TSF_BT_ACTIVE; 774250003Sadrian /* 0x81c8 - 0x81cc */ 775250003Sadrian volatile u_int32_t MAC_PCU_BLUETOOTH_TSF_BT_PRIORITY; 776250003Sadrian /* 0x81cc - 0x81d0 */ 777250003Sadrian volatile u_int32_t MAC_PCU_TXSIFS; /* 0x81d0 - 0x81d4 */ 778250003Sadrian volatile u_int32_t MAC_PCU_BLUETOOTH_MODE3; /* 0x81d4 - 0x81d8 */ 779250003Sadrian volatile char pad__6[0x14]; /* 0x81d8 - 0x81ec */ 780250003Sadrian volatile u_int32_t MAC_PCU_TXOP_X; /* 0x81ec - 0x81f0 */ 781250003Sadrian volatile u_int32_t MAC_PCU_TXOP_0_3; /* 0x81f0 - 0x81f4 */ 782250003Sadrian volatile u_int32_t MAC_PCU_TXOP_4_7; /* 0x81f4 - 0x81f8 */ 783250003Sadrian volatile u_int32_t MAC_PCU_TXOP_8_11; /* 0x81f8 - 0x81fc */ 784250003Sadrian volatile u_int32_t MAC_PCU_TXOP_12_15; /* 0x81fc - 0x8200 */ 785250003Sadrian volatile u_int32_t MAC_PCU_GENERIC_TIMERS[16]; /* 0x8200 - 0x8240 */ 786250003Sadrian volatile u_int32_t MAC_PCU_GENERIC_TIMERS_MODE; /* 0x8240 - 0x8244 */ 787250003Sadrian volatile u_int32_t MAC_PCU_SLP32_MODE; /* 0x8244 - 0x8248 */ 788250003Sadrian volatile u_int32_t MAC_PCU_SLP32_WAKE; /* 0x8248 - 0x824c */ 789250003Sadrian volatile u_int32_t MAC_PCU_SLP32_INC; /* 0x824c - 0x8250 */ 790250003Sadrian volatile u_int32_t MAC_PCU_SLP_MIB1; /* 0x8250 - 0x8254 */ 791250003Sadrian volatile u_int32_t MAC_PCU_SLP_MIB2; /* 0x8254 - 0x8258 */ 792250003Sadrian volatile u_int32_t MAC_PCU_SLP_MIB3; /* 0x8258 - 0x825c */ 793250003Sadrian volatile u_int32_t MAC_PCU_WOW1; /* 0x825c - 0x8260 */ 794250003Sadrian volatile u_int32_t MAC_PCU_WOW2; /* 0x8260 - 0x8264 */ 795250003Sadrian volatile u_int32_t MAC_PCU_LOGIC_ANALYZER; /* 0x8264 - 0x8268 */ 796250003Sadrian volatile u_int32_t MAC_PCU_LOGIC_ANALYZER_32L; /* 0x8268 - 0x826c */ 797250003Sadrian volatile u_int32_t MAC_PCU_LOGIC_ANALYZER_16U; /* 0x826c - 0x8270 */ 798250003Sadrian volatile u_int32_t MAC_PCU_WOW3_BEACON_FAIL; /* 0x8270 - 0x8274 */ 799250003Sadrian volatile u_int32_t MAC_PCU_WOW3_BEACON; /* 0x8274 - 0x8278 */ 800250003Sadrian volatile u_int32_t MAC_PCU_WOW3_KEEP_ALIVE; /* 0x8278 - 0x827c */ 801250003Sadrian volatile u_int32_t MAC_PCU_WOW_KA; /* 0x827c - 0x8280 */ 802250003Sadrian volatile char pad__7[0x4]; /* 0x8280 - 0x8284 */ 803250003Sadrian volatile u_int32_t PCU_1US; /* 0x8284 - 0x8288 */ 804250003Sadrian volatile u_int32_t PCU_KA; /* 0x8288 - 0x828c */ 805250003Sadrian volatile u_int32_t WOW_EXACT; /* 0x828c - 0x8290 */ 806250003Sadrian volatile char pad__8[0x4]; /* 0x8290 - 0x8294 */ 807250003Sadrian volatile u_int32_t PCU_WOW4; /* 0x8294 - 0x8298 */ 808250003Sadrian volatile u_int32_t PCU_WOW5; /* 0x8298 - 0x829c */ 809250003Sadrian volatile u_int32_t MAC_PCU_PHY_ERR_CNT_MASK_CONT; 810250003Sadrian /* 0x829c - 0x82a0 */ 811250003Sadrian volatile char pad__9[0x60]; /* 0x82a0 - 0x8300 */ 812250003Sadrian volatile u_int32_t MAC_PCU_AZIMUTH_MODE; /* 0x8300 - 0x8304 */ 813250003Sadrian volatile char pad__10[0x10]; /* 0x8304 - 0x8314 */ 814250003Sadrian volatile u_int32_t MAC_PCU_AZIMUTH_TIME_STAMP; /* 0x8314 - 0x8318 */ 815250003Sadrian volatile u_int32_t MAC_PCU_20_40_MODE; /* 0x8318 - 0x831c */ 816250003Sadrian volatile u_int32_t MAC_PCU_H_XFER_TIMEOUT; /* 0x831c - 0x8320 */ 817250003Sadrian volatile char pad__11[0x8]; /* 0x8320 - 0x8328 */ 818250003Sadrian volatile u_int32_t MAC_PCU_RX_CLEAR_DIFF_CNT; /* 0x8328 - 0x832c */ 819250003Sadrian volatile u_int32_t MAC_PCU_SELF_GEN_ANTENNA_MASK; 820250003Sadrian /* 0x832c - 0x8330 */ 821250003Sadrian volatile u_int32_t MAC_PCU_BA_BAR_CONTROL; /* 0x8330 - 0x8334 */ 822250003Sadrian volatile u_int32_t MAC_PCU_LEGACY_PLCP_SPOOF; /* 0x8334 - 0x8338 */ 823250003Sadrian volatile u_int32_t MAC_PCU_PHY_ERROR_MASK_CONT; /* 0x8338 - 0x833c */ 824250003Sadrian volatile u_int32_t MAC_PCU_TX_TIMER; /* 0x833c - 0x8340 */ 825250003Sadrian volatile u_int32_t MAC_PCU_TXBUF_CTRL; /* 0x8340 - 0x8344 */ 826250003Sadrian volatile u_int32_t MAC_PCU_MISC_MODE2; /* 0x8344 - 0x8348 */ 827250003Sadrian volatile u_int32_t MAC_PCU_ALT_AES_MUTE_MASK; /* 0x8348 - 0x834c */ 828250003Sadrian volatile u_int32_t MAC_PCU_WOW6; /* 0x834c - 0x8350 */ 829250003Sadrian volatile u_int32_t ASYNC_FIFO_REG1; /* 0x8350 - 0x8354 */ 830250003Sadrian volatile u_int32_t ASYNC_FIFO_REG2; /* 0x8354 - 0x8358 */ 831250003Sadrian volatile u_int32_t ASYNC_FIFO_REG3; /* 0x8358 - 0x835c */ 832250003Sadrian volatile u_int32_t MAC_PCU_WOW5; /* 0x835c - 0x8360 */ 833250003Sadrian volatile u_int32_t MAC_PCU_WOW_LENGTH1; /* 0x8360 - 0x8364 */ 834250003Sadrian volatile u_int32_t MAC_PCU_WOW_LENGTH2; /* 0x8364 - 0x8368 */ 835250003Sadrian volatile u_int32_t WOW_PATTERN_MATCH_LESS_THAN_256_BYTES; 836250003Sadrian /* 0x8368 - 0x836c */ 837250003Sadrian volatile char pad__12[0x4]; /* 0x836c - 0x8370 */ 838250003Sadrian volatile u_int32_t MAC_PCU_WOW4; /* 0x8370 - 0x8374 */ 839250003Sadrian volatile u_int32_t WOW2_EXACT; /* 0x8374 - 0x8378 */ 840250003Sadrian volatile u_int32_t PCU_WOW6; /* 0x8378 - 0x837c */ 841250003Sadrian volatile u_int32_t PCU_WOW7; /* 0x837c - 0x8380 */ 842250003Sadrian volatile u_int32_t MAC_PCU_WOW_LENGTH3; /* 0x8380 - 0x8384 */ 843250003Sadrian volatile u_int32_t MAC_PCU_WOW_LENGTH4; /* 0x8384 - 0x8388 */ 844250003Sadrian volatile u_int32_t MAC_PCU_LOCATION_MODE_CONTROL; 845250003Sadrian /* 0x8388 - 0x838c */ 846250003Sadrian volatile u_int32_t MAC_PCU_LOCATION_MODE_TIMER; /* 0x838c - 0x8390 */ 847250003Sadrian volatile u_int32_t MAC_PCU_TSF2_L32; /* 0x8390 - 0x8394 */ 848250003Sadrian volatile u_int32_t MAC_PCU_TSF2_U32; /* 0x8394 - 0x8398 */ 849250003Sadrian volatile u_int32_t MAC_PCU_BSSID2_L32; /* 0x8398 - 0x839c */ 850250003Sadrian volatile u_int32_t MAC_PCU_BSSID2_U16; /* 0x839c - 0x83a0 */ 851250003Sadrian volatile u_int32_t MAC_PCU_DIRECT_CONNECT; /* 0x83a0 - 0x83a4 */ 852250003Sadrian volatile u_int32_t MAC_PCU_TID_TO_AC; /* 0x83a4 - 0x83a8 */ 853250003Sadrian volatile u_int32_t MAC_PCU_HP_QUEUE; /* 0x83a8 - 0x83ac */ 854250003Sadrian volatile u_int32_t MAC_PCU_BLUETOOTH_BT_WEIGHTS0; 855250003Sadrian /* 0x83ac - 0x83b0 */ 856250003Sadrian volatile u_int32_t MAC_PCU_BLUETOOTH_BT_WEIGHTS1; 857250003Sadrian /* 0x83b0 - 0x83b4 */ 858250003Sadrian volatile u_int32_t MAC_PCU_BLUETOOTH_BT_WEIGHTS2; 859250003Sadrian /* 0x83b4 - 0x83b8 */ 860250003Sadrian volatile u_int32_t MAC_PCU_BLUETOOTH_BT_WEIGHTS3; 861250003Sadrian /* 0x83b8 - 0x83bc */ 862250003Sadrian volatile u_int32_t MAC_PCU_AGC_SATURATION_CNT0; /* 0x83bc - 0x83c0 */ 863250003Sadrian volatile u_int32_t MAC_PCU_AGC_SATURATION_CNT1; /* 0x83c0 - 0x83c4 */ 864250003Sadrian volatile u_int32_t MAC_PCU_AGC_SATURATION_CNT2; /* 0x83c4 - 0x83c8 */ 865250003Sadrian volatile u_int32_t MAC_PCU_HW_BCN_PROC1; /* 0x83c8 - 0x83cc */ 866250003Sadrian volatile u_int32_t MAC_PCU_HW_BCN_PROC2; /* 0x83cc - 0x83d0 */ 867250003Sadrian volatile u_int32_t MAC_PCU_MISC_MODE3; /* 0x83d0 - 0x83d4 */ 868250003Sadrian /* Jupiter */ 869250003Sadrian volatile u_int32_t MAC_PCU_FILTER_RSSI_AVE; /* 0x83d4 - 0x83d8 */ 870250003Sadrian /* Jupiter */ 871250003Sadrian volatile u_int32_t MAC_PCU_GENERIC_TIMERS_TSF_SEL; 872250003Sadrian /* 0x83d8 - 0x83dc */ 873250003Sadrian /* Jupiter */ 874250003Sadrian volatile u_int32_t MAC_PCU_BEACON2_CNT; /* 0x83dc - 0x83e0 */ 875250003Sadrian /* Jupiter */ 876250003Sadrian volatile u_int32_t MAC_PCU_LAST_BEACON2_TSF; /* 0x83e0 - 0x83e4 */ 877250003Sadrian /* Jupiter */ 878250003Sadrian volatile u_int32_t MAC_PCU_BMISS_TIMEOUT; /* 0x83e4 - 0x83e8 */ 879250003Sadrian /* Jupiter */ 880250003Sadrian volatile u_int32_t MAC_PCU_BMISS2_TIMEOUT; /* 0x83e8 - 0x83ec */ 881250003Sadrian /* Jupiter */ 882250003Sadrian volatile u_int32_t MAC_PCU_SLP3; /* 0x83ec - 0x83f0 */ 883250003Sadrian /* Jupiter */ 884250003Sadrian volatile u_int32_t MAC_PCU_BCN_RSSI_CTL2; /* 0x83f0 - 0x83f4 */ 885250003Sadrian /* Jupiter */ 886250003Sadrian volatile u_int32_t MAC_PCU_PHY_ERROR_AIFS_MASK; /* 0x83f4 - 0x83f8 */ 887250003Sadrian /* Jupiter_20 */ 888250003Sadrian volatile u_int32_t MAC_PCU_TBD_FILTER; /* 0x83f8 - 0x83fc */ 889250003Sadrian /* Jupiter_20 */ 890250003Sadrian volatile u_int32_t MAC_PCU_MISC_MODE4; /* 0x83fc - 0x8400 */ 891250003Sadrian volatile u_int32_t MAC_PCU_TXBUF_BA[64]; /* 0x8400 - 0x8500 */ 892250003Sadrian /* Jupiter_20 */ 893250003Sadrian volatile u_int32_t MAC_PCU_SLP4; /* 0x8500 - 0x8504 */ 894250003Sadrian volatile char pad__13[0x2fc]; /* 0x8504 - 0x8800 */ 895250003Sadrian volatile u_int32_t MAC_PCU_KEY_CACHE[1024]; /* 0x8800 - 0x9800 */ 896250003Sadrian volatile char pad__14[0x4800]; /* 0x9800 - 0xe000 */ 897250003Sadrian volatile u_int32_t MAC_PCU_BUF[2048]; /* 0xe000 - 0x10000 */ 898250003Sadrian}; 899250003Sadrian 900250003Sadrianstruct chn_reg_map { 901250003Sadrian volatile u_int32_t BB_timing_controls_1; /* 0x0 - 0x4 */ 902250003Sadrian volatile u_int32_t BB_timing_controls_2; /* 0x4 - 0x8 */ 903250003Sadrian volatile u_int32_t BB_timing_controls_3; /* 0x8 - 0xc */ 904250003Sadrian volatile u_int32_t BB_timing_control_4; /* 0xc - 0x10 */ 905250003Sadrian volatile u_int32_t BB_timing_control_5; /* 0x10 - 0x14 */ 906250003Sadrian volatile u_int32_t BB_timing_control_6; /* 0x14 - 0x18 */ 907250003Sadrian volatile u_int32_t BB_timing_control_11; /* 0x18 - 0x1c */ 908250003Sadrian volatile u_int32_t BB_spur_mask_controls; /* 0x1c - 0x20 */ 909250003Sadrian volatile u_int32_t BB_find_signal_low; /* 0x20 - 0x24 */ 910250003Sadrian volatile u_int32_t BB_sfcorr; /* 0x24 - 0x28 */ 911250003Sadrian volatile u_int32_t BB_self_corr_low; /* 0x28 - 0x2c */ 912250003Sadrian volatile u_int32_t BB_ext_chan_scorr_thr; /* 0x2c - 0x30 */ 913250003Sadrian volatile u_int32_t BB_ext_chan_pwr_thr_2_b0; /* 0x30 - 0x34 */ 914250003Sadrian volatile u_int32_t BB_radar_detection; /* 0x34 - 0x38 */ 915250003Sadrian volatile u_int32_t BB_radar_detection_2; /* 0x38 - 0x3c */ 916250003Sadrian volatile u_int32_t BB_extension_radar; /* 0x3c - 0x40 */ 917250003Sadrian volatile char pad__0[0x40]; /* 0x40 - 0x80 */ 918250003Sadrian volatile u_int32_t BB_multichain_control; /* 0x80 - 0x84 */ 919250003Sadrian volatile u_int32_t BB_per_chain_csd; /* 0x84 - 0x88 */ 920250003Sadrian volatile char pad__1[0x18]; /* 0x88 - 0xa0 */ 921250003Sadrian volatile u_int32_t BB_tx_crc; /* 0xa0 - 0xa4 */ 922250003Sadrian volatile u_int32_t BB_tstdac_constant; /* 0xa4 - 0xa8 */ 923250003Sadrian volatile u_int32_t BB_spur_report_b0; /* 0xa8 - 0xac */ 924250003Sadrian volatile char pad__2[0x4]; /* 0xac - 0xb0 */ 925250003Sadrian volatile u_int32_t BB_txiqcal_control_3; /* 0xb0 - 0xb4 */ 926250003Sadrian volatile char pad__3[0x8]; /* 0xb4 - 0xbc */ 927250003Sadrian /* Poseidon, Jupiter */ 928250003Sadrian volatile u_int32_t BB_green_tx_control_1; /* 0xbc - 0xc0 */ 929250003Sadrian volatile u_int32_t BB_iq_adc_meas_0_b0; /* 0xc0 - 0xc4 */ 930250003Sadrian volatile u_int32_t BB_iq_adc_meas_1_b0; /* 0xc4 - 0xc8 */ 931250003Sadrian volatile u_int32_t BB_iq_adc_meas_2_b0; /* 0xc8 - 0xcc */ 932250003Sadrian volatile u_int32_t BB_iq_adc_meas_3_b0; /* 0xcc - 0xd0 */ 933250003Sadrian volatile u_int32_t BB_tx_phase_ramp_b0; /* 0xd0 - 0xd4 */ 934250003Sadrian volatile u_int32_t BB_adc_gain_dc_corr_b0; /* 0xd4 - 0xd8 */ 935250003Sadrian volatile char pad__4[0x4]; /* 0xd8 - 0xdc */ 936250003Sadrian volatile u_int32_t BB_rx_iq_corr_b0; /* 0xdc - 0xe0 */ 937250003Sadrian volatile char pad__5[0x4]; /* 0xe0 - 0xe4 */ 938250003Sadrian volatile u_int32_t BB_paprd_am2am_mask; /* 0xe4 - 0xe8 */ 939250003Sadrian volatile u_int32_t BB_paprd_am2pm_mask; /* 0xe8 - 0xec */ 940250003Sadrian volatile u_int32_t BB_paprd_ht40_mask; /* 0xec - 0xf0 */ 941250003Sadrian volatile u_int32_t BB_paprd_ctrl0_b0; /* 0xf0 - 0xf4 */ 942250003Sadrian volatile u_int32_t BB_paprd_ctrl1_b0; /* 0xf4 - 0xf8 */ 943250003Sadrian volatile u_int32_t BB_pa_gain123_b0; /* 0xf8 - 0xfc */ 944250003Sadrian volatile u_int32_t BB_pa_gain45_b0; /* 0xfc - 0x100 */ 945250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_0_b0; 946250003Sadrian /* 0x100 - 0x104 */ 947250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_1_b0; 948250003Sadrian /* 0x104 - 0x108 */ 949250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_2_b0; 950250003Sadrian /* 0x108 - 0x10c */ 951250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_3_b0; 952250003Sadrian /* 0x10c - 0x110 */ 953250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_4_b0; 954250003Sadrian /* 0x110 - 0x114 */ 955250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_5_b0; 956250003Sadrian /* 0x114 - 0x118 */ 957250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_6_b0; 958250003Sadrian /* 0x118 - 0x11c */ 959250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_7_b0; 960250003Sadrian /* 0x11c - 0x120 */ 961250003Sadrian volatile u_int32_t BB_paprd_mem_tab_b0[120]; /* 0x120 - 0x300 */ 962250003Sadrian volatile u_int32_t BB_chan_info_chan_tab_b0[60]; 963250003Sadrian /* 0x300 - 0x3f0 */ 964250003Sadrian /* Jupiter_20 */ 965250003Sadrian volatile u_int32_t BB_chn_tables_intf_addr; /* 0x3f0 - 0x3f4 */ 966250003Sadrian /* Jupiter_20 */ 967250003Sadrian volatile u_int32_t BB_chn_tables_intf_data; /* 0x3f4 - 0x3f8 */ 968250003Sadrian}; 969250003Sadrian 970250003Sadrianstruct mrc_reg_map { 971250003Sadrian volatile u_int32_t BB_timing_control_3a; /* 0x0 - 0x4 */ 972250003Sadrian volatile u_int32_t BB_ldpc_cntl1; /* 0x4 - 0x8 */ 973250003Sadrian volatile u_int32_t BB_ldpc_cntl2; /* 0x8 - 0xc */ 974250003Sadrian volatile u_int32_t BB_pilot_spur_mask; /* 0xc - 0x10 */ 975250003Sadrian volatile u_int32_t BB_chan_spur_mask; /* 0x10 - 0x14 */ 976250003Sadrian volatile u_int32_t BB_short_gi_delta_slope; /* 0x14 - 0x18 */ 977250003Sadrian volatile u_int32_t BB_ml_cntl1; /* 0x18 - 0x1c */ 978250003Sadrian volatile u_int32_t BB_ml_cntl2; /* 0x1c - 0x20 */ 979250003Sadrian volatile u_int32_t BB_tstadc; /* 0x20 - 0x24 */ 980250003Sadrian}; 981250003Sadrian 982250003Sadrianstruct bbb_reg_map { 983250003Sadrian volatile u_int32_t BB_bbb_rx_ctrl_1; /* 0x0 - 0x4 */ 984250003Sadrian volatile u_int32_t BB_bbb_rx_ctrl_2; /* 0x4 - 0x8 */ 985250003Sadrian volatile u_int32_t BB_bbb_rx_ctrl_3; /* 0x8 - 0xc */ 986250003Sadrian volatile u_int32_t BB_bbb_rx_ctrl_4; /* 0xc - 0x10 */ 987250003Sadrian volatile u_int32_t BB_bbb_rx_ctrl_5; /* 0x10 - 0x14 */ 988250003Sadrian volatile u_int32_t BB_bbb_rx_ctrl_6; /* 0x14 - 0x18 */ 989250003Sadrian volatile u_int32_t BB_force_clken_cck; /* 0x18 - 0x1c */ 990250003Sadrian /* Poseidon, Jupiter_10 */ 991250003Sadrian volatile u_int32_t BB_bb_reg_page_control; /* 0x1c - 0x20 */ 992250003Sadrian}; 993250003Sadrian 994250003Sadrianstruct agc_reg_map { 995250003Sadrian volatile u_int32_t BB_settling_time; /* 0x0 - 0x4 */ 996250003Sadrian volatile u_int32_t BB_gain_force_max_gains_b0; /* 0x4 - 0x8 */ 997250003Sadrian volatile u_int32_t BB_gains_min_offsets; /* 0x8 - 0xc */ 998250003Sadrian volatile u_int32_t BB_desired_sigsize; /* 0xc - 0x10 */ 999250003Sadrian volatile u_int32_t BB_find_signal; /* 0x10 - 0x14 */ 1000250003Sadrian volatile u_int32_t BB_agc; /* 0x14 - 0x18 */ 1001250003Sadrian volatile u_int32_t BB_ext_atten_switch_ctl_b0; /* 0x18 - 0x1c */ 1002250003Sadrian volatile u_int32_t BB_cca_b0; /* 0x1c - 0x20 */ 1003250003Sadrian volatile u_int32_t BB_cca_ctrl_2_b0; /* 0x20 - 0x24 */ 1004250003Sadrian volatile u_int32_t BB_restart; /* 0x24 - 0x28 */ 1005250003Sadrian volatile u_int32_t BB_multichain_gain_ctrl; /* 0x28 - 0x2c */ 1006250003Sadrian volatile u_int32_t BB_ext_chan_pwr_thr_1; /* 0x2c - 0x30 */ 1007250003Sadrian volatile u_int32_t BB_ext_chan_detect_win; /* 0x30 - 0x34 */ 1008250003Sadrian volatile u_int32_t BB_pwr_thr_20_40_det; /* 0x34 - 0x38 */ 1009250003Sadrian volatile u_int32_t BB_rifs_srch; /* 0x38 - 0x3c */ 1010250003Sadrian volatile u_int32_t BB_peak_det_ctrl_1; /* 0x3c - 0x40 */ 1011250003Sadrian volatile u_int32_t BB_peak_det_ctrl_2; /* 0x40 - 0x44 */ 1012250003Sadrian volatile u_int32_t BB_rx_gain_bounds_1; /* 0x44 - 0x48 */ 1013250003Sadrian volatile u_int32_t BB_rx_gain_bounds_2; /* 0x48 - 0x4c */ 1014250003Sadrian volatile u_int32_t BB_peak_det_cal_ctrl; /* 0x4c - 0x50 */ 1015250003Sadrian volatile u_int32_t BB_agc_dig_dc_ctrl; /* 0x50 - 0x54 */ 1016250003Sadrian volatile u_int32_t BB_bt_coex_1; /* 0x54 - 0x58 */ 1017250003Sadrian /* Poseidon, Jupiter */ 1018250003Sadrian volatile u_int32_t BB_bt_coex_2; /* 0x58 - 0x5c */ 1019250003Sadrian /* Poseidon, Jupiter */ 1020250003Sadrian volatile u_int32_t BB_bt_coex_3; /* 0x5c - 0x60 */ 1021250003Sadrian /* Poseidon, Jupiter */ 1022250003Sadrian volatile u_int32_t BB_bt_coex_4; /* 0x60 - 0x64 */ 1023250003Sadrian /* Poseidon, Jupiter */ 1024250003Sadrian volatile u_int32_t BB_bt_coex_5; /* 0x64 - 0x68 */ 1025250003Sadrian /* Jupiter_20 */ 1026250003Sadrian volatile u_int32_t BB_redpwr_ctrl_1; /* 0x68 - 0x6c */ 1027250003Sadrian /* Jupiter_20 */ 1028250003Sadrian volatile u_int32_t BB_redpwr_ctrl_2; /* 0x6c - 0x70 */ 1029250003Sadrian volatile char pad__0[0x110]; /* 0x70 - 0x180 */ 1030250003Sadrian volatile u_int32_t BB_rssi_b0; /* 0x180 - 0x184 */ 1031250003Sadrian volatile u_int32_t BB_spur_est_cck_report_b0; /* 0x184 - 0x188 */ 1032250003Sadrian volatile u_int32_t BB_agc_dig_dc_status_i_b0; /* 0x188 - 0x18c */ 1033250003Sadrian volatile u_int32_t BB_agc_dig_dc_status_q_b0; /* 0x18c - 0x190 */ 1034250003Sadrian /* Poseidon, Jupiter */ 1035250003Sadrian volatile u_int32_t BB_dc_cal_status_b0; /* 0x190 - 0x194 */ 1036250003Sadrian volatile char pad__1[0x2c]; /* 0x194 - 0x1c0 */ 1037250003Sadrian volatile u_int32_t BB_bbb_sig_detect; /* 0x1c0 - 0x1c4 */ 1038250003Sadrian volatile u_int32_t BB_bbb_dagc_ctrl; /* 0x1c4 - 0x1c8 */ 1039250003Sadrian volatile u_int32_t BB_iqcorr_ctrl_cck; /* 0x1c8 - 0x1cc */ 1040250003Sadrian volatile u_int32_t BB_cck_spur_mit; /* 0x1cc - 0x1d0 */ 1041250003Sadrian /* Not Poseidon */ 1042250003Sadrian volatile u_int32_t BB_mrc_cck_ctrl; /* 0x1d0 - 0x1d4 */ 1043250003Sadrian /* Jupiter_20 */ 1044250003Sadrian volatile u_int32_t BB_cck_blocker_det; /* 0x1d4 - 0x1d8 */ 1045250003Sadrian volatile char pad__2[0x28]; /* 0x1d8 - 0x200 */ 1046250003Sadrian volatile u_int32_t BB_rx_ocgain[128]; /* 0x200 - 0x400 */ 1047250003Sadrian}; 1048250003Sadrian 1049250003Sadrianstruct sm_reg_map { 1050250003Sadrian volatile u_int32_t BB_D2_chip_id; /* 0x0 - 0x4 */ 1051250003Sadrian volatile u_int32_t BB_gen_controls; /* 0x4 - 0x8 */ 1052250003Sadrian volatile u_int32_t BB_modes_select; /* 0x8 - 0xc */ 1053250003Sadrian volatile u_int32_t BB_active; /* 0xc - 0x10 */ 1054250003Sadrian /* Poseidon, Jupiter_10 */ 1055250003Sadrian volatile u_int32_t BB_bb_reg_page; /* 0x10 - 0x14 */ 1056250003Sadrian volatile char pad__0[0xc]; /* 0x14 - 0x20 */ 1057250003Sadrian volatile u_int32_t BB_vit_spur_mask_A; /* 0x20 - 0x24 */ 1058250003Sadrian volatile u_int32_t BB_vit_spur_mask_B; /* 0x24 - 0x28 */ 1059250003Sadrian volatile u_int32_t BB_spectral_scan; /* 0x28 - 0x2c */ 1060250003Sadrian volatile u_int32_t BB_radar_bw_filter; /* 0x2c - 0x30 */ 1061250003Sadrian volatile u_int32_t BB_search_start_delay; /* 0x30 - 0x34 */ 1062250003Sadrian volatile u_int32_t BB_max_rx_length; /* 0x34 - 0x38 */ 1063250003Sadrian volatile u_int32_t BB_frame_control; /* 0x38 - 0x3c */ 1064250003Sadrian volatile u_int32_t BB_rfbus_request; /* 0x3c - 0x40 */ 1065250003Sadrian volatile u_int32_t BB_rfbus_grant; /* 0x40 - 0x44 */ 1066250003Sadrian volatile u_int32_t BB_rifs; /* 0x44 - 0x48 */ 1067250003Sadrian /* Jupiter */ 1068250003Sadrian volatile u_int32_t BB_spectral_scan_2; /* 0x48 - 0x4c */ 1069250003Sadrian volatile char pad__1[0x4]; /* 0x4c - 0x50 */ 1070250003Sadrian volatile u_int32_t BB_rx_clear_delay; /* 0x50 - 0x54 */ 1071250003Sadrian volatile u_int32_t BB_analog_power_on_time; /* 0x54 - 0x58 */ 1072250003Sadrian volatile u_int32_t BB_tx_timing_1; /* 0x58 - 0x5c */ 1073250003Sadrian volatile u_int32_t BB_tx_timing_2; /* 0x5c - 0x60 */ 1074250003Sadrian volatile u_int32_t BB_tx_timing_3; /* 0x60 - 0x64 */ 1075250003Sadrian volatile u_int32_t BB_xpa_timing_control; /* 0x64 - 0x68 */ 1076250003Sadrian volatile char pad__2[0x18]; /* 0x68 - 0x80 */ 1077250003Sadrian volatile u_int32_t BB_misc_pa_control; /* 0x80 - 0x84 */ 1078250003Sadrian volatile u_int32_t BB_switch_table_chn_b0; /* 0x84 - 0x88 */ 1079250003Sadrian volatile u_int32_t BB_switch_table_com1; /* 0x88 - 0x8c */ 1080250003Sadrian volatile u_int32_t BB_switch_table_com2; /* 0x8c - 0x90 */ 1081250003Sadrian volatile char pad__3[0x10]; /* 0x90 - 0xa0 */ 1082250003Sadrian volatile u_int32_t BB_multichain_enable; /* 0xa0 - 0xa4 */ 1083250003Sadrian volatile char pad__4[0x1c]; /* 0xa4 - 0xc0 */ 1084250003Sadrian volatile u_int32_t BB_cal_chain_mask; /* 0xc0 - 0xc4 */ 1085250003Sadrian volatile u_int32_t BB_agc_control; /* 0xc4 - 0xc8 */ 1086250003Sadrian volatile u_int32_t BB_iq_adc_cal_mode; /* 0xc8 - 0xcc */ 1087250003Sadrian volatile u_int32_t BB_fcal_1; /* 0xcc - 0xd0 */ 1088250003Sadrian volatile u_int32_t BB_fcal_2_b0; /* 0xd0 - 0xd4 */ 1089250003Sadrian volatile u_int32_t BB_dft_tone_ctrl_b0; /* 0xd4 - 0xd8 */ 1090250003Sadrian volatile u_int32_t BB_cl_cal_ctrl; /* 0xd8 - 0xdc */ 1091250003Sadrian volatile u_int32_t BB_cl_map_0_b0; /* 0xdc - 0xe0 */ 1092250003Sadrian volatile u_int32_t BB_cl_map_1_b0; /* 0xe0 - 0xe4 */ 1093250003Sadrian volatile u_int32_t BB_cl_map_2_b0; /* 0xe4 - 0xe8 */ 1094250003Sadrian volatile u_int32_t BB_cl_map_3_b0; /* 0xe8 - 0xec */ 1095250003Sadrian volatile u_int32_t BB_cl_map_pal_0_b0; /* 0xec - 0xf0 */ 1096250003Sadrian volatile u_int32_t BB_cl_map_pal_1_b0; /* 0xf0 - 0xf4 */ 1097250003Sadrian volatile u_int32_t BB_cl_map_pal_2_b0; /* 0xf4 - 0xf8 */ 1098250003Sadrian volatile u_int32_t BB_cl_map_pal_3_b0; /* 0xf8 - 0xfc */ 1099250003Sadrian volatile char pad__5[0x4]; /* 0xfc - 0x100 */ 1100250003Sadrian volatile u_int32_t BB_cl_tab_b0[16]; /* 0x100 - 0x140 */ 1101250003Sadrian volatile u_int32_t BB_synth_control; /* 0x140 - 0x144 */ 1102250003Sadrian volatile u_int32_t BB_addac_clk_select; /* 0x144 - 0x148 */ 1103250003Sadrian volatile u_int32_t BB_pll_cntl; /* 0x148 - 0x14c */ 1104250003Sadrian volatile u_int32_t BB_analog_swap; /* 0x14c - 0x150 */ 1105250003Sadrian volatile u_int32_t BB_addac_parallel_control; /* 0x150 - 0x154 */ 1106250003Sadrian volatile char pad__6[0x4]; /* 0x154 - 0x158 */ 1107250003Sadrian volatile u_int32_t BB_force_analog; /* 0x158 - 0x15c */ 1108250003Sadrian volatile char pad__7[0x4]; /* 0x15c - 0x160 */ 1109250003Sadrian volatile u_int32_t BB_test_controls; /* 0x160 - 0x164 */ 1110250003Sadrian volatile u_int32_t BB_test_controls_status; /* 0x164 - 0x168 */ 1111250003Sadrian volatile u_int32_t BB_tstdac; /* 0x168 - 0x16c */ 1112250003Sadrian volatile u_int32_t BB_channel_status; /* 0x16c - 0x170 */ 1113250003Sadrian volatile u_int32_t BB_chaninfo_ctrl; /* 0x170 - 0x174 */ 1114250003Sadrian volatile u_int32_t BB_chan_info_noise_pwr; /* 0x174 - 0x178 */ 1115250003Sadrian volatile u_int32_t BB_chan_info_gain_diff; /* 0x178 - 0x17c */ 1116250003Sadrian volatile u_int32_t BB_chan_info_fine_timing; /* 0x17c - 0x180 */ 1117250003Sadrian volatile u_int32_t BB_chan_info_gain_b0; /* 0x180 - 0x184 */ 1118250003Sadrian volatile char pad__8[0xc]; /* 0x184 - 0x190 */ 1119250003Sadrian volatile u_int32_t BB_scrambler_seed; /* 0x190 - 0x194 */ 1120250003Sadrian volatile u_int32_t BB_bbb_tx_ctrl; /* 0x194 - 0x198 */ 1121250003Sadrian volatile u_int32_t BB_bbb_txfir_0; /* 0x198 - 0x19c */ 1122250003Sadrian volatile u_int32_t BB_bbb_txfir_1; /* 0x19c - 0x1a0 */ 1123250003Sadrian volatile u_int32_t BB_bbb_txfir_2; /* 0x1a0 - 0x1a4 */ 1124250003Sadrian volatile u_int32_t BB_heavy_clip_ctrl; /* 0x1a4 - 0x1a8 */ 1125250003Sadrian volatile u_int32_t BB_heavy_clip_20; /* 0x1a8 - 0x1ac */ 1126250003Sadrian volatile u_int32_t BB_heavy_clip_40; /* 0x1ac - 0x1b0 */ 1127250003Sadrian volatile u_int32_t BB_illegal_tx_rate; /* 0x1b0 - 0x1b4 */ 1128250003Sadrian volatile char pad__9[0xc]; /* 0x1b4 - 0x1c0 */ 1129250003Sadrian volatile u_int32_t BB_powertx_rate1; /* 0x1c0 - 0x1c4 */ 1130250003Sadrian volatile u_int32_t BB_powertx_rate2; /* 0x1c4 - 0x1c8 */ 1131250003Sadrian volatile u_int32_t BB_powertx_rate3; /* 0x1c8 - 0x1cc */ 1132250003Sadrian volatile u_int32_t BB_powertx_rate4; /* 0x1cc - 0x1d0 */ 1133250003Sadrian volatile u_int32_t BB_powertx_rate5; /* 0x1d0 - 0x1d4 */ 1134250003Sadrian volatile u_int32_t BB_powertx_rate6; /* 0x1d4 - 0x1d8 */ 1135250003Sadrian volatile u_int32_t BB_powertx_rate7; /* 0x1d8 - 0x1dc */ 1136250003Sadrian volatile u_int32_t BB_powertx_rate8; /* 0x1dc - 0x1e0 */ 1137250003Sadrian volatile u_int32_t BB_powertx_rate9; /* 0x1e0 - 0x1e4 */ 1138250003Sadrian volatile u_int32_t BB_powertx_rate10; /* 0x1e4 - 0x1e8 */ 1139250003Sadrian volatile u_int32_t BB_powertx_rate11; /* 0x1e8 - 0x1ec */ 1140250003Sadrian volatile u_int32_t BB_powertx_rate12; /* 0x1ec - 0x1f0 */ 1141250003Sadrian volatile u_int32_t BB_powertx_max; /* 0x1f0 - 0x1f4 */ 1142250003Sadrian volatile u_int32_t BB_powertx_sub; /* 0x1f4 - 0x1f8 */ 1143250003Sadrian volatile u_int32_t BB_tpc_1; /* 0x1f8 - 0x1fc */ 1144250003Sadrian volatile u_int32_t BB_tpc_2; /* 0x1fc - 0x200 */ 1145250003Sadrian volatile u_int32_t BB_tpc_3; /* 0x200 - 0x204 */ 1146250003Sadrian volatile u_int32_t BB_tpc_4_b0; /* 0x204 - 0x208 */ 1147250003Sadrian volatile u_int32_t BB_tpc_5_b0; /* 0x208 - 0x20c */ 1148250003Sadrian volatile u_int32_t BB_tpc_6_b0; /* 0x20c - 0x210 */ 1149250003Sadrian volatile u_int32_t BB_tpc_7; /* 0x210 - 0x214 */ 1150250003Sadrian volatile u_int32_t BB_tpc_8; /* 0x214 - 0x218 */ 1151250003Sadrian volatile u_int32_t BB_tpc_9; /* 0x218 - 0x21c */ 1152250003Sadrian volatile u_int32_t BB_tpc_10; /* 0x21c - 0x220 */ 1153250003Sadrian volatile u_int32_t BB_tpc_11_b0; /* 0x220 - 0x224 */ 1154250003Sadrian volatile u_int32_t BB_tpc_12; /* 0x224 - 0x228 */ 1155250003Sadrian volatile u_int32_t BB_tpc_13; /* 0x228 - 0x22c */ 1156250003Sadrian volatile u_int32_t BB_tpc_14; /* 0x22c - 0x230 */ 1157250003Sadrian volatile u_int32_t BB_tpc_15; /* 0x230 - 0x234 */ 1158250003Sadrian volatile u_int32_t BB_tpc_16; /* 0x234 - 0x238 */ 1159250003Sadrian volatile u_int32_t BB_tpc_17; /* 0x238 - 0x23c */ 1160250003Sadrian volatile u_int32_t BB_tpc_18; /* 0x23c - 0x240 */ 1161250003Sadrian volatile u_int32_t BB_tpc_19; /* 0x240 - 0x244 */ 1162250003Sadrian volatile u_int32_t BB_tpc_20; /* 0x244 - 0x248 */ 1163250003Sadrian volatile u_int32_t BB_therm_adc_1; /* 0x248 - 0x24c */ 1164250003Sadrian volatile u_int32_t BB_therm_adc_2; /* 0x24c - 0x250 */ 1165250003Sadrian volatile u_int32_t BB_therm_adc_3; /* 0x250 - 0x254 */ 1166250003Sadrian volatile u_int32_t BB_therm_adc_4; /* 0x254 - 0x258 */ 1167250003Sadrian volatile u_int32_t BB_tx_forced_gain; /* 0x258 - 0x25c */ 1168250003Sadrian volatile char pad__10[0x24]; /* 0x25c - 0x280 */ 1169250003Sadrian volatile u_int32_t BB_pdadc_tab_b0[32]; /* 0x280 - 0x300 */ 1170250003Sadrian volatile u_int32_t BB_tx_gain_tab_1; /* 0x300 - 0x304 */ 1171250003Sadrian volatile u_int32_t BB_tx_gain_tab_2; /* 0x304 - 0x308 */ 1172250003Sadrian volatile u_int32_t BB_tx_gain_tab_3; /* 0x308 - 0x30c */ 1173250003Sadrian volatile u_int32_t BB_tx_gain_tab_4; /* 0x30c - 0x310 */ 1174250003Sadrian volatile u_int32_t BB_tx_gain_tab_5; /* 0x310 - 0x314 */ 1175250003Sadrian volatile u_int32_t BB_tx_gain_tab_6; /* 0x314 - 0x318 */ 1176250003Sadrian volatile u_int32_t BB_tx_gain_tab_7; /* 0x318 - 0x31c */ 1177250003Sadrian volatile u_int32_t BB_tx_gain_tab_8; /* 0x31c - 0x320 */ 1178250003Sadrian volatile u_int32_t BB_tx_gain_tab_9; /* 0x320 - 0x324 */ 1179250003Sadrian volatile u_int32_t BB_tx_gain_tab_10; /* 0x324 - 0x328 */ 1180250003Sadrian volatile u_int32_t BB_tx_gain_tab_11; /* 0x328 - 0x32c */ 1181250003Sadrian volatile u_int32_t BB_tx_gain_tab_12; /* 0x32c - 0x330 */ 1182250003Sadrian volatile u_int32_t BB_tx_gain_tab_13; /* 0x330 - 0x334 */ 1183250003Sadrian volatile u_int32_t BB_tx_gain_tab_14; /* 0x334 - 0x338 */ 1184250003Sadrian volatile u_int32_t BB_tx_gain_tab_15; /* 0x338 - 0x33c */ 1185250003Sadrian volatile u_int32_t BB_tx_gain_tab_16; /* 0x33c - 0x340 */ 1186250003Sadrian volatile u_int32_t BB_tx_gain_tab_17; /* 0x340 - 0x344 */ 1187250003Sadrian volatile u_int32_t BB_tx_gain_tab_18; /* 0x344 - 0x348 */ 1188250003Sadrian volatile u_int32_t BB_tx_gain_tab_19; /* 0x348 - 0x34c */ 1189250003Sadrian volatile u_int32_t BB_tx_gain_tab_20; /* 0x34c - 0x350 */ 1190250003Sadrian volatile u_int32_t BB_tx_gain_tab_21; /* 0x350 - 0x354 */ 1191250003Sadrian volatile u_int32_t BB_tx_gain_tab_22; /* 0x354 - 0x358 */ 1192250003Sadrian volatile u_int32_t BB_tx_gain_tab_23; /* 0x358 - 0x35c */ 1193250003Sadrian volatile u_int32_t BB_tx_gain_tab_24; /* 0x35c - 0x360 */ 1194250003Sadrian volatile u_int32_t BB_tx_gain_tab_25; /* 0x360 - 0x364 */ 1195250003Sadrian volatile u_int32_t BB_tx_gain_tab_26; /* 0x364 - 0x368 */ 1196250003Sadrian volatile u_int32_t BB_tx_gain_tab_27; /* 0x368 - 0x36c */ 1197250003Sadrian volatile u_int32_t BB_tx_gain_tab_28; /* 0x36c - 0x370 */ 1198250003Sadrian volatile u_int32_t BB_tx_gain_tab_29; /* 0x370 - 0x374 */ 1199250003Sadrian volatile u_int32_t BB_tx_gain_tab_30; /* 0x374 - 0x378 */ 1200250003Sadrian volatile u_int32_t BB_tx_gain_tab_31; /* 0x378 - 0x37c */ 1201250003Sadrian volatile u_int32_t BB_tx_gain_tab_32; /* 0x37c - 0x380 */ 1202250003Sadrian union { 1203250003Sadrian struct { 1204250003Sadrian volatile u_int32_t BB_tx_gain_tab_pal_1; /* 0x380 - 0x384 */ 1205250003Sadrian volatile u_int32_t BB_tx_gain_tab_pal_2; /* 0x384 - 0x388 */ 1206250003Sadrian volatile u_int32_t BB_tx_gain_tab_pal_3; /* 0x388 - 0x38c */ 1207250003Sadrian volatile u_int32_t BB_tx_gain_tab_pal_4; /* 0x38c - 0x390 */ 1208250003Sadrian volatile u_int32_t BB_tx_gain_tab_pal_5; /* 0x390 - 0x394 */ 1209250003Sadrian volatile u_int32_t BB_tx_gain_tab_pal_6; /* 0x394 - 0x398 */ 1210250003Sadrian volatile u_int32_t BB_tx_gain_tab_pal_7; /* 0x398 - 0x39c */ 1211250003Sadrian volatile u_int32_t BB_tx_gain_tab_pal_8; /* 0x39c - 0x3a0 */ 1212250003Sadrian volatile u_int32_t BB_tx_gain_tab_pal_9; /* 0x3a0 - 0x3a4 */ 1213250003Sadrian volatile u_int32_t BB_tx_gain_tab_pal_10; /* 0x3a4 - 0x3a8 */ 1214250003Sadrian volatile u_int32_t BB_tx_gain_tab_pal_11; /* 0x3a8 - 0x3ac */ 1215250003Sadrian volatile u_int32_t BB_tx_gain_tab_pal_12; /* 0x3ac - 0x3b0 */ 1216250003Sadrian volatile u_int32_t BB_tx_gain_tab_pal_13; /* 0x3b0 - 0x3b4 */ 1217250003Sadrian volatile u_int32_t BB_tx_gain_tab_pal_14; /* 0x3b4 - 0x3b8 */ 1218250003Sadrian volatile u_int32_t BB_tx_gain_tab_pal_15; /* 0x3b8 - 0x3bc */ 1219250003Sadrian volatile u_int32_t BB_tx_gain_tab_pal_16; /* 0x3bc - 0x3c0 */ 1220250003Sadrian volatile u_int32_t BB_tx_gain_tab_pal_17; /* 0x3c0 - 0x3c4 */ 1221250003Sadrian volatile u_int32_t BB_tx_gain_tab_pal_18; /* 0x3c4 - 0x3c8 */ 1222250003Sadrian volatile u_int32_t BB_tx_gain_tab_pal_19; /* 0x3c8 - 0x3cc */ 1223250003Sadrian volatile u_int32_t BB_tx_gain_tab_pal_20; /* 0x3cc - 0x3d0 */ 1224250003Sadrian volatile u_int32_t BB_tx_gain_tab_pal_21; /* 0x3d0 - 0x3d4 */ 1225250003Sadrian volatile u_int32_t BB_tx_gain_tab_pal_22; /* 0x3d4 - 0x3d8 */ 1226250003Sadrian volatile u_int32_t BB_tx_gain_tab_pal_23; /* 0x3d8 - 0x3dc */ 1227250003Sadrian volatile u_int32_t BB_tx_gain_tab_pal_24; /* 0x3dc - 0x3e0 */ 1228250003Sadrian volatile u_int32_t BB_tx_gain_tab_pal_25; /* 0x3e0 - 0x3e4 */ 1229250003Sadrian volatile u_int32_t BB_tx_gain_tab_pal_26; /* 0x3e4 - 0x3e8 */ 1230250003Sadrian volatile u_int32_t BB_tx_gain_tab_pal_27; /* 0x3e8 - 0x3ec */ 1231250003Sadrian volatile u_int32_t BB_tx_gain_tab_pal_28; /* 0x3ec - 0x3f0 */ 1232250003Sadrian volatile u_int32_t BB_tx_gain_tab_pal_29; /* 0x3f0 - 0x3f4 */ 1233250003Sadrian volatile u_int32_t BB_tx_gain_tab_pal_30; /* 0x3f4 - 0x3f8 */ 1234250003Sadrian volatile u_int32_t BB_tx_gain_tab_pal_31; /* 0x3f8 - 0x3fc */ 1235250003Sadrian volatile u_int32_t BB_tx_gain_tab_pal_32; /* 0x3fc - 0x400 */ 1236250003Sadrian volatile u_int32_t BB_caltx_gain_set_0; /* 0x400 - 0x404 */ 1237250003Sadrian volatile u_int32_t BB_caltx_gain_set_2; /* 0x404 - 0x408 */ 1238250003Sadrian volatile u_int32_t BB_caltx_gain_set_4; /* 0x408 - 0x40c */ 1239250003Sadrian volatile u_int32_t BB_caltx_gain_set_6; /* 0x40c - 0x410 */ 1240250003Sadrian volatile u_int32_t BB_caltx_gain_set_8; /* 0x410 - 0x414 */ 1241250003Sadrian volatile u_int32_t BB_caltx_gain_set_10; /* 0x414 - 0x418 */ 1242250003Sadrian volatile u_int32_t BB_caltx_gain_set_12; /* 0x418 - 0x41c */ 1243250003Sadrian volatile u_int32_t BB_caltx_gain_set_14; /* 0x41c - 0x420 */ 1244250003Sadrian volatile u_int32_t BB_caltx_gain_set_16; /* 0x420 - 0x424 */ 1245250003Sadrian volatile u_int32_t BB_caltx_gain_set_18; /* 0x424 - 0x428 */ 1246250003Sadrian volatile u_int32_t BB_caltx_gain_set_20; /* 0x428 - 0x42c */ 1247250003Sadrian volatile u_int32_t BB_caltx_gain_set_22; /* 0x42c - 0x430 */ 1248250003Sadrian volatile u_int32_t BB_caltx_gain_set_24; /* 0x430 - 0x434 */ 1249250003Sadrian volatile u_int32_t BB_caltx_gain_set_26; /* 0x434 - 0x438 */ 1250250003Sadrian volatile u_int32_t BB_caltx_gain_set_28; /* 0x438 - 0x43c */ 1251250003Sadrian volatile u_int32_t BB_caltx_gain_set_30; /* 0x43c - 0x440 */ 1252250003Sadrian volatile u_int32_t BB_txiqcal_start; /* 0x440 - 0x444 */ 1253250003Sadrian volatile u_int32_t BB_txiqcal_control_0; /* 0x444 - 0x448 */ 1254250003Sadrian volatile u_int32_t BB_txiqcal_control_1; /* 0x448 - 0x44c */ 1255250003Sadrian volatile u_int32_t BB_txiqcal_control_2; /* 0x44c - 0x450 */ 1256250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_01_b0; /* 0x450 - 0x454 */ 1257250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_23_b0; /* 0x454 - 0x458 */ 1258250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_45_b0; /* 0x458 - 0x45c */ 1259250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_67_b0; /* 0x45c - 0x460 */ 1260250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_89_b0; /* 0x460 - 0x464 */ 1261250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_ab_b0; /* 0x464 - 0x468 */ 1262250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_cd_b0; /* 0x468 - 0x46c */ 1263250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_ef_b0; /* 0x46c - 0x470 */ 1264250003Sadrian volatile u_int32_t BB_cal_rxbb_gain_tbl_0; /* 0x470 - 0x474 */ 1265250003Sadrian volatile u_int32_t BB_cal_rxbb_gain_tbl_4; /* 0x474 - 0x478 */ 1266250003Sadrian volatile u_int32_t BB_cal_rxbb_gain_tbl_8; /* 0x478 - 0x47c */ 1267250003Sadrian volatile u_int32_t BB_cal_rxbb_gain_tbl_12; /* 0x47c - 0x480 */ 1268250003Sadrian volatile u_int32_t BB_cal_rxbb_gain_tbl_16; /* 0x480 - 0x484 */ 1269250003Sadrian volatile u_int32_t BB_cal_rxbb_gain_tbl_20; /* 0x484 - 0x488 */ 1270250003Sadrian volatile u_int32_t BB_cal_rxbb_gain_tbl_24; /* 0x488 - 0x48c */ 1271250003Sadrian volatile u_int32_t BB_txiqcal_status_b0; /* 0x48c - 0x490 */ 1272250003Sadrian volatile u_int32_t BB_paprd_trainer_cntl1; /* 0x490 - 0x494 */ 1273250003Sadrian volatile u_int32_t BB_paprd_trainer_cntl2; /* 0x494 - 0x498 */ 1274250003Sadrian volatile u_int32_t BB_paprd_trainer_cntl3; /* 0x498 - 0x49c */ 1275250003Sadrian volatile u_int32_t BB_paprd_trainer_cntl4; /* 0x49c - 0x4a0 */ 1276250003Sadrian volatile u_int32_t BB_paprd_trainer_stat1; /* 0x4a0 - 0x4a4 */ 1277250003Sadrian volatile u_int32_t BB_paprd_trainer_stat2; /* 0x4a4 - 0x4a8 */ 1278250003Sadrian volatile u_int32_t BB_paprd_trainer_stat3; /* 0x4a8 - 0x4ac */ 1279250003Sadrian volatile char pad__11[0x114]; /* 0x4ac - 0x5c0 */ 1280250003Sadrian } Osprey; 1281250003Sadrian struct { 1282250003Sadrian volatile u_int32_t BB_caltx_gain_set_0; /* 0x380 - 0x384 */ 1283250003Sadrian volatile u_int32_t BB_caltx_gain_set_2; /* 0x384 - 0x388 */ 1284250003Sadrian volatile u_int32_t BB_caltx_gain_set_4; /* 0x388 - 0x38c */ 1285250003Sadrian volatile u_int32_t BB_caltx_gain_set_6; /* 0x38c - 0x390 */ 1286250003Sadrian volatile u_int32_t BB_caltx_gain_set_8; /* 0x390 - 0x394 */ 1287250003Sadrian volatile u_int32_t BB_caltx_gain_set_10; /* 0x394 - 0x398 */ 1288250003Sadrian volatile u_int32_t BB_caltx_gain_set_12; /* 0x398 - 0x39c */ 1289250003Sadrian volatile u_int32_t BB_caltx_gain_set_14; /* 0x39c - 0x3a0 */ 1290250003Sadrian volatile u_int32_t BB_caltx_gain_set_16; /* 0x3a0 - 0x3a4 */ 1291250003Sadrian volatile u_int32_t BB_caltx_gain_set_18; /* 0x3a4 - 0x3a8 */ 1292250003Sadrian volatile u_int32_t BB_caltx_gain_set_20; /* 0x3a8 - 0x3ac */ 1293250003Sadrian volatile u_int32_t BB_caltx_gain_set_22; /* 0x3ac - 0x3b0 */ 1294250003Sadrian volatile u_int32_t BB_caltx_gain_set_24; /* 0x3b0 - 0x3b4 */ 1295250003Sadrian volatile u_int32_t BB_caltx_gain_set_26; /* 0x3b4 - 0x3b8 */ 1296250003Sadrian volatile u_int32_t BB_caltx_gain_set_28; /* 0x3b8 - 0x3bc */ 1297250003Sadrian volatile u_int32_t BB_caltx_gain_set_30; /* 0x3bc - 0x3c0 */ 1298250003Sadrian volatile char pad__11[0x4]; /* 0x3c0 - 0x3c4 */ 1299250003Sadrian volatile u_int32_t BB_txiqcal_control_0; /* 0x3c4 - 0x3c8 */ 1300250003Sadrian volatile u_int32_t BB_txiqcal_control_1; /* 0x3c8 - 0x3cc */ 1301250003Sadrian volatile u_int32_t BB_txiqcal_control_2; /* 0x3cc - 0x3d0 */ 1302250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_01_b0; /* 0x3d0 - 0x3d4 */ 1303250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_23_b0; /* 0x3d4 - 0x3d8 */ 1304250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_45_b0; /* 0x3d8 - 0x3dc */ 1305250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_67_b0; /* 0x3dc - 0x3e0 */ 1306250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_89_b0; /* 0x3e0 - 0x3e4 */ 1307250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_ab_b0; /* 0x3e4 - 0x3e8 */ 1308250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_cd_b0; /* 0x3e8 - 0x3ec */ 1309250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_ef_b0; /* 0x3ec - 0x3f0 */ 1310250003Sadrian volatile u_int32_t BB_txiqcal_status_b0; /* 0x3f0 - 0x3f4 */ 1311250003Sadrian volatile char pad__12[0x16c]; /* 0x3f4 - 0x560 */ 1312250003Sadrian volatile u_int32_t BB_cal_rxbb_gain_tbl_0; /* 0x560 - 0x564 */ 1313250003Sadrian volatile u_int32_t BB_cal_rxbb_gain_tbl_4; /* 0x564 - 0x568 */ 1314250003Sadrian volatile u_int32_t BB_cal_rxbb_gain_tbl_8; /* 0x568 - 0x56c */ 1315250003Sadrian volatile u_int32_t BB_cal_rxbb_gain_tbl_12; /* 0x56c - 0x570 */ 1316250003Sadrian volatile u_int32_t BB_cal_rxbb_gain_tbl_16; /* 0x570 - 0x574 */ 1317250003Sadrian volatile u_int32_t BB_cal_rxbb_gain_tbl_20; /* 0x574 - 0x578 */ 1318250003Sadrian volatile u_int32_t BB_cal_rxbb_gain_tbl_24; /* 0x578 - 0x57c */ 1319250003Sadrian volatile char pad__13[0x4]; /* 0x57c - 0x580 */ 1320250003Sadrian volatile u_int32_t BB_paprd_trainer_cntl1; /* 0x580 - 0x584 */ 1321250003Sadrian volatile u_int32_t BB_paprd_trainer_cntl2; /* 0x584 - 0x588 */ 1322250003Sadrian volatile u_int32_t BB_paprd_trainer_cntl3; /* 0x588 - 0x58c */ 1323250003Sadrian volatile u_int32_t BB_paprd_trainer_cntl4; /* 0x58c - 0x590 */ 1324250003Sadrian volatile u_int32_t BB_paprd_trainer_stat1; /* 0x590 - 0x594 */ 1325250003Sadrian volatile u_int32_t BB_paprd_trainer_stat2; /* 0x594 - 0x598 */ 1326250003Sadrian volatile u_int32_t BB_paprd_trainer_stat3; /* 0x598 - 0x59c */ 1327250003Sadrian volatile char pad__14[0x24]; /* 0x59c - 0x5c0 */ 1328250003Sadrian } Poseidon; 1329250003Sadrian struct { 1330250003Sadrian volatile char pad__11[0x80]; /* 0x380 - 0x400 */ 1331250003Sadrian /* 0x400 - 0x4b0 same as Osprey - start */ 1332250003Sadrian volatile u_int32_t BB_caltx_gain_set_0; /* 0x400 - 0x404 */ 1333250003Sadrian volatile u_int32_t BB_caltx_gain_set_2; /* 0x404 - 0x408 */ 1334250003Sadrian volatile u_int32_t BB_caltx_gain_set_4; /* 0x408 - 0x40c */ 1335250003Sadrian volatile u_int32_t BB_caltx_gain_set_6; /* 0x40c - 0x410 */ 1336250003Sadrian volatile u_int32_t BB_caltx_gain_set_8; /* 0x410 - 0x414 */ 1337250003Sadrian volatile u_int32_t BB_caltx_gain_set_10; /* 0x414 - 0x418 */ 1338250003Sadrian volatile u_int32_t BB_caltx_gain_set_12; /* 0x418 - 0x41c */ 1339250003Sadrian volatile u_int32_t BB_caltx_gain_set_14; /* 0x41c - 0x420 */ 1340250003Sadrian volatile u_int32_t BB_caltx_gain_set_16; /* 0x420 - 0x424 */ 1341250003Sadrian volatile u_int32_t BB_caltx_gain_set_18; /* 0x424 - 0x428 */ 1342250003Sadrian volatile u_int32_t BB_caltx_gain_set_20; /* 0x428 - 0x42c */ 1343250003Sadrian volatile u_int32_t BB_caltx_gain_set_22; /* 0x42c - 0x430 */ 1344250003Sadrian volatile u_int32_t BB_caltx_gain_set_24; /* 0x430 - 0x434 */ 1345250003Sadrian volatile u_int32_t BB_caltx_gain_set_26; /* 0x434 - 0x438 */ 1346250003Sadrian volatile u_int32_t BB_caltx_gain_set_28; /* 0x438 - 0x43c */ 1347250003Sadrian volatile u_int32_t BB_caltx_gain_set_30; /* 0x43c - 0x440 */ 1348250003Sadrian volatile char pad__12[0x4]; /* 0x440 - 0x444 */ 1349250003Sadrian volatile u_int32_t BB_txiqcal_control_0; /* 0x444 - 0x448 */ 1350250003Sadrian volatile u_int32_t BB_txiqcal_control_1; /* 0x448 - 0x44c */ 1351250003Sadrian volatile u_int32_t BB_txiqcal_control_2; /* 0x44c - 0x450 */ 1352250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_01_b0; /* 0x450 - 0x454 */ 1353250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_23_b0; /* 0x454 - 0x458 */ 1354250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_45_b0; /* 0x458 - 0x45c */ 1355250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_67_b0; /* 0x45c - 0x460 */ 1356250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_89_b0; /* 0x460 - 0x464 */ 1357250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_ab_b0; /* 0x464 - 0x468 */ 1358250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_cd_b0; /* 0x468 - 0x46c */ 1359250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_ef_b0; /* 0x46c - 0x470 */ 1360250003Sadrian volatile u_int32_t BB_cal_rxbb_gain_tbl_0; /* 0x470 - 0x474 */ 1361250003Sadrian volatile u_int32_t BB_cal_rxbb_gain_tbl_4; /* 0x474 - 0x478 */ 1362250003Sadrian volatile u_int32_t BB_cal_rxbb_gain_tbl_8; /* 0x478 - 0x47c */ 1363250003Sadrian volatile u_int32_t BB_cal_rxbb_gain_tbl_12; /* 0x47c - 0x480 */ 1364250003Sadrian volatile u_int32_t BB_cal_rxbb_gain_tbl_16; /* 0x480 - 0x484 */ 1365250003Sadrian volatile u_int32_t BB_cal_rxbb_gain_tbl_20; /* 0x484 - 0x488 */ 1366250003Sadrian volatile u_int32_t BB_cal_rxbb_gain_tbl_24; /* 0x488 - 0x48c */ 1367250003Sadrian volatile u_int32_t BB_txiqcal_status_b0; /* 0x48c - 0x490 */ 1368250003Sadrian volatile u_int32_t BB_paprd_trainer_cntl1; /* 0x490 - 0x494 */ 1369250003Sadrian volatile u_int32_t BB_paprd_trainer_cntl2; /* 0x494 - 0x498 */ 1370250003Sadrian volatile u_int32_t BB_paprd_trainer_cntl3; /* 0x498 - 0x49c */ 1371250003Sadrian volatile u_int32_t BB_paprd_trainer_cntl4; /* 0x49c - 0x4a0 */ 1372250003Sadrian volatile u_int32_t BB_paprd_trainer_stat1; /* 0x4a0 - 0x4a4 */ 1373250003Sadrian volatile u_int32_t BB_paprd_trainer_stat2; /* 0x4a4 - 0x4a8 */ 1374250003Sadrian volatile u_int32_t BB_paprd_trainer_stat3; /* 0x4a8 - 0x4ac */ 1375250003Sadrian volatile char pad__13[0x4]; /* 0x4ac - 0x4b0 */ 1376250003Sadrian /* 0x400 - 0x4b0 same as Osprey - end */ 1377250003Sadrian volatile u_int32_t BB_aic_ctrl_0_b0; /* 0x4b0 - 0x4b4 */ 1378250003Sadrian volatile u_int32_t BB_aic_ctrl_1_b0; /* 0x4b4 - 0x4b8 */ 1379250003Sadrian volatile u_int32_t BB_aic_ctrl_2_b0; /* 0x4b8 - 0x4bc */ 1380250003Sadrian volatile u_int32_t BB_aic_ctrl_3_b0; /* 0x4bc - 0x4c0 */ 1381250003Sadrian volatile u_int32_t BB_aic_stat_0_b0; /* 0x4c0 - 0x4c4 */ 1382250003Sadrian volatile u_int32_t BB_aic_stat_1_b0; /* 0x4c4 - 0x4c8 */ 1383250003Sadrian volatile char pad__14[0xf8]; /* 0x4c8 - 0x5c0 */ 1384250003Sadrian } Jupiter_10; 1385250003Sadrian struct { 1386250003Sadrian volatile u_int32_t BB_rtt_ctrl; /* 0x380 - 0x384 */ 1387250003Sadrian volatile u_int32_t BB_rtt_table_sw_intf_b0; /* 0x384 - 0x388 */ 1388250003Sadrian volatile u_int32_t BB_rtt_table_sw_intf_1_b0; /* 0x388 - 0x38c */ 1389250003Sadrian volatile char pad__11[0x74]; /* 0x38c - 0x400 */ 1390250003Sadrian /* 0x400 - 0x4b0 same as Osprey - start */ 1391250003Sadrian volatile u_int32_t BB_caltx_gain_set_0; /* 0x400 - 0x404 */ 1392250003Sadrian volatile u_int32_t BB_caltx_gain_set_2; /* 0x404 - 0x408 */ 1393250003Sadrian volatile u_int32_t BB_caltx_gain_set_4; /* 0x408 - 0x40c */ 1394250003Sadrian volatile u_int32_t BB_caltx_gain_set_6; /* 0x40c - 0x410 */ 1395250003Sadrian volatile u_int32_t BB_caltx_gain_set_8; /* 0x410 - 0x414 */ 1396250003Sadrian volatile u_int32_t BB_caltx_gain_set_10; /* 0x414 - 0x418 */ 1397250003Sadrian volatile u_int32_t BB_caltx_gain_set_12; /* 0x418 - 0x41c */ 1398250003Sadrian volatile u_int32_t BB_caltx_gain_set_14; /* 0x41c - 0x420 */ 1399250003Sadrian volatile u_int32_t BB_caltx_gain_set_16; /* 0x420 - 0x424 */ 1400250003Sadrian volatile u_int32_t BB_caltx_gain_set_18; /* 0x424 - 0x428 */ 1401250003Sadrian volatile u_int32_t BB_caltx_gain_set_20; /* 0x428 - 0x42c */ 1402250003Sadrian volatile u_int32_t BB_caltx_gain_set_22; /* 0x42c - 0x430 */ 1403250003Sadrian volatile u_int32_t BB_caltx_gain_set_24; /* 0x430 - 0x434 */ 1404250003Sadrian volatile u_int32_t BB_caltx_gain_set_26; /* 0x434 - 0x438 */ 1405250003Sadrian volatile u_int32_t BB_caltx_gain_set_28; /* 0x438 - 0x43c */ 1406250003Sadrian volatile u_int32_t BB_caltx_gain_set_30; /* 0x43c - 0x440 */ 1407250003Sadrian volatile char pad__12[0x4]; /* 0x440 - 0x444 */ 1408250003Sadrian volatile u_int32_t BB_txiqcal_control_0; /* 0x444 - 0x448 */ 1409250003Sadrian volatile u_int32_t BB_txiqcal_control_1; /* 0x448 - 0x44c */ 1410250003Sadrian volatile u_int32_t BB_txiqcal_control_2; /* 0x44c - 0x450 */ 1411250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_01_b0; /* 0x450 - 0x454 */ 1412250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_23_b0; /* 0x454 - 0x458 */ 1413250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_45_b0; /* 0x458 - 0x45c */ 1414250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_67_b0; /* 0x45c - 0x460 */ 1415250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_89_b0; /* 0x460 - 0x464 */ 1416250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_ab_b0; /* 0x464 - 0x468 */ 1417250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_cd_b0; /* 0x468 - 0x46c */ 1418250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_ef_b0; /* 0x46c - 0x470 */ 1419250003Sadrian volatile u_int32_t BB_cal_rxbb_gain_tbl_0; /* 0x470 - 0x474 */ 1420250003Sadrian volatile u_int32_t BB_cal_rxbb_gain_tbl_4; /* 0x474 - 0x478 */ 1421250003Sadrian volatile u_int32_t BB_cal_rxbb_gain_tbl_8; /* 0x478 - 0x47c */ 1422250003Sadrian volatile u_int32_t BB_cal_rxbb_gain_tbl_12; /* 0x47c - 0x480 */ 1423250003Sadrian volatile u_int32_t BB_cal_rxbb_gain_tbl_16; /* 0x480 - 0x484 */ 1424250003Sadrian volatile u_int32_t BB_cal_rxbb_gain_tbl_20; /* 0x484 - 0x488 */ 1425250003Sadrian volatile u_int32_t BB_cal_rxbb_gain_tbl_24; /* 0x488 - 0x48c */ 1426250003Sadrian volatile u_int32_t BB_txiqcal_status_b0; /* 0x48c - 0x490 */ 1427250003Sadrian volatile u_int32_t BB_paprd_trainer_cntl1; /* 0x490 - 0x494 */ 1428250003Sadrian volatile u_int32_t BB_paprd_trainer_cntl2; /* 0x494 - 0x498 */ 1429250003Sadrian volatile u_int32_t BB_paprd_trainer_cntl3; /* 0x498 - 0x49c */ 1430250003Sadrian volatile u_int32_t BB_paprd_trainer_cntl4; /* 0x49c - 0x4a0 */ 1431250003Sadrian volatile u_int32_t BB_paprd_trainer_stat1; /* 0x4a0 - 0x4a4 */ 1432250003Sadrian volatile u_int32_t BB_paprd_trainer_stat2; /* 0x4a4 - 0x4a8 */ 1433250003Sadrian volatile u_int32_t BB_paprd_trainer_stat3; /* 0x4a8 - 0x4ac */ 1434250003Sadrian volatile char pad__13[0x4]; /* 0x4ac - 0x4b0 */ 1435250003Sadrian /* 0x400 - 0x4b0 same as Osprey - end */ 1436250003Sadrian volatile u_int32_t BB_aic_ctrl_0_b0; /* 0x4b0 - 0x4b4 */ 1437250003Sadrian volatile u_int32_t BB_aic_ctrl_1_b0; /* 0x4b4 - 0x4b8 */ 1438250003Sadrian volatile u_int32_t BB_aic_ctrl_2_b0; /* 0x4b8 - 0x4bc */ 1439250003Sadrian volatile u_int32_t BB_aic_ctrl_3_b0; /* 0x4bc - 0x4c0 */ 1440250003Sadrian volatile u_int32_t BB_aic_ctrl_4_b0; /* 0x4c0 - 0x4c4 */ 1441250003Sadrian volatile u_int32_t BB_aic_stat_0_b0; /* 0x4c4 - 0x4c8 */ 1442250003Sadrian volatile u_int32_t BB_aic_stat_1_b0; /* 0x4c8 - 0x4cc */ 1443250003Sadrian volatile u_int32_t BB_aic_stat_2_b0; /* 0x4cc - 0x4d0 */ 1444250003Sadrian volatile char pad__14[0xf0]; /* 0x4d0 - 0x5c0 */ 1445250003Sadrian } Jupiter_20; 1446250003Sadrian } overlay_0xa580; 1447250003Sadrian volatile u_int32_t BB_panic_watchdog_status; /* 0x5c0 - 0x5c4 */ 1448250003Sadrian volatile u_int32_t BB_panic_watchdog_ctrl_1; /* 0x5c4 - 0x5c8 */ 1449250003Sadrian volatile u_int32_t BB_panic_watchdog_ctrl_2; /* 0x5c8 - 0x5cc */ 1450250003Sadrian volatile u_int32_t BB_bluetooth_cntl; /* 0x5cc - 0x5d0 */ 1451250003Sadrian volatile u_int32_t BB_phyonly_warm_reset; /* 0x5d0 - 0x5d4 */ 1452250003Sadrian volatile u_int32_t BB_phyonly_control; /* 0x5d4 - 0x5d8 */ 1453250003Sadrian volatile char pad__12[0x4]; /* 0x5d8 - 0x5dc */ 1454250003Sadrian volatile u_int32_t BB_eco_ctrl; /* 0x5dc - 0x5e0 */ 1455250003Sadrian volatile char pad__13[0x10]; /* 0x5e0 - 0x5f0 */ 1456250003Sadrian /* Jupiter */ 1457250003Sadrian volatile u_int32_t BB_tables_intf_addr_b0; /* 0x5f0 - 0x5f4 */ 1458250003Sadrian /* Jupiter */ 1459250003Sadrian volatile u_int32_t BB_tables_intf_data_b0; /* 0x5f4 - 0x5f8 */ 1460250003Sadrian}; 1461250003Sadrian 1462250003Sadrianstruct chn1_reg_map { 1463250003Sadrian volatile u_int32_t BB_dummy_DONOTACCESS1; /* 0x0 - 0x4 */ 1464250003Sadrian volatile char pad__0[0x2c]; /* 0x4 - 0x30 */ 1465250003Sadrian volatile u_int32_t BB_ext_chan_pwr_thr_2_b1; /* 0x30 - 0x34 */ 1466250003Sadrian volatile char pad__1[0x74]; /* 0x34 - 0xa8 */ 1467250003Sadrian volatile u_int32_t BB_spur_report_b1; /* 0xa8 - 0xac */ 1468250003Sadrian volatile char pad__2[0x14]; /* 0xac - 0xc0 */ 1469250003Sadrian volatile u_int32_t BB_iq_adc_meas_0_b1; /* 0xc0 - 0xc4 */ 1470250003Sadrian volatile u_int32_t BB_iq_adc_meas_1_b1; /* 0xc4 - 0xc8 */ 1471250003Sadrian volatile u_int32_t BB_iq_adc_meas_2_b1; /* 0xc8 - 0xcc */ 1472250003Sadrian volatile u_int32_t BB_iq_adc_meas_3_b1; /* 0xcc - 0xd0 */ 1473250003Sadrian volatile u_int32_t BB_tx_phase_ramp_b1; /* 0xd0 - 0xd4 */ 1474250003Sadrian volatile u_int32_t BB_adc_gain_dc_corr_b1; /* 0xd4 - 0xd8 */ 1475250003Sadrian volatile char pad__3[0x4]; /* 0xd8 - 0xdc */ 1476250003Sadrian volatile u_int32_t BB_rx_iq_corr_b1; /* 0xdc - 0xe0 */ 1477250003Sadrian volatile char pad__4[0x10]; /* 0xe0 - 0xf0 */ 1478250003Sadrian volatile u_int32_t BB_paprd_ctrl0_b1; /* 0xf0 - 0xf4 */ 1479250003Sadrian volatile u_int32_t BB_paprd_ctrl1_b1; /* 0xf4 - 0xf8 */ 1480250003Sadrian volatile u_int32_t BB_pa_gain123_b1; /* 0xf8 - 0xfc */ 1481250003Sadrian volatile u_int32_t BB_pa_gain45_b1; /* 0xfc - 0x100 */ 1482250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_0_b1; 1483250003Sadrian /* 0x100 - 0x104 */ 1484250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_1_b1; 1485250003Sadrian /* 0x104 - 0x108 */ 1486250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_2_b1; 1487250003Sadrian /* 0x108 - 0x10c */ 1488250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_3_b1; 1489250003Sadrian /* 0x10c - 0x110 */ 1490250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_4_b1; 1491250003Sadrian /* 0x110 - 0x114 */ 1492250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_5_b1; 1493250003Sadrian /* 0x114 - 0x118 */ 1494250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_6_b1; 1495250003Sadrian /* 0x118 - 0x11c */ 1496250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_7_b1; 1497250003Sadrian /* 0x11c - 0x120 */ 1498250003Sadrian volatile u_int32_t BB_paprd_mem_tab_b1[120]; /* 0x120 - 0x300 */ 1499250003Sadrian volatile u_int32_t BB_chan_info_chan_tab_b1[60]; 1500250003Sadrian /* 0x300 - 0x3f0 */ 1501250003Sadrian /* Jupiter_20 */ 1502250003Sadrian volatile u_int32_t BB_chn1_tables_intf_addr; /* 0x3f0 - 0x3f4 */ 1503250003Sadrian /* Jupiter_20 */ 1504250003Sadrian volatile u_int32_t BB_chn1_tables_intf_data; /* 0x3f4 - 0x3f8 */ 1505250003Sadrian}; 1506250003Sadrian 1507250003Sadrianstruct chn_ext_reg_map { 1508250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_0_1_b0; 1509250003Sadrian /* 0x0 - 0x4 */ 1510250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_1_1_b0; 1511250003Sadrian /* 0x4 - 0x8 */ 1512250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_2_1_b0; 1513250003Sadrian /* 0x8 - 0xc */ 1514250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_3_1_b0; 1515250003Sadrian /* 0xc - 0x10 */ 1516250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_4_1_b0; 1517250003Sadrian /* 0x10 - 0x14 */ 1518250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_5_1_b0; 1519250003Sadrian /* 0x14 - 0x18 */ 1520250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_6_1_b0; 1521250003Sadrian /* 0x18 - 0x1c */ 1522250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_7_1_b0; 1523250003Sadrian /* 0x1c - 0x20 */ 1524250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_0_2_b0; 1525250003Sadrian /* 0x20 - 0x24 */ 1526250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_1_2_b0; 1527250003Sadrian /* 0x24 - 0x28 */ 1528250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_2_2_b0; 1529250003Sadrian /* 0x28 - 0x2c */ 1530250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_3_2_b0; 1531250003Sadrian /* 0x2c - 0x30 */ 1532250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_4_2_b0; 1533250003Sadrian /* 0x30 - 0x34 */ 1534250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_5_2_b0; 1535250003Sadrian /* 0x34 - 0x38 */ 1536250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_6_2_b0; 1537250003Sadrian /* 0x38 - 0x3c */ 1538250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_7_2_b0; 1539250003Sadrian /* 0x3c - 0x40 */ 1540250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_0_3_b0; 1541250003Sadrian /* 0x40 - 0x44 */ 1542250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_1_3_b0; 1543250003Sadrian /* 0x44 - 0x48 */ 1544250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_2_3_b0; 1545250003Sadrian /* 0x48 - 0x4c */ 1546250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_3_3_b0; 1547250003Sadrian /* 0x4c - 0x50 */ 1548250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_4_3_b0; 1549250003Sadrian /* 0x50 - 0x54 */ 1550250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_5_3_b0; 1551250003Sadrian /* 0x54 - 0x58 */ 1552250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_6_3_b0; 1553250003Sadrian /* 0x58 - 0x5c */ 1554250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_7_3_b0; 1555250003Sadrian /* 0x5c - 0x60 */ 1556250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_0_4_b0; 1557250003Sadrian /* 0x60 - 0x64 */ 1558250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_1_4_b0; 1559250003Sadrian /* 0x64 - 0x68 */ 1560250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_2_4_b0; 1561250003Sadrian /* 0x68 - 0x6c */ 1562250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_3_4_b0; 1563250003Sadrian /* 0x6c - 0x70 */ 1564250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_4_4_b0; 1565250003Sadrian /* 0x70 - 0x74 */ 1566250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_5_4_b0; 1567250003Sadrian /* 0x74 - 0x78 */ 1568250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_6_4_b0; 1569250003Sadrian /* 0x78 - 0x7c */ 1570250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_7_4_b0; 1571250003Sadrian /* 0x7c - 0x80 */ 1572250003Sadrian volatile u_int32_t BB_paprd_power_at_am2am_cal_b0; 1573250003Sadrian /* 0x80 - 0x84 */ 1574250003Sadrian volatile u_int32_t BB_paprd_valid_obdb_b0; /* 0x84 - 0x88 */ 1575250003Sadrian volatile char pad__0[0x374]; /* 0x88 - 0x3fc */ 1576250003Sadrian volatile u_int32_t BB_chn_ext_dummy_2; /* 0x3fc - 0x400 */ 1577250003Sadrian}; 1578250003Sadrian 1579250003Sadrianstruct sm_ext_reg_map { 1580250003Sadrian volatile u_int32_t BB_sm_ext_dummy1; /* 0x0 - 0x4 */ 1581250003Sadrian volatile char pad__0[0x2fc]; /* 0x4 - 0x300 */ 1582250003Sadrian volatile u_int32_t BB_green_tx_gain_tab_1; /* 0x300 - 0x304 */ 1583250003Sadrian volatile u_int32_t BB_green_tx_gain_tab_2; /* 0x304 - 0x308 */ 1584250003Sadrian volatile u_int32_t BB_green_tx_gain_tab_3; /* 0x308 - 0x30c */ 1585250003Sadrian volatile u_int32_t BB_green_tx_gain_tab_4; /* 0x30c - 0x310 */ 1586250003Sadrian volatile u_int32_t BB_green_tx_gain_tab_5; /* 0x310 - 0x314 */ 1587250003Sadrian volatile u_int32_t BB_green_tx_gain_tab_6; /* 0x314 - 0x318 */ 1588250003Sadrian volatile u_int32_t BB_green_tx_gain_tab_7; /* 0x318 - 0x31c */ 1589250003Sadrian volatile u_int32_t BB_green_tx_gain_tab_8; /* 0x31c - 0x320 */ 1590250003Sadrian volatile u_int32_t BB_green_tx_gain_tab_9; /* 0x320 - 0x324 */ 1591250003Sadrian volatile u_int32_t BB_green_tx_gain_tab_10; /* 0x324 - 0x328 */ 1592250003Sadrian volatile u_int32_t BB_green_tx_gain_tab_11; /* 0x328 - 0x32c */ 1593250003Sadrian volatile u_int32_t BB_green_tx_gain_tab_12; /* 0x32c - 0x330 */ 1594250003Sadrian volatile u_int32_t BB_green_tx_gain_tab_13; /* 0x330 - 0x334 */ 1595250003Sadrian volatile u_int32_t BB_green_tx_gain_tab_14; /* 0x334 - 0x338 */ 1596250003Sadrian volatile u_int32_t BB_green_tx_gain_tab_15; /* 0x338 - 0x33c */ 1597250003Sadrian volatile u_int32_t BB_green_tx_gain_tab_16; /* 0x33c - 0x340 */ 1598250003Sadrian volatile u_int32_t BB_green_tx_gain_tab_17; /* 0x340 - 0x344 */ 1599250003Sadrian volatile u_int32_t BB_green_tx_gain_tab_18; /* 0x344 - 0x348 */ 1600250003Sadrian volatile u_int32_t BB_green_tx_gain_tab_19; /* 0x348 - 0x34c */ 1601250003Sadrian volatile u_int32_t BB_green_tx_gain_tab_20; /* 0x34c - 0x350 */ 1602250003Sadrian volatile u_int32_t BB_green_tx_gain_tab_21; /* 0x350 - 0x354 */ 1603250003Sadrian volatile u_int32_t BB_green_tx_gain_tab_22; /* 0x354 - 0x358 */ 1604250003Sadrian volatile u_int32_t BB_green_tx_gain_tab_23; /* 0x358 - 0x35c */ 1605250003Sadrian volatile u_int32_t BB_green_tx_gain_tab_24; /* 0x35c - 0x360 */ 1606250003Sadrian volatile u_int32_t BB_green_tx_gain_tab_25; /* 0x360 - 0x364 */ 1607250003Sadrian volatile u_int32_t BB_green_tx_gain_tab_26; /* 0x364 - 0x368 */ 1608250003Sadrian volatile u_int32_t BB_green_tx_gain_tab_27; /* 0x368 - 0x36c */ 1609250003Sadrian volatile u_int32_t BB_green_tx_gain_tab_28; /* 0x36c - 0x370 */ 1610250003Sadrian volatile u_int32_t BB_green_tx_gain_tab_29; /* 0x370 - 0x374 */ 1611250003Sadrian volatile u_int32_t BB_green_tx_gain_tab_30; /* 0x374 - 0x378 */ 1612250003Sadrian volatile u_int32_t BB_green_tx_gain_tab_31; /* 0x378 - 0x37c */ 1613250003Sadrian volatile u_int32_t BB_green_tx_gain_tab_32; /* 0x37c - 0x380 */ 1614250003Sadrian volatile char pad__1[0x27c]; /* 0x380 - 0x5fc */ 1615250003Sadrian volatile u_int32_t BB_sm_ext_dummy2; /* 0x5fc - 0x600 */ 1616250003Sadrian}; 1617250003Sadrian 1618250003Sadrianstruct agc1_reg_map { 1619250003Sadrian volatile u_int32_t BB_dummy_DONOTACCESS3; /* 0x0 - 0x4 */ 1620250003Sadrian volatile u_int32_t BB_gain_force_max_gains_b1; /* 0x4 - 0x8 */ 1621250003Sadrian volatile char pad__0[0x10]; /* 0x8 - 0x18 */ 1622250003Sadrian volatile u_int32_t BB_ext_atten_switch_ctl_b1; /* 0x18 - 0x1c */ 1623250003Sadrian /* Not Poseidon */ 1624250003Sadrian volatile u_int32_t BB_cca_b1; /* 0x1c - 0x20 */ 1625250003Sadrian /* Not Poseidon */ 1626250003Sadrian volatile u_int32_t BB_cca_ctrl_2_b1; /* 0x20 - 0x24 */ 1627250003Sadrian volatile char pad__1[0x15c]; /* 0x24 - 0x180 */ 1628250003Sadrian volatile u_int32_t BB_rssi_b1; /* 0x180 - 0x184 */ 1629250003Sadrian /* Not Poseidon */ 1630250003Sadrian volatile u_int32_t BB_spur_est_cck_report_b1; /* 0x184 - 0x188 */ 1631250003Sadrian /* Not Poseidon */ 1632250003Sadrian volatile u_int32_t BB_agc_dig_dc_status_i_b1; /* 0x188 - 0x18c */ 1633250003Sadrian /* Not Poseidon */ 1634250003Sadrian volatile u_int32_t BB_agc_dig_dc_status_q_b1; /* 0x18c - 0x190 */ 1635250003Sadrian /* Jupiter */ 1636250003Sadrian volatile u_int32_t BB_dc_cal_status_b1; /* 0x190 - 0x194 */ 1637250003Sadrian volatile char pad__2[0x6c]; /* 0x194 - 0x200 */ 1638250003Sadrian volatile u_int32_t BB_rx_ocgain2[128]; /* 0x200 - 0x400 */ 1639250003Sadrian}; 1640250003Sadrian 1641250003Sadrianstruct sm1_reg_map { 1642250003Sadrian volatile u_int32_t BB_dummy_DONOTACCESS5; /* 0x0 - 0x4 */ 1643250003Sadrian volatile char pad__0[0x80]; /* 0x4 - 0x84 */ 1644250003Sadrian volatile u_int32_t BB_switch_table_chn_b1; /* 0x84 - 0x88 */ 1645250003Sadrian volatile char pad__1[0x48]; /* 0x88 - 0xd0 */ 1646250003Sadrian volatile u_int32_t BB_fcal_2_b1; /* 0xd0 - 0xd4 */ 1647250003Sadrian volatile u_int32_t BB_dft_tone_ctrl_b1; /* 0xd4 - 0xd8 */ 1648250003Sadrian volatile char pad__2[0x4]; /* 0xd8 - 0xdc */ 1649250003Sadrian volatile u_int32_t BB_cl_map_0_b1; /* 0xdc - 0xe0 */ 1650250003Sadrian volatile u_int32_t BB_cl_map_1_b1; /* 0xe0 - 0xe4 */ 1651250003Sadrian volatile u_int32_t BB_cl_map_2_b1; /* 0xe4 - 0xe8 */ 1652250003Sadrian volatile u_int32_t BB_cl_map_3_b1; /* 0xe8 - 0xec */ 1653250003Sadrian volatile u_int32_t BB_cl_map_pal_0_b1; /* 0xec - 0xf0 */ 1654250003Sadrian volatile u_int32_t BB_cl_map_pal_1_b1; /* 0xf0 - 0xf4 */ 1655250003Sadrian volatile u_int32_t BB_cl_map_pal_2_b1; /* 0xf4 - 0xf8 */ 1656250003Sadrian volatile u_int32_t BB_cl_map_pal_3_b1; /* 0xf8 - 0xfc */ 1657250003Sadrian volatile char pad__3[0x4]; /* 0xfc - 0x100 */ 1658250003Sadrian volatile u_int32_t BB_cl_tab_b1[16]; /* 0x100 - 0x140 */ 1659250003Sadrian volatile char pad__4[0x40]; /* 0x140 - 0x180 */ 1660250003Sadrian volatile u_int32_t BB_chan_info_gain_b1; /* 0x180 - 0x184 */ 1661250003Sadrian volatile char pad__5[0x80]; /* 0x184 - 0x204 */ 1662250003Sadrian volatile u_int32_t BB_tpc_4_b1; /* 0x204 - 0x208 */ 1663250003Sadrian volatile u_int32_t BB_tpc_5_b1; /* 0x208 - 0x20c */ 1664250003Sadrian volatile u_int32_t BB_tpc_6_b1; /* 0x20c - 0x210 */ 1665250003Sadrian volatile char pad__6[0x10]; /* 0x210 - 0x220 */ 1666250003Sadrian volatile u_int32_t BB_tpc_11_b1; /* 0x220 - 0x224 */ 1667250003Sadrian volatile char pad__7[0x1c]; /* 0x224 - 0x240 */ 1668250003Sadrian union { 1669250003Sadrian volatile u_int32_t BB_pdadc_tab_b1[32]; /* 0x240 - 0x2c0 */ 1670250003Sadrian struct { 1671250003Sadrian volatile u_int32_t BB_tpc_19_b1; /* 0x240 - 0x244 */ 1672250003Sadrian volatile u_int32_t pad__7_1[31]; /* 0x244 - 0x2c0 */ 1673250003Sadrian volatile char pad__8[0x190]; /* 0x2c0 - 0x450 */ 1674250003Sadrian } Scorpion; 1675250003Sadrian struct { 1676250003Sadrian volatile u_int32_t BB_pdadc_tab_b1[32]; /* 0x240 - 0x2c0 */ 1677250003Sadrian volatile char pad__8[0x190]; /* 0x2c0 - 0x450 */ 1678250003Sadrian } Osprey; 1679250003Sadrian struct { 1680250003Sadrian volatile u_int32_t BB_tpc_19_b1; /* 0x240 - 0x244 */ 1681250003Sadrian volatile char pad__8[0x3c]; /* 0x244 - 0x280 */ 1682250003Sadrian volatile u_int32_t BB_pdadc_tab_b1[32]; /* 0x280 - 0x300 */ 1683250003Sadrian volatile char pad__9[0x84]; /* 0x300 - 0x384 */ 1684250003Sadrian volatile u_int32_t BB_rtt_table_sw_intf_b1; /* 0x384 - 0x388 */ 1685250003Sadrian volatile u_int32_t BB_rtt_table_sw_intf_1_b1; /* 0x388 - 0x38c */ 1686250003Sadrian volatile char pad__10[0xc4]; /* 0x38c - 0x450 */ 1687250003Sadrian } Jupiter_20; 1688250003Sadrian } overlay_b440; 1689250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_01_b1; /* 0x450 - 0x454 */ 1690250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_23_b1; /* 0x454 - 0x458 */ 1691250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_45_b1; /* 0x458 - 0x45c */ 1692250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_67_b1; /* 0x45c - 0x460 */ 1693250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_89_b1; /* 0x460 - 0x464 */ 1694250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_ab_b1; /* 0x464 - 0x468 */ 1695250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_cd_b1; /* 0x468 - 0x46c */ 1696250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_ef_b1; /* 0x46c - 0x470 */ 1697250003Sadrian volatile char pad__9[0x1c]; /* 0x470 - 0x48c */ 1698250003Sadrian volatile u_int32_t BB_txiqcal_status_b1; /* 0x48c - 0x490 */ 1699250003Sadrian volatile char pad__10[0x20]; /* 0x490 - 0x4b0 */ 1700250003Sadrian union { 1701250003Sadrian struct { 1702250003Sadrian volatile char pad__11[0x150]; /* 0x4b0 - 0x600 */ 1703250003Sadrian } Osprey; 1704250003Sadrian struct { 1705250003Sadrian volatile u_int32_t BB_aic_ctrl_0_b1; /* 0x4b0 - 0x4b4 */ 1706250003Sadrian volatile u_int32_t BB_aic_ctrl_1_b1; /* 0x4b4 - 0x4b8 */ 1707250003Sadrian volatile char pad__11[0x8]; /* 0x4b8 - 0x4c0 */ 1708250003Sadrian volatile u_int32_t BB_aic_stat_0_b1; /* 0x4c0 - 0x4c4 */ 1709250003Sadrian volatile u_int32_t BB_aic_stat_1_b1; /* 0x4c4 - 0x4c8 */ 1710250003Sadrian volatile char pad__12[0x128]; /* 0x4c8 - 0x5f0 */ 1711250003Sadrian volatile u_int32_t BB_tables_intf_addr_b1; /* 0x5f0 - 0x5f4 */ 1712250003Sadrian volatile u_int32_t BB_tables_intf_data_b1; /* 0x5f4 - 0x5f8 */ 1713250003Sadrian volatile char pad__13[0x8]; /* 0x5f8 - 0x600 */ 1714250003Sadrian } Jupiter_10; 1715250003Sadrian struct { 1716250003Sadrian volatile u_int32_t BB_aic_ctrl_0_b1; /* 0x4b0 - 0x4b4 */ 1717250003Sadrian volatile u_int32_t BB_aic_ctrl_1_b1; /* 0x4b4 - 0x4b8 */ 1718250003Sadrian volatile char pad__11[0x8]; /* 0x4b8 - 0x4c0 */ 1719250003Sadrian volatile u_int32_t BB_aic_ctrl_4_b1; /* 0x4c0 - 0x4c4 */ 1720250003Sadrian volatile u_int32_t BB_aic_stat_0_b1; /* 0x4c4 - 0x4c8 */ 1721250003Sadrian volatile u_int32_t BB_aic_stat_1_b1; /* 0x4c8 - 0x4cc */ 1722250003Sadrian volatile u_int32_t BB_aic_stat_2_b1; /* 0x4cc - 0x4d0 */ 1723250003Sadrian volatile char pad__12[0x120]; /* 0x4d0 - 0x5f0 */ 1724250003Sadrian volatile u_int32_t BB_tables_intf_addr_b1; /* 0x5f0 - 0x5f4 */ 1725250003Sadrian volatile u_int32_t BB_tables_intf_data_b1; /* 0x5f4 - 0x5f8 */ 1726250003Sadrian volatile char pad__13[0x8]; /* 0x5f8 - 0x600 */ 1727250003Sadrian } Jupiter_20; 1728250003Sadrian } overlay_0x4b0; 1729250003Sadrian}; 1730250003Sadrian 1731250003Sadrianstruct chn2_reg_map { 1732250003Sadrian volatile u_int32_t BB_dummy_DONOTACCESS2; /* 0x0 - 0x4 */ 1733250003Sadrian volatile char pad__0[0x2c]; /* 0x4 - 0x30 */ 1734250003Sadrian volatile u_int32_t BB_ext_chan_pwr_thr_2_b2; /* 0x30 - 0x34 */ 1735250003Sadrian volatile char pad__1[0x74]; /* 0x34 - 0xa8 */ 1736250003Sadrian volatile u_int32_t BB_spur_report_b2; /* 0xa8 - 0xac */ 1737250003Sadrian volatile char pad__2[0x14]; /* 0xac - 0xc0 */ 1738250003Sadrian volatile u_int32_t BB_iq_adc_meas_0_b2; /* 0xc0 - 0xc4 */ 1739250003Sadrian volatile u_int32_t BB_iq_adc_meas_1_b2; /* 0xc4 - 0xc8 */ 1740250003Sadrian volatile u_int32_t BB_iq_adc_meas_2_b2; /* 0xc8 - 0xcc */ 1741250003Sadrian volatile u_int32_t BB_iq_adc_meas_3_b2; /* 0xcc - 0xd0 */ 1742250003Sadrian volatile u_int32_t BB_tx_phase_ramp_b2; /* 0xd0 - 0xd4 */ 1743250003Sadrian volatile u_int32_t BB_adc_gain_dc_corr_b2; /* 0xd4 - 0xd8 */ 1744250003Sadrian volatile char pad__3[0x4]; /* 0xd8 - 0xdc */ 1745250003Sadrian volatile u_int32_t BB_rx_iq_corr_b2; /* 0xdc - 0xe0 */ 1746250003Sadrian volatile char pad__4[0x10]; /* 0xe0 - 0xf0 */ 1747250003Sadrian volatile u_int32_t BB_paprd_ctrl0_b2; /* 0xf0 - 0xf4 */ 1748250003Sadrian volatile u_int32_t BB_paprd_ctrl1_b2; /* 0xf4 - 0xf8 */ 1749250003Sadrian volatile u_int32_t BB_pa_gain123_b2; /* 0xf8 - 0xfc */ 1750250003Sadrian volatile u_int32_t BB_pa_gain45_b2; /* 0xfc - 0x100 */ 1751250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_0_b2; 1752250003Sadrian /* 0x100 - 0x104 */ 1753250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_1_b2; 1754250003Sadrian /* 0x104 - 0x108 */ 1755250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_2_b2; 1756250003Sadrian /* 0x108 - 0x10c */ 1757250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_3_b2; 1758250003Sadrian /* 0x10c - 0x110 */ 1759250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_4_b2; 1760250003Sadrian /* 0x110 - 0x114 */ 1761250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_5_b2; 1762250003Sadrian /* 0x114 - 0x118 */ 1763250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_6_b2; 1764250003Sadrian /* 0x118 - 0x11c */ 1765250003Sadrian volatile u_int32_t BB_paprd_pre_post_scale_7_b2; 1766250003Sadrian /* 0x11c - 0x120 */ 1767250003Sadrian volatile u_int32_t BB_paprd_mem_tab_b2[120]; /* 0x120 - 0x300 */ 1768250003Sadrian volatile u_int32_t BB_chan_info_chan_tab_b2[60]; 1769250003Sadrian /* 0x300 - 0x3f0 */ 1770250003Sadrian}; 1771250003Sadrian 1772250003Sadrianstruct agc2_reg_map { 1773250003Sadrian volatile u_int32_t BB_dummy_DONOTACCESS4; /* 0x0 - 0x4 */ 1774250003Sadrian volatile u_int32_t BB_gain_force_max_gains_b2; /* 0x4 - 0x8 */ 1775250003Sadrian volatile char pad__0[0x10]; /* 0x8 - 0x18 */ 1776250003Sadrian volatile u_int32_t BB_ext_atten_switch_ctl_b2; /* 0x18 - 0x1c */ 1777250003Sadrian volatile u_int32_t BB_cca_b2; /* 0x1c - 0x20 */ 1778250003Sadrian volatile u_int32_t BB_cca_ctrl_2_b2; /* 0x20 - 0x24 */ 1779250003Sadrian volatile char pad__1[0x15c]; /* 0x24 - 0x180 */ 1780250003Sadrian volatile u_int32_t BB_rssi_b2; /* 0x180 - 0x184 */ 1781250003Sadrian volatile char pad__2[0x4]; /* 0x184 - 0x188 */ 1782250003Sadrian volatile u_int32_t BB_agc_dig_dc_status_i_b2; /* 0x188 - 0x18c */ 1783250003Sadrian volatile u_int32_t BB_agc_dig_dc_status_q_b2; /* 0x18c - 0x190 */ 1784250003Sadrian}; 1785250003Sadrian 1786250003Sadrianstruct sm2_reg_map { 1787250003Sadrian volatile u_int32_t BB_dummy_DONOTACCESS6; /* 0x0 - 0x4 */ 1788250003Sadrian volatile char pad__0[0x80]; /* 0x4 - 0x84 */ 1789250003Sadrian volatile u_int32_t BB_switch_table_chn_b2; /* 0x84 - 0x88 */ 1790250003Sadrian volatile char pad__1[0x48]; /* 0x88 - 0xd0 */ 1791250003Sadrian volatile u_int32_t BB_fcal_2_b2; /* 0xd0 - 0xd4 */ 1792250003Sadrian volatile u_int32_t BB_dft_tone_ctrl_b2; /* 0xd4 - 0xd8 */ 1793250003Sadrian volatile char pad__2[0x4]; /* 0xd8 - 0xdc */ 1794250003Sadrian volatile u_int32_t BB_cl_map_0_b2; /* 0xdc - 0xe0 */ 1795250003Sadrian volatile u_int32_t BB_cl_map_1_b2; /* 0xe0 - 0xe4 */ 1796250003Sadrian volatile u_int32_t BB_cl_map_2_b2; /* 0xe4 - 0xe8 */ 1797250003Sadrian volatile u_int32_t BB_cl_map_3_b2; /* 0xe8 - 0xec */ 1798250003Sadrian volatile u_int32_t BB_cl_map_pal_0_b2; /* 0xec - 0xf0 */ 1799250003Sadrian volatile u_int32_t BB_cl_map_pal_1_b2; /* 0xf0 - 0xf4 */ 1800250003Sadrian volatile u_int32_t BB_cl_map_pal_2_b2; /* 0xf4 - 0xf8 */ 1801250003Sadrian volatile u_int32_t BB_cl_map_pal_3_b2; /* 0xf8 - 0xfc */ 1802250003Sadrian volatile char pad__3[0x4]; /* 0xfc - 0x100 */ 1803250003Sadrian volatile u_int32_t BB_cl_tab_b2[16]; /* 0x100 - 0x140 */ 1804250003Sadrian volatile char pad__4[0x40]; /* 0x140 - 0x180 */ 1805250003Sadrian volatile u_int32_t BB_chan_info_gain_b2; /* 0x180 - 0x184 */ 1806250003Sadrian volatile char pad__5[0x80]; /* 0x184 - 0x204 */ 1807250003Sadrian volatile u_int32_t BB_tpc_4_b2; /* 0x204 - 0x208 */ 1808250003Sadrian volatile u_int32_t BB_tpc_5_b2; /* 0x208 - 0x20c */ 1809250003Sadrian volatile u_int32_t BB_tpc_6_b2; /* 0x20c - 0x210 */ 1810250003Sadrian volatile char pad__6[0x10]; /* 0x210 - 0x220 */ 1811250003Sadrian volatile u_int32_t BB_tpc_11_b2; /* 0x220 - 0x224 */ 1812250003Sadrian volatile char pad__7[0x1c]; /* 0x224 - 0x240 */ 1813250003Sadrian union { 1814250003Sadrian volatile u_int32_t BB_pdadc_tab_b2[32]; /* 0x240 - 0x2c0 */ 1815250003Sadrian struct { 1816250003Sadrian volatile u_int32_t BB_tpc_19_b2; /* 0x240 - 0x244 */ 1817250003Sadrian volatile u_int32_t pad__7_1[31]; /* 0x244 - 0x2c0 */ 1818250003Sadrian } Scorpion; 1819250003Sadrian } overlay_c440; 1820250003Sadrian volatile char pad__8[0x190]; /* 0x2c0 - 0x450 */ 1821250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_01_b2; /* 0x450 - 0x454 */ 1822250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_23_b2; /* 0x454 - 0x458 */ 1823250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_45_b2; /* 0x458 - 0x45c */ 1824250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_67_b2; /* 0x45c - 0x460 */ 1825250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_89_b2; /* 0x460 - 0x464 */ 1826250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_ab_b2; /* 0x464 - 0x468 */ 1827250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_cd_b2; /* 0x468 - 0x46c */ 1828250003Sadrian volatile u_int32_t BB_txiq_corr_coeff_ef_b2; /* 0x46c - 0x470 */ 1829250003Sadrian volatile char pad__9[0x1c]; /* 0x470 - 0x48c */ 1830250003Sadrian volatile u_int32_t BB_txiqcal_status_b2; /* 0x48c - 0x490 */ 1831250003Sadrian volatile char pad__10[0x16c]; /* 0x490 - 0x5fc */ 1832250003Sadrian volatile u_int32_t BB_dummy_sm2; /* 0x5fc - 0x600 */ 1833250003Sadrian}; 1834250003Sadrian 1835250003Sadrianstruct chn3_reg_map { 1836250003Sadrian volatile u_int32_t BB_dummy1[256]; /* 0x0 - 0x400 */ 1837250003Sadrian}; 1838250003Sadrian 1839250003Sadrianstruct agc3_reg_map { 1840250003Sadrian volatile u_int32_t BB_dummy; /* 0x0 - 0x4 */ 1841250003Sadrian volatile char pad__0[0x17c]; /* 0x4 - 0x180 */ 1842250003Sadrian volatile u_int32_t BB_rssi_b3; /* 0x180 - 0x184 */ 1843250003Sadrian}; 1844250003Sadrian 1845250003Sadrianstruct sm3_reg_map { 1846250003Sadrian volatile u_int32_t BB_dummy2[384]; /* 0x0 - 0x600 */ 1847250003Sadrian}; 1848250003Sadrian 1849250003Sadrianstruct bb_reg_map { 1850250003Sadrian volatile char pad__0[0x9800]; /* 0x0 - 0x9800 */ 1851250003Sadrian struct chn_reg_map bb_chn_reg_map; /* 0x9800 - 0x9bf8 */ 1852250003Sadrian volatile char pad__1[0x8]; /* 0x9bf8 - 0x9c00 */ 1853250003Sadrian struct mrc_reg_map bb_mrc_reg_map; /* 0x9c00 - 0x9c24 */ 1854250003Sadrian volatile char pad__2[0xdc]; /* 0x9c24 - 0x9d00 */ 1855250003Sadrian struct bbb_reg_map bb_bbb_reg_map; /* 0x9d00 - 0x9d20 */ 1856250003Sadrian volatile char pad__3[0xe0]; /* 0x9d20 - 0x9e00 */ 1857250003Sadrian struct agc_reg_map bb_agc_reg_map; /* 0x9e00 - 0xa200 */ 1858250003Sadrian struct sm_reg_map bb_sm_reg_map; /* 0xa200 - 0xa7f8 */ 1859250003Sadrian volatile char pad__4[0x8]; /* 0xa7f8 - 0xa800 */ 1860250003Sadrian union { 1861250003Sadrian struct { 1862250003Sadrian struct chn1_reg_map bb_chn1_reg_map; /* 0xa800 - 0xabf8 */ 1863250003Sadrian volatile char pad__5[0x208]; /* 0xabf8 - 0xae00 */ 1864250003Sadrian struct agc1_reg_map bb_agc1_reg_map; /* 0xae00 - 0xb200 */ 1865250003Sadrian struct sm1_reg_map bb_sm1_reg_map; /* 0xb200 - 0xb800 */ 1866250003Sadrian struct chn2_reg_map bb_chn2_reg_map; /* 0xb800 - 0xbbf0 */ 1867250003Sadrian volatile char pad__6[0x210]; /* 0xbbf0 - 0xbe00 */ 1868250003Sadrian struct agc2_reg_map bb_agc2_reg_map; /* 0xbe00 - 0xbf90 */ 1869250003Sadrian volatile char pad__7[0x270]; /* 0xbf90 - 0xc200 */ 1870250003Sadrian struct sm2_reg_map bb_sm2_reg_map; /* 0xc200 - 0xc800 */ 1871250003Sadrian } Osprey; 1872250003Sadrian struct { 1873250003Sadrian struct chn_ext_reg_map bb_chn_ext_reg_map; /* 0xa800 - 0xac00 */ 1874250003Sadrian volatile char pad__5[0x600]; /* 0xac00 - 0xb200 */ 1875250003Sadrian struct sm_ext_reg_map bb_sm_ext_reg_map; /* 0xb200 - 0xb800 */ 1876250003Sadrian volatile char pad__6[0x600]; /* 0xb800 - 0xbe00 */ 1877250003Sadrian struct agc1_reg_map bb_agc1_reg_map; /* 0xbe00 - 0xc1fc */ 1878250003Sadrian volatile char pad__7[0x4]; /* 0xc1fc - 0xc200 */ 1879250003Sadrian struct sm1_reg_map bb_sm1_reg_map; /* 0xc200 - 0xc800 */ 1880250003Sadrian } Poseidon; 1881250003Sadrian } overlay_0xa800; 1882250003Sadrian struct chn3_reg_map bb_chn3_reg_map; /* 0xc800 - 0xcc00 */ 1883250003Sadrian volatile char pad__8[0x200]; /* 0xcc00 - 0xce00 */ 1884250003Sadrian struct agc3_reg_map bb_agc3_reg_map; /* 0xce00 - 0xcf84 */ 1885250003Sadrian volatile char pad__9[0x27c]; /* 0xcf84 - 0xd200 */ 1886250003Sadrian struct sm3_reg_map bb_sm3_reg_map; /* 0xd200 - 0xd800 */ 1887250003Sadrian}; 1888250003Sadrian 1889250003Sadrianstruct svd_reg { 1890250003Sadrian volatile char pad__0[0x10000]; /* 0x0 - 0x10000 */ 1891250003Sadrian volatile u_int32_t TXBF_DBG; /* 0x10000 - 0x10004 */ 1892250003Sadrian volatile u_int32_t TXBF; /* 0x10004 - 0x10008 */ 1893250003Sadrian volatile u_int32_t TXBF_TIMER; /* 0x10008 - 0x1000c */ 1894250003Sadrian volatile u_int32_t TXBF_SW; /* 0x1000c - 0x10010 */ 1895250003Sadrian volatile u_int32_t TXBF_SM; /* 0x10010 - 0x10014 */ 1896250003Sadrian volatile u_int32_t TXBF1_CNTL; /* 0x10014 - 0x10018 */ 1897250003Sadrian volatile u_int32_t TXBF2_CNTL; /* 0x10018 - 0x1001c */ 1898250003Sadrian volatile u_int32_t TXBF3_CNTL; /* 0x1001c - 0x10020 */ 1899250003Sadrian volatile u_int32_t TXBF4_CNTL; /* 0x10020 - 0x10024 */ 1900250003Sadrian volatile u_int32_t TXBF5_CNTL; /* 0x10024 - 0x10028 */ 1901250003Sadrian volatile u_int32_t TXBF6_CNTL; /* 0x10028 - 0x1002c */ 1902250003Sadrian volatile u_int32_t TXBF7_CNTL; /* 0x1002c - 0x10030 */ 1903250003Sadrian volatile u_int32_t TXBF8_CNTL; /* 0x10030 - 0x10034 */ 1904250003Sadrian volatile char pad__1[0xfcc]; /* 0x10034 - 0x11000 */ 1905250003Sadrian volatile u_int32_t RC0[118]; /* 0x11000 - 0x111d8 */ 1906250003Sadrian volatile char pad__2[0x28]; /* 0x111d8 - 0x11200 */ 1907250003Sadrian volatile u_int32_t RC1[118]; /* 0x11200 - 0x113d8 */ 1908250003Sadrian volatile char pad__3[0x28]; /* 0x113d8 - 0x11400 */ 1909250003Sadrian volatile u_int32_t SVD_MEM0[114]; /* 0x11400 - 0x115c8 */ 1910250003Sadrian volatile char pad__4[0x38]; /* 0x115c8 - 0x11600 */ 1911250003Sadrian volatile u_int32_t SVD_MEM1[114]; /* 0x11600 - 0x117c8 */ 1912250003Sadrian volatile char pad__5[0x38]; /* 0x117c8 - 0x11800 */ 1913250003Sadrian volatile u_int32_t SVD_MEM2[114]; /* 0x11800 - 0x119c8 */ 1914250003Sadrian volatile char pad__6[0x38]; /* 0x119c8 - 0x11a00 */ 1915250003Sadrian volatile u_int32_t SVD_MEM3[114]; /* 0x11a00 - 0x11bc8 */ 1916250003Sadrian volatile char pad__7[0x38]; /* 0x11bc8 - 0x11c00 */ 1917250003Sadrian volatile u_int32_t SVD_MEM4[114]; /* 0x11c00 - 0x11dc8 */ 1918250003Sadrian volatile char pad__8[0x638]; /* 0x11dc8 - 0x12400 */ 1919250003Sadrian volatile u_int32_t CVCACHE[512]; /* 0x12400 - 0x12c00 */ 1920250003Sadrian}; 1921250003Sadrian 1922250003Sadrianstruct efuse_reg_WLAN { 1923250003Sadrian volatile char pad__0[0x14000]; /* 0x0 - 0x14000 */ 1924250003Sadrian volatile u_int32_t OTP_MEM[256]; /* 0x14000 - 0x14400 */ 1925250003Sadrian volatile char pad__1[0x1b00]; /* 0x14400 - 0x15f00 */ 1926250003Sadrian volatile u_int32_t OTP_INTF0; /* 0x15f00 - 0x15f04 */ 1927250003Sadrian volatile u_int32_t OTP_INTF1; /* 0x15f04 - 0x15f08 */ 1928250003Sadrian volatile u_int32_t OTP_INTF2; /* 0x15f08 - 0x15f0c */ 1929250003Sadrian volatile u_int32_t OTP_INTF3; /* 0x15f0c - 0x15f10 */ 1930250003Sadrian volatile u_int32_t OTP_INTF4; /* 0x15f10 - 0x15f14 */ 1931250003Sadrian volatile u_int32_t OTP_INTF5; /* 0x15f14 - 0x15f18 */ 1932250003Sadrian volatile u_int32_t OTP_STATUS0; /* 0x15f18 - 0x15f1c */ 1933250003Sadrian volatile u_int32_t OTP_STATUS1; /* 0x15f1c - 0x15f20 */ 1934250003Sadrian volatile u_int32_t OTP_INTF6; /* 0x15f20 - 0x15f24 */ 1935250003Sadrian volatile u_int32_t OTP_LDO_CONTROL; /* 0x15f24 - 0x15f28 */ 1936250003Sadrian volatile u_int32_t OTP_LDO_POWER_GOOD; /* 0x15f28 - 0x15f2c */ 1937250003Sadrian volatile u_int32_t OTP_LDO_STATUS; /* 0x15f2c - 0x15f30 */ 1938250003Sadrian volatile u_int32_t OTP_VDDQ_HOLD_TIME; /* 0x15f30 - 0x15f34 */ 1939250003Sadrian volatile u_int32_t OTP_PGENB_SETUP_HOLD_TIME; /* 0x15f34 - 0x15f38 */ 1940250003Sadrian volatile u_int32_t OTP_STROBE_PULSE_INTERVAL; /* 0x15f38 - 0x15f3c */ 1941250003Sadrian volatile u_int32_t OTP_CSB_ADDR_LOAD_SETUP_HOLD; 1942250003Sadrian /* 0x15f3c - 0x15f40 */ 1943250003Sadrian}; 1944250003Sadrian 1945250003Sadrianstruct radio65_reg { 1946250003Sadrian volatile char pad__0[0x16000]; /* 0x0 - 0x16000 */ 1947250003Sadrian volatile u_int32_t ch0_RXRF_BIAS1; /* 0x16000 - 0x16004 */ 1948250003Sadrian volatile u_int32_t ch0_RXRF_BIAS2; /* 0x16004 - 0x16008 */ 1949250003Sadrian volatile u_int32_t ch0_RXRF_GAINSTAGES; /* 0x16008 - 0x1600c */ 1950250003Sadrian volatile u_int32_t ch0_RXRF_AGC; /* 0x1600c - 0x16010 */ 1951250003Sadrian /* Jupiter */ 1952250003Sadrian volatile u_int32_t ch0_RXRF_BIAS3; /* 0x16010 - 0x16014 */ 1953250003Sadrian volatile char pad__1[0x2c]; /* 0x16014 - 0x16040 */ 1954250003Sadrian volatile u_int32_t ch0_TXRF1; /* 0x16040 - 0x16044 */ 1955250003Sadrian volatile u_int32_t ch0_TXRF2; /* 0x16044 - 0x16048 */ 1956250003Sadrian volatile u_int32_t ch0_TXRF3; /* 0x16048 - 0x1604c */ 1957250003Sadrian volatile u_int32_t ch0_TXRF4; /* 0x1604c - 0x16050 */ 1958250003Sadrian volatile u_int32_t ch0_TXRF5; /* 0x16050 - 0x16054 */ 1959250003Sadrian volatile u_int32_t ch0_TXRF6; /* 0x16054 - 0x16058 */ 1960250003Sadrian /* Not Poseidon */ 1961250003Sadrian volatile u_int32_t ch0_TXRF7; /* 0x16058 - 0x1605c */ 1962250003Sadrian /* Not Poseidon */ 1963250003Sadrian volatile u_int32_t ch0_TXRF8; /* 0x1605c - 0x16060 */ 1964250003Sadrian /* Not Poseidon */ 1965250003Sadrian volatile u_int32_t ch0_TXRF9; /* 0x16060 - 0x16064 */ 1966250003Sadrian /* Not Poseidon */ 1967250003Sadrian volatile u_int32_t ch0_TXRF10; /* 0x16064 - 0x16068 */ 1968250003Sadrian /* Not Poseidon */ 1969250003Sadrian volatile u_int32_t ch0_TXRF11; /* 0x16068 - 0x1606c */ 1970250003Sadrian /* Not Poseidon */ 1971250003Sadrian volatile u_int32_t ch0_TXRF12; /* 0x1606c - 0x16070 */ 1972250003Sadrian volatile char pad__2[0x10]; /* 0x16070 - 0x16080 */ 1973250003Sadrian volatile u_int32_t ch0_SYNTH1; /* 0x16080 - 0x16084 */ 1974250003Sadrian volatile u_int32_t ch0_SYNTH2; /* 0x16084 - 0x16088 */ 1975250003Sadrian volatile u_int32_t ch0_SYNTH3; /* 0x16088 - 0x1608c */ 1976250003Sadrian volatile u_int32_t ch0_SYNTH4; /* 0x1608c - 0x16090 */ 1977250003Sadrian volatile u_int32_t ch0_SYNTH5; /* 0x16090 - 0x16094 */ 1978250003Sadrian volatile u_int32_t ch0_SYNTH6; /* 0x16094 - 0x16098 */ 1979250003Sadrian volatile u_int32_t ch0_SYNTH7; /* 0x16098 - 0x1609c */ 1980250003Sadrian volatile u_int32_t ch0_SYNTH8; /* 0x1609c - 0x160a0 */ 1981250003Sadrian volatile u_int32_t ch0_SYNTH9; /* 0x160a0 - 0x160a4 */ 1982250003Sadrian volatile u_int32_t ch0_SYNTH10; /* 0x160a4 - 0x160a8 */ 1983250003Sadrian volatile u_int32_t ch0_SYNTH11; /* 0x160a8 - 0x160ac */ 1984250003Sadrian volatile u_int32_t ch0_SYNTH12; /* 0x160ac - 0x160b0 */ 1985250003Sadrian volatile u_int32_t ch0_SYNTH13; /* 0x160b0 - 0x160b4 */ 1986250003Sadrian volatile u_int32_t ch0_SYNTH14; /* 0x160b4 - 0x160b8 */ 1987250003Sadrian /* Jupiter */ 1988250003Sadrian volatile u_int32_t ch0_SYNTH15; /* 0x160b8 - 0x160bc */ 1989250003Sadrian /* Jupiter */ 1990250003Sadrian volatile u_int32_t ch0_SYNTH16; /* 0x160bc - 0x160c0 */ 1991250003Sadrian volatile u_int32_t ch0_BIAS1; /* 0x160c0 - 0x160c4 */ 1992250003Sadrian volatile u_int32_t ch0_BIAS2; /* 0x160c4 - 0x160c8 */ 1993250003Sadrian volatile u_int32_t ch0_BIAS3; /* 0x160c8 - 0x160cc */ 1994250003Sadrian volatile u_int32_t ch0_BIAS4; /* 0x160cc - 0x160d0 */ 1995250003Sadrian /* Poseidon */ 1996250003Sadrian volatile u_int32_t ch0_BIAS5; /* 0x160d0 - 0x160d4 */ 1997250003Sadrian volatile char pad__3[0x2c]; /* 0x160d4 - 0x16100 */ 1998250003Sadrian volatile u_int32_t ch0_RXTX1; /* 0x16100 - 0x16104 */ 1999250003Sadrian volatile u_int32_t ch0_RXTX2; /* 0x16104 - 0x16108 */ 2000250003Sadrian volatile u_int32_t ch0_RXTX3; /* 0x16108 - 0x1610c */ 2001250003Sadrian volatile u_int32_t ch0_RXTX4; /* 0x1610c - 0x16110 */ 2002250003Sadrian /* Jupiter */ 2003250003Sadrian volatile u_int32_t ch0_RXTX5; /* 0x16110 - 0x16114 */ 2004250003Sadrian volatile char pad__4[0x2c]; /* 0x16114 - 0x16140 */ 2005250003Sadrian volatile u_int32_t ch0_BB1; /* 0x16140 - 0x16144 */ 2006250003Sadrian volatile u_int32_t ch0_BB2; /* 0x16144 - 0x16148 */ 2007250003Sadrian volatile u_int32_t ch0_BB3; /* 0x16148 - 0x1614c */ 2008250003Sadrian volatile char pad__6[0x34]; /* 0x1614c - 0x16180 */ 2009250003Sadrian union { 2010250003Sadrian struct { 2011250003Sadrian volatile u_int32_t ch0_pll_cntl; /* 0x16180 - 0x16184 */ 2012250003Sadrian volatile u_int32_t ch0_pll_mode; /* 0x16184 - 0x16188 */ 2013250003Sadrian volatile u_int32_t ch0_bb_dpll3; /* 0x16188 - 0x1618c */ 2014250003Sadrian volatile u_int32_t ch0_bb_dpll4; /* 0x1618c - 0x16190 */ 2015250003Sadrian volatile char pad__6_1[0xf0]; /* 0x16190 - 0x16280 */ 2016250003Sadrian volatile u_int32_t ch0_PLLCLKMODA; /* 0x16280 - 0x16284 */ 2017250003Sadrian volatile u_int32_t ch0_PLLCLKMODA2; /* 0x16284 - 0x16288 */ 2018250003Sadrian volatile u_int32_t ch0_TOP; /* 0x16288 - 0x1628c */ 2019250003Sadrian volatile u_int32_t ch0_TOP2; /* 0x1628c - 0x16290 */ 2020250003Sadrian volatile u_int32_t ch0_THERM; /* 0x16290 - 0x16294 */ 2021250003Sadrian volatile u_int32_t ch0_XTAL; /* 0x16294 - 0x16298 */ 2022250003Sadrian volatile char pad__7[0xe8]; /* 0x16298 - 0x16380 */ 2023250003Sadrian } Osprey; 2024250003Sadrian struct { 2025250003Sadrian volatile u_int32_t ch0_BB_DPLL1; /* 0x16180 - 0x16184 */ 2026250003Sadrian volatile u_int32_t ch0_BB_DPLL2; /* 0x16184 - 0x16188 */ 2027250003Sadrian volatile u_int32_t ch0_BB_DPLL3; /* 0x16188 - 0x1618c */ 2028250003Sadrian volatile u_int32_t ch0_BB_DPLL4; /* 0x1618c - 0x16190 */ 2029250003Sadrian volatile char pad__7[0xb0]; /* 0x16190 - 0x16240 */ 2030250003Sadrian volatile u_int32_t ch0_DDR_DPLL1; /* 0x16240 - 0x16244 */ 2031250003Sadrian volatile u_int32_t ch0_DDR_DPLL2; /* 0x16244 - 0x16248 */ 2032250003Sadrian volatile u_int32_t ch0_DDR_DPLL3; /* 0x16248 - 0x1624c */ 2033250003Sadrian volatile u_int32_t ch0_DDR_DPLL4; /* 0x1624c - 0x16250 */ 2034250003Sadrian volatile char pad__8[0x30]; /* 0x16250 - 0x16280 */ 2035250003Sadrian volatile u_int32_t ch0_TOP; /* 0x16280 - 0x16284 */ 2036250003Sadrian volatile u_int32_t ch0_TOP2; /* 0x16284 - 0x16288 */ 2037250003Sadrian volatile u_int32_t ch0_TOP3; /* 0x16288 - 0x1628c */ 2038250003Sadrian volatile u_int32_t ch0_THERM; /* 0x1628c - 0x16290 */ 2039250003Sadrian volatile u_int32_t ch0_XTAL; /* 0x16290 - 0x16294 */ 2040250003Sadrian volatile char pad__9[0xec]; /* 0x16294 - 0x16380 */ 2041250003Sadrian } Poseidon; 2042250003Sadrian struct { 2043250003Sadrian volatile char pad__6_1[0x100]; /* 0x16180 - 0x16280 */ 2044250003Sadrian volatile u_int32_t ch0_PLLCLKMODA1; /* 0x16280 - 0x16284 */ 2045250003Sadrian volatile u_int32_t ch0_PLLCLKMODA2; /* 0x16284 - 0x16288 */ 2046250003Sadrian volatile u_int32_t ch0_PLLCLKMODA3; /* 0x16288 - 0x1628c */ 2047250003Sadrian volatile u_int32_t ch0_TOP1; /* 0x1628c - 0x16290 */ 2048250003Sadrian volatile u_int32_t ch0_TOP2; /* 0x16290 - 0x16294 */ 2049250003Sadrian volatile u_int32_t ch0_THERM; /* 0x16294 - 0x16298 */ 2050250003Sadrian volatile u_int32_t ch0_XTAL; /* 0x16298 - 0x1629c */ 2051250003Sadrian volatile char pad__7[0xa4]; /* 0x1629c - 0x16340 */ 2052250003Sadrian volatile u_int32_t ch0_PMU1; /* 0x16340 - 0x16344 */ 2053250003Sadrian volatile u_int32_t ch0_PMU2; /* 0x16344 - 0x16348 */ 2054250003Sadrian volatile u_int32_t ch0_PMU3; /* 0x16348 - 0x1634c */ 2055250003Sadrian volatile char pad__8[0x34]; /* 0x1634c - 0x16380 */ 2056250003Sadrian } Jupiter; 2057250003Sadrian struct { 2058250003Sadrian volatile u_int32_t ch0_DPLL; /* 0x16180 - 0x16184 */ 2059250003Sadrian volatile u_int32_t ch0_DPLL2; /* 0x16184 - 0x16188 */ 2060250003Sadrian volatile u_int32_t ch0_DPLL3; /* 0x16188 - 0x1618c */ 2061250003Sadrian volatile u_int32_t ch0_DPLL4; /* 0x1618c - 0x16190 */ 2062250003Sadrian volatile u_int32_t ch0_DPLL5; /* 0x16190 - 0x16194 */ 2063250003Sadrian volatile char pad__6[0xec]; /* 0x16194 - 0x16280 */ 2064250003Sadrian volatile u_int32_t ch0_PLLCLKMODA1; /* 0x16280 - 0x16284 */ 2065250003Sadrian volatile u_int32_t ch0_PLLCLKMODA2; /* 0x16284 - 0x16288 */ 2066250003Sadrian volatile u_int32_t ch0_PLLCLKMODA3; /* 0x16288 - 0x1628c */ 2067250003Sadrian volatile u_int32_t ch0_TOP1; /* 0x1628c - 0x16290 */ 2068250003Sadrian volatile u_int32_t ch0_TOP2; /* 0x16290 - 0x16294 */ 2069250003Sadrian volatile u_int32_t ch0_THERM; /* 0x16294 - 0x16298 */ 2070250003Sadrian volatile u_int32_t ch0_XTAL; /* 0x16298 - 0x1629c */ 2071250003Sadrian volatile char pad__7[0xa4]; /* 0x1629c - 0x16340 */ 2072250003Sadrian volatile u_int32_t ch0_PMU1; /* 0x16340 - 0x16344 */ 2073250003Sadrian volatile u_int32_t ch0_PMU2; /* 0x16344 - 0x16348 */ 2074250003Sadrian volatile char pad__8[0x38]; /* 0x16348 - 0x16380 */ 2075250003Sadrian } Aphrodite; 2076250003Sadrian } overlay_0x16180; 2077250003Sadrian volatile u_int32_t ch0_rbist_cntrl; /* 0x16380 - 0x16384 */ 2078250003Sadrian volatile u_int32_t ch0_tx_dc_offset; /* 0x16384 - 0x16388 */ 2079250003Sadrian volatile u_int32_t ch0_tx_tonegen0; /* 0x16388 - 0x1638c */ 2080250003Sadrian volatile u_int32_t ch0_tx_tonegen1; /* 0x1638c - 0x16390 */ 2081250003Sadrian volatile u_int32_t ch0_tx_lftonegen0; /* 0x16390 - 0x16394 */ 2082250003Sadrian volatile u_int32_t ch0_tx_linear_ramp_i; /* 0x16394 - 0x16398 */ 2083250003Sadrian volatile u_int32_t ch0_tx_linear_ramp_q; /* 0x16398 - 0x1639c */ 2084250003Sadrian volatile u_int32_t ch0_tx_prbs_mag; /* 0x1639c - 0x163a0 */ 2085250003Sadrian volatile u_int32_t ch0_tx_prbs_seed_i; /* 0x163a0 - 0x163a4 */ 2086250003Sadrian volatile u_int32_t ch0_tx_prbs_seed_q; /* 0x163a4 - 0x163a8 */ 2087250003Sadrian volatile u_int32_t ch0_cmac_dc_cancel; /* 0x163a8 - 0x163ac */ 2088250003Sadrian volatile u_int32_t ch0_cmac_dc_offset; /* 0x163ac - 0x163b0 */ 2089250003Sadrian volatile u_int32_t ch0_cmac_corr; /* 0x163b0 - 0x163b4 */ 2090250003Sadrian volatile u_int32_t ch0_cmac_power; /* 0x163b4 - 0x163b8 */ 2091250003Sadrian volatile u_int32_t ch0_cmac_cross_corr; /* 0x163b8 - 0x163bc */ 2092250003Sadrian volatile u_int32_t ch0_cmac_i2q2; /* 0x163bc - 0x163c0 */ 2093250003Sadrian volatile u_int32_t ch0_cmac_power_hpf; /* 0x163c0 - 0x163c4 */ 2094250003Sadrian volatile u_int32_t ch0_rxdac_set1; /* 0x163c4 - 0x163c8 */ 2095250003Sadrian volatile u_int32_t ch0_rxdac_set2; /* 0x163c8 - 0x163cc */ 2096250003Sadrian volatile u_int32_t ch0_rxdac_long_shift; /* 0x163cc - 0x163d0 */ 2097250003Sadrian volatile u_int32_t ch0_cmac_results_i; /* 0x163d0 - 0x163d4 */ 2098250003Sadrian volatile u_int32_t ch0_cmac_results_q; /* 0x163d4 - 0x163d8 */ 2099250003Sadrian volatile char pad__8[0x28]; /* 0x163d8 - 0x16400 */ 2100250003Sadrian volatile u_int32_t ch1_RXRF_BIAS1; /* 0x16400 - 0x16404 */ 2101250003Sadrian volatile u_int32_t ch1_RXRF_BIAS2; /* 0x16404 - 0x16408 */ 2102250003Sadrian volatile u_int32_t ch1_RXRF_GAINSTAGES; /* 0x16408 - 0x1640c */ 2103250003Sadrian volatile u_int32_t ch1_RXRF_AGC; /* 0x1640c - 0x16410 */ 2104250003Sadrian /* Jupiter */ 2105250003Sadrian volatile u_int32_t ch1_RXRF_BIAS3; /* 0x16410 - 0x16414 */ 2106250003Sadrian volatile char pad__9[0x2c]; /* 0x16414 - 0x16440 */ 2107250003Sadrian volatile u_int32_t ch1_TXRF1; /* 0x16440 - 0x16444 */ 2108250003Sadrian volatile u_int32_t ch1_TXRF2; /* 0x16444 - 0x16448 */ 2109250003Sadrian volatile u_int32_t ch1_TXRF3; /* 0x16448 - 0x1644c */ 2110250003Sadrian volatile u_int32_t ch1_TXRF4; /* 0x1644c - 0x16450 */ 2111250003Sadrian volatile u_int32_t ch1_TXRF5; /* 0x16450 - 0x16454 */ 2112250003Sadrian volatile u_int32_t ch1_TXRF6; /* 0x16454 - 0x16458 */ 2113250003Sadrian volatile u_int32_t ch1_TXRF7; /* 0x16458 - 0x1645c */ 2114250003Sadrian volatile u_int32_t ch1_TXRF8; /* 0x1645c - 0x16460 */ 2115250003Sadrian volatile u_int32_t ch1_TXRF9; /* 0x16460 - 0x16464 */ 2116250003Sadrian volatile u_int32_t ch1_TXRF10; /* 0x16464 - 0x16468 */ 2117250003Sadrian volatile u_int32_t ch1_TXRF11; /* 0x16468 - 0x1646c */ 2118250003Sadrian volatile u_int32_t ch1_TXRF12; /* 0x1646c - 0x16470 */ 2119250003Sadrian volatile char pad__10[0x90]; /* 0x16470 - 0x16500 */ 2120250003Sadrian volatile u_int32_t ch1_RXTX1; /* 0x16500 - 0x16504 */ 2121250003Sadrian volatile u_int32_t ch1_RXTX2; /* 0x16504 - 0x16508 */ 2122250003Sadrian volatile u_int32_t ch1_RXTX3; /* 0x16508 - 0x1650c */ 2123250003Sadrian volatile u_int32_t ch1_RXTX4; /* 0x1650c - 0x16510 */ 2124250003Sadrian /* Jupiter */ 2125250003Sadrian volatile u_int32_t ch1_RXTX5; /* 0x16510 - 0x16514 */ 2126250003Sadrian volatile char pad__11[0x2c]; /* 0x16514 - 0x16540 */ 2127250003Sadrian volatile u_int32_t ch1_BB1; /* 0x16540 - 0x16544 */ 2128250003Sadrian volatile u_int32_t ch1_BB2; /* 0x16544 - 0x16548 */ 2129250003Sadrian volatile u_int32_t ch1_BB3; /* 0x16548 - 0x1654c */ 2130250003Sadrian volatile char pad__12[0x234]; /* 0x1654c - 0x16780 */ 2131250003Sadrian volatile u_int32_t ch1_rbist_cntrl; /* 0x16780 - 0x16784 */ 2132250003Sadrian volatile u_int32_t ch1_tx_dc_offset; /* 0x16784 - 0x16788 */ 2133250003Sadrian volatile u_int32_t ch1_tx_tonegen0; /* 0x16788 - 0x1678c */ 2134250003Sadrian volatile u_int32_t ch1_tx_tonegen1; /* 0x1678c - 0x16790 */ 2135250003Sadrian volatile u_int32_t ch1_tx_lftonegen0; /* 0x16790 - 0x16794 */ 2136250003Sadrian volatile u_int32_t ch1_tx_linear_ramp_i; /* 0x16794 - 0x16798 */ 2137250003Sadrian volatile u_int32_t ch1_tx_linear_ramp_q; /* 0x16798 - 0x1679c */ 2138250003Sadrian volatile u_int32_t ch1_tx_prbs_mag; /* 0x1679c - 0x167a0 */ 2139250003Sadrian volatile u_int32_t ch1_tx_prbs_seed_i; /* 0x167a0 - 0x167a4 */ 2140250003Sadrian volatile u_int32_t ch1_tx_prbs_seed_q; /* 0x167a4 - 0x167a8 */ 2141250003Sadrian volatile u_int32_t ch1_cmac_dc_cancel; /* 0x167a8 - 0x167ac */ 2142250003Sadrian volatile u_int32_t ch1_cmac_dc_offset; /* 0x167ac - 0x167b0 */ 2143250003Sadrian volatile u_int32_t ch1_cmac_corr; /* 0x167b0 - 0x167b4 */ 2144250003Sadrian volatile u_int32_t ch1_cmac_power; /* 0x167b4 - 0x167b8 */ 2145250003Sadrian volatile u_int32_t ch1_cmac_cross_corr; /* 0x167b8 - 0x167bc */ 2146250003Sadrian volatile u_int32_t ch1_cmac_i2q2; /* 0x167bc - 0x167c0 */ 2147250003Sadrian volatile u_int32_t ch1_cmac_power_hpf; /* 0x167c0 - 0x167c4 */ 2148250003Sadrian volatile u_int32_t ch1_rxdac_set1; /* 0x167c4 - 0x167c8 */ 2149250003Sadrian volatile u_int32_t ch1_rxdac_set2; /* 0x167c8 - 0x167cc */ 2150250003Sadrian volatile u_int32_t ch1_rxdac_long_shift; /* 0x167cc - 0x167d0 */ 2151250003Sadrian volatile u_int32_t ch1_cmac_results_i; /* 0x167d0 - 0x167d4 */ 2152250003Sadrian volatile u_int32_t ch1_cmac_results_q; /* 0x167d4 - 0x167d8 */ 2153250003Sadrian volatile char pad__13[0x28]; /* 0x167d8 - 0x16800 */ 2154250003Sadrian volatile u_int32_t ch2_RXRF_BIAS1; /* 0x16800 - 0x16804 */ 2155250003Sadrian volatile u_int32_t ch2_RXRF_BIAS2; /* 0x16804 - 0x16808 */ 2156250003Sadrian volatile u_int32_t ch2_RXRF_GAINSTAGES; /* 0x16808 - 0x1680c */ 2157250003Sadrian volatile u_int32_t ch2_RXRF_AGC; /* 0x1680c - 0x16810 */ 2158250003Sadrian volatile char pad__14[0x30]; /* 0x16810 - 0x16840 */ 2159250003Sadrian volatile u_int32_t ch2_TXRF1; /* 0x16840 - 0x16844 */ 2160250003Sadrian volatile u_int32_t ch2_TXRF2; /* 0x16844 - 0x16848 */ 2161250003Sadrian volatile u_int32_t ch2_TXRF3; /* 0x16848 - 0x1684c */ 2162250003Sadrian volatile u_int32_t ch2_TXRF4; /* 0x1684c - 0x16850 */ 2163250003Sadrian volatile u_int32_t ch2_TXRF5; /* 0x16850 - 0x16854 */ 2164250003Sadrian volatile u_int32_t ch2_TXRF6; /* 0x16854 - 0x16858 */ 2165250003Sadrian volatile u_int32_t ch2_TXRF7; /* 0x16858 - 0x1685c */ 2166250003Sadrian volatile u_int32_t ch2_TXRF8; /* 0x1685c - 0x16860 */ 2167250003Sadrian volatile u_int32_t ch2_TXRF9; /* 0x16860 - 0x16864 */ 2168250003Sadrian volatile u_int32_t ch2_TXRF10; /* 0x16864 - 0x16868 */ 2169250003Sadrian volatile u_int32_t ch2_TXRF11; /* 0x16868 - 0x1686c */ 2170250003Sadrian volatile u_int32_t ch2_TXRF12; /* 0x1686c - 0x16870 */ 2171250003Sadrian volatile char pad__15[0x90]; /* 0x16870 - 0x16900 */ 2172250003Sadrian volatile u_int32_t ch2_RXTX1; /* 0x16900 - 0x16904 */ 2173250003Sadrian volatile u_int32_t ch2_RXTX2; /* 0x16904 - 0x16908 */ 2174250003Sadrian volatile u_int32_t ch2_RXTX3; /* 0x16908 - 0x1690c */ 2175250003Sadrian volatile u_int32_t ch2_RXTX4; /* 0x1690c - 0x16910 */ 2176250003Sadrian volatile char pad__16[0x30]; /* 0x16910 - 0x16940 */ 2177250003Sadrian volatile u_int32_t ch2_BB1; /* 0x16940 - 0x16944 */ 2178250003Sadrian volatile u_int32_t ch2_BB2; /* 0x16944 - 0x16948 */ 2179250003Sadrian volatile u_int32_t ch2_BB3; /* 0x16948 - 0x1694c */ 2180250003Sadrian volatile char pad__17[0x234]; /* 0x1694c - 0x16b80 */ 2181250003Sadrian volatile u_int32_t ch2_rbist_cntrl; /* 0x16b80 - 0x16b84 */ 2182250003Sadrian volatile u_int32_t ch2_tx_dc_offset; /* 0x16b84 - 0x16b88 */ 2183250003Sadrian volatile u_int32_t ch2_tx_tonegen0; /* 0x16b88 - 0x16b8c */ 2184250003Sadrian volatile u_int32_t ch2_tx_tonegen1; /* 0x16b8c - 0x16b90 */ 2185250003Sadrian volatile u_int32_t ch2_tx_lftonegen0; /* 0x16b90 - 0x16b94 */ 2186250003Sadrian volatile u_int32_t ch2_tx_linear_ramp_i; /* 0x16b94 - 0x16b98 */ 2187250003Sadrian volatile u_int32_t ch2_tx_linear_ramp_q; /* 0x16b98 - 0x16b9c */ 2188250003Sadrian volatile u_int32_t ch2_tx_prbs_mag; /* 0x16b9c - 0x16ba0 */ 2189250003Sadrian volatile u_int32_t ch2_tx_prbs_seed_i; /* 0x16ba0 - 0x16ba4 */ 2190250003Sadrian volatile u_int32_t ch2_tx_prbs_seed_q; /* 0x16ba4 - 0x16ba8 */ 2191250003Sadrian volatile u_int32_t ch2_cmac_dc_cancel; /* 0x16ba8 - 0x16bac */ 2192250003Sadrian volatile u_int32_t ch2_cmac_dc_offset; /* 0x16bac - 0x16bb0 */ 2193250003Sadrian volatile u_int32_t ch2_cmac_corr; /* 0x16bb0 - 0x16bb4 */ 2194250003Sadrian volatile u_int32_t ch2_cmac_power; /* 0x16bb4 - 0x16bb8 */ 2195250003Sadrian volatile u_int32_t ch2_cmac_cross_corr; /* 0x16bb8 - 0x16bbc */ 2196250003Sadrian volatile u_int32_t ch2_cmac_i2q2; /* 0x16bbc - 0x16bc0 */ 2197250003Sadrian volatile u_int32_t ch2_cmac_power_hpf; /* 0x16bc0 - 0x16bc4 */ 2198250003Sadrian volatile u_int32_t ch2_rxdac_set1; /* 0x16bc4 - 0x16bc8 */ 2199250003Sadrian volatile u_int32_t ch2_rxdac_set2; /* 0x16bc8 - 0x16bcc */ 2200250003Sadrian volatile u_int32_t ch2_rxdac_long_shift; /* 0x16bcc - 0x16bd0 */ 2201250003Sadrian volatile u_int32_t ch2_cmac_results_i; /* 0x16bd0 - 0x16bd4 */ 2202250003Sadrian volatile u_int32_t ch2_cmac_results_q; /* 0x16bd4 - 0x16bd8 */ 2203250003Sadrian volatile char pad__18[0x4c4a8]; /* 0x16bd8 - 0x63080 */ 2204250003Sadrian /* Jupiter-start */ 2205250003Sadrian volatile u_int32_t chbt_SYNTH1; /* 0x63080 - 0x63084 */ 2206250003Sadrian volatile u_int32_t chbt_SYNTH2; /* 0x63084 - 0x63088 */ 2207250003Sadrian volatile u_int32_t chbt_SYNTH3; /* 0x63088 - 0x6308c */ 2208250003Sadrian volatile u_int32_t chbt_SYNTH4; /* 0x6308c - 0x63090 */ 2209250003Sadrian volatile u_int32_t chbt_SYNTH5; /* 0x63090 - 0x63094 */ 2210250003Sadrian volatile u_int32_t chbt_SYNTH6; /* 0x63094 - 0x63098 */ 2211250003Sadrian volatile u_int32_t chbt_SYNTH7; /* 0x63098 - 0x6309c */ 2212250003Sadrian volatile u_int32_t chbt_SYNTH8; /* 0x6309c - 0x630a0 */ 2213250003Sadrian volatile char pad__19[0x20]; /* 0x630a0 - 0x630c0 */ 2214250003Sadrian volatile u_int32_t chbt_BIAS1; /* 0x630c0 - 0x630c4 */ 2215250003Sadrian volatile u_int32_t chbt_BIAS2; /* 0x630c4 - 0x630c8 */ 2216250003Sadrian volatile u_int32_t chbt_BIAS3; /* 0x630c8 - 0x630cc */ 2217250003Sadrian volatile u_int32_t chbt_BIAS4; /* 0x630cc - 0x630d0 */ 2218250003Sadrian volatile u_int32_t chbt_BIAS5; /* 0x630d0 - 0x630d4 */ 2219250003Sadrian volatile char pad__20[0x2c]; /* 0x630d4 - 0x63100 */ 2220250003Sadrian volatile u_int32_t chbt_TOP1; /* 0x63100 - 0x63104 */ 2221250003Sadrian volatile u_int32_t chbt_TOP2; /* 0x63104 - 0x63108 */ 2222250003Sadrian volatile u_int32_t chbt_TOP3; /* 0x63108 - 0x6310c */ 2223250003Sadrian volatile u_int32_t chbt_TOP4; /* 0x6310c - 0x63110 */ 2224250003Sadrian volatile u_int32_t chbt_TOP5; /* 0x63110 - 0x63114 */ 2225250003Sadrian volatile u_int32_t chbt_TOP6; /* 0x63114 - 0x63118 */ 2226250003Sadrian volatile u_int32_t chbt_TOP7; /* 0x63118 - 0x6311c */ 2227250003Sadrian volatile u_int32_t chbt_TOP8; /* 0x6311c - 0x63120 */ 2228250003Sadrian volatile u_int32_t chbt_TOP9; /* 0x63120 - 0x63124 */ 2229250003Sadrian volatile u_int32_t chbt_TOP10; /* 0x63124 - 0x63128 */ 2230250003Sadrian volatile char pad__21[0x158]; /* 0x63128 - 0x63280 */ 2231250003Sadrian volatile u_int32_t chbt_CLK1; /* 0x63280 - 0x63284 */ 2232250003Sadrian volatile u_int32_t chbt_CLK2; /* 0x63284 - 0x63288 */ 2233250003Sadrian volatile u_int32_t chbt_CLK3; /* 0x63288 - 0x6328c */ 2234250003Sadrian volatile char pad__22[0xb4]; /* 0x6328c - 0x63340 */ 2235250003Sadrian volatile u_int32_t chbt_PMU1; /* 0x63340 - 0x63344 */ 2236250003Sadrian volatile u_int32_t chbt_PMU2; /* 0x63344 - 0x63348 */ 2237250003Sadrian /* Jupiter-end */ 2238250003Sadrian /* Aphrodite-start */ 2239250003Sadrian volatile char pad__23[0x38]; /* 0x63348 - 0x63380 */ 2240250003Sadrian volatile u_int32_t chbt_rbist_cntrl; /* 0x63380 - 0x63384 */ 2241250003Sadrian volatile u_int32_t chbt_tx_dc_offset; /* 0x63384 - 0x63388 */ 2242250003Sadrian volatile u_int32_t chbt_tx_tonegen0; /* 0x63388 - 0x6338c */ 2243250003Sadrian volatile u_int32_t chbt_tx_tonegen1; /* 0x6338c - 0x63390 */ 2244250003Sadrian volatile u_int32_t chbt_tx_lftonegen0; /* 0x63390 - 0x63394 */ 2245250003Sadrian volatile u_int32_t chbt_tx_linear_ramp_i; /* 0x63394 - 0x63398 */ 2246250003Sadrian volatile u_int32_t chbt_tx_linear_ramp_q; /* 0x63398 - 0x6339c */ 2247250003Sadrian volatile u_int32_t chbt_tx_prbs_mag; /* 0x6339c - 0x633a0 */ 2248250003Sadrian volatile u_int32_t chbt_tx_prbs_seed_i; /* 0x633a0 - 0x633a4 */ 2249250003Sadrian volatile u_int32_t chbt_tx_prbs_seed_q; /* 0x633a4 - 0x633a8 */ 2250250003Sadrian volatile u_int32_t chbt_cmac_dc_cancel; /* 0x633a8 - 0x633ac */ 2251250003Sadrian volatile u_int32_t chbt_cmac_dc_offset; /* 0x633ac - 0x633b0 */ 2252250003Sadrian volatile u_int32_t chbt_cmac_corr; /* 0x633b0 - 0x633b4 */ 2253250003Sadrian volatile u_int32_t chbt_cmac_power; /* 0x633b4 - 0x633b8 */ 2254250003Sadrian volatile u_int32_t chbt_cmac_cross_corr; /* 0x633b8 - 0x633bc */ 2255250003Sadrian volatile u_int32_t chbt_cmac_i2q2; /* 0x633bc - 0x633c0 */ 2256250003Sadrian volatile u_int32_t chbt_cmac_power_hpf; /* 0x633c0 - 0x633c4 */ 2257250003Sadrian volatile u_int32_t chbt_rxdac_set1; /* 0x633c4 - 0x633c8 */ 2258250003Sadrian volatile u_int32_t chbt_rxdac_set2; /* 0x633c8 - 0x633cc */ 2259250003Sadrian volatile u_int32_t chbt_rxdac_long_shift; /* 0x633cc - 0x633d0 */ 2260250003Sadrian volatile u_int32_t chbt_cmac_results_i; /* 0x633d0 - 0x633d4 */ 2261250003Sadrian volatile u_int32_t chbt_cmac_results_q; /* 0x633d4 - 0x633d8 */ 2262250003Sadrian /* Aphrodite-end */ 2263250003Sadrian}; 2264250003Sadrian 2265250003Sadrianstruct pcie_phy_reg_csr { 2266250003Sadrian volatile char pad__0[0x18c00]; /* 0x0 - 0x18c00 */ 2267250003Sadrian volatile u_int32_t pcie_phy_reg_1; /* 0x18c00 - 0x18c04 */ 2268250003Sadrian volatile u_int32_t pcie_phy_reg_2; /* 0x18c04 - 0x18c08 */ 2269250003Sadrian volatile u_int32_t pcie_phy_reg_3; /* 0x18c08 - 0x18c0c */ 2270250003Sadrian}; 2271250003Sadrian 2272250003Sadrianstruct pmu_reg { 2273250003Sadrian volatile char pad__0[0x16c40]; /* 0x0 - 0x16c40 */ 2274250003Sadrian volatile u_int32_t ch0_PMU1; /* 0x16c40 - 0x16c44 */ 2275250003Sadrian volatile u_int32_t ch0_PMU2; /* 0x16c44 - 0x16c48 */ 2276250003Sadrian}; 2277250003Sadrian 2278250003Sadrianstruct wlan_coex_reg { 2279250003Sadrian volatile char pad__0[0x1800]; /* 0x0 - 0x1800 */ 2280250003Sadrian volatile u_int32_t MCI_COMMAND0; /* 0x1800 - 0x1804 */ 2281250003Sadrian volatile u_int32_t MCI_COMMAND1; /* 0x1804 - 0x1808 */ 2282250003Sadrian volatile u_int32_t MCI_COMMAND2; /* 0x1808 - 0x180c */ 2283250003Sadrian volatile u_int32_t MCI_RX_CTRL; /* 0x180c - 0x1810 */ 2284250003Sadrian volatile u_int32_t MCI_TX_CTRL; /* 0x1810 - 0x1814 */ 2285250003Sadrian volatile u_int32_t MCI_MSG_ATTRIBUTES_TABLE; /* 0x1814 - 0x1818 */ 2286250003Sadrian volatile u_int32_t MCI_SCHD_TABLE_0; /* 0x1818 - 0x181c */ 2287250003Sadrian volatile u_int32_t MCI_SCHD_TABLE_1; /* 0x181c - 0x1820 */ 2288250003Sadrian volatile u_int32_t MCI_GPM_0; /* 0x1820 - 0x1824 */ 2289250003Sadrian volatile u_int32_t MCI_GPM_1; /* 0x1824 - 0x1828 */ 2290250003Sadrian volatile u_int32_t MCI_INTERRUPT_RAW; /* 0x1828 - 0x182c */ 2291250003Sadrian volatile u_int32_t MCI_INTERRUPT_EN; /* 0x182c - 0x1830 */ 2292250003Sadrian volatile u_int32_t MCI_REMOTE_CPU_INT; /* 0x1830 - 0x1834 */ 2293250003Sadrian volatile u_int32_t MCI_REMOTE_CPU_INT_EN; /* 0x1834 - 0x1838 */ 2294250003Sadrian volatile u_int32_t MCI_INTERRUPT_RX_MSG_RAW; /* 0x1838 - 0x183c */ 2295250003Sadrian volatile u_int32_t MCI_INTERRUPT_RX_MSG_EN; /* 0x183c - 0x1840 */ 2296250003Sadrian volatile u_int32_t MCI_CPU_INT; /* 0x1840 - 0x1844 */ 2297250003Sadrian volatile u_int32_t MCI_RX_STATUS; /* 0x1844 - 0x1848 */ 2298250003Sadrian volatile u_int32_t MCI_CONT_STATUS; /* 0x1848 - 0x184c */ 2299250003Sadrian volatile u_int32_t MCI_BT_PRI0; /* 0x184c - 0x1850 */ 2300250003Sadrian volatile u_int32_t MCI_BT_PRI1; /* 0x1850 - 0x1854 */ 2301250003Sadrian volatile u_int32_t MCI_BT_PRI2; /* 0x1854 - 0x1858 */ 2302250003Sadrian volatile u_int32_t MCI_BT_PRI3; /* 0x1858 - 0x185c */ 2303250003Sadrian volatile u_int32_t MCI_BT_PRI; /* 0x185c - 0x1860 */ 2304250003Sadrian volatile u_int32_t MCI_WL_FREQ0; /* 0x1860 - 0x1864 */ 2305250003Sadrian volatile u_int32_t MCI_WL_FREQ1; /* 0x1864 - 0x1868 */ 2306250003Sadrian volatile u_int32_t MCI_WL_FREQ2; /* 0x1868 - 0x186c */ 2307250003Sadrian volatile u_int32_t MCI_GAIN; /* 0x186c - 0x1870 */ 2308250003Sadrian volatile u_int32_t MCI_WBTIMER1; /* 0x1870 - 0x1874 */ 2309250003Sadrian volatile u_int32_t MCI_WBTIMER2; /* 0x1874 - 0x1878 */ 2310250003Sadrian volatile u_int32_t MCI_WBTIMER3; /* 0x1878 - 0x187c */ 2311250003Sadrian volatile u_int32_t MCI_WBTIMER4; /* 0x187c - 0x1880 */ 2312250003Sadrian volatile u_int32_t MCI_MAXGAIN; /* 0x1880 - 0x1884 */ 2313250003Sadrian volatile u_int32_t MCI_HW_SCHD_TBL_CTL; /* 0x1884 - 0x1888 */ 2314250003Sadrian volatile u_int32_t MCI_HW_SCHD_TBL_D0; /* 0x1888 - 0x188c */ 2315250003Sadrian volatile u_int32_t MCI_HW_SCHD_TBL_D1; /* 0x188c - 0x1890 */ 2316250003Sadrian volatile u_int32_t MCI_HW_SCHD_TBL_D2; /* 0x1890 - 0x1894 */ 2317250003Sadrian volatile u_int32_t MCI_HW_SCHD_TBL_D3; /* 0x1894 - 0x1898 */ 2318250003Sadrian volatile u_int32_t MCI_TX_PAYLOAD0; /* 0x1898 - 0x189c */ 2319250003Sadrian volatile u_int32_t MCI_TX_PAYLOAD1; /* 0x189c - 0x18a0 */ 2320250003Sadrian volatile u_int32_t MCI_TX_PAYLOAD2; /* 0x18a0 - 0x18a4 */ 2321250003Sadrian volatile u_int32_t MCI_TX_PAYLOAD3; /* 0x18a4 - 0x18a8 */ 2322250003Sadrian volatile u_int32_t BTCOEX_WBTIMER; /* 0x18a8 - 0x18ac */ 2323250003Sadrian volatile u_int32_t BTCOEX_CTRL; /* 0x18ac - 0x18b0 */ 2324250003Sadrian volatile u_int32_t BTCOEX_WL_WEIGHTS0; /* 0x18b0 - 0x18b4 */ 2325250003Sadrian volatile u_int32_t BTCOEX_WL_WEIGHTS1; /* 0x18b4 - 0x18b8 */ 2326250003Sadrian volatile u_int32_t BTCOEX_WL_WEIGHTS2; /* 0x18b8 - 0x18bc */ 2327250003Sadrian volatile u_int32_t BTCOEX_WL_WEIGHTS3; /* 0x18bc - 0x18c0 */ 2328250003Sadrian volatile u_int32_t BTCOEX_MAX_TXPWR[8]; /* 0x18c0 - 0x18e0 */ 2329250003Sadrian volatile char pad__1[0x60]; /* 0x18e0 - 0x1940 */ 2330250003Sadrian volatile u_int32_t BTCOEX_WL_LNA; /* 0x1940 - 0x1944 */ 2331250003Sadrian volatile u_int32_t BTCOEX_RFGAIN_CTRL; /* 0x1944 - 0x1948 */ 2332250003Sadrian volatile u_int32_t BTCOEX_CTRL2; /* 0x1948 - 0x194c */ 2333250003Sadrian volatile u_int32_t BTCOEX_RC; /* 0x194c - 0x1950 */ 2334250003Sadrian volatile u_int32_t BTCOEX_MAX_RFGAIN[16]; /* 0x1950 - 0x1990 */ 2335250003Sadrian volatile char pad__2[0xc0]; /* 0x1990 - 0x1a50 */ 2336250003Sadrian volatile u_int32_t BTCOEX_DBG; /* 0x1a50 - 0x1a54 */ 2337250003Sadrian volatile u_int32_t MCI_LAST_HW_MSG_HDR; /* 0x1a54 - 0x1a58 */ 2338250003Sadrian volatile u_int32_t MCI_LAST_HW_MSG_BDY; /* 0x1a58 - 0x1a5c */ 2339250003Sadrian volatile u_int32_t MCI_SCHD_TABLE_2; /* 0x1a5c - 0x1a60 */ 2340250003Sadrian volatile u_int32_t BTCOEX_CTRL3; /* 0x1a60 - 0x1a64 */ 2341250003Sadrian /* Aphrodite-start */ 2342250003Sadrian volatile u_int32_t BTCOEX_WL_LNADIV; /* 0x1a64 - 0x1a68 */ 2343250003Sadrian volatile u_int32_t BTCOEX_TXTX_RANGE; /* 0x1a68 - 0x1a6c */ 2344250003Sadrian volatile u_int32_t MCI_INTERRUPT_1_RAW; /* 0x1a6c - 0x1a70 */ 2345250003Sadrian volatile u_int32_t MCI_INTERRUPT_1_EN; /* 0x1a70 - 0x1a74 */ 2346250003Sadrian volatile u_int32_t MCI_EV_MISC; /* 0x1a74 - 0x1a78 */ 2347250003Sadrian volatile u_int32_t MCI_DBG_CNT_CTRL; /* 0x1a78 - 0x1a7c */ 2348250003Sadrian volatile u_int32_t MCI_DBG_CNT1; /* 0x1a7c - 0x1a80 */ 2349250003Sadrian volatile u_int32_t MCI_DBG_CNT2; /* 0x1a80 - 0x1a84 */ 2350250003Sadrian volatile u_int32_t MCI_DBG_CNT3; /* 0x1a84 - 0x1a88 */ 2351250003Sadrian volatile u_int32_t MCI_DBG_CNT4; /* 0x1a88 - 0x1a8c */ 2352250003Sadrian volatile u_int32_t MCI_DBG_CNT5; /* 0x1a8c - 0x1a90 */ 2353250003Sadrian volatile u_int32_t MCI_DBG_CNT6; /* 0x1a90 - 0x1a94 */ 2354250003Sadrian volatile u_int32_t MCI_DBG_CNT7; /* 0x1a94 - 0x1a98 */ 2355250003Sadrian volatile u_int32_t MCI_DBG_CNT8; /* 0x1a98 - 0x1a9c */ 2356250003Sadrian volatile u_int32_t MCI_DBG_CNT9; /* 0x1a9c - 0x1aa0 */ 2357250003Sadrian volatile u_int32_t MCI_DBG_CNT10; /* 0x1aa0 - 0x1aa4 */ 2358250003Sadrian volatile u_int32_t MCI_DBG_CNT11; /* 0x1aa4 - 0x1aa8 */ 2359250003Sadrian volatile u_int32_t MCI_DBG_CNT12; /* 0x1aa8 - 0x1aac */ 2360250003Sadrian volatile u_int32_t MCI_DBG_CNT13; /* 0x1aac - 0x1ab0 */ 2361250003Sadrian volatile u_int32_t MCI_DBG_CNT14; /* 0x1ab0 - 0x1ab4 */ 2362250003Sadrian volatile u_int32_t MCI_DBG_CNT15; /* 0x1ab4 - 0x1ab8 */ 2363250003Sadrian volatile u_int32_t MCI_DBG_CNT16; /* 0x1ab8 - 0x1abc */ 2364250003Sadrian volatile u_int32_t MCI_DBG_CNT17; /* 0x1abc - 0x1ac0 */ 2365250003Sadrian volatile u_int32_t MCI_DBG_CNT18; /* 0x1ac0 - 0x1ac4 */ 2366250003Sadrian volatile u_int32_t MCI_DBG_CNT19; /* 0x1ac4 - 0x1ac8 */ 2367250003Sadrian /* Aphrodite-end */ 2368250003Sadrian}; 2369250003Sadrian 2370250003Sadrianstruct uart1_reg_csr { 2371250003Sadrian volatile u_int32_t UART_DATA; /* 0x0 - 0x4 */ 2372250003Sadrian volatile u_int32_t UART_CONTROL; /* 0x4 - 0x8 */ 2373250003Sadrian volatile u_int32_t UART_CLKDIV; /* 0x8 - 0xc */ 2374250003Sadrian volatile u_int32_t UART_INT; /* 0xc - 0x10 */ 2375250003Sadrian volatile u_int32_t UART_INT_EN; /* 0x10 - 0x14 */ 2376250003Sadrian}; 2377250003Sadrian 2378250003Sadrianstruct wlan_bt_glb_reg_pcie { 2379250003Sadrian volatile char pad__0[0x20000]; /* 0x0 - 0x20000 */ 2380250003Sadrian volatile u_int32_t GLB_GPIO_CONTROL; /* 0x20000 - 0x20004 */ 2381250003Sadrian volatile u_int32_t GLB_WLAN_WOW_STATUS; /* 0x20004 - 0x20008 */ 2382250003Sadrian volatile u_int32_t GLB_WLAN_WOW_ENABLE; /* 0x20008 - 0x2000c */ 2383250003Sadrian volatile u_int32_t GLB_EMB_CPU_WOW_STATUS; /* 0x2000c - 0x20010 */ 2384250003Sadrian volatile u_int32_t GLB_EMB_CPU_WOW_ENABLE; /* 0x20010 - 0x20014 */ 2385250003Sadrian volatile u_int32_t GLB_MBOX_CONTROL_STATUS; /* 0x20014 - 0x20018 */ 2386250003Sadrian volatile u_int32_t GLB_SW_WOW_CONTROL; /* 0x20018 - 0x2001c */ 2387250003Sadrian volatile u_int32_t GLB_APB_TIMEOUT; /* 0x2001c - 0x20020 */ 2388250003Sadrian volatile u_int32_t GLB_OTP_LDO_CONTROL; /* 0x20020 - 0x20024 */ 2389250003Sadrian volatile u_int32_t GLB_OTP_LDO_POWER_GOOD; /* 0x20024 - 0x20028 */ 2390250003Sadrian volatile u_int32_t GLB_OTP_LDO_STATUS; /* 0x20028 - 0x2002c */ 2391250003Sadrian volatile u_int32_t GLB_SWREG_DISCONT_MODE; /* 0x2002c - 0x20030 */ 2392250003Sadrian volatile u_int32_t GLB_BT_GPIO_REMAP_OUT_CONTROL0; 2393250003Sadrian /* 0x20030 - 0x20034 */ 2394250003Sadrian volatile u_int32_t GLB_BT_GPIO_REMAP_OUT_CONTROL1; 2395250003Sadrian /* 0x20034 - 0x20038 */ 2396250003Sadrian volatile u_int32_t GLB_BT_GPIO_REMAP_IN_CONTROL0; 2397250003Sadrian /* 0x20038 - 0x2003c */ 2398250003Sadrian volatile u_int32_t GLB_BT_GPIO_REMAP_IN_CONTROL1; 2399250003Sadrian /* 0x2003c - 0x20040 */ 2400250003Sadrian volatile u_int32_t GLB_BT_GPIO_REMAP_IN_CONTROL2; 2401250003Sadrian /* 0x20040 - 0x20044 */ 2402250003Sadrian union { 2403250003Sadrian struct { 2404250003Sadrian volatile char pad__1[0xc]; /* 0x20044 - 0x20050 */ 2405250003Sadrian volatile u_int32_t GLB_SCRATCH[16]; /* 0x20050 - 0x20090 */ 2406250003Sadrian volatile char pad__2[0x370]; /* 0x20090 - 0x20400 */ 2407250003Sadrian } Jupiter_10; 2408250003Sadrian struct { 2409250003Sadrian volatile u_int32_t GLB_CONTROL; /* 0x20044 - 0x20048 */ 2410250003Sadrian volatile u_int32_t GLB_STATUS; /* 0x20048 - 0x2004c */ 2411250003Sadrian volatile u_int32_t GLB_SCRATCH[16]; /* 0x2004c - 0x2008c */ 2412250003Sadrian volatile char pad__1[0x354]; /* 0x2008c - 0x203e0 */ 2413250003Sadrian struct uart1_reg_csr shared_uart1; /* 0x203e0 - 0x203f4 */ 2414250003Sadrian volatile char pad__2[0xc]; /* 0x203f4 - 0x20400 */ 2415250003Sadrian } Jupiter_20; 2416250003Sadrian struct { 2417250003Sadrian volatile u_int32_t GLB_CONTROL; /* 0x20044 - 0x20048 */ 2418250003Sadrian volatile u_int32_t GLB_STATUS; /* 0x20048 - 0x2004c */ 2419250003Sadrian volatile char pad__1[0x4]; /* 0x2004c - 0x20050 */ 2420250003Sadrian volatile u_int32_t GLB_SCRATCH[16]; /* 0x20050 - 0x20090 */ 2421250003Sadrian volatile char pad__2[0x70]; /* 0x20090 - 0x20100 */ 2422250003Sadrian volatile u_int32_t PLLOSC_CTRL; /* 0x20100 - 0x20104 */ 2423250003Sadrian volatile u_int32_t PLLOSC_CFG; /* 0x20104 - 0x20108 */ 2424250003Sadrian volatile char pad__3[0x4]; /* 0x20108 - 0x2010c */ 2425250003Sadrian volatile u_int32_t INNOP_MEM_CONTROL; /* 0x2010c - 0x20110 */ 2426250003Sadrian volatile u_int32_t USB_CONFIG; /* 0x20110 - 0x20114 */ 2427250003Sadrian volatile u_int32_t USB_SPARE32; /* 0x20114 - 0x20118 */ 2428250003Sadrian volatile u_int32_t PCIE_AHB_BRIDGE_CFG; /* 0x20118 - 0x2011c */ 2429250003Sadrian volatile u_int32_t PCIE_AHB_BRIDGE_CTRL; /* 0x2011c - 0x20120 */ 2430250003Sadrian volatile u_int32_t OPTIONAL_CTL_REG; /* 0x20120 - 0x20124 */ 2431250003Sadrian volatile u_int32_t PCIE_PWR_CTRL_REG; /* 0x20124 - 0x20128 */ 2432250003Sadrian volatile char pad__4[0x4]; /* 0x20128 - 0x2012c */ 2433250003Sadrian volatile u_int32_t USBDEV_CLK_CTL_REG; /* 0x2012c - 0x20130 */ 2434250003Sadrian volatile u_int32_t UHOST_DEBUG_FSM; /* 0x20130 - 0x20134 */ 2435250003Sadrian volatile u_int32_t BRIDGE_DEBUG_FSM; /* 0x20134 - 0x20138 */ 2436250003Sadrian volatile u_int32_t BRIDGE_DEBUG_PTR; /* 0x20138 - 0x2013c */ 2437250003Sadrian volatile u_int32_t BRIDGE_DEBUG_CLIENT_LOG0; /* 0x2013c - 0x20140 */ 2438250003Sadrian volatile u_int32_t BRIDGE_DEBUG_CLIENT_LOG1; /* 0x20140 - 0x20144 */ 2439250003Sadrian volatile u_int32_t BRIDGE_DEBUG_CLIENT_LOG2; /* 0x20144 - 0x20148 */ 2440250003Sadrian volatile char pad__5[0x298]; /* 0x20148 - 0x203e0 */ 2441250003Sadrian volatile u_int32_t GLB_UART[8]; /* 0x203e0 - 0x20400 */ 2442250003Sadrian } Aphrodite; 2443250003Sadrian } overlay_0x20044; 2444250003Sadrian}; 2445250003Sadrian 2446250003Sadrianstruct jupiter_reg_map__rtc_reg_csr { 2447250003Sadrian volatile u_int32_t RESET_CONTROL; /* 0x0 - 0x4 */ 2448250003Sadrian volatile u_int32_t PLL_SETTLE; /* 0x4 - 0x8 */ 2449250003Sadrian volatile u_int32_t VDD_SETTLE; /* 0x8 - 0xc */ 2450250003Sadrian volatile u_int32_t PWR_CONTROL; /* 0xc - 0x10 */ 2451250003Sadrian volatile u_int32_t XTAL_SETTLE; /* 0x10 - 0x14 */ 2452250003Sadrian volatile u_int32_t RTC_CLOCK; /* 0x14 - 0x18 */ 2453250003Sadrian volatile u_int32_t CORE_CLOCK; /* 0x18 - 0x1c */ 2454250003Sadrian volatile u_int32_t CLKBOOT; /* 0x1c - 0x20 */ 2455250003Sadrian volatile u_int32_t UART_CLOCK; /* 0x20 - 0x24 */ 2456250003Sadrian volatile u_int32_t SI_CLOCK; /* 0x24 - 0x28 */ 2457250003Sadrian volatile u_int32_t CLOCK_CONTROL; /* 0x28 - 0x2c */ 2458250003Sadrian volatile u_int32_t WDT_CONTROL; /* 0x2c - 0x30 */ 2459250003Sadrian volatile u_int32_t WDT_STATUS; /* 0x30 - 0x34 */ 2460250003Sadrian volatile u_int32_t WDT; /* 0x34 - 0x38 */ 2461250003Sadrian volatile u_int32_t WDT_COUNT; /* 0x38 - 0x3c */ 2462250003Sadrian volatile u_int32_t WDT_RESET; /* 0x3c - 0x40 */ 2463250003Sadrian volatile u_int32_t RTC_INT_STATUS; /* 0x40 - 0x44 */ 2464250003Sadrian volatile u_int32_t INT_SRC_MAPPING; /* 0x44 - 0x48 */ 2465250003Sadrian volatile u_int32_t UART_SI_GPIO_INT_STATUS; /* 0x48 - 0x4c */ 2466250003Sadrian volatile u_int32_t LF_TIMER0; /* 0x4c - 0x50 */ 2467250003Sadrian volatile u_int32_t LF_TIMER_COUNT0; /* 0x50 - 0x54 */ 2468250003Sadrian volatile u_int32_t LF_TIMER_CONTROL0; /* 0x54 - 0x58 */ 2469250003Sadrian volatile u_int32_t LF_TIMER_STATUS0; /* 0x58 - 0x5c */ 2470250003Sadrian volatile u_int32_t LF_TIMER1; /* 0x5c - 0x60 */ 2471250003Sadrian volatile u_int32_t LF_TIMER_COUNT1; /* 0x60 - 0x64 */ 2472250003Sadrian volatile u_int32_t LF_TIMER_CONTROL1; /* 0x64 - 0x68 */ 2473250003Sadrian volatile u_int32_t LF_TIMER_STATUS1; /* 0x68 - 0x6c */ 2474250003Sadrian volatile u_int32_t RESET_CAUSE; /* 0x6c - 0x70 */ 2475250003Sadrian volatile u_int32_t SYSTEM_SLEEP; /* 0x70 - 0x74 */ 2476250003Sadrian volatile u_int32_t KEEP_AWAKE; /* 0x74 - 0x78 */ 2477250003Sadrian volatile u_int32_t LPO_CAL; /* 0x78 - 0x7c */ 2478250003Sadrian volatile u_int32_t OBS_CLOCK; /* 0x7c - 0x80 */ 2479250003Sadrian volatile u_int32_t CHIP_REV; /* 0x80 - 0x84 */ 2480250003Sadrian volatile u_int32_t PWR_ON_TIME; /* 0x84 - 0x88 */ 2481250003Sadrian volatile u_int32_t PWD_TIME; /* 0x88 - 0x8c */ 2482250003Sadrian volatile u_int32_t USB_SUSPEND_POWER_REG; /* 0x8c - 0x90 */ 2483250003Sadrian volatile u_int32_t USB_SUSPEND_WAKEUP_COUNTER_REG; 2484250003Sadrian /* 0x90 - 0x94 */ 2485250003Sadrian volatile u_int32_t LPO_STEP_CFG; /* 0x94 - 0x98 */ 2486250003Sadrian volatile u_int32_t LPO_FAST_CYL; /* 0x98 - 0x9c */ 2487250003Sadrian volatile u_int32_t LPO_LPO1; /* 0x9c - 0xa0 */ 2488250003Sadrian volatile u_int32_t LPO_LPO2; /* 0xa0 - 0xa4 */ 2489250003Sadrian volatile u_int32_t LPO_INT_RAW; /* 0xa4 - 0xa8 */ 2490250003Sadrian volatile u_int32_t LPO_N1TARGET; /* 0xa8 - 0xac */ 2491250003Sadrian volatile u_int32_t LPO_N2TARGET; /* 0xac - 0xb0 */ 2492250003Sadrian volatile u_int32_t LPO_DN1_MULT; /* 0xb0 - 0xb4 */ 2493250003Sadrian volatile u_int32_t LPO_DN2_MULT; /* 0xb4 - 0xb8 */ 2494250003Sadrian volatile u_int32_t LPO_NTARGET_MIN; /* 0xb8 - 0xbc */ 2495250003Sadrian volatile u_int32_t LPO_NTARGET_MAX; /* 0xbc - 0xc0 */ 2496250003Sadrian volatile u_int32_t LPO_N1TARGET_DEBUG; /* 0xc0 - 0xc4 */ 2497250003Sadrian volatile u_int32_t LPO_N2TARGET_DEBUG; /* 0xc4 - 0xc8 */ 2498250003Sadrian volatile u_int32_t OTP; /* 0xc8 - 0xcc */ 2499250003Sadrian volatile u_int32_t OTP_STATUS; /* 0xcc - 0xd0 */ 2500250003Sadrian volatile u_int32_t USB_PHY_TEST; /* 0xd0 - 0xd4 */ 2501250003Sadrian volatile u_int32_t USB_PHY_CONFIG; /* 0xd4 - 0xd8 */ 2502250003Sadrian volatile u_int32_t ADDAC_CLOCK_PHASE; /* 0xd8 - 0xdc */ 2503250003Sadrian volatile u_int32_t THERM_CONTROL; /* 0xdc - 0xe0 */ 2504250003Sadrian volatile u_int32_t THERM_TRIGGER_INTERVAL1; /* 0xe0 - 0xe4 */ 2505250003Sadrian volatile u_int32_t THERM_TRIGGER_INTERVAL2; /* 0xe4 - 0xe8 */ 2506250003Sadrian volatile u_int32_t THERM_CORRECTION; /* 0xe8 - 0xec */ 2507250003Sadrian volatile u_int32_t THERM_CORRECTION_VALUE1; /* 0xec - 0xf0 */ 2508250003Sadrian volatile u_int32_t THERM_CORRECTION_VALUE2; /* 0xf0 - 0xf4 */ 2509250003Sadrian volatile u_int32_t PLL_CONTROL; /* 0xf4 - 0xf8 */ 2510250003Sadrian volatile u_int32_t VDD12D_SENSE; /* 0xf8 - 0xfc */ 2511250003Sadrian volatile u_int32_t RBIAS; /* 0xfc - 0x100 */ 2512250003Sadrian volatile u_int32_t THERM_CONTROL_VAL; /* 0x100 - 0x104 */ 2513250003Sadrian volatile u_int32_t PLL_OSC_CONTROL; /* 0x104 - 0x108 */ 2514250003Sadrian volatile u_int32_t AHB_ERR_INT; /* 0x108 - 0x10c */ 2515250003Sadrian volatile u_int32_t INT_P2_EN; /* 0x10c - 0x110 */ 2516250003Sadrian volatile u_int32_t XTAL_CLOCK; /* 0x110 - 0x114 */ 2517250003Sadrian volatile u_int32_t CHIP_MODES; /* 0x114 - 0x118 */ 2518250003Sadrian volatile u_int32_t XTAL_FREQ; /* 0x118 - 0x11c */ 2519250003Sadrian volatile u_int32_t DEBUGGER_RESET; /* 0x11c - 0x120 */ 2520250003Sadrian volatile u_int32_t LPO_3_2K_CLK; /* 0x120 - 0x124 */ 2521250003Sadrian volatile u_int32_t LPO1_CLK_DEBUG; /* 0x124 - 0x128 */ 2522250003Sadrian volatile u_int32_t LPO2_CLK_DEBUG; /* 0x128 - 0x12c */ 2523250003Sadrian volatile u_int32_t ADDR_CHECK; /* 0x12c - 0x130 */ 2524250003Sadrian volatile u_int32_t RTC_DUMMY; /* 0x130 - 0x134 */ 2525250003Sadrian}; 2526250003Sadrian 2527250003Sadrianstruct jupiter_reg_map__vmc_reg_csr { 2528250003Sadrian volatile u_int32_t BANK0_ADDR; /* 0x0 - 0x4 */ 2529250003Sadrian volatile u_int32_t BANK1_ADDR; /* 0x4 - 0x8 */ 2530250003Sadrian volatile u_int32_t BANK_CONFIG; /* 0x8 - 0xc */ 2531250003Sadrian volatile u_int32_t MC_BCAM_CONFLICT_ERROR; /* 0xc - 0x10 */ 2532250003Sadrian volatile char pad__0[0x10]; /* 0x10 - 0x20 */ 2533250003Sadrian volatile u_int32_t MC_BCAM_COMPARE[128]; /* 0x20 - 0x220 */ 2534250003Sadrian volatile u_int32_t MC_BCAM_VALID[128]; /* 0x220 - 0x420 */ 2535250003Sadrian volatile u_int32_t MC_BCAM_TARGET[128]; /* 0x420 - 0x620 */ 2536250003Sadrian}; 2537250003Sadrian 2538250003Sadrianstruct jupiter_reg_map__apb_map_csr__uart_reg_csr { 2539250003Sadrian volatile u_int32_t UART_DATA; /* 0x0 - 0x4 */ 2540250003Sadrian volatile u_int32_t UART_CONTROL; /* 0x4 - 0x8 */ 2541250003Sadrian volatile u_int32_t UART_CLKDIV; /* 0x8 - 0xc */ 2542250003Sadrian volatile u_int32_t UART_INT; /* 0xc - 0x10 */ 2543250003Sadrian volatile u_int32_t UART_INT_EN; /* 0x10 - 0x14 */ 2544250003Sadrian}; 2545250003Sadrian 2546250003Sadrianstruct jupiter_reg_map__si_reg_csr { 2547250003Sadrian volatile u_int32_t SI_CONFIG; /* 0x0 - 0x4 */ 2548250003Sadrian volatile u_int32_t SI_CS; /* 0x4 - 0x8 */ 2549250003Sadrian volatile u_int32_t SI_TX_DATA0; /* 0x8 - 0xc */ 2550250003Sadrian volatile u_int32_t SI_TX_DATA1; /* 0xc - 0x10 */ 2551250003Sadrian volatile u_int32_t SI_RX_DATA0; /* 0x10 - 0x14 */ 2552250003Sadrian volatile u_int32_t SI_RX_DATA1; /* 0x14 - 0x18 */ 2553250003Sadrian}; 2554250003Sadrian 2555250003Sadrianstruct jupiter_reg_map__gpio_reg_csr { 2556250003Sadrian volatile u_int32_t GPIO_OUT; /* 0x0 - 0x4 */ 2557250003Sadrian volatile u_int32_t GPIO_OUT_W1TS; /* 0x4 - 0x8 */ 2558250003Sadrian volatile u_int32_t GPIO_OUT_W1TC; /* 0x8 - 0xc */ 2559250003Sadrian volatile u_int32_t GPIO_ENABLE; /* 0xc - 0x10 */ 2560250003Sadrian volatile u_int32_t GPIO_ENABLE_W1TS; /* 0x10 - 0x14 */ 2561250003Sadrian volatile u_int32_t GPIO_ENABLE_W1TC; /* 0x14 - 0x18 */ 2562250003Sadrian volatile u_int32_t GPIO_IN; /* 0x18 - 0x1c */ 2563250003Sadrian volatile u_int32_t GPIO_STATUS; /* 0x1c - 0x20 */ 2564250003Sadrian volatile u_int32_t GPIO_STATUS_W1TS; /* 0x20 - 0x24 */ 2565250003Sadrian volatile u_int32_t GPIO_STATUS_W1TC; /* 0x24 - 0x28 */ 2566250003Sadrian volatile u_int32_t GPIO_INT_ENABLE; /* 0x28 - 0x2c */ 2567250003Sadrian volatile u_int32_t GPIO_INT_ENABLE_W1TS; /* 0x2c - 0x30 */ 2568250003Sadrian volatile u_int32_t GPIO_INT_ENABLE_W1TC; /* 0x30 - 0x34 */ 2569250003Sadrian volatile u_int32_t GPIO_PIN0; /* 0x34 - 0x38 */ 2570250003Sadrian volatile u_int32_t GPIO_PIN1; /* 0x38 - 0x3c */ 2571250003Sadrian volatile u_int32_t GPIO_PIN2; /* 0x3c - 0x40 */ 2572250003Sadrian volatile u_int32_t GPIO_PIN3; /* 0x40 - 0x44 */ 2573250003Sadrian volatile u_int32_t GPIO_PIN4; /* 0x44 - 0x48 */ 2574250003Sadrian volatile u_int32_t GPIO_PIN5; /* 0x48 - 0x4c */ 2575250003Sadrian volatile u_int32_t GPIO_PIN6; /* 0x4c - 0x50 */ 2576250003Sadrian volatile u_int32_t GPIO_PIN7; /* 0x50 - 0x54 */ 2577250003Sadrian volatile u_int32_t GPIO_PIN8; /* 0x54 - 0x58 */ 2578250003Sadrian volatile u_int32_t GPIO_PIN9; /* 0x58 - 0x5c */ 2579250003Sadrian volatile u_int32_t GPIO_PIN10; /* 0x5c - 0x60 */ 2580250003Sadrian volatile u_int32_t GPIO_PIN11; /* 0x60 - 0x64 */ 2581250003Sadrian volatile u_int32_t GPIO_PIN12; /* 0x64 - 0x68 */ 2582250003Sadrian volatile u_int32_t GPIO_PIN13; /* 0x68 - 0x6c */ 2583250003Sadrian volatile u_int32_t GPIO_PIN14; /* 0x6c - 0x70 */ 2584250003Sadrian volatile u_int32_t GPIO_PIN15; /* 0x70 - 0x74 */ 2585250003Sadrian volatile u_int32_t GPIO_PIN16; /* 0x74 - 0x78 */ 2586250003Sadrian volatile u_int32_t GPIO_PIN17; /* 0x78 - 0x7c */ 2587250003Sadrian volatile u_int32_t GPIO_PIN18; /* 0x7c - 0x80 */ 2588250003Sadrian volatile u_int32_t GPIO_PIN19; /* 0x80 - 0x84 */ 2589250003Sadrian volatile u_int32_t SIGMA_DELTA; /* 0x84 - 0x88 */ 2590250003Sadrian volatile u_int32_t DEBUG_CONTROL; /* 0x88 - 0x8c */ 2591250003Sadrian volatile u_int32_t DEBUG_INPUT_SEL; /* 0x8c - 0x90 */ 2592250003Sadrian volatile u_int32_t DEBUG_PIN_SEL; /* 0x90 - 0x94 */ 2593250003Sadrian volatile u_int32_t DEBUG_OBS_BUS; /* 0x94 - 0x98 */ 2594250003Sadrian}; 2595250003Sadrian 2596250003Sadrianstruct jupiter_reg_map__mbox_reg_csr { 2597250003Sadrian volatile u_int32_t MBOX_FIFO[4]; /* 0x0 - 0x10 */ 2598250003Sadrian volatile u_int32_t MBOX_FIFO_STATUS; /* 0x10 - 0x14 */ 2599250003Sadrian volatile u_int32_t MBOX_DMA_POLICY; /* 0x14 - 0x18 */ 2600250003Sadrian volatile u_int32_t MBOX0_DMA_RX_DESCRIPTOR_BASE; 2601250003Sadrian /* 0x18 - 0x1c */ 2602250003Sadrian volatile u_int32_t MBOX0_DMA_RX_CONTROL; /* 0x1c - 0x20 */ 2603250003Sadrian volatile u_int32_t MBOX0_DMA_TX_DESCRIPTOR_BASE; 2604250003Sadrian /* 0x20 - 0x24 */ 2605250003Sadrian volatile u_int32_t MBOX0_DMA_TX_CONTROL; /* 0x24 - 0x28 */ 2606250003Sadrian volatile u_int32_t MBOX1_DMA_RX_DESCRIPTOR_BASE; 2607250003Sadrian /* 0x28 - 0x2c */ 2608250003Sadrian volatile u_int32_t MBOX1_DMA_RX_CONTROL; /* 0x2c - 0x30 */ 2609250003Sadrian volatile u_int32_t MBOX1_DMA_TX_DESCRIPTOR_BASE; 2610250003Sadrian /* 0x30 - 0x34 */ 2611250003Sadrian volatile u_int32_t MBOX1_DMA_TX_CONTROL; /* 0x34 - 0x38 */ 2612250003Sadrian volatile u_int32_t MBOX2_DMA_RX_DESCRIPTOR_BASE; 2613250003Sadrian /* 0x38 - 0x3c */ 2614250003Sadrian volatile u_int32_t MBOX2_DMA_RX_CONTROL; /* 0x3c - 0x40 */ 2615250003Sadrian volatile u_int32_t MBOX2_DMA_TX_DESCRIPTOR_BASE; 2616250003Sadrian /* 0x40 - 0x44 */ 2617250003Sadrian volatile u_int32_t MBOX2_DMA_TX_CONTROL; /* 0x44 - 0x48 */ 2618250003Sadrian volatile u_int32_t MBOX3_DMA_RX_DESCRIPTOR_BASE; 2619250003Sadrian /* 0x48 - 0x4c */ 2620250003Sadrian volatile u_int32_t MBOX3_DMA_RX_CONTROL; /* 0x4c - 0x50 */ 2621250003Sadrian volatile u_int32_t MBOX3_DMA_TX_DESCRIPTOR_BASE; 2622250003Sadrian /* 0x50 - 0x54 */ 2623250003Sadrian volatile u_int32_t MBOX3_DMA_TX_CONTROL; /* 0x54 - 0x58 */ 2624250003Sadrian volatile u_int32_t FIFO_TIMEOUT; /* 0x58 - 0x5c */ 2625250003Sadrian volatile u_int32_t MBOX_INT_STATUS; /* 0x5c - 0x60 */ 2626250003Sadrian volatile u_int32_t MBOX_INT_ENABLE; /* 0x60 - 0x64 */ 2627250003Sadrian volatile u_int32_t MBOX_DEBUG; /* 0x64 - 0x68 */ 2628250003Sadrian volatile u_int32_t MBOX_FIFO_RESET; /* 0x68 - 0x6c */ 2629250003Sadrian volatile char pad__0[0x4]; /* 0x6c - 0x70 */ 2630250003Sadrian volatile u_int32_t MBOX_TXFIFO_POP[4]; /* 0x70 - 0x80 */ 2631250003Sadrian volatile u_int32_t HCI_FRAMER; /* 0x80 - 0x84 */ 2632250003Sadrian volatile u_int32_t STEREO_CONFIG; /* 0x84 - 0x88 */ 2633250003Sadrian volatile u_int32_t STEREO_CONFIG1; /* 0x88 - 0x8c */ 2634250003Sadrian volatile u_int32_t STEREO_CONFIG2; /* 0x8c - 0x90 */ 2635250003Sadrian volatile u_int32_t STEREO_VOLUME; /* 0x90 - 0x94 */ 2636250003Sadrian volatile u_int32_t STEREO_DEBUG; /* 0x94 - 0x98 */ 2637250003Sadrian volatile u_int32_t STEREO_CONFIG3; /* 0x98 - 0x9c */ 2638250003Sadrian}; 2639250003Sadrian 2640250003Sadrianstruct jupiter_reg_map__lc_dma_reg_csr { 2641250003Sadrian volatile u_int32_t LC_DMA_MASTER; /* 0x0 - 0x4 */ 2642250003Sadrian volatile u_int32_t LC_DMA_TX_CONTROL; /* 0x4 - 0x8 */ 2643250003Sadrian volatile u_int32_t LC_DMA_RX_CONTROL; /* 0x8 - 0xc */ 2644250003Sadrian volatile u_int32_t LC_DMA_TX_HW; /* 0xc - 0x10 */ 2645250003Sadrian volatile u_int32_t LC_DMA_RX_HW; /* 0x10 - 0x14 */ 2646250003Sadrian volatile u_int32_t LC_DMA_INT_STATUS; /* 0x14 - 0x18 */ 2647250003Sadrian volatile u_int32_t LC_DMA_TX_STATUS; /* 0x18 - 0x1c */ 2648250003Sadrian volatile u_int32_t LC_DMA_TX_STATUS_W1TC; /* 0x1c - 0x20 */ 2649250003Sadrian volatile u_int32_t LC_DMA_TX_ENABLE; /* 0x20 - 0x24 */ 2650250003Sadrian volatile u_int32_t LC_DMA_RX_STATUS; /* 0x24 - 0x28 */ 2651250003Sadrian volatile u_int32_t LC_DMA_RX_STATUS_W1TC; /* 0x28 - 0x2c */ 2652250003Sadrian volatile u_int32_t LC_DMA_RX_ENABLE; /* 0x2c - 0x30 */ 2653250003Sadrian volatile u_int32_t LC_DMA_DEBUG; /* 0x30 - 0x34 */ 2654250003Sadrian}; 2655250003Sadrian 2656250003Sadrianstruct jupiter_reg_map__lc_reg_csr { 2657250003Sadrian volatile u_int32_t LC_DEV_PARAM_DAC_L; /* 0x0 - 0x4 */ 2658250003Sadrian volatile u_int32_t LC_DEV_PARAM_DAC_U; /* 0x4 - 0x8 */ 2659250003Sadrian volatile u_int32_t LC_DEV_PARAM_BD_ADDR; /* 0x8 - 0xc */ 2660250003Sadrian volatile u_int32_t LC_DEV_PARAM_FHS; /* 0xc - 0x10 */ 2661250003Sadrian volatile u_int32_t LC_DEV_PARAM_CTL; /* 0x10 - 0x14 */ 2662250003Sadrian volatile u_int32_t LC_DEV_PARAM_TIMING; /* 0x14 - 0x18 */ 2663250003Sadrian volatile u_int32_t LC_DEV_PARAM_TIMING_1; /* 0x18 - 0x1c */ 2664250003Sadrian volatile u_int32_t LC_MISC; /* 0x1c - 0x20 */ 2665250003Sadrian volatile u_int32_t LC_DEV_PARAM_COMMAND1; /* 0x20 - 0x24 */ 2666250003Sadrian volatile u_int32_t LC_DEV_PARAM_COMMAND2; /* 0x24 - 0x28 */ 2667250003Sadrian volatile u_int32_t LC_DEV_PARAM_COMMAND3; /* 0x28 - 0x2c */ 2668250003Sadrian volatile u_int32_t LC_DEV_PARAM_COMMAND4; /* 0x2c - 0x30 */ 2669250003Sadrian volatile u_int32_t LC_DEV_PARAM_COMMAND5; /* 0x30 - 0x34 */ 2670250003Sadrian volatile u_int32_t LC_DEV_PARAM_COMMAND6; /* 0x34 - 0x38 */ 2671250003Sadrian volatile u_int32_t LC_DEV_PARAM_COMMAND7; /* 0x38 - 0x3c */ 2672250003Sadrian volatile u_int32_t LC_DEV_PARAM_COMMAND8; /* 0x3c - 0x40 */ 2673250003Sadrian volatile u_int32_t LC_DEV_PARAM_AC1_L; /* 0x40 - 0x44 */ 2674250003Sadrian volatile u_int32_t LC_DEV_PARAM_AC1_U; /* 0x44 - 0x48 */ 2675250003Sadrian volatile u_int32_t LC_DEV_PARAM_AC2_L; /* 0x48 - 0x4c */ 2676250003Sadrian volatile u_int32_t LC_DEV_PARAM_AC2_U; /* 0x4c - 0x50 */ 2677250003Sadrian volatile u_int32_t LC_DEV_PARAM_CLOCK_OFFSET; /* 0x50 - 0x54 */ 2678250003Sadrian volatile u_int32_t LC_FREQUENCY; /* 0x54 - 0x58 */ 2679250003Sadrian volatile u_int32_t LC_CH_ASSESS_1; /* 0x58 - 0x5c */ 2680250003Sadrian volatile u_int32_t LC_CH_ASSESS_2; /* 0x5c - 0x60 */ 2681250003Sadrian volatile u_int32_t LC_DEV_PARAM_ENCRYPTION_KEY0; 2682250003Sadrian /* 0x60 - 0x64 */ 2683250003Sadrian volatile u_int32_t LC_DEV_PARAM_ENCRYPTION_KEY1; 2684250003Sadrian /* 0x64 - 0x68 */ 2685250003Sadrian volatile u_int32_t LC_DEV_PARAM_ENCRYPTION_KEY2; 2686250003Sadrian /* 0x68 - 0x6c */ 2687250003Sadrian volatile u_int32_t LC_DEV_PARAM_ENCRYPTION_KEY3; 2688250003Sadrian /* 0x6c - 0x70 */ 2689250003Sadrian volatile u_int32_t LC_DEV_PARAM_TX_CONTROL; /* 0x70 - 0x74 */ 2690250003Sadrian volatile u_int32_t LC_DEV_PARAM_RX_CONTROL; /* 0x74 - 0x78 */ 2691250003Sadrian volatile u_int32_t LC_DEV_PARAM_RX_STATUS1; /* 0x78 - 0x7c */ 2692250003Sadrian volatile u_int32_t LC_DEV_PARAM_RX_STATUS2; /* 0x7c - 0x80 */ 2693250003Sadrian volatile char pad__0[0x4]; /* 0x80 - 0x84 */ 2694250003Sadrian volatile u_int32_t LC_BT_CLOCK0; /* 0x84 - 0x88 */ 2695250003Sadrian volatile u_int32_t LC_BT_CLOCK1; /* 0x88 - 0x8c */ 2696250003Sadrian volatile u_int32_t LC_BT_CLOCK2; /* 0x8c - 0x90 */ 2697250003Sadrian volatile u_int32_t LC_BT_CLOCK3; /* 0x90 - 0x94 */ 2698250003Sadrian volatile u_int32_t LC_SYM_TIME0; /* 0x94 - 0x98 */ 2699250003Sadrian volatile u_int32_t LC_SYM_TIME1; /* 0x98 - 0x9c */ 2700250003Sadrian volatile u_int32_t LC_SYM_TIME2; /* 0x9c - 0xa0 */ 2701250003Sadrian volatile u_int32_t LC_SYM_TIME3; /* 0xa0 - 0xa4 */ 2702250003Sadrian volatile char pad__1[0x4]; /* 0xa4 - 0xa8 */ 2703250003Sadrian volatile u_int32_t LC_ABORT; /* 0xa8 - 0xac */ 2704250003Sadrian volatile u_int32_t LC_PRBS; /* 0xac - 0xb0 */ 2705250003Sadrian volatile u_int32_t LC_LAST_CORR_HECOK; /* 0xb0 - 0xb4 */ 2706250003Sadrian volatile char pad__2[0x4c]; /* 0xb4 - 0x100 */ 2707250003Sadrian volatile u_int32_t LC_SM_AFH_TABLE[24]; /* 0x100 - 0x160 */ 2708250003Sadrian volatile char pad__3[0x20]; /* 0x160 - 0x180 */ 2709250003Sadrian volatile u_int32_t LC_SM_AFH_BITMAP_0; /* 0x180 - 0x184 */ 2710250003Sadrian volatile u_int32_t LC_SM_AFH_BITMAP_1; /* 0x184 - 0x188 */ 2711250003Sadrian volatile u_int32_t LC_SM_AFH_BITMAP_2; /* 0x188 - 0x18c */ 2712250003Sadrian volatile u_int32_t LC_STAT0; /* 0x18c - 0x190 */ 2713250003Sadrian volatile u_int32_t LC_STAT1; /* 0x190 - 0x194 */ 2714250003Sadrian volatile u_int32_t LC_STAT2; /* 0x194 - 0x198 */ 2715250003Sadrian volatile u_int32_t LC_STAT3; /* 0x198 - 0x19c */ 2716250003Sadrian volatile u_int32_t LC_STAT4; /* 0x19c - 0x1a0 */ 2717250003Sadrian volatile u_int32_t LC_STAT5; /* 0x1a0 - 0x1a4 */ 2718250003Sadrian volatile u_int32_t LC_STAT6; /* 0x1a4 - 0x1a8 */ 2719250003Sadrian volatile u_int32_t LC_STAT7; /* 0x1a8 - 0x1ac */ 2720250003Sadrian volatile u_int32_t LC_STAT8; /* 0x1ac - 0x1b0 */ 2721250003Sadrian volatile u_int32_t LC_STAT9; /* 0x1b0 - 0x1b4 */ 2722250003Sadrian volatile char pad__4[0x14c]; /* 0x1b4 - 0x300 */ 2723250003Sadrian volatile u_int32_t LC_INTERRUPT_RAW; /* 0x300 - 0x304 */ 2724250003Sadrian volatile u_int32_t LC_INTERRUPT_EN; /* 0x304 - 0x308 */ 2725250003Sadrian volatile u_int32_t LC_INTERRUPT_RX_STATUS; /* 0x308 - 0x30c */ 2726250003Sadrian volatile u_int32_t LC_AUDIO_DATAPATH; /* 0x30c - 0x310 */ 2727250003Sadrian volatile u_int32_t LC_VOICE_CHAN0; /* 0x310 - 0x314 */ 2728250003Sadrian volatile u_int32_t LC_VOICE_CHAN1; /* 0x314 - 0x318 */ 2729250003Sadrian volatile u_int32_t LC_VOICE_CHAN0_RX_ENERGY; /* 0x318 - 0x31c */ 2730250003Sadrian volatile u_int32_t LC_VOICE_CHAN1_RX_ENERGY; /* 0x31c - 0x320 */ 2731250003Sadrian volatile u_int32_t LC_VOICE_CHAN0_TX_ENERGY; /* 0x320 - 0x324 */ 2732250003Sadrian volatile u_int32_t LC_VOICE_CHAN1_TX_ENERGY; /* 0x324 - 0x328 */ 2733250003Sadrian volatile u_int32_t LC_VOICE_CHAN0_ZERO_CROSS; /* 0x328 - 0x32c */ 2734250003Sadrian volatile u_int32_t LC_VOICE_CHAN1_ZERO_CROSS; /* 0x32c - 0x330 */ 2735250003Sadrian volatile char pad__5[0xd0]; /* 0x330 - 0x400 */ 2736250003Sadrian volatile u_int32_t LC_RX_CTRL_DATAPATH; /* 0x400 - 0x404 */ 2737250003Sadrian volatile u_int32_t LC_DEBUG; /* 0x404 - 0x408 */ 2738250003Sadrian volatile u_int32_t LC_TX_CTRL_DATAPATH; /* 0x408 - 0x40c */ 2739250003Sadrian volatile u_int32_t LC_COMMAND9; /* 0x40c - 0x410 */ 2740250003Sadrian volatile u_int32_t BT_CLOCK0_FREE_RUN; /* 0x410 - 0x414 */ 2741250003Sadrian volatile u_int32_t BT_CLOCK1_FREE_RUN; /* 0x414 - 0x418 */ 2742250003Sadrian volatile u_int32_t BT_CLOCK2_FREE_RUN; /* 0x418 - 0x41c */ 2743250003Sadrian volatile u_int32_t BT_CLOCK3_FREE_RUN; /* 0x41c - 0x420 */ 2744250003Sadrian volatile u_int32_t LC_DEV_PARAM_COMMAND10; /* 0x420 - 0x424 */ 2745250003Sadrian volatile u_int32_t LC_DEV_PARAM_TIMING_2; /* 0x424 - 0x428 */ 2746250003Sadrian volatile u_int32_t LC_DEV_PARAM_COMMAND11; /* 0x428 - 0x42c */ 2747250003Sadrian volatile u_int32_t MCI_SUB_PRIORITY_TABLE_0; /* 0x42c - 0x430 */ 2748250003Sadrian volatile u_int32_t MCI_SUB_PRIORITY_TABLE_1; /* 0x430 - 0x434 */ 2749250003Sadrian volatile u_int32_t MCI_SUB_PRIORITY_TABLE_2; /* 0x434 - 0x438 */ 2750250003Sadrian volatile u_int32_t MCI_SUB_PRIORITY_TABLE_3; /* 0x438 - 0x43c */ 2751250003Sadrian volatile u_int32_t MCI_SUB_PRIORITY_TABLE_4; /* 0x43c - 0x440 */ 2752250003Sadrian volatile u_int32_t MCI_COMMAND0; /* 0x440 - 0x444 */ 2753250003Sadrian volatile u_int32_t MCI_COMMAND1; /* 0x444 - 0x448 */ 2754250003Sadrian volatile u_int32_t MCI_COMMAND2; /* 0x448 - 0x44c */ 2755250003Sadrian volatile u_int32_t MCI_RX_CTRL; /* 0x44c - 0x450 */ 2756250003Sadrian volatile u_int32_t MCI_TX_CTRL; /* 0x450 - 0x454 */ 2757250003Sadrian volatile u_int32_t MCI_MSG_ATTRIBUTES_TABLE; /* 0x454 - 0x458 */ 2758250003Sadrian volatile u_int32_t MCI_SCHD_TABLE_0; /* 0x458 - 0x45c */ 2759250003Sadrian volatile u_int32_t MCI_SCHD_TABLE_1; /* 0x45c - 0x460 */ 2760250003Sadrian volatile u_int32_t MCI_GPM_0; /* 0x460 - 0x464 */ 2761250003Sadrian volatile u_int32_t MCI_GPM_1; /* 0x464 - 0x468 */ 2762250003Sadrian volatile u_int32_t MCI_INTERRUPT_RAW; /* 0x468 - 0x46c */ 2763250003Sadrian volatile u_int32_t MCI_INTERRUPT_EN; /* 0x46c - 0x470 */ 2764250003Sadrian volatile u_int32_t MCI_REMOTE_CPU_INT; /* 0x470 - 0x474 */ 2765250003Sadrian volatile u_int32_t MCI_REMOTE_CPU_INT_EN; /* 0x474 - 0x478 */ 2766250003Sadrian volatile u_int32_t MCI_INTERRUPT_RX_MSG_RAW; /* 0x478 - 0x47c */ 2767250003Sadrian volatile u_int32_t MCI_INTERRUPT_RX_MSG_EN; /* 0x47c - 0x480 */ 2768250003Sadrian volatile u_int32_t MCI_CPU_INT; /* 0x480 - 0x484 */ 2769250003Sadrian volatile u_int32_t MCI_RX_STATUS; /* 0x484 - 0x488 */ 2770250003Sadrian volatile u_int32_t WBTIMER; /* 0x488 - 0x48c */ 2771250003Sadrian volatile u_int32_t WB_BTCLK_SYNC_PN0; /* 0x48c - 0x490 */ 2772250003Sadrian volatile u_int32_t WB_BTCLK_SYNC_PN1; /* 0x490 - 0x494 */ 2773250003Sadrian volatile u_int32_t WB_BTCLK_SYNC_PN2; /* 0x494 - 0x498 */ 2774250003Sadrian volatile u_int32_t WB_BTCLK_SYNC_PN3; /* 0x498 - 0x49c */ 2775250003Sadrian volatile u_int32_t LC_SERIAL; /* 0x49c - 0x4a0 */ 2776250003Sadrian volatile u_int32_t LC_PHY_ERR; /* 0x4a0 - 0x4a4 */ 2777250003Sadrian volatile u_int32_t LC_PHY_ERR_0; /* 0x4a4 - 0x4a8 */ 2778250003Sadrian volatile u_int32_t LC_PHY_ERR_1; /* 0x4a8 - 0x4ac */ 2779250003Sadrian volatile u_int32_t LC_PHY_ERR_2; /* 0x4ac - 0x4b0 */ 2780250003Sadrian volatile u_int32_t LC_PHY_ERR_3; /* 0x4b0 - 0x4b4 */ 2781250003Sadrian volatile u_int32_t LC_PHY_ERR_4; /* 0x4b4 - 0x4b8 */ 2782250003Sadrian volatile u_int32_t LC_PHY_ERR_5; /* 0x4b8 - 0x4bc */ 2783250003Sadrian volatile u_int32_t LC_SF_CTRL; /* 0x4bc - 0x4c0 */ 2784250003Sadrian volatile u_int32_t LC_DUMMY; /* 0x4c0 - 0x4c4 */ 2785250003Sadrian volatile u_int32_t LC_FOR_BQB; /* 0x4c4 - 0x4c8 */ 2786250003Sadrian volatile u_int32_t SHARED_LNA_PARAM; /* 0x4c8 - 0x4cc */ 2787250003Sadrian volatile u_int32_t LC_CHNASS0_SUB1; /* 0x4cc - 0x4d0 */ 2788250003Sadrian volatile u_int32_t LC_CHNASS1_SUB1; /* 0x4d0 - 0x4d4 */ 2789250003Sadrian volatile u_int32_t LC_CHNASS0_SUB2; /* 0x4d4 - 0x4d8 */ 2790250003Sadrian volatile u_int32_t LC_CHNASS1_SUB2; /* 0x4d8 - 0x4dc */ 2791250003Sadrian volatile u_int32_t LC_CHNASS0_SUB3; /* 0x4dc - 0x4e0 */ 2792250003Sadrian volatile u_int32_t LC_CHNASS1_SUB3; /* 0x4e0 - 0x4e4 */ 2793250003Sadrian volatile u_int32_t LC_CHNASS0_SUB4; /* 0x4e4 - 0x4e8 */ 2794250003Sadrian volatile u_int32_t LC_CHNASS1_SUB4; /* 0x4e8 - 0x4ec */ 2795250003Sadrian volatile u_int32_t LC_CHNASS0_SUB5; /* 0x4ec - 0x4f0 */ 2796250003Sadrian volatile u_int32_t LC_CHNASS1_SUB5; /* 0x4f0 - 0x4f4 */ 2797250003Sadrian volatile u_int32_t LC_CHNASS0_SUB6; /* 0x4f4 - 0x4f8 */ 2798250003Sadrian volatile u_int32_t LC_CHNASS1_SUB6; /* 0x4f8 - 0x4fc */ 2799250003Sadrian volatile u_int32_t LC_CHNASS0_SUB7; /* 0x4fc - 0x500 */ 2800250003Sadrian volatile u_int32_t LC_CHNASS1_SUB7; /* 0x500 - 0x504 */ 2801250003Sadrian volatile u_int32_t LC_LE; /* 0x504 - 0x508 */ 2802250003Sadrian volatile u_int32_t MCI_SCHD_TABLE_2; /* 0x508 - 0x50c */ 2803250003Sadrian volatile u_int32_t WB_BTCLK_SYNC_LE_PN0; /* 0x50c - 0x510 */ 2804250003Sadrian volatile u_int32_t WB_BTCLK_SYNC_LE_PN1; /* 0x510 - 0x514 */ 2805250003Sadrian volatile u_int32_t LC_TB_LLR; /* 0x514 - 0x518 */ 2806250003Sadrian volatile u_int32_t LC_SYM_TIME0_FREE_RUN; /* 0x518 - 0x51c */ 2807250003Sadrian volatile u_int32_t LC_SYM_TIME1_FREE_RUN; /* 0x51c - 0x520 */ 2808250003Sadrian volatile u_int32_t LC_SYM_TIME2_FREE_RUN; /* 0x520 - 0x524 */ 2809250003Sadrian volatile u_int32_t LC_SYM_TIME3_FREE_RUN; /* 0x524 - 0x528 */ 2810250003Sadrian volatile u_int32_t WBTIMERCLK; /* 0x528 - 0x52c */ 2811250003Sadrian}; 2812250003Sadrian 2813250003Sadrianstruct jupiter_reg_map__synthBT_reg_csr { 2814250003Sadrian volatile u_int32_t SYNTHBT1; /* 0x0 - 0x4 */ 2815250003Sadrian volatile u_int32_t SYNTHBT2; /* 0x4 - 0x8 */ 2816250003Sadrian volatile u_int32_t SYNTHBT3; /* 0x8 - 0xc */ 2817250003Sadrian volatile u_int32_t SYNTHBT4; /* 0xc - 0x10 */ 2818250003Sadrian volatile u_int32_t SYNTHBT5; /* 0x10 - 0x14 */ 2819250003Sadrian volatile u_int32_t SYNTHBT6; /* 0x14 - 0x18 */ 2820250003Sadrian volatile u_int32_t SYNTHBT7; /* 0x18 - 0x1c */ 2821250003Sadrian volatile u_int32_t SYNTHBT8; /* 0x1c - 0x20 */ 2822250003Sadrian}; 2823250003Sadrian 2824250003Sadrianstruct jupiter_reg_map__BIASBT_reg_csr { 2825250003Sadrian volatile u_int32_t BIASBT1; /* 0x0 - 0x4 */ 2826250003Sadrian volatile u_int32_t BIASBT2; /* 0x4 - 0x8 */ 2827250003Sadrian volatile u_int32_t BIASBT3; /* 0x8 - 0xc */ 2828250003Sadrian volatile u_int32_t BIASBT4; /* 0xc - 0x10 */ 2829250003Sadrian volatile u_int32_t BIASBT5; /* 0x10 - 0x14 */ 2830250003Sadrian}; 2831250003Sadrian 2832250003Sadrianstruct jupiter_reg_map__TOPBT_reg_csr { 2833250003Sadrian volatile u_int32_t TOPBT1; /* 0x0 - 0x4 */ 2834250003Sadrian volatile u_int32_t TOPBT2; /* 0x4 - 0x8 */ 2835250003Sadrian volatile u_int32_t TOPBT3; /* 0x8 - 0xc */ 2836250003Sadrian volatile u_int32_t TOPBT4; /* 0xc - 0x10 */ 2837250003Sadrian volatile u_int32_t TOPBT5; /* 0x10 - 0x14 */ 2838250003Sadrian volatile u_int32_t TOPBT6; /* 0x14 - 0x18 */ 2839250003Sadrian volatile u_int32_t TOPBT7; /* 0x18 - 0x1c */ 2840250003Sadrian volatile u_int32_t TOPBT8; /* 0x1c - 0x20 */ 2841250003Sadrian volatile u_int32_t TOPBT9; /* 0x20 - 0x24 */ 2842250003Sadrian volatile u_int32_t TOPBT10; /* 0x24 - 0x28 */ 2843250003Sadrian}; 2844250003Sadrian 2845250003Sadrianstruct jupiter_reg_map__CLK_reg_csr { 2846250003Sadrian volatile u_int32_t CLK1; /* 0x0 - 0x4 */ 2847250003Sadrian volatile u_int32_t CLK2; /* 0x4 - 0x8 */ 2848250003Sadrian volatile u_int32_t CLK3; /* 0x8 - 0xc */ 2849250003Sadrian}; 2850250003Sadrian 2851250003Sadrianstruct jupiter_reg_map__analog_intf_athr_wlan_reg_csr { 2852250003Sadrian volatile char pad__0[0x880]; /* 0x0 - 0x880 */ 2853250003Sadrian struct jupiter_reg_map__synthBT_reg_csr synth_reg_map; 2854250003Sadrian /* 0x880 - 0x8a0 */ 2855250003Sadrian volatile char pad__1[0x20]; /* 0x8a0 - 0x8c0 */ 2856250003Sadrian struct jupiter_reg_map__BIASBT_reg_csr BIAS_reg_map; 2857250003Sadrian /* 0x8c0 - 0x8d4 */ 2858250003Sadrian volatile char pad__2[0x2c]; /* 0x8d4 - 0x900 */ 2859250003Sadrian struct jupiter_reg_map__TOPBT_reg_csr TOP_reg_map; 2860250003Sadrian /* 0x900 - 0x928 */ 2861250003Sadrian volatile char pad__3[0x158]; /* 0x928 - 0xa80 */ 2862250003Sadrian struct jupiter_reg_map__CLK_reg_csr CLK_reg_map; 2863250003Sadrian /* 0xa80 - 0xa8c */ 2864250003Sadrian}; 2865250003Sadrian 2866250003Sadrianstruct jupiter_reg_map__efuse_reg { 2867250003Sadrian volatile u_int32_t OTP_MEM[128]; /* 0x0 - 0x200 */ 2868250003Sadrian volatile char pad__0[0x1d00]; /* 0x200 - 0x1f00 */ 2869250003Sadrian volatile u_int32_t OTP_INTF0; /* 0x1f00 - 0x1f04 */ 2870250003Sadrian volatile u_int32_t OTP_INTF1; /* 0x1f04 - 0x1f08 */ 2871250003Sadrian volatile u_int32_t OTP_INTF2; /* 0x1f08 - 0x1f0c */ 2872250003Sadrian volatile u_int32_t OTP_INTF3; /* 0x1f0c - 0x1f10 */ 2873250003Sadrian volatile u_int32_t OTP_INTF4; /* 0x1f10 - 0x1f14 */ 2874250003Sadrian volatile u_int32_t OTP_INTF5; /* 0x1f14 - 0x1f18 */ 2875250003Sadrian volatile u_int32_t OTP_STATUS0; /* 0x1f18 - 0x1f1c */ 2876250003Sadrian volatile u_int32_t OTP_STATUS1; /* 0x1f1c - 0x1f20 */ 2877250003Sadrian volatile u_int32_t OTP_INTF6; /* 0x1f20 - 0x1f24 */ 2878250003Sadrian volatile u_int32_t OTP_LDO_CONTROL; /* 0x1f24 - 0x1f28 */ 2879250003Sadrian volatile u_int32_t OTP_LDO_POWER_GOOD; /* 0x1f28 - 0x1f2c */ 2880250003Sadrian volatile u_int32_t OTP_LDO_STATUS; /* 0x1f2c - 0x1f30 */ 2881250003Sadrian volatile u_int32_t OTP_VDDQ_HOLD_TIME; /* 0x1f30 - 0x1f34 */ 2882250003Sadrian volatile u_int32_t OTP_PGENB_SETUP_HOLD_TIME; /* 0x1f34 - 0x1f38 */ 2883250003Sadrian volatile u_int32_t OTP_STROBE_PULSE_INTERVAL; /* 0x1f38 - 0x1f3c */ 2884250003Sadrian volatile u_int32_t OTP_CSB_ADDR_LOAD_SETUP_HOLD; 2885250003Sadrian /* 0x1f3c - 0x1f40 */ 2886250003Sadrian}; 2887250003Sadrian 2888250003Sadrianstruct jupiter_reg_map__modem_reg_csr { 2889250003Sadrian volatile u_int32_t START_REG; /* 0x0 - 0x4 */ 2890250003Sadrian volatile u_int32_t RX_STATUS; /* 0x4 - 0x8 */ 2891250003Sadrian volatile u_int32_t AC1_L; /* 0x8 - 0xc */ 2892250003Sadrian volatile u_int32_t AC1_U; /* 0xc - 0x10 */ 2893250003Sadrian volatile u_int32_t AC2_L; /* 0x10 - 0x14 */ 2894250003Sadrian volatile u_int32_t AC2_U; /* 0x14 - 0x18 */ 2895250003Sadrian volatile u_int32_t TX_LATE; /* 0x18 - 0x1c */ 2896250003Sadrian volatile u_int32_t RF_SYNTH; /* 0x1c - 0x20 */ 2897250003Sadrian volatile u_int32_t RF_RX_CONTROL; /* 0x20 - 0x24 */ 2898250003Sadrian volatile u_int32_t RF_TX_CONTROL; /* 0x24 - 0x28 */ 2899250003Sadrian volatile u_int32_t RF_FORCE; /* 0x28 - 0x2c */ 2900250003Sadrian volatile u_int32_t MODEM_CONTROL; /* 0x2c - 0x30 */ 2901250003Sadrian volatile u_int32_t DC_FREQ_TRACK; /* 0x30 - 0x34 */ 2902250003Sadrian volatile u_int32_t PSK_TRACK; /* 0x34 - 0x38 */ 2903250003Sadrian volatile u_int32_t PSK_TRACK2; /* 0x38 - 0x3c */ 2904250003Sadrian volatile u_int32_t DEMOD_CTRL1; /* 0x3c - 0x40 */ 2905250003Sadrian volatile u_int32_t DEMOD_CTRL2; /* 0x40 - 0x44 */ 2906250003Sadrian volatile u_int32_t CORR_PARAM1; /* 0x44 - 0x48 */ 2907250003Sadrian volatile u_int32_t CORR_PARAM2; /* 0x48 - 0x4c */ 2908250003Sadrian volatile u_int32_t RX_LFDATA; /* 0x4c - 0x50 */ 2909250003Sadrian volatile u_int32_t ROT; /* 0x50 - 0x54 */ 2910250003Sadrian volatile u_int32_t TX; /* 0x54 - 0x58 */ 2911250003Sadrian volatile u_int32_t TX_GFSK1; /* 0x58 - 0x5c */ 2912250003Sadrian volatile u_int32_t TX_GFSK2; /* 0x5c - 0x60 */ 2913250003Sadrian volatile u_int32_t TX_POWER_CORR0; /* 0x60 - 0x64 */ 2914250003Sadrian volatile u_int32_t TX_POWER_CORR1; /* 0x64 - 0x68 */ 2915250003Sadrian volatile u_int32_t SYNTH_CHN0; /* 0x68 - 0x6c */ 2916250003Sadrian volatile u_int32_t SYNTH_OFFSET; /* 0x6c - 0x70 */ 2917250003Sadrian volatile u_int32_t MODEM_DEBUG; /* 0x70 - 0x74 */ 2918250003Sadrian volatile u_int32_t AGC_BYPASS; /* 0x74 - 0x78 */ 2919250003Sadrian volatile u_int32_t AGC_SAT; /* 0x78 - 0x7c */ 2920250003Sadrian volatile u_int32_t AGC_DET1; /* 0x7c - 0x80 */ 2921250003Sadrian volatile u_int32_t AGC_DET2; /* 0x80 - 0x84 */ 2922250003Sadrian volatile u_int32_t AGC_GAIN1; /* 0x84 - 0x88 */ 2923250003Sadrian volatile u_int32_t AGC_GAIN2; /* 0x88 - 0x8c */ 2924250003Sadrian volatile u_int32_t AGC_LINEAR_BLK; /* 0x8c - 0x90 */ 2925250003Sadrian volatile u_int32_t AGC_NONLIN_BLK; /* 0x90 - 0x94 */ 2926250003Sadrian volatile u_int32_t AGC_MIN_POWER; /* 0x94 - 0x98 */ 2927250003Sadrian volatile u_int32_t AGC_SLNA_SET0; /* 0x98 - 0x9c */ 2928250003Sadrian volatile u_int32_t AGC_SLNA_SET1; /* 0x9c - 0xa0 */ 2929250003Sadrian volatile u_int32_t AGC_SLNA_SET2; /* 0xa0 - 0xa4 */ 2930250003Sadrian volatile u_int32_t AGC_SLNA_SET3; /* 0xa4 - 0xa8 */ 2931250003Sadrian volatile u_int32_t AGC_GAIN1_LEAN; /* 0xa8 - 0xac */ 2932250003Sadrian volatile u_int32_t MODEM_CTRL; /* 0xac - 0xb0 */ 2933250003Sadrian volatile u_int32_t DEMOD_CTRL3; /* 0xb0 - 0xb4 */ 2934250003Sadrian volatile u_int32_t DEMOD_CTRL4; /* 0xb4 - 0xb8 */ 2935250003Sadrian volatile u_int32_t TX_GFSK3; /* 0xb8 - 0xbc */ 2936250003Sadrian volatile u_int32_t LE_DEMOD; /* 0xbc - 0xc0 */ 2937250003Sadrian volatile u_int32_t AGC_LE1; /* 0xc0 - 0xc4 */ 2938250003Sadrian volatile u_int32_t AGC_LE2; /* 0xc4 - 0xc8 */ 2939250003Sadrian volatile u_int32_t AGC_LE3; /* 0xc8 - 0xcc */ 2940250003Sadrian volatile u_int32_t AGC_LE4; /* 0xcc - 0xd0 */ 2941250003Sadrian volatile u_int32_t AGC_LE5; /* 0xd0 - 0xd4 */ 2942250003Sadrian volatile u_int32_t AGC_LE6; /* 0xd4 - 0xd8 */ 2943250003Sadrian volatile u_int32_t LE_FREQ; /* 0xd8 - 0xdc */ 2944250003Sadrian volatile u_int32_t LE_BLOCKER; /* 0xdc - 0xe0 */ 2945250003Sadrian volatile char pad__0[0x420]; /* 0xe0 - 0x500 */ 2946250003Sadrian volatile u_int32_t AGC_GAIN_TABLE[128]; /* 0x500 - 0x700 */ 2947250003Sadrian volatile u_int32_t TX_ULP_CNTRL; /* 0x700 - 0x704 */ 2948250003Sadrian volatile u_int32_t SS_MANUAL1; /* 0x704 - 0x708 */ 2949250003Sadrian volatile u_int32_t SS_MANUAL2; /* 0x708 - 0x70c */ 2950250003Sadrian volatile u_int32_t SS_RADIO_CTRL; /* 0x70c - 0x710 */ 2951250003Sadrian volatile u_int32_t PHY_ERR_CTRL1; /* 0x710 - 0x714 */ 2952250003Sadrian volatile u_int32_t PHY_ERR_CTRL2; /* 0x714 - 0x718 */ 2953250003Sadrian volatile u_int32_t PHY_ERR_CTRL3; /* 0x718 - 0x71c */ 2954250003Sadrian volatile u_int32_t PHY_ERR_CTRL4; /* 0x71c - 0x720 */ 2955250003Sadrian volatile u_int32_t PHY_ERR_STATUS; /* 0x720 - 0x724 */ 2956250003Sadrian volatile u_int32_t RBIST_ENABLE_CONTROL; /* 0x724 - 0x728 */ 2957250003Sadrian volatile u_int32_t RBIST_TX_DC; /* 0x728 - 0x72c */ 2958250003Sadrian volatile u_int32_t RBIST_TX_TONE0; /* 0x72c - 0x730 */ 2959250003Sadrian volatile u_int32_t RBIST_TX_TONE1; /* 0x730 - 0x734 */ 2960250003Sadrian volatile u_int32_t RBIST_TX_TONE2; /* 0x734 - 0x738 */ 2961250003Sadrian volatile u_int32_t RBIST_TX_RAMP_I; /* 0x738 - 0x73c */ 2962250003Sadrian volatile u_int32_t RBIST_TX_RAMP_Q; /* 0x73c - 0x740 */ 2963250003Sadrian volatile u_int32_t RBIST_TX_PRBS_MAG; /* 0x740 - 0x744 */ 2964250003Sadrian volatile u_int32_t RBIST_TX_PRBS_SEED_I; /* 0x744 - 0x748 */ 2965250003Sadrian volatile u_int32_t RBIST_TX_PRBS_SEED_Q; /* 0x748 - 0x74c */ 2966250003Sadrian volatile u_int32_t RBIST_RX_DC_OFFSET; /* 0x74c - 0x750 */ 2967250003Sadrian volatile u_int32_t RBIST_RX_DC_OFFSET_CANCEL; /* 0x750 - 0x754 */ 2968250003Sadrian volatile u_int32_t RBIST_RX_DFT; /* 0x754 - 0x758 */ 2969250003Sadrian volatile u_int32_t RBIST_RX_POWER; /* 0x758 - 0x75c */ 2970250003Sadrian volatile u_int32_t RBIST_RX_IQ; /* 0x75c - 0x760 */ 2971250003Sadrian volatile u_int32_t RBIST_RX_I2Q2; /* 0x760 - 0x764 */ 2972250003Sadrian volatile u_int32_t RBIST_RX_HPF; /* 0x764 - 0x768 */ 2973250003Sadrian volatile u_int32_t RBIST_RX_RESULT_Q; /* 0x768 - 0x76c */ 2974250003Sadrian volatile u_int32_t RBIST_RX_RESULT_I; /* 0x76c - 0x770 */ 2975250003Sadrian volatile u_int32_t CAL_EN; /* 0x770 - 0x774 */ 2976250003Sadrian volatile u_int32_t CAL_CONFIG; /* 0x774 - 0x778 */ 2977250003Sadrian volatile u_int32_t PASSIVE_RXIQ; /* 0x778 - 0x77c */ 2978250003Sadrian volatile u_int32_t TX_CORR1; /* 0x77c - 0x780 */ 2979250003Sadrian volatile u_int32_t TX_CORR2; /* 0x780 - 0x784 */ 2980250003Sadrian volatile u_int32_t TX_CORR3; /* 0x784 - 0x788 */ 2981250003Sadrian volatile u_int32_t TX_CORR4; /* 0x788 - 0x78c */ 2982250003Sadrian volatile u_int32_t RX_IQCORR_0; /* 0x78c - 0x790 */ 2983250003Sadrian volatile u_int32_t RX_IQCORR_1; /* 0x790 - 0x794 */ 2984250003Sadrian volatile u_int32_t RX_IQCORR_2; /* 0x794 - 0x798 */ 2985250003Sadrian volatile u_int32_t RX_IQCORR_3; /* 0x798 - 0x79c */ 2986250003Sadrian volatile u_int32_t CAL_MEAS_I2_L; /* 0x79c - 0x7a0 */ 2987250003Sadrian volatile u_int32_t CAL_MEAS_I2_U; /* 0x7a0 - 0x7a4 */ 2988250003Sadrian volatile u_int32_t CAL_MEAS_IQ_L; /* 0x7a4 - 0x7a8 */ 2989250003Sadrian volatile u_int32_t CAL_MEAS_IQ_U; /* 0x7a8 - 0x7ac */ 2990250003Sadrian volatile u_int32_t CAL_MEAS_Q2_L; /* 0x7ac - 0x7b0 */ 2991250003Sadrian volatile u_int32_t CAL_MEAS_Q2_U; /* 0x7b0 - 0x7b4 */ 2992250003Sadrian volatile u_int32_t CAP_SFT_DEBUG; /* 0x7b4 - 0x7b8 */ 2993250003Sadrian volatile u_int32_t RX_NOTCH_0; /* 0x7b8 - 0x7bc */ 2994250003Sadrian volatile u_int32_t RX_NOTCH_1; /* 0x7bc - 0x7c0 */ 2995250003Sadrian volatile u_int32_t RX_NOTCH_2; /* 0x7c0 - 0x7c4 */ 2996250003Sadrian volatile u_int32_t RX_NOTCH_INDEX_0; /* 0x7c4 - 0x7c8 */ 2997250003Sadrian volatile u_int32_t RX_NOTCH_INDEX_1; /* 0x7c8 - 0x7cc */ 2998250003Sadrian volatile u_int32_t RX_NOTCH_INDEX_2; /* 0x7cc - 0x7d0 */ 2999250003Sadrian volatile u_int32_t RX_NOTCH_INDEX_3; /* 0x7d0 - 0x7d4 */ 3000250003Sadrian volatile u_int32_t RX_NOTCH_INDEX_4; /* 0x7d4 - 0x7d8 */ 3001250003Sadrian volatile u_int32_t RX_NOTCH_INDEX_5; /* 0x7d8 - 0x7dc */ 3002250003Sadrian volatile u_int32_t RX_NOTCH_INDEX_6; /* 0x7dc - 0x7e0 */ 3003250003Sadrian volatile u_int32_t RX_NOTCH_INDEX_7; /* 0x7e0 - 0x7e4 */ 3004250003Sadrian volatile u_int32_t RX_NOTCH_PARAMS_0; /* 0x7e4 - 0x7e8 */ 3005250003Sadrian volatile u_int32_t RX_NOTCH_PARAMS_1; /* 0x7e8 - 0x7ec */ 3006250003Sadrian volatile u_int32_t RX_NOTCH_PARAMS_2; /* 0x7ec - 0x7f0 */ 3007250003Sadrian volatile u_int32_t RX_NOTCH_PARAMS_3; /* 0x7f0 - 0x7f4 */ 3008250003Sadrian volatile u_int32_t RX_NOTCH_PARAMS_4; /* 0x7f4 - 0x7f8 */ 3009250003Sadrian volatile u_int32_t RX_NOTCH_PARAMS_5; /* 0x7f8 - 0x7fc */ 3010250003Sadrian volatile u_int32_t RX_NOTCH_PARAMS_6; /* 0x7fc - 0x800 */ 3011250003Sadrian volatile u_int32_t CHNASS_CTRL; /* 0x800 - 0x804 */ 3012250003Sadrian volatile u_int32_t CHNASS_SETUP_0; /* 0x804 - 0x808 */ 3013250003Sadrian volatile u_int32_t CHNASS_SETUP_1; /* 0x808 - 0x80c */ 3014250003Sadrian volatile u_int32_t CHNASS_SETUP_2; /* 0x80c - 0x810 */ 3015250003Sadrian volatile u_int32_t CHNASS_SETUP_3; /* 0x810 - 0x814 */ 3016250003Sadrian volatile u_int32_t CHNASS_RSSI_0; /* 0x814 - 0x818 */ 3017250003Sadrian volatile u_int32_t CHNASS_RSSI_1; /* 0x818 - 0x81c */ 3018250003Sadrian volatile u_int32_t SW_CTRL; /* 0x81c - 0x820 */ 3019250003Sadrian volatile u_int32_t JUPITER_CTRL; /* 0x820 - 0x824 */ 3020250003Sadrian volatile u_int32_t JUPITER_GAIN; /* 0x824 - 0x828 */ 3021250003Sadrian volatile u_int32_t AGC_HIST_SETUP; /* 0x828 - 0x82c */ 3022250003Sadrian volatile u_int32_t AGC_HIST_BANK_0; /* 0x82c - 0x830 */ 3023250003Sadrian volatile u_int32_t AGC_HIST_BANK_1; /* 0x830 - 0x834 */ 3024250003Sadrian volatile u_int32_t AGC_HIST_BANK_2; /* 0x834 - 0x838 */ 3025250003Sadrian volatile u_int32_t AGC_HIST_BANK_3; /* 0x838 - 0x83c */ 3026250003Sadrian volatile u_int32_t AGC_HIST_BANK_4; /* 0x83c - 0x840 */ 3027250003Sadrian volatile u_int32_t SPARE; /* 0x840 - 0x844 */ 3028250003Sadrian}; 3029250003Sadrian 3030250003Sadrianstruct jupiter_reg_map__le_dma_reg_csr { 3031250003Sadrian volatile u_int32_t LE_DMA_MASTER; /* 0x0 - 0x4 */ 3032250003Sadrian volatile u_int32_t LE_DMA_TX_CONTROL; /* 0x4 - 0x8 */ 3033250003Sadrian volatile u_int32_t LE_DMA_RX_CONTROL; /* 0x8 - 0xc */ 3034250003Sadrian volatile u_int32_t LE_DMA_TX_HW; /* 0xc - 0x10 */ 3035250003Sadrian volatile u_int32_t LE_DMA_RX_HW; /* 0x10 - 0x14 */ 3036250003Sadrian volatile u_int32_t LE_DMA_INT_STATUS; /* 0x14 - 0x18 */ 3037250003Sadrian volatile u_int32_t LE_DMA_TX_STATUS; /* 0x18 - 0x1c */ 3038250003Sadrian volatile u_int32_t LE_DMA_TX_STATUS_W1TC; /* 0x1c - 0x20 */ 3039250003Sadrian volatile u_int32_t LE_DMA_TX_ENABLE; /* 0x20 - 0x24 */ 3040250003Sadrian volatile u_int32_t LE_DMA_RX_STATUS; /* 0x24 - 0x28 */ 3041250003Sadrian volatile u_int32_t LE_DMA_RX_STATUS_W1TC; /* 0x28 - 0x2c */ 3042250003Sadrian volatile u_int32_t LE_DMA_RX_ENABLE; /* 0x2c - 0x30 */ 3043250003Sadrian volatile u_int32_t LE_DMA_DEBUG; /* 0x30 - 0x34 */ 3044250003Sadrian volatile u_int32_t LE_DMA_DUMMY; /* 0x34 - 0x38 */ 3045250003Sadrian}; 3046250003Sadrian 3047250003Sadrianstruct jupiter_reg_map__le_reg_csr { 3048250003Sadrian volatile u_int32_t LE_PUBLIC_ADDRESS_L; /* 0x0 - 0x4 */ 3049250003Sadrian volatile u_int32_t LE_PUBLIC_ADDRESS_U; /* 0x4 - 0x8 */ 3050250003Sadrian volatile u_int32_t LE_RANDOM_ADDRESS_L; /* 0x8 - 0xc */ 3051250003Sadrian volatile u_int32_t LE_RANDOM_ADDRESS_U; /* 0xc - 0x10 */ 3052250003Sadrian volatile u_int32_t LE_DEV_PARAM; /* 0x10 - 0x14 */ 3053250003Sadrian volatile u_int32_t COMMAND1; /* 0x14 - 0x18 */ 3054250003Sadrian volatile u_int32_t COMMAND2; /* 0x18 - 0x1c */ 3055250003Sadrian volatile u_int32_t COMMAND3; /* 0x1c - 0x20 */ 3056250003Sadrian volatile u_int32_t COMMAND4; /* 0x20 - 0x24 */ 3057250003Sadrian volatile u_int32_t COMMAND5; /* 0x24 - 0x28 */ 3058250003Sadrian volatile u_int32_t COMMAND6; /* 0x28 - 0x2c */ 3059250003Sadrian volatile u_int32_t COMMAND7; /* 0x2c - 0x30 */ 3060250003Sadrian volatile u_int32_t COMMAND8; /* 0x30 - 0x34 */ 3061250003Sadrian volatile u_int32_t COMMAND9; /* 0x34 - 0x38 */ 3062250003Sadrian volatile u_int32_t COMMAND10; /* 0x38 - 0x3c */ 3063250003Sadrian volatile u_int32_t COMMAND11; /* 0x3c - 0x40 */ 3064250003Sadrian volatile u_int32_t COMMAND12; /* 0x40 - 0x44 */ 3065250003Sadrian volatile u_int32_t COMMAND13; /* 0x44 - 0x48 */ 3066250003Sadrian volatile u_int32_t LE_ABORT; /* 0x48 - 0x4c */ 3067250003Sadrian volatile u_int32_t LE_RX_STATUS1; /* 0x4c - 0x50 */ 3068250003Sadrian volatile u_int32_t LE_RX_STATUS2; /* 0x50 - 0x54 */ 3069250003Sadrian volatile u_int32_t LE_RX_STATUS3; /* 0x54 - 0x58 */ 3070250003Sadrian volatile u_int32_t LE_RX_STATUS4; /* 0x58 - 0x5c */ 3071250003Sadrian volatile u_int32_t LE_RX_STATUS5; /* 0x5c - 0x60 */ 3072250003Sadrian volatile u_int32_t LE_RX_STATUS6; /* 0x60 - 0x64 */ 3073250003Sadrian volatile u_int32_t LE_RX_STATUS7; /* 0x64 - 0x68 */ 3074250003Sadrian volatile u_int32_t LE_RX_STATUS8; /* 0x68 - 0x6c */ 3075250003Sadrian volatile u_int32_t LE_RX_STATUS9; /* 0x6c - 0x70 */ 3076250003Sadrian volatile u_int32_t LE_INTERRUPT_EN; /* 0x70 - 0x74 */ 3077250003Sadrian volatile u_int32_t LE_INTERRUPT; /* 0x74 - 0x78 */ 3078250003Sadrian volatile u_int32_t LE_DATAPATH_CNTL; /* 0x78 - 0x7c */ 3079250003Sadrian volatile u_int32_t LE_BT_CLOCK0; /* 0x7c - 0x80 */ 3080250003Sadrian volatile u_int32_t LE_BT_CLOCK1; /* 0x80 - 0x84 */ 3081250003Sadrian volatile u_int32_t LE_SYM_TIME0; /* 0x84 - 0x88 */ 3082250003Sadrian volatile u_int32_t LE_SYM_TIME1; /* 0x88 - 0x8c */ 3083250003Sadrian volatile u_int32_t LE_TIMER0; /* 0x8c - 0x90 */ 3084250003Sadrian volatile u_int32_t LE_TIMER0_FRAME; /* 0x90 - 0x94 */ 3085250003Sadrian volatile u_int32_t LE_TIMER1; /* 0x94 - 0x98 */ 3086250003Sadrian volatile u_int32_t LE_TIMER1_FRAME; /* 0x98 - 0x9c */ 3087250003Sadrian volatile u_int32_t LE_WL_TABLE[256]; /* 0x9c - 0x49c */ 3088250003Sadrian volatile u_int32_t LE_TIM; /* 0x49c - 0x4a0 */ 3089250003Sadrian volatile u_int32_t TX_ERROR_GENERATION; /* 0x4a0 - 0x4a4 */ 3090250003Sadrian volatile u_int32_t LE_FREQ_MAP0; /* 0x4a4 - 0x4a8 */ 3091250003Sadrian volatile u_int32_t LE_FREQ_MAP1; /* 0x4a8 - 0x4ac */ 3092250003Sadrian volatile u_int32_t LE_FREQ_MAP2; /* 0x4ac - 0x4b0 */ 3093250003Sadrian volatile u_int32_t LE_FREQ_MAP3; /* 0x4b0 - 0x4b4 */ 3094250003Sadrian volatile u_int32_t LE_FREQ_MAP4; /* 0x4b4 - 0x4b8 */ 3095250003Sadrian volatile u_int32_t LE_FREQ_MAP5; /* 0x4b8 - 0x4bc */ 3096250003Sadrian volatile u_int32_t LE_FREQ_MAP6; /* 0x4bc - 0x4c0 */ 3097250003Sadrian volatile u_int32_t LE_FREQ_MAP7; /* 0x4c0 - 0x4c4 */ 3098250003Sadrian volatile u_int32_t LE_FREQ_MAP8; /* 0x4c4 - 0x4c8 */ 3099250003Sadrian volatile u_int32_t LE_FREQ_MAP9; /* 0x4c8 - 0x4cc */ 3100250003Sadrian volatile u_int32_t LE_DEBUG_CTRL; /* 0x4cc - 0x4d0 */ 3101250003Sadrian volatile u_int32_t LE_DEBUG_OBS; /* 0x4d0 - 0x4d4 */ 3102250003Sadrian volatile u_int32_t LE_PHY_ERR; /* 0x4d4 - 0x4d8 */ 3103250003Sadrian volatile u_int32_t LE_PHY_ERR_0; /* 0x4d8 - 0x4dc */ 3104250003Sadrian volatile u_int32_t LE_PHY_ERR_1; /* 0x4dc - 0x4e0 */ 3105250003Sadrian volatile u_int32_t LE_PHY_ERR_2; /* 0x4e0 - 0x4e4 */ 3106250003Sadrian volatile u_int32_t LE_PHY_ERR_3; /* 0x4e4 - 0x4e8 */ 3107250003Sadrian volatile u_int32_t LE_PHY_ERR_4; /* 0x4e8 - 0x4ec */ 3108250003Sadrian volatile u_int32_t LE_DUMMY; /* 0x4ec - 0x4f0 */ 3109250003Sadrian}; 3110250003Sadrian 3111250003Sadrianstruct jupiter_reg_map__apb_map_csr { 3112250003Sadrian volatile char pad__0[0x4000]; /* 0x0 - 0x4000 */ 3113250003Sadrian struct jupiter_reg_map__rtc_reg_csr rtc; /* 0x4000 - 0x4134 */ 3114250003Sadrian volatile char pad__1[0x3ecc]; /* 0x4134 - 0x8000 */ 3115250003Sadrian struct jupiter_reg_map__vmc_reg_csr vmc; /* 0x8000 - 0x8620 */ 3116250003Sadrian volatile char pad__2[0x39e0]; /* 0x8620 - 0xc000 */ 3117250003Sadrian struct jupiter_reg_map__apb_map_csr__uart_reg_csr uart; 3118250003Sadrian /* 0xc000 - 0xc014 */ 3119250003Sadrian volatile char pad__3[0x3fec]; /* 0xc014 - 0x10000 */ 3120250003Sadrian struct jupiter_reg_map__si_reg_csr si; /* 0x10000 - 0x10018 */ 3121250003Sadrian volatile char pad__4[0x3fe8]; /* 0x10018 - 0x14000 */ 3122250003Sadrian struct jupiter_reg_map__gpio_reg_csr gpio; /* 0x14000 - 0x14098 */ 3123250003Sadrian volatile char pad__5[0x3f68]; /* 0x14098 - 0x18000 */ 3124250003Sadrian struct jupiter_reg_map__mbox_reg_csr mbox; /* 0x18000 - 0x1809c */ 3125250003Sadrian volatile char pad__6[0x3f64]; /* 0x1809c - 0x1c000 */ 3126250003Sadrian struct jupiter_reg_map__lc_dma_reg_csr lc_dma; /* 0x1c000 - 0x1c034 */ 3127250003Sadrian volatile char pad__7[0x3fcc]; /* 0x1c034 - 0x20000 */ 3128250003Sadrian struct jupiter_reg_map__lc_reg_csr lc; /* 0x20000 - 0x2052c */ 3129250003Sadrian volatile char pad__8[0x2ad4]; /* 0x2052c - 0x23000 */ 3130250003Sadrian struct jupiter_reg_map__analog_intf_athr_wlan_reg_csr analog; 3131250003Sadrian /* 0x23000 - 0x23a90 */ 3132250003Sadrian volatile char pad__9[0x570]; /* 0x23a90 - 0x24000 */ 3133250003Sadrian struct jupiter_reg_map__efuse_reg efuse; /* 0x24000 - 0x25f40 */ 3134250003Sadrian volatile char pad__10[0xc0]; /* 0x25f40 - 0x26000 */ 3135250003Sadrian struct jupiter_reg_map__modem_reg_csr modem; /* 0x26000 - 0x26844 */ 3136250003Sadrian volatile char pad__11[0x37bc]; /* 0x26844 - 0x2a000 */ 3137250003Sadrian struct jupiter_reg_map__le_dma_reg_csr le_dma; /* 0x2a000 - 0x2a038 */ 3138250003Sadrian volatile char pad__12[0x1fc8]; /* 0x2a038 - 0x2c000 */ 3139250003Sadrian struct jupiter_reg_map__le_reg_csr le; /* 0x2c000 - 0x2c4f0 */ 3140250003Sadrian}; 3141250003Sadrian 3142250003Sadrianstruct bt_apb_reg { 3143250003Sadrian volatile char pad__0[0x40000]; /* 0x0 - 0x40000 */ 3144250003Sadrian struct jupiter_reg_map__apb_map_csr bt_apb_map_block; 3145250003Sadrian /* 0x40000 - 0x6c800 */ 3146250003Sadrian}; 3147250003Sadrian 3148250003Sadrianstruct osprey_reg_map { 3149250003Sadrian struct mac_dma_reg mac_dma_reg_block; /* 0x0 - 0x108 */ 3150250003Sadrian volatile char pad__0; /* 0x108 - 0x0 */ 3151250003Sadrian struct mac_qcu_reg mac_qcu_reg_block; /* 0x0 - 0x24c */ 3152250003Sadrian volatile char pad__1; /* 0x24c - 0x0 */ 3153250003Sadrian struct mac_dcu_reg mac_dcu_reg_block; /* 0x0 - 0x7fc */ 3154250003Sadrian volatile char pad__2; /* 0x7fc - 0x0 */ 3155250003Sadrian struct host_intf_reg host_intf_reg_block; /* 0x0 - 0xf4 */ 3156250003Sadrian volatile char pad__3; /* 0xf4 - 0x0 */ 3157250003Sadrian struct emulation_misc_regs emulation_misc_reg_block; 3158250003Sadrian /* 0x0 - 0x30 */ 3159250003Sadrian volatile char pad__4; /* Osprey: 0x30 - 0x0 */ 3160250003Sadrian struct DWC_pcie_dbi_axi DWC_pcie_dbi_axi_block; /* Osprey: 0x0 - 0x818 */ 3161250003Sadrian volatile char pad__5; /* 0x818 - 0x0 */ 3162250003Sadrian struct rtc_reg rtc_reg_block; /* Osprey: 0x0 - 0x3c, Poseidon: 0x0 - 0x40 */ 3163250003Sadrian volatile char pad__6; /* Osprey: 0x3c - 0x0, Poseidon: 0x40 - 0x0 */ 3164250003Sadrian struct rtc_sync_reg rtc_sync_reg_block; /* 0x0 - 0x1c */ 3165250003Sadrian volatile char pad__7; /* 0x1c - 0x0 */ 3166250003Sadrian struct merlin2_0_radio_reg_map merlin2_0_radio_reg_map; 3167250003Sadrian /* 0x0 - 0x9c */ 3168250003Sadrian volatile char pad__8; /* 0x9c - 0x0 */ 3169250003Sadrian struct analog_intf_reg_csr analog_intf_reg_csr_block; 3170250003Sadrian /* 0x0 - 0x10 */ 3171250003Sadrian volatile char pad__9; /* 0x10 - 0x0 */ 3172250003Sadrian struct mac_pcu_reg mac_pcu_reg_block; /* 0x0 - 0x8000 */ 3173250003Sadrian volatile char pad__10; /* 0x8000 - 0x0 */ 3174250003Sadrian struct bb_reg_map bb_reg_block; /* 0x0 - 0x4000 */ 3175250003Sadrian volatile char pad__11; /* 0x4000 - 0x0 */ 3176250003Sadrian struct svd_reg svd_reg_block; /* 0x0 - 0x2c00 */ 3177250003Sadrian volatile char pad__12; /* 0x2c00 - 0x0 */ 3178250003Sadrian struct efuse_reg_WLAN efuse_reg_block; /* 0x0 - 0x1f40 */ 3179250003Sadrian volatile char pad__13; /* 0x1f40 - 0x0 */ 3180250003Sadrian struct radio65_reg radio65_reg_block; /* Osprey: 0x0 - 0xbd8, Poseidon: 0x0 - 0x3d8 */ 3181250003Sadrian volatile char pad__14; /* Osprey: 0xbd8 - 0x0, Poseidon: 0x3d8 - 0x0 */ 3182250003Sadrian struct pmu_reg pmu_reg_block; /* Osprey: 0x0 - 0x8 */ 3183250003Sadrian volatile char pad__15; /* Osprey: 0x8 - 0x0 */ 3184250003Sadrian struct pcie_phy_reg_csr pcie_phy_reg_block; /* 0x0 - 0xc */ 3185250003Sadrian volatile char pad__16; /* 0xc - 0x0 */ 3186250003Sadrian struct wlan_coex_reg wlan_coex_reg_block; /* 0x0 - 0x264 */ 3187250003Sadrian volatile char pad__17; /* 0x264 - 0x0 */ 3188250003Sadrian struct wlan_bt_glb_reg_pcie glb_reg_block; /* 0x0 - 0x400 */ 3189250003Sadrian volatile char pad__18; /* 0x400 - 0x0 */ 3190250003Sadrian struct bt_apb_reg bt_apb_reg_block; /* Jupiter: 0x0 - 0x2c800 */ 3191250003Sadrian}; 3192250003Sadrian 3193250003Sadrian#endif /* __REG_OSPREY_REG_MAP_H__ */ 3194