1250003Sadrian/* 2250003Sadrian * Copyright (c) 2013 Qualcomm Atheros, Inc. 3250003Sadrian * 4250003Sadrian * Permission to use, copy, modify, and/or distribute this software for any 5250003Sadrian * purpose with or without fee is hereby granted, provided that the above 6250003Sadrian * copyright notice and this permission notice appear in all copies. 7250003Sadrian * 8250003Sadrian * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH 9250003Sadrian * REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY 10250003Sadrian * AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, 11250003Sadrian * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM 12250003Sadrian * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR 13250003Sadrian * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 14250003Sadrian * PERFORMANCE OF THIS SOFTWARE. 15250003Sadrian */ 16250003Sadrian 17250003Sadrian/* 18250003Sadrian * READ THIS NOTICE! 19250003Sadrian * 20250003Sadrian * Values defined in this file may only be changed under exceptional circumstances. 21250003Sadrian * 22250003Sadrian * Please ask Fiona Cain before making any changes. 23250003Sadrian */ 24250003Sadrian 25250003Sadrian#ifndef __ar9300templateXB113_h__ 26250003Sadrian#define __ar9300templateXB113_h__ 27250003Sadrian 28250003Sadrianstatic ar9300_eeprom_t ar9300_template_xb113= 29250003Sadrian{ 30250003Sadrian 31250003Sadrian 2, // eeprom_version; 32250003Sadrian 33250003Sadrian ar9300_eeprom_template_xb113, // template_version; 34250003Sadrian 35250003Sadrian {0x00,0x03,0x7f,0x0,0x0,0x0}, //mac_addr[6]; 36250003Sadrian 37250003Sadrian //static A_UINT8 custData[OSPREY_CUSTOMER_DATA_SIZE]= 38250003Sadrian 39250003Sadrian {"xb113-023-f0000"}, 40250003Sadrian// {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, 41250003Sadrian 42250003Sadrian //static OSPREY_BASE_EEP_HEADER base_eep_header= 43250003Sadrian 44250003Sadrian { 45250003Sadrian {0,0x1f}, // reg_dmn[2]; //Does this need to be outside of this structure, if it gets written after calibration 46250003Sadrian 0x77, // txrx_mask; //4 bits tx and 4 bits rx 47250003Sadrian { AR9300_OPFLAGS_11A, 0}, // op_cap_flags; 48250003Sadrian 0, // rf_silent; 49250003Sadrian 0, // blue_tooth_options; 50250003Sadrian 0, // device_cap; 51250003Sadrian 5, // device_type; // takes lower byte in eeprom location 52250003Sadrian OSPREY_PWR_TABLE_OFFSET, // pwrTableOffset; // offset in dB to be added to beginning of pdadc table in calibration 53250003Sadrian {0,0}, // params_for_tuning_caps[2]; //placeholder, get more details from Don 54250003Sadrian 0x0d, //feature_enable; //bit0 - enable tx temp comp 55250003Sadrian //bit1 - enable tx volt comp 56250003Sadrian //bit2 - enable fastClock - default to 1 57250003Sadrian //bit3 - enable doubling - default to 1 58250003Sadrian //bit4 - enable internal regulator - default to 0 59250003Sadrian //bit5 - enable paprd -- default to 0 60250003Sadrian 0, //misc_configuration: bit0 - turn down drivestrength 61250003Sadrian 6, // eeprom_write_enable_gpio 62250003Sadrian 0, // wlan_disable_gpio 63250003Sadrian 8, // wlan_led_gpio 64250003Sadrian 0xff, // rx_band_select_gpio 65250003Sadrian 0x21, // txrxgain 66250003Sadrian 0, // swreg 67250003Sadrian }, 68250003Sadrian 69250003Sadrian 70250003Sadrian //static OSPREY_MODAL_EEP_HEADER modal_header_2g= 71250003Sadrian { 72250003Sadrian 73250003Sadrian 0x110, // ant_ctrl_common; // 4 idle, t1, t2, b (4 bits per setting) 74250003Sadrian 0x44444, // ant_ctrl_common2; // 4 ra1l1, ra2l1, ra1l2, ra2l2, ra12 75250003Sadrian {0x150,0x150,0x150}, // ant_ctrl_chain[OSPREY_MAX_CHAINS]; // 6 idle, t, r, rx1, rx12, b (2 bits each) 76250003Sadrian {0,0,0}, // xatten1_db[OSPREY_MAX_CHAINS]; // 3 //xatten1_db for merlin (0xa20c/b20c 5:0) 77250003Sadrian {0,0,0}, // xatten1_margin[OSPREY_MAX_CHAINS]; // 3 //xatten1_margin for merlin (0xa20c/b20c 16:12 78250003Sadrian 25, // temp_slope; 79250003Sadrian 0, // voltSlope; 80250003Sadrian {FREQ2FBIN(2464, 1),0,0,0,0}, // spur_chans[OSPREY_EEPROM_MODAL_SPURS]; // spur channels in usual fbin coding format 81250003Sadrian {-1,0,0}, // noise_floor_thresh_ch[OSPREY_MAX_CHAINS]; // 3 //Check if the register is per chain 82250003Sadrian {0, 0, 0, 0, 0, 0,0,0,0,0,0}, // reserved 83250003Sadrian 0, // quick drop 84250003Sadrian 0, // xpa_bias_lvl; // 1 85250003Sadrian 0x0e, // tx_frame_to_data_start; // 1 86250003Sadrian 0x0e, // tx_frame_to_pa_on; // 1 87250003Sadrian 3, // txClip; // 4 bits tx_clip, 4 bits dac_scale_cck 88250003Sadrian 0, // antenna_gain; // 1 89250003Sadrian 0x2c, // switchSettling; // 1 90250003Sadrian -30, // adcDesiredSize; // 1 91250003Sadrian 0, // txEndToXpaOff; // 1 92250003Sadrian 0x2, // txEndToRxOn; // 1 93250003Sadrian 0xe, // tx_frame_to_xpa_on; // 1 94250003Sadrian 28, // thresh62; // 1 95250003Sadrian 0x0c80C080, // paprd_rate_mask_ht20 // 4 96250003Sadrian 0x0080C080, // paprd_rate_mask_ht40 97250003Sadrian 0, // switchcomspdt; // 2 98250003Sadrian 0, // bit: 0,1:chain0, 2,3:chain1, 4,5:chain2 99250003Sadrian 0, // rf_gain_cap 100250003Sadrian 0, // tx_gain_cap 101250003Sadrian {0,0,0,0,0} //futureModal[5]; 102250003Sadrian }, 103250003Sadrian 104250003Sadrian { 105250003Sadrian 0, // ant_div_control 106250003Sadrian {0,0}, // base_ext1 107250003Sadrian 0, // misc_enable 108250003Sadrian {0,0,0,0,0,0,0,0}, // temp slop extension 109250003Sadrian 0, // quick drop low 110250003Sadrian 0, // quick drop high 111250003Sadrian }, 112250003Sadrian 113250003Sadrian //static A_UINT8 cal_freq_pier_2g[OSPREY_NUM_2G_CAL_PIERS]= 114250003Sadrian { 115250003Sadrian FREQ2FBIN(2412, 1), 116250003Sadrian FREQ2FBIN(2437, 1), 117250003Sadrian FREQ2FBIN(2462, 1) 118250003Sadrian }, 119250003Sadrian 120250003Sadrian //static OSP_CAL_DATA_PER_FREQ_OP_LOOP cal_pier_data_2g[OSPREY_MAX_CHAINS][OSPREY_NUM_2G_CAL_PIERS]= 121250003Sadrian 122250003Sadrian { {{0,0,0,0,0,0}, {0,0,0,0,0,0}, {0,0,0,0,0,0}}, 123250003Sadrian {{0,0,0,0,0,0}, {0,0,0,0,0,0}, {0,0,0,0,0,0}}, 124250003Sadrian {{0,0,0,0,0,0}, {0,0,0,0,0,0}, {0,0,0,0,0,0}}, 125250003Sadrian }, 126250003Sadrian 127250003Sadrian //A_UINT8 cal_target_freqbin_cck[OSPREY_NUM_2G_CCK_TARGET_POWERS]; 128250003Sadrian 129250003Sadrian { 130250003Sadrian FREQ2FBIN(2412, 1), 131250003Sadrian FREQ2FBIN(2472, 1) 132250003Sadrian }, 133250003Sadrian 134250003Sadrian //static CAL_TARGET_POWER_LEG cal_target_freqbin_2g[OSPREY_NUM_2G_20_TARGET_POWERS] 135250003Sadrian { 136250003Sadrian FREQ2FBIN(2412, 1), 137250003Sadrian FREQ2FBIN(2437, 1), 138250003Sadrian FREQ2FBIN(2472, 1) 139250003Sadrian }, 140250003Sadrian 141250003Sadrian //static OSP_CAL_TARGET_POWER_HT cal_target_freqbin_2g_ht20[OSPREY_NUM_2G_20_TARGET_POWERS] 142250003Sadrian { 143250003Sadrian FREQ2FBIN(2412, 1), 144250003Sadrian FREQ2FBIN(2437, 1), 145250003Sadrian FREQ2FBIN(2472, 1) 146250003Sadrian }, 147250003Sadrian 148250003Sadrian //static OSP_CAL_TARGET_POWER_HT cal_target_freqbin_2g_ht40[OSPREY_NUM_2G_40_TARGET_POWERS] 149250003Sadrian { 150250003Sadrian FREQ2FBIN(2412, 1), 151250003Sadrian FREQ2FBIN(2437, 1), 152250003Sadrian FREQ2FBIN(2472, 1) 153250003Sadrian }, 154250003Sadrian 155250003Sadrian //static CAL_TARGET_POWER_LEG cal_target_power_cck[OSPREY_NUM_2G_CCK_TARGET_POWERS]= 156250003Sadrian { 157250003Sadrian //1L-5L,5S,11L,11S 158250003Sadrian {{34,34,34,34}}, 159250003Sadrian {{34,34,34,34}} 160250003Sadrian }, 161250003Sadrian 162250003Sadrian //static CAL_TARGET_POWER_LEG cal_target_power_2g[OSPREY_NUM_2G_20_TARGET_POWERS]= 163250003Sadrian { 164250003Sadrian //6-24,36,48,54 165250003Sadrian {{34,34,32,32}}, 166250003Sadrian {{34,34,32,32}}, 167250003Sadrian {{34,34,32,32}}, 168250003Sadrian }, 169250003Sadrian 170250003Sadrian //static OSP_CAL_TARGET_POWER_HT cal_target_power_2g_ht20[OSPREY_NUM_2G_20_TARGET_POWERS]= 171250003Sadrian { 172250003Sadrian //0_8_16,1-3_9-11_17-19, 173250003Sadrian // 4,5,6,7,12,13,14,15,20,21,22,23 174250003Sadrian {{32,32,32,32,32,28,32,32,30,28,0,0,0,0}}, 175250003Sadrian {{32,32,32,32,32,28,32,32,30,28,0,0,0,0}}, 176250003Sadrian {{32,32,32,32,32,28,32,32,30,28,0,0,0,0}}, 177250003Sadrian }, 178250003Sadrian 179250003Sadrian //static OSP_CAL_TARGET_POWER_HT cal_target_power_2g_ht40[OSPREY_NUM_2G_40_TARGET_POWERS]= 180250003Sadrian { 181250003Sadrian //0_8_16,1-3_9-11_17-19, 182250003Sadrian // 4,5,6,7,12,13,14,15,20,21,22,23 183250003Sadrian {{30,30,30,30,30,28,30,30,28,26,0,0,0,0}}, 184250003Sadrian {{30,30,30,30,30,28,30,30,28,26,0,0,0,0}}, 185250003Sadrian {{30,30,30,30,30,28,30,30,28,26,0,0,0,0}}, 186250003Sadrian }, 187250003Sadrian 188250003Sadrian//static A_UINT8 ctl_index_2g[OSPREY_NUM_CTLS_2G]= 189250003Sadrian 190250003Sadrian { 191250003Sadrian 192250003Sadrian 0x11, 193250003Sadrian 0x12, 194250003Sadrian 0x15, 195250003Sadrian 0x17, 196250003Sadrian 0x41, 197250003Sadrian 0x42, 198250003Sadrian 0x45, 199250003Sadrian 0x47, 200250003Sadrian 0x31, 201250003Sadrian 0x32, 202250003Sadrian 0x35, 203250003Sadrian 0x37 204250003Sadrian 205250003Sadrian }, 206250003Sadrian 207250003Sadrian//A_UINT8 ctl_freqbin_2G[OSPREY_NUM_CTLS_2G][OSPREY_NUM_BAND_EDGES_2G]; 208250003Sadrian 209250003Sadrian { 210250003Sadrian {FREQ2FBIN(2412, 1), 211250003Sadrian FREQ2FBIN(2417, 1), 212250003Sadrian FREQ2FBIN(2457, 1), 213250003Sadrian FREQ2FBIN(2462, 1)}, 214250003Sadrian 215250003Sadrian {FREQ2FBIN(2412, 1), 216250003Sadrian FREQ2FBIN(2417, 1), 217250003Sadrian FREQ2FBIN(2462, 1), 218250003Sadrian 0xFF}, 219250003Sadrian 220250003Sadrian {FREQ2FBIN(2412, 1), 221250003Sadrian FREQ2FBIN(2417, 1), 222250003Sadrian FREQ2FBIN(2462, 1), 223250003Sadrian 0xFF}, 224250003Sadrian 225250003Sadrian {FREQ2FBIN(2422, 1), 226250003Sadrian FREQ2FBIN(2427, 1), 227250003Sadrian FREQ2FBIN(2447, 1), 228250003Sadrian FREQ2FBIN(2452, 1)}, 229250003Sadrian 230250003Sadrian {/*Data[4].ctl_edges[0].bChannel*/FREQ2FBIN(2412, 1), 231250003Sadrian /*Data[4].ctl_edges[1].bChannel*/FREQ2FBIN(2417, 1), 232250003Sadrian /*Data[4].ctl_edges[2].bChannel*/FREQ2FBIN(2472, 1), 233250003Sadrian /*Data[4].ctl_edges[3].bChannel*/FREQ2FBIN(2484, 1)}, 234250003Sadrian 235250003Sadrian {/*Data[5].ctl_edges[0].bChannel*/FREQ2FBIN(2412, 1), 236250003Sadrian /*Data[5].ctl_edges[1].bChannel*/FREQ2FBIN(2417, 1), 237250003Sadrian /*Data[5].ctl_edges[2].bChannel*/FREQ2FBIN(2472, 1), 238250003Sadrian 0}, 239250003Sadrian 240250003Sadrian {/*Data[6].ctl_edges[0].bChannel*/FREQ2FBIN(2412, 1), 241250003Sadrian /*Data[6].ctl_edges[1].bChannel*/FREQ2FBIN(2417, 1), 242250003Sadrian FREQ2FBIN(2472, 1), 243250003Sadrian 0}, 244250003Sadrian 245250003Sadrian {/*Data[7].ctl_edges[0].bChannel*/FREQ2FBIN(2422, 1), 246250003Sadrian /*Data[7].ctl_edges[1].bChannel*/FREQ2FBIN(2427, 1), 247250003Sadrian /*Data[7].ctl_edges[2].bChannel*/FREQ2FBIN(2447, 1), 248250003Sadrian /*Data[7].ctl_edges[3].bChannel*/FREQ2FBIN(2462, 1)}, 249250003Sadrian 250250003Sadrian {/*Data[8].ctl_edges[0].bChannel*/FREQ2FBIN(2412, 1), 251250003Sadrian /*Data[8].ctl_edges[1].bChannel*/FREQ2FBIN(2417, 1), 252250003Sadrian /*Data[8].ctl_edges[2].bChannel*/FREQ2FBIN(2472, 1), 253250003Sadrian 0}, 254250003Sadrian 255250003Sadrian {/*Data[9].ctl_edges[0].bChannel*/FREQ2FBIN(2412, 1), 256250003Sadrian /*Data[9].ctl_edges[1].bChannel*/FREQ2FBIN(2417, 1), 257250003Sadrian /*Data[9].ctl_edges[2].bChannel*/FREQ2FBIN(2472, 1), 258250003Sadrian 0}, 259250003Sadrian 260250003Sadrian {/*Data[10].ctl_edges[0].bChannel*/FREQ2FBIN(2412, 1), 261250003Sadrian /*Data[10].ctl_edges[1].bChannel*/FREQ2FBIN(2417, 1), 262250003Sadrian /*Data[10].ctl_edges[2].bChannel*/FREQ2FBIN(2472, 1), 263250003Sadrian 0}, 264250003Sadrian 265250003Sadrian {/*Data[11].ctl_edges[0].bChannel*/FREQ2FBIN(2422, 1), 266250003Sadrian /*Data[11].ctl_edges[1].bChannel*/FREQ2FBIN(2427, 1), 267250003Sadrian /*Data[11].ctl_edges[2].bChannel*/FREQ2FBIN(2447, 1), 268250003Sadrian /*Data[11].ctl_edges[3].bChannel*/FREQ2FBIN(2462, 1)} 269250003Sadrian }, 270250003Sadrian 271250003Sadrian 272250003Sadrian//OSP_CAL_CTL_DATA_2G ctl_power_data_2g[OSPREY_NUM_CTLS_2G]; 273250003Sadrian 274250003Sadrian#if AH_BYTE_ORDER == AH_BIG_ENDIAN 275250003Sadrian { 276250003Sadrian 277250003Sadrian {{{0, 60}, {1, 60}, {0, 60}, {0, 60}}}, 278250003Sadrian {{{0, 60}, {1, 60}, {0, 60}, {0, 60}}}, 279250003Sadrian {{{1, 60}, {0, 60}, {0, 60}, {1, 60}}}, 280250003Sadrian 281250003Sadrian {{{1, 60}, {0, 60}, {0, 60}, {0, 60}}}, 282250003Sadrian {{{0, 60}, {1, 60}, {0, 60}, {0, 60}}}, 283250003Sadrian {{{0, 60}, {1, 60}, {0, 60}, {0, 60}}}, 284250003Sadrian 285250003Sadrian {{{0, 60}, {1, 60}, {1, 60}, {0, 60}}}, 286250003Sadrian {{{0, 60}, {1, 60}, {0, 60}, {0, 60}}}, 287250003Sadrian {{{0, 60}, {1, 60}, {0, 60}, {0, 60}}}, 288250003Sadrian 289250003Sadrian {{{0, 60}, {1, 60}, {0, 60}, {0, 60}}}, 290250003Sadrian {{{0, 60}, {1, 60}, {1, 60}, {1, 60}}}, 291250003Sadrian {{{0, 60}, {1, 60}, {1, 60}, {1, 60}}}, 292250003Sadrian 293250003Sadrian }, 294250003Sadrian#else 295250003Sadrian { 296250003Sadrian {{{60, 0}, {60, 1}, {60, 0}, {60, 0}}}, 297250003Sadrian {{{60, 0}, {60, 1}, {60, 0}, {60, 0}}}, 298250003Sadrian {{{60, 1}, {60, 0}, {60, 0}, {60, 1}}}, 299250003Sadrian 300250003Sadrian {{{60, 1}, {60, 0}, {60, 0}, {60, 0}}}, 301250003Sadrian {{{60, 0}, {60, 1}, {60, 0}, {60, 0}}}, 302250003Sadrian {{{60, 0}, {60, 1}, {60, 0}, {60, 0}}}, 303250003Sadrian 304250003Sadrian {{{60, 0}, {60, 1}, {60, 1}, {60, 0}}}, 305250003Sadrian {{{60, 0}, {60, 1}, {60, 0}, {60, 0}}}, 306250003Sadrian {{{60, 0}, {60, 1}, {60, 0}, {60, 0}}}, 307250003Sadrian 308250003Sadrian {{{60, 0}, {60, 1}, {60, 0}, {60, 0}}}, 309250003Sadrian {{{60, 0}, {60, 1}, {60, 1}, {60, 1}}}, 310250003Sadrian {{{60, 0}, {60, 1}, {60, 1}, {60, 1}}}, 311250003Sadrian }, 312250003Sadrian#endif 313250003Sadrian 314250003Sadrian//static OSPREY_MODAL_EEP_HEADER modal_header_5g= 315250003Sadrian 316250003Sadrian { 317250003Sadrian 318250003Sadrian 0x220, // ant_ctrl_common; // 4 idle, t1, t2, b (4 bits per setting) 319250003Sadrian 0x11111, // ant_ctrl_common2; // 4 ra1l1, ra2l1, ra1l2, ra2l2, ra12 320250003Sadrian {0x150,0x150,0x150}, // ant_ctrl_chain[OSPREY_MAX_CHAINS]; // 6 idle, t, r, rx1, rx12, b (2 bits each) 321250003Sadrian {0,0,0}, // xatten1_db[OSPREY_MAX_CHAINS]; // 3 //xatten1_db for merlin (0xa20c/b20c 5:0) 322250003Sadrian {0,0,0}, // xatten1_margin[OSPREY_MAX_CHAINS]; // 3 //xatten1_margin for merlin (0xa20c/b20c 16:12 323250003Sadrian 68, // temp_slope; 324250003Sadrian 0, // voltSlope; 325250003Sadrian {FREQ2FBIN(5500, 0),0,0,0,0}, // spur_chans[OSPREY_EEPROM_MODAL_SPURS]; // spur channels in usual fbin coding format 326250003Sadrian {-1,0,0}, // noise_floor_thresh_ch[OSPREY_MAX_CHAINS]; // 3 //Check if the register is per chain 327250003Sadrian {0, 0, 0, 0, 0, 0,0,0,0,0,0}, // reserved 328250003Sadrian 0, // quick drop 329250003Sadrian 0xf, // xpa_bias_lvl; // 1 330250003Sadrian 0x0e, // tx_frame_to_data_start; // 1 331250003Sadrian 0x0e, // tx_frame_to_pa_on; // 1 332250003Sadrian 3, // txClip; // 4 bits tx_clip, 4 bits dac_scale_cck 333250003Sadrian 0, // antenna_gain; // 1 334250003Sadrian 0x2d, // switchSettling; // 1 335250003Sadrian -30, // adcDesiredSize; // 1 336250003Sadrian 0, // txEndToXpaOff; // 1 337250003Sadrian 0x2, // txEndToRxOn; // 1 338250003Sadrian 0xe, // tx_frame_to_xpa_on; // 1 339250003Sadrian 28, // thresh62; // 1 340250003Sadrian 0x0cf0e0e0, // paprd_rate_mask_ht20 // 4 341250003Sadrian 0x6cf0e0e0, // paprd_rate_mask_ht40 // 4 342250003Sadrian 0, // switchcomspdt; // 2 343250003Sadrian 0, // bit: 0,1:chain0, 2,3:chain1, 4,5:chain2 344250003Sadrian 0, // rf_gain_cap 345250003Sadrian 0, // tx_gain_cap 346250003Sadrian {0,0,0,0,0} //futureModal[5]; 347250003Sadrian }, 348250003Sadrian 349250003Sadrian { // base_ext2 350250003Sadrian 72, // tempSlopeL; 351250003Sadrian 105, // tempSlopeH; 352250003Sadrian {0,0,0}, 353250003Sadrian {0,0,0}, 354250003Sadrian {0,0,0}, 355250003Sadrian {0,0,0} 356250003Sadrian }, 357250003Sadrian 358250003Sadrian//static A_UINT8 cal_freq_pier_5g[OSPREY_NUM_5G_CAL_PIERS]= 359250003Sadrian { 360250003Sadrian //pPiers[0] = 361250003Sadrian FREQ2FBIN(5180, 0), 362250003Sadrian //pPiers[1] = 363250003Sadrian FREQ2FBIN(5240, 0), 364250003Sadrian //pPiers[2] = 365250003Sadrian FREQ2FBIN(5320, 0), 366250003Sadrian //pPiers[3] = 367250003Sadrian FREQ2FBIN(5400, 0), 368250003Sadrian //pPiers[4] = 369250003Sadrian FREQ2FBIN(5500, 0), 370250003Sadrian //pPiers[5] = 371250003Sadrian FREQ2FBIN(5700, 0), 372250003Sadrian //pPiers[6] = 373250003Sadrian FREQ2FBIN(5745, 0), 374250003Sadrian //pPiers[7] = 375250003Sadrian FREQ2FBIN(5785, 0), 376250003Sadrian }, 377250003Sadrian 378250003Sadrian//static OSP_CAL_DATA_PER_FREQ_OP_LOOP cal_pier_data_5g[OSPREY_MAX_CHAINS][OSPREY_NUM_5G_CAL_PIERS]= 379250003Sadrian 380250003Sadrian { 381250003Sadrian {{0,0,0,0,0,0}, {0,0,0,0,0,0}, {0,0,0,0,0,0}, {0,0,0,0,0,0}, {0,0,0,0,0,0}, {0,0,0,0,0,0}, {0,0,0,0,0,0}, {0,0,0,0,0,0}}, 382250003Sadrian {{0,0,0,0,0,0}, {0,0,0,0,0,0}, {0,0,0,0,0,0}, {0,0,0,0,0,0}, {0,0,0,0,0,0}, {0,0,0,0,0,0}, {0,0,0,0,0,0}, {0,0,0,0,0,0}}, 383250003Sadrian {{0,0,0,0,0,0}, {0,0,0,0,0,0}, {0,0,0,0,0,0}, {0,0,0,0,0,0}, {0,0,0,0,0,0}, {0,0,0,0,0,0}, {0,0,0,0,0,0}, {0,0,0,0,0,0}}, 384250003Sadrian 385250003Sadrian }, 386250003Sadrian 387250003Sadrian//static CAL_TARGET_POWER_LEG cal_target_freqbin_5g[OSPREY_NUM_5G_20_TARGET_POWERS]= 388250003Sadrian 389250003Sadrian { 390250003Sadrian FREQ2FBIN(5180, 0), 391250003Sadrian FREQ2FBIN(5240, 0), 392250003Sadrian FREQ2FBIN(5320, 0), 393250003Sadrian FREQ2FBIN(5400, 0), 394250003Sadrian FREQ2FBIN(5500, 0), 395250003Sadrian FREQ2FBIN(5700, 0), 396250003Sadrian FREQ2FBIN(5745, 0), 397250003Sadrian FREQ2FBIN(5785, 0) 398250003Sadrian }, 399250003Sadrian 400250003Sadrian//static OSP_CAL_TARGET_POWER_HT cal_target_power_5g_ht20[OSPREY_NUM_5G_20_TARGET_POWERS]= 401250003Sadrian 402250003Sadrian { 403250003Sadrian FREQ2FBIN(5180, 0), 404250003Sadrian FREQ2FBIN(5240, 0), 405250003Sadrian FREQ2FBIN(5320, 0), 406250003Sadrian FREQ2FBIN(5400, 0), 407250003Sadrian FREQ2FBIN(5500, 0), 408250003Sadrian FREQ2FBIN(5700, 0), 409250003Sadrian FREQ2FBIN(5745, 0), 410250003Sadrian FREQ2FBIN(5825, 0) 411250003Sadrian }, 412250003Sadrian 413250003Sadrian//static OSP_CAL_TARGET_POWER_HT cal_target_power_5g_ht40[OSPREY_NUM_5G_40_TARGET_POWERS]= 414250003Sadrian 415250003Sadrian { 416250003Sadrian FREQ2FBIN(5190, 0), 417250003Sadrian FREQ2FBIN(5230, 0), 418250003Sadrian FREQ2FBIN(5320, 0), 419250003Sadrian FREQ2FBIN(5410, 0), 420250003Sadrian FREQ2FBIN(5510, 0), 421250003Sadrian FREQ2FBIN(5670, 0), 422250003Sadrian FREQ2FBIN(5755, 0), 423250003Sadrian FREQ2FBIN(5785, 0) 424250003Sadrian }, 425250003Sadrian 426250003Sadrian 427250003Sadrian//static CAL_TARGET_POWER_LEG cal_target_power_5g[OSPREY_NUM_5G_20_TARGET_POWERS]= 428250003Sadrian 429250003Sadrian 430250003Sadrian { 431250003Sadrian //6-24,36,48,54 432250003Sadrian {{42,40,40,34}}, 433250003Sadrian {{42,40,40,34}}, 434250003Sadrian {{42,40,40,34}}, 435250003Sadrian {{42,40,40,34}}, 436250003Sadrian {{42,40,40,34}}, 437250003Sadrian {{42,40,40,34}}, 438250003Sadrian {{42,40,40,34}}, 439250003Sadrian {{42,40,40,34}}, 440250003Sadrian }, 441250003Sadrian 442250003Sadrian//static OSP_CAL_TARGET_POWER_HT cal_target_power_5g_ht20[OSPREY_NUM_5G_20_TARGET_POWERS]= 443250003Sadrian 444250003Sadrian { 445250003Sadrian //0_8_16,1-3_9-11_17-19, 446250003Sadrian // 4,5,6,7,12,13,14,15,20,21,22,23 447250003Sadrian {{40,40,40,40,32,28,40,40,32,28,40,40,32,20}}, 448250003Sadrian {{40,40,40,40,32,28,40,40,32,28,40,40,32,20}}, 449250003Sadrian {{40,40,40,40,32,28,40,40,32,28,40,40,32,20}}, 450250003Sadrian {{40,40,40,40,32,28,40,40,32,28,40,40,32,20}}, 451250003Sadrian {{40,40,40,40,32,28,40,40,32,28,40,40,32,20}}, 452250003Sadrian {{40,40,40,40,32,28,40,40,32,28,40,40,32,20}}, 453250003Sadrian {{38,38,38,38,32,28,38,38,32,28,38,38,32,26}}, 454250003Sadrian {{36,36,36,36,32,28,36,36,32,28,36,36,32,26}}, 455250003Sadrian }, 456250003Sadrian 457250003Sadrian//static OSP_CAL_TARGET_POWER_HT cal_target_power_5g_ht40[OSPREY_NUM_5G_40_TARGET_POWERS]= 458250003Sadrian { 459250003Sadrian //0_8_16,1-3_9-11_17-19, 460250003Sadrian // 4,5,6,7,12,13,14,15,20,21,22,23 461250003Sadrian {{40,40,40,38,30,26,40,40,30,26,40,40,30,24}}, 462250003Sadrian {{40,40,40,38,30,26,40,40,30,26,40,40,30,24}}, 463250003Sadrian {{40,40,40,38,30,26,40,40,30,26,40,40,30,24}}, 464250003Sadrian {{40,40,40,38,30,26,40,40,30,26,40,40,30,24}}, 465250003Sadrian {{40,40,40,38,30,26,40,40,30,26,40,40,30,24}}, 466250003Sadrian {{40,40,40,38,30,26,40,40,30,26,40,40,30,24}}, 467250003Sadrian {{36,36,36,36,30,26,36,36,30,26,36,36,30,24}}, 468250003Sadrian {{34,34,34,34,30,26,34,34,30,26,34,34,30,24}}, 469250003Sadrian }, 470250003Sadrian 471250003Sadrian//static A_UINT8 ctl_index_5g[OSPREY_NUM_CTLS_5G]= 472250003Sadrian 473250003Sadrian { 474250003Sadrian //pCtlIndex[0] = 475250003Sadrian 0x10, 476250003Sadrian //pCtlIndex[1] = 477250003Sadrian 0x16, 478250003Sadrian //pCtlIndex[2] = 479250003Sadrian 0x18, 480250003Sadrian //pCtlIndex[3] = 481250003Sadrian 0x40, 482250003Sadrian //pCtlIndex[4] = 483250003Sadrian 0x46, 484250003Sadrian //pCtlIndex[5] = 485250003Sadrian 0x48, 486250003Sadrian //pCtlIndex[6] = 487250003Sadrian 0x30, 488250003Sadrian //pCtlIndex[7] = 489250003Sadrian 0x36, 490250003Sadrian //pCtlIndex[8] = 491250003Sadrian 0x38 492250003Sadrian }, 493250003Sadrian 494250003Sadrian// A_UINT8 ctl_freqbin_5G[OSPREY_NUM_CTLS_5G][OSPREY_NUM_BAND_EDGES_5G]; 495250003Sadrian 496250003Sadrian { 497250003Sadrian {/* Data[0].ctl_edges[0].bChannel*/FREQ2FBIN(5180, 0), 498250003Sadrian /* Data[0].ctl_edges[1].bChannel*/FREQ2FBIN(5260, 0), 499250003Sadrian /* Data[0].ctl_edges[2].bChannel*/FREQ2FBIN(5280, 0), 500250003Sadrian /* Data[0].ctl_edges[3].bChannel*/FREQ2FBIN(5500, 0), 501250003Sadrian /* Data[0].ctl_edges[4].bChannel*/FREQ2FBIN(5600, 0), 502250003Sadrian /* Data[0].ctl_edges[5].bChannel*/FREQ2FBIN(5700, 0), 503250003Sadrian /* Data[0].ctl_edges[6].bChannel*/FREQ2FBIN(5745, 0), 504250003Sadrian /* Data[0].ctl_edges[7].bChannel*/FREQ2FBIN(5825, 0)}, 505250003Sadrian 506250003Sadrian {/* Data[1].ctl_edges[0].bChannel*/FREQ2FBIN(5180, 0), 507250003Sadrian /* Data[1].ctl_edges[1].bChannel*/FREQ2FBIN(5260, 0), 508250003Sadrian /* Data[1].ctl_edges[2].bChannel*/FREQ2FBIN(5280, 0), 509250003Sadrian /* Data[1].ctl_edges[3].bChannel*/FREQ2FBIN(5500, 0), 510250003Sadrian /* Data[1].ctl_edges[4].bChannel*/FREQ2FBIN(5520, 0), 511250003Sadrian /* Data[1].ctl_edges[5].bChannel*/FREQ2FBIN(5700, 0), 512250003Sadrian /* Data[1].ctl_edges[6].bChannel*/FREQ2FBIN(5745, 0), 513250003Sadrian /* Data[1].ctl_edges[7].bChannel*/FREQ2FBIN(5825, 0)}, 514250003Sadrian 515250003Sadrian {/* Data[2].ctl_edges[0].bChannel*/FREQ2FBIN(5190, 0), 516250003Sadrian /* Data[2].ctl_edges[1].bChannel*/FREQ2FBIN(5230, 0), 517250003Sadrian /* Data[2].ctl_edges[2].bChannel*/FREQ2FBIN(5270, 0), 518250003Sadrian /* Data[2].ctl_edges[3].bChannel*/FREQ2FBIN(5310, 0), 519250003Sadrian /* Data[2].ctl_edges[4].bChannel*/FREQ2FBIN(5510, 0), 520250003Sadrian /* Data[2].ctl_edges[5].bChannel*/FREQ2FBIN(5550, 0), 521250003Sadrian /* Data[2].ctl_edges[6].bChannel*/FREQ2FBIN(5670, 0), 522250003Sadrian /* Data[2].ctl_edges[7].bChannel*/FREQ2FBIN(5755, 0)}, 523250003Sadrian 524250003Sadrian {/* Data[3].ctl_edges[0].bChannel*/FREQ2FBIN(5180, 0), 525250003Sadrian /* Data[3].ctl_edges[1].bChannel*/FREQ2FBIN(5200, 0), 526250003Sadrian /* Data[3].ctl_edges[2].bChannel*/FREQ2FBIN(5260, 0), 527250003Sadrian /* Data[3].ctl_edges[3].bChannel*/FREQ2FBIN(5320, 0), 528250003Sadrian /* Data[3].ctl_edges[4].bChannel*/FREQ2FBIN(5500, 0), 529250003Sadrian /* Data[3].ctl_edges[5].bChannel*/FREQ2FBIN(5700, 0), 530250003Sadrian /* Data[3].ctl_edges[6].bChannel*/0xFF, 531250003Sadrian /* Data[3].ctl_edges[7].bChannel*/0xFF}, 532250003Sadrian 533250003Sadrian {/* Data[4].ctl_edges[0].bChannel*/FREQ2FBIN(5180, 0), 534250003Sadrian /* Data[4].ctl_edges[1].bChannel*/FREQ2FBIN(5260, 0), 535250003Sadrian /* Data[4].ctl_edges[2].bChannel*/FREQ2FBIN(5500, 0), 536250003Sadrian /* Data[4].ctl_edges[3].bChannel*/FREQ2FBIN(5700, 0), 537250003Sadrian /* Data[4].ctl_edges[4].bChannel*/0xFF, 538250003Sadrian /* Data[4].ctl_edges[5].bChannel*/0xFF, 539250003Sadrian /* Data[4].ctl_edges[6].bChannel*/0xFF, 540250003Sadrian /* Data[4].ctl_edges[7].bChannel*/0xFF}, 541250003Sadrian 542250003Sadrian {/* Data[5].ctl_edges[0].bChannel*/FREQ2FBIN(5190, 0), 543250003Sadrian /* Data[5].ctl_edges[1].bChannel*/FREQ2FBIN(5270, 0), 544250003Sadrian /* Data[5].ctl_edges[2].bChannel*/FREQ2FBIN(5310, 0), 545250003Sadrian /* Data[5].ctl_edges[3].bChannel*/FREQ2FBIN(5510, 0), 546250003Sadrian /* Data[5].ctl_edges[4].bChannel*/FREQ2FBIN(5590, 0), 547250003Sadrian /* Data[5].ctl_edges[5].bChannel*/FREQ2FBIN(5670, 0), 548250003Sadrian /* Data[5].ctl_edges[6].bChannel*/0xFF, 549250003Sadrian /* Data[5].ctl_edges[7].bChannel*/0xFF}, 550250003Sadrian 551250003Sadrian {/* Data[6].ctl_edges[0].bChannel*/FREQ2FBIN(5180, 0), 552250003Sadrian /* Data[6].ctl_edges[1].bChannel*/FREQ2FBIN(5200, 0), 553250003Sadrian /* Data[6].ctl_edges[2].bChannel*/FREQ2FBIN(5220, 0), 554250003Sadrian /* Data[6].ctl_edges[3].bChannel*/FREQ2FBIN(5260, 0), 555250003Sadrian /* Data[6].ctl_edges[4].bChannel*/FREQ2FBIN(5500, 0), 556250003Sadrian /* Data[6].ctl_edges[5].bChannel*/FREQ2FBIN(5600, 0), 557250003Sadrian /* Data[6].ctl_edges[6].bChannel*/FREQ2FBIN(5700, 0), 558250003Sadrian /* Data[6].ctl_edges[7].bChannel*/FREQ2FBIN(5745, 0)}, 559250003Sadrian 560250003Sadrian {/* Data[7].ctl_edges[0].bChannel*/FREQ2FBIN(5180, 0), 561250003Sadrian /* Data[7].ctl_edges[1].bChannel*/FREQ2FBIN(5260, 0), 562250003Sadrian /* Data[7].ctl_edges[2].bChannel*/FREQ2FBIN(5320, 0), 563250003Sadrian /* Data[7].ctl_edges[3].bChannel*/FREQ2FBIN(5500, 0), 564250003Sadrian /* Data[7].ctl_edges[4].bChannel*/FREQ2FBIN(5560, 0), 565250003Sadrian /* Data[7].ctl_edges[5].bChannel*/FREQ2FBIN(5700, 0), 566250003Sadrian /* Data[7].ctl_edges[6].bChannel*/FREQ2FBIN(5745, 0), 567250003Sadrian /* Data[7].ctl_edges[7].bChannel*/FREQ2FBIN(5825, 0)}, 568250003Sadrian 569250003Sadrian {/* Data[8].ctl_edges[0].bChannel*/FREQ2FBIN(5190, 0), 570250003Sadrian /* Data[8].ctl_edges[1].bChannel*/FREQ2FBIN(5230, 0), 571250003Sadrian /* Data[8].ctl_edges[2].bChannel*/FREQ2FBIN(5270, 0), 572250003Sadrian /* Data[8].ctl_edges[3].bChannel*/FREQ2FBIN(5510, 0), 573250003Sadrian /* Data[8].ctl_edges[4].bChannel*/FREQ2FBIN(5550, 0), 574250003Sadrian /* Data[8].ctl_edges[5].bChannel*/FREQ2FBIN(5670, 0), 575250003Sadrian /* Data[8].ctl_edges[6].bChannel*/FREQ2FBIN(5755, 0), 576250003Sadrian /* Data[8].ctl_edges[7].bChannel*/FREQ2FBIN(5795, 0)} 577250003Sadrian }, 578250003Sadrian 579250003Sadrian//static OSP_CAL_CTL_DATA_5G ctlData_5G[OSPREY_NUM_CTLS_5G]= 580250003Sadrian 581250003Sadrian#if AH_BYTE_ORDER == AH_BIG_ENDIAN 582250003Sadrian { 583250003Sadrian {{{1, 60}, 584250003Sadrian {1, 60}, 585250003Sadrian {1, 60}, 586250003Sadrian {1, 60}, 587250003Sadrian {1, 60}, 588250003Sadrian {1, 60}, 589250003Sadrian {1, 60}, 590250003Sadrian {0, 60}}}, 591250003Sadrian 592250003Sadrian {{{1, 60}, 593250003Sadrian {1, 60}, 594250003Sadrian {1, 60}, 595250003Sadrian {1, 60}, 596250003Sadrian {1, 60}, 597250003Sadrian {1, 60}, 598250003Sadrian {1, 60}, 599250003Sadrian {0, 60}}}, 600250003Sadrian 601250003Sadrian {{{0, 60}, 602250003Sadrian {1, 60}, 603250003Sadrian {0, 60}, 604250003Sadrian {1, 60}, 605250003Sadrian {1, 60}, 606250003Sadrian {1, 60}, 607250003Sadrian {1, 60}, 608250003Sadrian {1, 60}}}, 609250003Sadrian 610250003Sadrian {{{0, 60}, 611250003Sadrian {1, 60}, 612250003Sadrian {1, 60}, 613250003Sadrian {0, 60}, 614250003Sadrian {1, 60}, 615250003Sadrian {0, 60}, 616250003Sadrian {0, 60}, 617250003Sadrian {0, 60}}}, 618250003Sadrian 619250003Sadrian {{{1, 60}, 620250003Sadrian {1, 60}, 621250003Sadrian {1, 60}, 622250003Sadrian {0, 60}, 623250003Sadrian {0, 60}, 624250003Sadrian {0, 60}, 625250003Sadrian {0, 60}, 626250003Sadrian {0, 60}}}, 627250003Sadrian 628250003Sadrian {{{1, 60}, 629250003Sadrian {1, 60}, 630250003Sadrian {1, 60}, 631250003Sadrian {1, 60}, 632250003Sadrian {1, 60}, 633250003Sadrian {0, 60}, 634250003Sadrian {0, 60}, 635250003Sadrian {0, 60}}}, 636250003Sadrian 637250003Sadrian {{{1, 60}, 638250003Sadrian {1, 60}, 639250003Sadrian {1, 60}, 640250003Sadrian {1, 60}, 641250003Sadrian {1, 60}, 642250003Sadrian {1, 60}, 643250003Sadrian {1, 60}, 644250003Sadrian {1, 60}}}, 645250003Sadrian 646250003Sadrian {{{1, 60}, 647250003Sadrian {1, 60}, 648250003Sadrian {0, 60}, 649250003Sadrian {1, 60}, 650250003Sadrian {1, 60}, 651250003Sadrian {1, 60}, 652250003Sadrian {1, 60}, 653250003Sadrian {0, 60}}}, 654250003Sadrian 655250003Sadrian {{{1, 60}, 656250003Sadrian {0, 60}, 657250003Sadrian {1, 60}, 658250003Sadrian {1, 60}, 659250003Sadrian {1, 60}, 660250003Sadrian {1, 60}, 661250003Sadrian {0, 60}, 662250003Sadrian {1, 60}}}, 663250003Sadrian } 664250003Sadrian#else 665250003Sadrian { 666250003Sadrian {{{60, 1}, 667250003Sadrian {60, 1}, 668250003Sadrian {60, 1}, 669250003Sadrian {60, 1}, 670250003Sadrian {60, 1}, 671250003Sadrian {60, 1}, 672250003Sadrian {60, 1}, 673250003Sadrian {60, 0}}}, 674250003Sadrian 675250003Sadrian {{{60, 1}, 676250003Sadrian {60, 1}, 677250003Sadrian {60, 1}, 678250003Sadrian {60, 1}, 679250003Sadrian {60, 1}, 680250003Sadrian {60, 1}, 681250003Sadrian {60, 1}, 682250003Sadrian {60, 0}}}, 683250003Sadrian 684250003Sadrian {{{60, 0}, 685250003Sadrian {60, 1}, 686250003Sadrian {60, 0}, 687250003Sadrian {60, 1}, 688250003Sadrian {60, 1}, 689250003Sadrian {60, 1}, 690250003Sadrian {60, 1}, 691250003Sadrian {60, 1}}}, 692250003Sadrian 693250003Sadrian {{{60, 0}, 694250003Sadrian {60, 1}, 695250003Sadrian {60, 1}, 696250003Sadrian {60, 0}, 697250003Sadrian {60, 1}, 698250003Sadrian {60, 0}, 699250003Sadrian {60, 0}, 700250003Sadrian {60, 0}}}, 701250003Sadrian 702250003Sadrian {{{60, 1}, 703250003Sadrian {60, 1}, 704250003Sadrian {60, 1}, 705250003Sadrian {60, 0}, 706250003Sadrian {60, 0}, 707250003Sadrian {60, 0}, 708250003Sadrian {60, 0}, 709250003Sadrian {60, 0}}}, 710250003Sadrian 711250003Sadrian {{{60, 1}, 712250003Sadrian {60, 1}, 713250003Sadrian {60, 1}, 714250003Sadrian {60, 1}, 715250003Sadrian {60, 1}, 716250003Sadrian {60, 0}, 717250003Sadrian {60, 0}, 718250003Sadrian {60, 0}}}, 719250003Sadrian 720250003Sadrian {{{60, 1}, 721250003Sadrian {60, 1}, 722250003Sadrian {60, 1}, 723250003Sadrian {60, 1}, 724250003Sadrian {60, 1}, 725250003Sadrian {60, 1}, 726250003Sadrian {60, 1}, 727250003Sadrian {60, 1}}}, 728250003Sadrian 729250003Sadrian {{{60, 1}, 730250003Sadrian {60, 1}, 731250003Sadrian {60, 0}, 732250003Sadrian {60, 1}, 733250003Sadrian {60, 1}, 734250003Sadrian {60, 1}, 735250003Sadrian {60, 1}, 736250003Sadrian {60, 0}}}, 737250003Sadrian 738250003Sadrian {{{60, 1}, 739250003Sadrian {60, 0}, 740250003Sadrian {60, 1}, 741250003Sadrian {60, 1}, 742250003Sadrian {60, 1}, 743250003Sadrian {60, 1}, 744250003Sadrian {60, 0}, 745250003Sadrian {60, 1}}}, 746250003Sadrian } 747250003Sadrian#endif 748250003Sadrian}; 749250003Sadrian 750250003Sadrian#endif 751