atomic.h revision 337898 
1/*-
2 * Copyright (c) 2010 Isilon Systems, Inc.
3 * Copyright (c) 2010 iX Systems, Inc.
4 * Copyright (c) 2010 Panasas, Inc.
5 * Copyright (c) 2013-2018 Mellanox Technologies, Ltd.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice unmodified, this list of conditions, and the following
13 *    disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * $FreeBSD: stable/11/sys/compat/linuxkpi/common/include/asm/atomic.h 337898 2018-08-16 08:12:36Z hselasky $
30 */
31
32#ifndef _ASM_ATOMIC_H_
33#define	_ASM_ATOMIC_H_
34
35#include <linux/compiler.h>
36#include <sys/types.h>
37#include <machine/atomic.h>
38
39#define	ATOMIC_INIT(x)	{ .counter = (x) }
40
41typedef struct {
42	volatile int counter;
43} atomic_t;
44
45/*------------------------------------------------------------------------*
46 *	32-bit atomic operations
47 *------------------------------------------------------------------------*/
48
49#define	atomic_add(i, v)		atomic_add_return((i), (v))
50#define	atomic_sub(i, v)		atomic_sub_return((i), (v))
51#define	atomic_inc_return(v)		atomic_add_return(1, (v))
52#define	atomic_add_negative(i, v)	(atomic_add_return((i), (v)) < 0)
53#define	atomic_add_and_test(i, v)	(atomic_add_return((i), (v)) == 0)
54#define	atomic_sub_and_test(i, v)	(atomic_sub_return((i), (v)) == 0)
55#define	atomic_dec_and_test(v)		(atomic_sub_return(1, (v)) == 0)
56#define	atomic_inc_and_test(v)		(atomic_add_return(1, (v)) == 0)
57#define	atomic_dec_return(v)		atomic_sub_return(1, (v))
58#define	atomic_inc_not_zero(v)		atomic_add_unless((v), 1, 0)
59
60static inline int
61atomic_add_return(int i, atomic_t *v)
62{
63	return i + atomic_fetchadd_int(&v->counter, i);
64}
65
66static inline int
67atomic_sub_return(int i, atomic_t *v)
68{
69	return atomic_fetchadd_int(&v->counter, -i) - i;
70}
71
72static inline void
73atomic_set(atomic_t *v, int i)
74{
75	WRITE_ONCE(v->counter, i);
76}
77
78static inline void
79atomic_set_release(atomic_t *v, int i)
80{
81	atomic_store_rel_int(&v->counter, i);
82}
83
84static inline void
85atomic_set_mask(unsigned int mask, atomic_t *v)
86{
87	atomic_set_int(&v->counter, mask);
88}
89
90static inline int
91atomic_read(const atomic_t *v)
92{
93	return READ_ONCE(v->counter);
94}
95
96static inline int
97atomic_inc(atomic_t *v)
98{
99	return atomic_fetchadd_int(&v->counter, 1) + 1;
100}
101
102static inline int
103atomic_dec(atomic_t *v)
104{
105	return atomic_fetchadd_int(&v->counter, -1) - 1;
106}
107
108static inline int
109atomic_add_unless(atomic_t *v, int a, int u)
110{
111	int c = atomic_read(v);
112
113	for (;;) {
114		if (unlikely(c == u))
115			break;
116		if (likely(atomic_fcmpset_int(&v->counter, &c, c + a)))
117			break;
118	}
119	return (c != u);
120}
121
122static inline void
123atomic_clear_mask(unsigned int mask, atomic_t *v)
124{
125	atomic_clear_int(&v->counter, mask);
126}
127
128static inline int
129atomic_xchg(atomic_t *v, int i)
130{
131#if defined(__i386__) || defined(__amd64__) || \
132    defined(__arm__) || defined(__aarch64__) || \
133    defined(__powerpc__)
134	return (atomic_swap_int(&v->counter, i));
135#else
136	int ret = atomic_read(v);
137
138	while (!atomic_fcmpset_int(&v->counter, &ret, i))
139		;
140	return (ret);
141#endif
142}
143
144static inline int
145atomic_cmpxchg(atomic_t *v, int old, int new)
146{
147	int ret = old;
148
149	for (;;) {
150		if (atomic_fcmpset_int(&v->counter, &ret, new))
151			break;
152		if (ret != old)
153			break;
154	}
155	return (ret);
156}
157
158#if defined(__i386__) || defined(__amd64__)
159#define	LINUXKPI_ATOMIC_8(...) __VA_ARGS__
160#define	LINUXKPI_ATOMIC_16(...) __VA_ARGS__
161#else
162#define	LINUXKPI_ATOMIC_8(...)
163#define	LINUXKPI_ATOMIC_16(...)
164#endif
165
166#if defined(__amd64__) || (defined(__ARM_ARCH) && (__ARM_ARCH >= 6)) ||	\
167    defined(__aarch64__) || defined(__powerpc64__) || defined(__riscv)
168#define	LINUXKPI_ATOMIC_64(...) __VA_ARGS__
169#else
170#define	LINUXKPI_ATOMIC_64(...)
171#endif
172
173#define	cmpxchg(ptr, old, new) ({					\
174	union {								\
175		__typeof(*(ptr)) val;					\
176		u8 u8[0];						\
177		u16 u16[0];						\
178		u32 u32[0];						\
179		u64 u64[0];						\
180	} __ret = { .val = (old) }, __new = { .val = (new) };		\
181									\
182	CTASSERT(							\
183	    LINUXKPI_ATOMIC_8(sizeof(__ret.val) == 1 ||)		\
184	    LINUXKPI_ATOMIC_16(sizeof(__ret.val) == 2 ||)		\
185	    LINUXKPI_ATOMIC_64(sizeof(__ret.val) == 8 ||)		\
186	    sizeof(__ret.val) == 4);					\
187									\
188	switch (sizeof(__ret.val)) {					\
189	LINUXKPI_ATOMIC_8(						\
190	case 1:								\
191		while (!atomic_fcmpset_8((volatile u8 *)(ptr),		\
192		    __ret.u8, __new.u8[0]) && __ret.val == (old))	\
193			;						\
194		break;							\
195	)								\
196	LINUXKPI_ATOMIC_16(						\
197	case 2:								\
198		while (!atomic_fcmpset_16((volatile u16 *)(ptr),	\
199		    __ret.u16, __new.u16[0]) && __ret.val == (old))	\
200			;						\
201		break;							\
202	)								\
203	case 4:								\
204		while (!atomic_fcmpset_32((volatile u32 *)(ptr),	\
205		    __ret.u32, __new.u32[0]) && __ret.val == (old))	\
206			;						\
207		break;							\
208	LINUXKPI_ATOMIC_64(						\
209	case 8:								\
210		while (!atomic_fcmpset_64((volatile u64 *)(ptr),	\
211		    __ret.u64, __new.u64[0]) && __ret.val == (old))	\
212			;						\
213		break;							\
214	)								\
215	}								\
216	__ret.val;							\
217})
218
219#define	cmpxchg_relaxed(...)	cmpxchg(__VA_ARGS__)
220
221#define	xchg(ptr, new) ({						\
222	union {								\
223		__typeof(*(ptr)) val;					\
224		u8 u8[0];						\
225		u16 u16[0];						\
226		u32 u32[0];						\
227		u64 u64[0];						\
228	} __ret, __new = { .val = (new) };				\
229									\
230	CTASSERT(							\
231	    LINUXKPI_ATOMIC_8(sizeof(__ret.val) == 1 ||)		\
232	    LINUXKPI_ATOMIC_16(sizeof(__ret.val) == 2 ||)		\
233	    LINUXKPI_ATOMIC_64(sizeof(__ret.val) == 8 ||)		\
234	    sizeof(__ret.val) == 4);					\
235									\
236	switch (sizeof(__ret.val)) {					\
237	LINUXKPI_ATOMIC_8(						\
238	case 1:								\
239		__ret.val = READ_ONCE(*ptr);				\
240		while (!atomic_fcmpset_8((volatile u8 *)(ptr),		\
241	            __ret.u8, __new.u8[0]))				\
242			;						\
243		break;							\
244	)								\
245	LINUXKPI_ATOMIC_16(						\
246	case 2:								\
247		__ret.val = READ_ONCE(*ptr);				\
248		while (!atomic_fcmpset_16((volatile u16 *)(ptr),	\
249	            __ret.u16, __new.u16[0]))				\
250			;						\
251		break;							\
252	)								\
253	case 4:								\
254		__ret.u32[0] = atomic_swap_32((volatile u32 *)(ptr),	\
255		    __new.u32[0]);					\
256		break;							\
257	LINUXKPI_ATOMIC_64(						\
258	case 8:								\
259		__ret.u64[0] = atomic_swap_64((volatile u64 *)(ptr),	\
260		    __new.u64[0]);					\
261		break;							\
262	)								\
263	}								\
264	__ret.val;							\
265})
266
267static inline int
268atomic_dec_if_positive(atomic_t *v)
269{
270	int retval;
271	int old;
272
273	old = atomic_read(v);
274	for (;;) {
275		retval = old - 1;
276		if (unlikely(retval < 0))
277			break;
278		if (likely(atomic_fcmpset_int(&v->counter, &old, retval)))
279			break;
280	}
281	return (retval);
282}
283
284#define	LINUX_ATOMIC_OP(op, c_op)				\
285static inline void atomic_##op(int i, atomic_t *v)		\
286{								\
287	int c, old;						\
288								\
289	c = v->counter;						\
290	while ((old = atomic_cmpxchg(v, c, c c_op i)) != c)	\
291		c = old;					\
292}
293
294#define	LINUX_ATOMIC_FETCH_OP(op, c_op)				\
295static inline int atomic_fetch_##op(int i, atomic_t *v)		\
296{								\
297	int c, old;						\
298								\
299	c = v->counter;						\
300	while ((old = atomic_cmpxchg(v, c, c c_op i)) != c)	\
301		c = old;					\
302								\
303	return (c);						\
304}
305
306LINUX_ATOMIC_OP(or, |)
307LINUX_ATOMIC_OP(and, &)
308LINUX_ATOMIC_OP(andnot, &~)
309LINUX_ATOMIC_OP(xor, ^)
310
311LINUX_ATOMIC_FETCH_OP(or, |)
312LINUX_ATOMIC_FETCH_OP(and, &)
313LINUX_ATOMIC_FETCH_OP(andnot, &~)
314LINUX_ATOMIC_FETCH_OP(xor, ^)
315
316#endif					/* _ASM_ATOMIC_H_ */
317