intr.h revision 301265
1/*- 2 * Copyright (c) 2014 Andrew Turner <andrew@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: head/sys/arm64/include/intr.h 301265 2016-06-03 10:28:06Z andrew $ 27 */ 28 29#ifndef _MACHINE_INTR_H_ 30#define _MACHINE_INTR_H_ 31 32#ifdef INTRNG 33 34#ifdef FDT 35#include <dev/ofw/openfirm.h> 36#endif 37 38#include <sys/intr.h> 39 40#ifndef NIRQ 41#define NIRQ 2048 /* XXX - It should be an option. */ 42#endif 43 44static inline void 45arm_irq_memory_barrier(uintptr_t irq) 46{ 47} 48 49#ifdef SMP 50void intr_ipi_dispatch(u_int, struct trapframe *); 51#endif 52 53#else 54int intr_irq_config(u_int, enum intr_trigger, enum intr_polarity); 55void intr_irq_handler(struct trapframe *); 56int intr_irq_remove_handler(device_t, u_int, void *); 57 58void arm_dispatch_intr(u_int, struct trapframe *); 59int arm_enable_intr(void); 60void arm_mask_irq(u_int); 61void arm_register_root_pic(device_t, u_int); 62void arm_register_msi_pic(device_t); 63int arm_alloc_msi(device_t, device_t, int, int, int *); 64int arm_release_msi(device_t, device_t, int, int *); 65int arm_alloc_msix(device_t, device_t, int *); 66int arm_release_msix(device_t, device_t, int); 67int arm_map_msi(device_t, device_t, int, uint64_t *, uint32_t *); 68int arm_map_msix(device_t, device_t, int, uint64_t *, uint32_t *); 69int arm_setup_intr(const char *, driver_filter_t *, driver_intr_t, 70 void *, u_int, enum intr_type, void **); 71void arm_unmask_irq(u_int); 72 73#ifdef SMP 74int intr_irq_bind(u_int, int); 75 76void arm_init_secondary(void); 77void arm_setup_ipihandler(driver_filter_t *, u_int); 78void arm_unmask_ipi(u_int); 79#endif 80#endif 81 82#endif /* _MACHINE_INTR_H */ 83