bus_machdep.c revision 286768
1/*- 2 * Copyright (c) 2014 Andrew Turner 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 */ 27 28#include "opt_platform.h" 29 30#include <sys/param.h> 31__FBSDID("$FreeBSD: head/sys/arm64/arm64/bus_machdep.c 286768 2015-08-14 09:55:25Z andrew $"); 32 33#include <vm/vm.h> 34#include <vm/pmap.h> 35 36#include <machine/bus.h> 37 38uint8_t generic_bs_r_1(void *, bus_space_handle_t, bus_size_t); 39uint16_t generic_bs_r_2(void *, bus_space_handle_t, bus_size_t); 40uint32_t generic_bs_r_4(void *, bus_space_handle_t, bus_size_t); 41uint64_t generic_bs_r_8(void *, bus_space_handle_t, bus_size_t); 42 43void generic_bs_rm_1(void *, bus_space_handle_t, bus_size_t, uint8_t *, 44 bus_size_t); 45void generic_bs_rm_2(void *, bus_space_handle_t, bus_size_t, uint16_t *, 46 bus_size_t); 47void generic_bs_rm_4(void *, bus_space_handle_t, bus_size_t, uint32_t *, 48 bus_size_t); 49void generic_bs_rm_8(void *, bus_space_handle_t, bus_size_t, uint64_t *, 50 bus_size_t); 51 52void generic_bs_rr_1(void *, bus_space_handle_t, bus_size_t, uint8_t *, 53 bus_size_t); 54void generic_bs_rr_2(void *, bus_space_handle_t, bus_size_t, uint16_t *, 55 bus_size_t); 56void generic_bs_rr_4(void *, bus_space_handle_t, bus_size_t, uint32_t *, 57 bus_size_t); 58void generic_bs_rr_8(void *, bus_space_handle_t, bus_size_t, uint64_t *, 59 bus_size_t); 60 61void generic_bs_w_1(void *, bus_space_handle_t, bus_size_t, uint8_t); 62void generic_bs_w_2(void *, bus_space_handle_t, bus_size_t, uint16_t); 63void generic_bs_w_4(void *, bus_space_handle_t, bus_size_t, uint32_t); 64void generic_bs_w_8(void *, bus_space_handle_t, bus_size_t, uint64_t); 65 66void generic_bs_wm_1(void *, bus_space_handle_t, bus_size_t, const uint8_t *, 67 bus_size_t); 68void generic_bs_wm_2(void *, bus_space_handle_t, bus_size_t, const uint16_t *, 69 bus_size_t); 70void generic_bs_wm_4(void *, bus_space_handle_t, bus_size_t, const uint32_t *, 71 bus_size_t); 72void generic_bs_wm_8(void *, bus_space_handle_t, bus_size_t, const uint64_t *, 73 bus_size_t); 74 75void generic_bs_wr_1(void *, bus_space_handle_t, bus_size_t, const uint8_t *, 76 bus_size_t); 77void generic_bs_wr_2(void *, bus_space_handle_t, bus_size_t, const uint16_t *, 78 bus_size_t); 79void generic_bs_wr_4(void *, bus_space_handle_t, bus_size_t, const uint32_t *, 80 bus_size_t); 81void generic_bs_wr_8(void *, bus_space_handle_t, bus_size_t, const uint64_t *, 82 bus_size_t); 83 84static int 85generic_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags, 86 bus_space_handle_t *bshp) 87{ 88 void *va; 89 90 va = pmap_mapdev(bpa, size); 91 if (va == NULL) 92 return (ENOMEM); 93 *bshp = (bus_space_handle_t)va; 94 return (0); 95} 96 97static void 98generic_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size) 99{ 100 101 pmap_unmapdev(bsh, size); 102} 103 104static void 105generic_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset, 106 bus_size_t size, int flags) 107{ 108} 109 110static int 111generic_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset, 112 bus_size_t size, bus_space_handle_t *nbshp) 113{ 114 115 *nbshp = bsh + offset; 116 return (0); 117} 118 119struct bus_space memmap_bus = { 120 /* cookie */ 121 .bs_cookie = NULL, 122 123 /* mapping/unmapping */ 124 .bs_map = generic_bs_map, 125 .bs_unmap = generic_bs_unmap, 126 .bs_subregion = generic_bs_subregion, 127 128 /* allocation/deallocation */ 129 .bs_alloc = NULL, 130 .bs_free = NULL, 131 132 /* barrier */ 133 .bs_barrier = generic_bs_barrier, 134 135 /* read single */ 136 .bs_r_1 = generic_bs_r_1, 137 .bs_r_2 = generic_bs_r_2, 138 .bs_r_4 = generic_bs_r_4, 139 .bs_r_8 = generic_bs_r_8, 140 141 /* read multiple */ 142 .bs_rm_1 = generic_bs_rm_1, 143 .bs_rm_2 = generic_bs_rm_2, 144 .bs_rm_4 = generic_bs_rm_4, 145 .bs_rm_8 = generic_bs_rm_8, 146 147 /* read region */ 148 .bs_rr_1 = generic_bs_rr_1, 149 .bs_rr_2 = generic_bs_rr_2, 150 .bs_rr_4 = generic_bs_rr_4, 151 .bs_rr_8 = generic_bs_rr_8, 152 153 /* write single */ 154 .bs_w_1 = generic_bs_w_1, 155 .bs_w_2 = generic_bs_w_2, 156 .bs_w_4 = generic_bs_w_4, 157 .bs_w_8 = generic_bs_w_8, 158 159 /* write multiple */ 160 .bs_wm_1 = generic_bs_wm_1, 161 .bs_wm_2 = generic_bs_wm_2, 162 .bs_wm_4 = generic_bs_wm_4, 163 .bs_wm_8 = generic_bs_wm_8, 164 165 /* write region */ 166 .bs_wr_1 = generic_bs_wr_1, 167 .bs_wr_2 = generic_bs_wr_2, 168 .bs_wr_4 = generic_bs_wr_4, 169 .bs_wr_8 = generic_bs_wr_8, 170 171 /* set multiple */ 172 .bs_sm_1 = NULL, 173 .bs_sm_2 = NULL, 174 .bs_sm_4 = NULL, 175 .bs_sm_8 = NULL, 176 177 /* set region */ 178 .bs_sr_1 = NULL, 179 .bs_sr_2 = NULL, 180 .bs_sr_4 = NULL, 181 .bs_sr_8 = NULL, 182 183 /* copy */ 184 .bs_c_1 = NULL, 185 .bs_c_2 = NULL, 186 .bs_c_4 = NULL, 187 .bs_c_8 = NULL, 188 189 /* read single stream */ 190 .bs_r_1_s = NULL, 191 .bs_r_2_s = NULL, 192 .bs_r_4_s = NULL, 193 .bs_r_8_s = NULL, 194 195 /* read multiple stream */ 196 .bs_rm_1_s = generic_bs_rm_1, 197 .bs_rm_2_s = generic_bs_rm_2, 198 .bs_rm_4_s = generic_bs_rm_4, 199 .bs_rm_8_s = generic_bs_rm_8, 200 201 /* read region stream */ 202 .bs_rr_1_s = NULL, 203 .bs_rr_2_s = NULL, 204 .bs_rr_4_s = NULL, 205 .bs_rr_8_s = NULL, 206 207 /* write single stream */ 208 .bs_w_1_s = NULL, 209 .bs_w_2_s = NULL, 210 .bs_w_4_s = NULL, 211 .bs_w_8_s = NULL, 212 213 /* write multiple stream */ 214 .bs_wm_1_s = generic_bs_wm_1, 215 .bs_wm_2_s = generic_bs_wm_2, 216 .bs_wm_4_s = generic_bs_wm_4, 217 .bs_wm_8_s = generic_bs_wm_8, 218 219 /* write region stream */ 220 .bs_wr_1_s = NULL, 221 .bs_wr_2_s = NULL, 222 .bs_wr_4_s = NULL, 223 .bs_wr_8_s = NULL, 224}; 225 226#ifdef FDT 227bus_space_tag_t fdtbus_bs_tag = &memmap_bus; 228#endif 229