ixp425.c revision 194656
1164426Ssam/* $NetBSD: ixp425.c,v 1.10 2005/12/11 12:16:51 christos Exp $ */ 2164426Ssam 3164426Ssam/* 4164426Ssam * Copyright (c) 2003 5164426Ssam * Ichiro FUKUHARA <ichiro@ichiro.org>. 6164426Ssam * All rights reserved. 7164426Ssam * 8164426Ssam * Redistribution and use in source and binary forms, with or without 9164426Ssam * modification, are permitted provided that the following conditions 10164426Ssam * are met: 11164426Ssam * 1. Redistributions of source code must retain the above copyright 12164426Ssam * notice, this list of conditions and the following disclaimer. 13164426Ssam * 2. Redistributions in binary form must reproduce the above copyright 14164426Ssam * notice, this list of conditions and the following disclaimer in the 15164426Ssam * documentation and/or other materials provided with the distribution. 16164426Ssam * 3. All advertising materials mentioning features or use of this software 17164426Ssam * must display the following acknowledgement: 18164426Ssam * This product includes software developed by Ichiro FUKUHARA. 19164426Ssam * 4. The name of the company nor the name of the author may be used to 20164426Ssam * endorse or promote products derived from this software without specific 21164426Ssam * prior written permission. 22164426Ssam * 23164426Ssam * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR 24164426Ssam * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 25164426Ssam * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26164426Ssam * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR 27164426Ssam * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28164426Ssam * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29164426Ssam * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30164426Ssam * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31164426Ssam * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32164426Ssam * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33164426Ssam * SUCH DAMAGE. 34164426Ssam */ 35164426Ssam 36164426Ssam#include <sys/cdefs.h> 37164426Ssam__FBSDID("$FreeBSD: head/sys/arm/xscale/ixp425/ixp425.c 194656 2009-06-22 20:57:51Z sam $"); 38164426Ssam 39189633Ssam#include "opt_ddb.h" 40189633Ssam 41164426Ssam#define _ARM32_BUS_DMA_PRIVATE 42164426Ssam#include <sys/param.h> 43164426Ssam#include <sys/systm.h> 44164426Ssam#include <sys/bus.h> 45164426Ssam#include <sys/kernel.h> 46164426Ssam#include <sys/module.h> 47164426Ssam#include <sys/malloc.h> 48164426Ssam#include <sys/rman.h> 49164426Ssam#include <machine/bus.h> 50164426Ssam#include <machine/intr.h> 51164426Ssam 52164426Ssam#include <vm/vm.h> 53164426Ssam#include <vm/pmap.h> 54164426Ssam#include <arm/xscale/ixp425/ixp425reg.h> 55164426Ssam#include <arm/xscale/ixp425/ixp425var.h> 56164426Ssam#include <arm/xscale/ixp425/ixp425_intr.h> 57164426Ssam 58164426Ssam#include <dev/pci/pcireg.h> 59164426Ssam 60164426Ssamvolatile uint32_t intr_enabled; 61164426Ssamuint32_t intr_steer = 0; 62164426Ssam 63186352Ssam/* ixp43x et. al have +32 IRQ's */ 64186352Ssamvolatile uint32_t intr_enabled2; 65186352Ssamuint32_t intr_steer2 = 0; 66186352Ssam 67164426Ssamstruct ixp425_softc *ixp425_softc = NULL; 68164426Ssam 69164426Ssamstatic int ixp425_probe(device_t); 70164426Ssamstatic void ixp425_identify(driver_t *, device_t); 71164426Ssamstatic int ixp425_attach(device_t); 72164426Ssam 73186418Ssam/* 74186418Ssam * Return a mask of the "fuse" bits that identify 75186418Ssam * which h/w features are present. 76186418Ssam * NB: assumes the expansion bus is mapped. 77186418Ssam */ 78186418Ssamuint32_t 79186418Ssamixp4xx_read_feature_bits(void) 80186418Ssam{ 81186418Ssam uint32_t bits = ~IXPREG(IXP425_EXP_VBASE + EXP_FCTRL_OFFSET); 82186418Ssam bits &= ~EXP_FCTRL_RESVD; 83186418Ssam if (!cpu_is_ixp46x()) 84186418Ssam bits &= ~EXP_FCTRL_IXP46X_ONLY; 85186418Ssam return bits; 86186418Ssam} 87186418Ssam 88194319Ssamvoid 89194319Ssamixp4xx_write_feature_bits(uint32_t v) 90194319Ssam{ 91194319Ssam IXPREG(IXP425_EXP_VBASE + EXP_FCTRL_OFFSET) = ~v; 92194319Ssam} 93194319Ssam 94164426Ssamstruct arm32_dma_range * 95164426Ssambus_dma_get_range(void) 96164426Ssam{ 97164426Ssam return (NULL); 98164426Ssam} 99164426Ssam 100164426Ssamint 101164426Ssambus_dma_get_range_nb(void) 102164426Ssam{ 103164426Ssam return (0); 104164426Ssam} 105164426Ssam 106189633Ssamstatic const uint8_t int2gpio[32] __attribute__ ((aligned(32))) = { 107189633Ssam 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* INT#0 -> INT#5 */ 108189633Ssam 0x00, 0x01, /* GPIO#0 -> GPIO#1 */ 109189633Ssam 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* INT#8 -> INT#13 */ 110189633Ssam 0xff, 0xff, 0xff, 0xff, 0xff, /* INT#14 -> INT#18 */ 111189633Ssam 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, /* GPIO#2 -> GPIO#7 */ 112189633Ssam 0x08, 0x09, 0x0a, 0x0b, 0x0c, /* GPIO#8 -> GPIO#12 */ 113189633Ssam 0xff, 0xff /* INT#30 -> INT#31 */ 114189633Ssam}; 115189633Ssam 116194648Ssamstatic __inline uint32_t 117164426Ssamixp425_irq2gpio_bit(int irq) 118164426Ssam{ 119189633Ssam return (1U << int2gpio[irq]); 120189633Ssam} 121164426Ssam 122189633Ssam#ifdef DDB 123189633Ssam#include <ddb/ddb.h> 124189633Ssam 125189633SsamDB_SHOW_COMMAND(gpio, db_show_gpio) 126189633Ssam{ 127189633Ssam static const char *itype[8] = { 128189633Ssam [GPIO_TYPE_ACT_HIGH] = "act-high", 129189633Ssam [GPIO_TYPE_ACT_LOW] = "act-low", 130189633Ssam [GPIO_TYPE_EDG_RISING] = "edge-rising", 131189633Ssam [GPIO_TYPE_EDG_FALLING] = "edge-falling", 132189633Ssam [GPIO_TYPE_TRANSITIONAL]= "transitional", 133189633Ssam [5] = "type-5", [6] = "type-6", [7] = "type-7" 134164426Ssam }; 135189633Ssam uint32_t gpoutr = GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPOUTR); 136189633Ssam uint32_t gpoer = GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPOER); 137189633Ssam uint32_t gpinr = GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPINR); 138189633Ssam uint32_t gpit1r = GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPIT1R); 139189633Ssam uint32_t gpit2r = GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPIT2R); 140189633Ssam int i, j; 141164426Ssam 142194649Ssam db_printf("GPOUTR %08x GPINR %08x GPOER %08x GPISR %08x\n", 143194649Ssam gpoutr, gpinr, gpoer, 144189633Ssam GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPISR)); 145189633Ssam db_printf("GPIT1R %08x GPIT2R %08x GPCLKR %08x\n", 146189633Ssam gpit1r, gpit2r, GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPCLKR)); 147189633Ssam for (i = 0; i < 16; i++) { 148189633Ssam db_printf("[%2d] out %u in %u %-3s", i, 149189633Ssam (gpoutr>>i)&1, (gpinr>>i)&1, (gpoer>>i)&1 ? "in" : "out"); 150189633Ssam for (j = 0; j < 32; j++) 151189633Ssam if (int2gpio[j] == i) { 152189633Ssam db_printf(" irq %2u %s", j, itype[ 153189633Ssam (((i & 8) ? gpit2r : gpit1r) >> (3*(i&7))) 154189633Ssam & 7]); 155189633Ssam break; 156189633Ssam } 157189633Ssam db_printf("\n"); 158189633Ssam } 159164426Ssam} 160189633Ssam#endif 161164426Ssam 162194653Ssamvoid 163194653Ssamixp425_set_gpio(struct ixp425_softc *sc, int pin, int type) 164194653Ssam{ 165194653Ssam uint32_t gpiotr = GPIO_CONF_READ_4(sc, GPIO_TYPE_REG(pin)); 166194653Ssam 167194653Ssam /* clear interrupt type */ 168194653Ssam GPIO_CONF_WRITE_4(sc, GPIO_TYPE_REG(pin), 169194653Ssam gpiotr &~ GPIO_TYPE(pin, GPIO_TYPE_MASK)); 170194653Ssam /* clear any pending interrupt */ 171194653Ssam GPIO_CONF_WRITE_4(sc, IXP425_GPIO_GPISR, (1<<pin)); 172194653Ssam /* set new interrupt type */ 173194653Ssam GPIO_CONF_WRITE_4(sc, GPIO_TYPE_REG(pin), 174194653Ssam gpiotr | GPIO_TYPE(pin, type)); 175194653Ssam 176194653Ssam /* configure gpio line as an input */ 177194653Ssam GPIO_CONF_WRITE_4(sc, IXP425_GPIO_GPOER, 178194653Ssam GPIO_CONF_READ_4(sc, IXP425_GPIO_GPOER) | (1<<pin)); 179194653Ssam} 180194653Ssam 181194650Ssamstatic __inline void 182194650Ssamixp425_gpio_ack(int irq) 183194650Ssam{ 184194650Ssam if (irq < 32 && ((1 << irq) & IXP425_INT_GPIOMASK)) 185194650Ssam IXPREG(IXP425_GPIO_VBASE + IXP425_GPIO_GPISR) = 186194650Ssam ixp425_irq2gpio_bit(irq); 187194650Ssam} 188194650Ssam 189194656Ssamstatic void 190194656Ssamixp425_post_filter(void *arg) 191194656Ssam{ 192194656Ssam uintptr_t irq = (uintptr_t) arg; 193194656Ssam ixp425_gpio_ack(irq); 194194656Ssam} 195194656Ssam 196164426Ssamvoid 197164426Ssamarm_mask_irq(uintptr_t nb) 198164426Ssam{ 199182946Scognet int i; 200194651Ssam 201182946Scognet i = disable_interrupts(I32_bit); 202186352Ssam if (nb < 32) { 203186352Ssam intr_enabled &= ~(1 << nb); 204186352Ssam ixp425_set_intrmask(); 205186352Ssam } else { 206186352Ssam intr_enabled2 &= ~(1 << (nb - 32)); 207186352Ssam ixp435_set_intrmask(); 208186352Ssam } 209182946Scognet restore_interrupts(i); 210164426Ssam /*XXX; If it's a GPIO interrupt, ACK it know. Can it be a problem ?*/ 211194650Ssam ixp425_gpio_ack(nb); 212164426Ssam} 213164426Ssam 214164426Ssamvoid 215164426Ssamarm_unmask_irq(uintptr_t nb) 216164426Ssam{ 217182946Scognet int i; 218194651Ssam 219182946Scognet i = disable_interrupts(I32_bit); 220186352Ssam if (nb < 32) { 221186352Ssam intr_enabled |= (1 << nb); 222186352Ssam ixp425_set_intrmask(); 223186352Ssam } else { 224186352Ssam intr_enabled2 |= (1 << (nb - 32)); 225186352Ssam ixp435_set_intrmask(); 226186352Ssam } 227182946Scognet restore_interrupts(i); 228164426Ssam} 229164426Ssam 230164426Ssamstatic __inline uint32_t 231164426Ssamixp425_irq_read(void) 232164426Ssam{ 233164426Ssam return IXPREG(IXP425_INT_STATUS) & intr_enabled; 234164426Ssam} 235164426Ssam 236186352Ssamstatic __inline uint32_t 237186352Ssamixp435_irq_read(void) 238186352Ssam{ 239186352Ssam return IXPREG(IXP435_INT_STATUS2) & intr_enabled2; 240186352Ssam} 241186352Ssam 242164426Ssamint 243194652Ssamarm_get_next_irq(int last) 244164426Ssam{ 245194652Ssam uint32_t mask; 246164426Ssam 247194652Ssam last += 1; /* always advance fwd, NB: handles -1 */ 248194652Ssam if (last < 32) { 249194652Ssam mask = ixp425_irq_read() >> last; 250194652Ssam for (; mask != 0; mask >>= 1, last += 1) { 251194652Ssam if (mask & 1) 252194652Ssam return last; 253194652Ssam } 254194652Ssam last = 32; 255194652Ssam } 256194652Ssam if (cpu_is_ixp43x()) { 257194652Ssam mask = ixp435_irq_read() >> (32-last); 258194652Ssam for (; mask != 0; mask >>= 1, last++) { 259194652Ssam if (mask & 1) 260194652Ssam return last; 261194652Ssam } 262194652Ssam } 263194652Ssam return -1; 264164426Ssam} 265164426Ssam 266164426Ssamvoid 267164426Ssamcpu_reset(void) 268164426Ssam{ 269164426Ssam 270164426Ssam bus_space_write_4(&ixp425_bs_tag, IXP425_TIMER_VBASE, 271164426Ssam IXP425_OST_WDOG_KEY, OST_WDOG_KEY_MAJICK); 272164426Ssam bus_space_write_4(&ixp425_bs_tag, IXP425_TIMER_VBASE, 273164426Ssam IXP425_OST_WDOG, 0); 274164426Ssam bus_space_write_4(&ixp425_bs_tag, IXP425_TIMER_VBASE, 275164426Ssam IXP425_OST_WDOG_ENAB, OST_WDOG_ENAB_RST_ENA | 276164426Ssam OST_WDOG_ENAB_CNT_ENA); 277164426Ssam printf("Reset failed!\n"); 278164426Ssam for(;;); 279164426Ssam} 280164426Ssam 281164426Ssamstatic void 282164426Ssamixp425_identify(driver_t *driver, device_t parent) 283164426Ssam{ 284164426Ssam BUS_ADD_CHILD(parent, 0, "ixp", 0); 285164426Ssam} 286164426Ssam 287164426Ssamstatic int 288164426Ssamixp425_probe(device_t dev) 289164426Ssam{ 290186352Ssam device_set_desc(dev, "Intel IXP4XX"); 291164426Ssam return (0); 292164426Ssam} 293164426Ssam 294164426Ssamstatic int 295164426Ssamixp425_attach(device_t dev) 296164426Ssam{ 297164426Ssam struct ixp425_softc *sc; 298164426Ssam 299186418Ssam device_printf(dev, "%b\n", ixp4xx_read_feature_bits(), EXP_FCTRL_BITS); 300186418Ssam 301164426Ssam sc = device_get_softc(dev); 302164426Ssam sc->sc_iot = &ixp425_bs_tag; 303186352Ssam KASSERT(ixp425_softc == NULL, ("%s called twice?", __func__)); 304164426Ssam ixp425_softc = sc; 305164426Ssam 306164426Ssam intr_enabled = 0; 307164426Ssam ixp425_set_intrmask(); 308164426Ssam ixp425_set_intrsteer(); 309186352Ssam if (cpu_is_ixp43x()) { 310186352Ssam intr_enabled2 = 0; 311186352Ssam ixp435_set_intrmask(); 312186352Ssam ixp435_set_intrsteer(); 313186352Ssam } 314194656Ssam arm_post_filter = ixp425_post_filter; 315164426Ssam 316166064Scognet if (bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT, 317166064Scognet BUS_SPACE_MAXADDR, NULL, NULL, 0xffffffff, 0xff, 0xffffffff, 0, 318166064Scognet NULL, NULL, &sc->sc_dmat)) 319186352Ssam panic("%s: failed to create dma tag", __func__); 320166064Scognet 321164426Ssam sc->sc_irq_rman.rm_type = RMAN_ARRAY; 322186352Ssam sc->sc_irq_rman.rm_descr = "IXP4XX IRQs"; 323164426Ssam if (rman_init(&sc->sc_irq_rman) != 0 || 324186352Ssam rman_manage_region(&sc->sc_irq_rman, 0, cpu_is_ixp43x() ? 63 : 31) != 0) 325186352Ssam panic("%s: failed to set up IRQ rman", __func__); 326164426Ssam 327164426Ssam sc->sc_mem_rman.rm_type = RMAN_ARRAY; 328186352Ssam sc->sc_mem_rman.rm_descr = "IXP4XX Memory"; 329164426Ssam if (rman_init(&sc->sc_mem_rman) != 0 || 330164426Ssam rman_manage_region(&sc->sc_mem_rman, 0, ~0) != 0) 331186352Ssam panic("%s: failed to set up memory rman", __func__); 332164426Ssam 333169952Ssam BUS_ADD_CHILD(dev, 0, "pcib", 0); 334169952Ssam BUS_ADD_CHILD(dev, 0, "ixpclk", 0); 335169952Ssam BUS_ADD_CHILD(dev, 0, "ixpiic", 0); 336169952Ssam /* XXX move to hints? */ 337169952Ssam BUS_ADD_CHILD(dev, 0, "ixpwdog", 0); 338164426Ssam 339169952Ssam /* attach wired devices via hints */ 340169952Ssam bus_enumerate_hinted_children(dev); 341169952Ssam 342164426Ssam if (bus_space_map(sc->sc_iot, IXP425_GPIO_HWBASE, IXP425_GPIO_SIZE, 343164426Ssam 0, &sc->sc_gpio_ioh)) 344186352Ssam panic("%s: unable to map GPIO registers", __func__); 345164426Ssam if (bus_space_map(sc->sc_iot, IXP425_EXP_HWBASE, IXP425_EXP_SIZE, 346164426Ssam 0, &sc->sc_exp_ioh)) 347186352Ssam panic("%s: unable to map Expansion Bus registers", __func__); 348164426Ssam 349164426Ssam bus_generic_probe(dev); 350164426Ssam bus_generic_attach(dev); 351164426Ssam 352164426Ssam return (0); 353164426Ssam} 354164426Ssam 355169952Ssamstatic void 356169952Ssamixp425_hinted_child(device_t bus, const char *dname, int dunit) 357169952Ssam{ 358169952Ssam device_t child; 359169952Ssam struct ixp425_ivar *ivar; 360169952Ssam 361169952Ssam child = BUS_ADD_CHILD(bus, 0, dname, dunit); 362169952Ssam ivar = IXP425_IVAR(child); 363169952Ssam resource_int_value(dname, dunit, "addr", &ivar->addr); 364169952Ssam resource_int_value(dname, dunit, "irq", &ivar->irq); 365169952Ssam} 366169952Ssam 367169952Ssamstatic device_t 368169952Ssamixp425_add_child(device_t dev, int order, const char *name, int unit) 369169952Ssam{ 370169952Ssam device_t child; 371169952Ssam struct ixp425_ivar *ivar; 372169952Ssam 373169952Ssam child = device_add_child_ordered(dev, order, name, unit); 374169952Ssam if (child == NULL) 375169952Ssam return NULL; 376169952Ssam ivar = malloc(sizeof(struct ixp425_ivar), M_DEVBUF, M_NOWAIT); 377169952Ssam if (ivar == NULL) { 378169952Ssam device_delete_child(dev, child); 379169952Ssam return NULL; 380169952Ssam } 381169952Ssam ivar->addr = 0; 382169952Ssam ivar->irq = -1; 383169952Ssam device_set_ivars(child, ivar); 384169952Ssam return child; 385169952Ssam} 386169952Ssam 387169952Ssamstatic int 388194015Savgixp425_read_ivar(device_t bus, device_t child, int which, uintptr_t *result) 389169952Ssam{ 390169952Ssam struct ixp425_ivar *ivar = IXP425_IVAR(child); 391169952Ssam 392169952Ssam switch (which) { 393169952Ssam case IXP425_IVAR_ADDR: 394169952Ssam if (ivar->addr != 0) { 395169952Ssam *(uint32_t *)result = ivar->addr; 396169952Ssam return 0; 397169952Ssam } 398169952Ssam break; 399169952Ssam case IXP425_IVAR_IRQ: 400169952Ssam if (ivar->irq != -1) { 401169952Ssam *(int *)result = ivar->irq; 402169952Ssam return 0; 403169952Ssam } 404169952Ssam break; 405169952Ssam } 406169952Ssam return EINVAL; 407169952Ssam} 408169952Ssam 409186352Ssam/* 410189632Ssam * NB: This table handles P->V translations for regions setup with 411189632Ssam * static mappings in initarm. This is used solely for calls to 412189632Ssam * bus_alloc_resource_any; anything done with bus_space_map is 413189632Ssam * handled elsewhere and does not require an entry here. 414186352Ssam * 415189632Ssam * XXX this table is also used by uart_cpu_getdev via getvbase 416189632Ssam * (hence the public api) 417186352Ssam */ 418189632Ssamstruct hwvtrans { 419186352Ssam uint32_t hwbase; 420186352Ssam uint32_t size; 421186352Ssam uint32_t vbase; 422189632Ssam int isa4x; /* XXX needs special bus space tag */ 423186352Ssam}; 424186352Ssam 425189632Ssamstatic const struct hwvtrans * 426189632Ssamgethwvtrans(uint32_t hwbase, uint32_t size) 427186352Ssam{ 428189632Ssam static const struct hwvtrans hwvtrans[] = { 429189632Ssam /* NB: needed only for uart_cpu_getdev */ 430189632Ssam { .hwbase = IXP425_UART0_HWBASE, 431189632Ssam .size = IXP425_REG_SIZE, 432189632Ssam .vbase = IXP425_UART0_VBASE, 433189632Ssam .isa4x = 1 }, 434189632Ssam { .hwbase = IXP425_UART1_HWBASE, 435189632Ssam .size = IXP425_REG_SIZE, 436189632Ssam .vbase = IXP425_UART1_VBASE, 437189632Ssam .isa4x = 1 }, 438189632Ssam { .hwbase = IXP425_PCI_HWBASE, 439189632Ssam .size = IXP425_PCI_SIZE, 440189632Ssam .vbase = IXP425_PCI_VBASE }, 441189632Ssam { .hwbase = IXP425_PCI_MEM_HWBASE, 442189632Ssam .size = IXP425_PCI_MEM_SIZE, 443189632Ssam .vbase = IXP425_PCI_MEM_VBASE }, 444189632Ssam { .hwbase = IXP425_EXP_BUS_CS0_HWBASE, 445189632Ssam .size = IXP425_EXP_BUS_CS0_SIZE, 446189632Ssam .vbase = IXP425_EXP_BUS_CS0_VBASE }, 447189632Ssam /* NB: needed for ixp435 ehci controllers */ 448189632Ssam { .hwbase = IXP435_USB1_HWBASE, 449189632Ssam .size = IXP435_USB1_SIZE, 450189632Ssam .vbase = IXP435_USB1_VBASE }, 451189632Ssam { .hwbase = IXP435_USB2_HWBASE, 452189632Ssam .size = IXP435_USB2_SIZE, 453189632Ssam .vbase = IXP435_USB2_VBASE }, 454189632Ssam { .hwbase = CAMBRIA_GPS_HWBASE, 455189632Ssam .size = CAMBRIA_GPS_SIZE, 456189632Ssam .vbase = CAMBRIA_GPS_VBASE }, 457189632Ssam { .hwbase = CAMBRIA_RS485_HWBASE, 458189632Ssam .size = CAMBRIA_RS485_SIZE, 459189632Ssam .vbase = CAMBRIA_RS485_VBASE }, 460189632Ssam }; 461186352Ssam int i; 462186352Ssam 463186352Ssam for (i = 0; i < sizeof hwvtrans / sizeof *hwvtrans; i++) { 464186352Ssam if (hwbase >= hwvtrans[i].hwbase && 465189632Ssam hwbase + size <= hwvtrans[i].hwbase + hwvtrans[i].size) 466189632Ssam return &hwvtrans[i]; 467186352Ssam } 468189632Ssam return NULL; 469186352Ssam} 470186352Ssam 471189632Ssam/* XXX for uart_cpu_getdev */ 472189632Ssamint 473189632Ssamgetvbase(uint32_t hwbase, uint32_t size, uint32_t *vbase) 474189632Ssam{ 475189632Ssam const struct hwvtrans *hw; 476189632Ssam 477189632Ssam hw = gethwvtrans(hwbase, size); 478189632Ssam if (hw == NULL) 479189632Ssam return (ENOENT); 480189632Ssam *vbase = hwbase - hw->hwbase + hw->vbase; 481189632Ssam return (0); 482189632Ssam} 483189632Ssam 484164426Ssamstatic struct resource * 485164426Ssamixp425_alloc_resource(device_t dev, device_t child, int type, int *rid, 486164426Ssam u_long start, u_long end, u_long count, u_int flags) 487164426Ssam{ 488164426Ssam struct ixp425_softc *sc = device_get_softc(dev); 489189632Ssam const struct hwvtrans *vtrans; 490164426Ssam struct resource *rv; 491189632Ssam uint32_t addr; 492189630Ssam int needactivate = flags & RF_ACTIVE; 493169952Ssam int irq; 494164426Ssam 495189630Ssam flags &= ~RF_ACTIVE; 496164426Ssam switch (type) { 497164426Ssam case SYS_RES_IRQ: 498169952Ssam /* override per hints */ 499169952Ssam if (BUS_READ_IVAR(dev, child, IXP425_IVAR_IRQ, &irq) == 0) 500169952Ssam start = end = irq; 501189641Ssam rv = rman_reserve_resource(&sc->sc_irq_rman, start, end, count, 502189641Ssam flags, child); 503169952Ssam if (rv != NULL) 504169952Ssam rman_set_rid(rv, *rid); 505164426Ssam break; 506164426Ssam 507164426Ssam case SYS_RES_MEMORY: 508169952Ssam /* override per hints */ 509169952Ssam if (BUS_READ_IVAR(dev, child, IXP425_IVAR_ADDR, &addr) == 0) { 510169952Ssam start = addr; 511189632Ssam /* XXX use nominal window to check for mapping */ 512189632Ssam vtrans = gethwvtrans(start, 0x1000); 513189632Ssam if (vtrans != NULL) { 514189632Ssam /* 515189632Ssam * Assign the entire mapped region; this may 516189632Ssam * not be correct but without more info from 517189632Ssam * the caller we cannot tell. 518189632Ssam */ 519189632Ssam end = start + vtrans->size - 520189632Ssam (start - vtrans->hwbase); 521189632Ssam if (bootverbose) 522189632Ssam device_printf(child, 523189632Ssam "%s: assign 0x%lx:0x%lx%s\n", 524189632Ssam __func__, start, end - start, 525189632Ssam vtrans->isa4x ? " A4X" : ""); 526189632Ssam } 527189632Ssam } else 528189632Ssam vtrans = gethwvtrans(start, end - start); 529189632Ssam if (vtrans == NULL) { 530186352Ssam /* likely means above table needs to be updated */ 531189632Ssam device_printf(child, "%s: no mapping for 0x%lx:0x%lx\n", 532189641Ssam __func__, start, end - start); 533169952Ssam return NULL; 534186352Ssam } 535189641Ssam rv = rman_reserve_resource(&sc->sc_mem_rman, start, end, 536189641Ssam end - start, flags, child); 537189641Ssam if (rv == NULL) { 538189641Ssam device_printf(child, "%s: cannot reserve 0x%lx:0x%lx\n", 539189641Ssam __func__, start, end - start); 540189641Ssam return NULL; 541189641Ssam } 542189641Ssam rman_set_rid(rv, *rid); 543164426Ssam break; 544164426Ssam default: 545169952Ssam rv = NULL; 546169952Ssam break; 547164426Ssam } 548189630Ssam if (rv != NULL && needactivate) { 549189630Ssam if (bus_activate_resource(child, type, *rid, rv)) { 550189630Ssam rman_release_resource(rv); 551189630Ssam return (NULL); 552189630Ssam } 553189630Ssam } 554189630Ssam return (rv); 555164426Ssam} 556164426Ssam 557189630Ssamstatic int 558189641Ssamixp425_release_resource(device_t bus, device_t child, int type, int rid, 559189641Ssam struct resource *r) 560189641Ssam{ 561189641Ssam /* NB: no private resources, just release */ 562189641Ssam return rman_release_resource(r); 563189641Ssam} 564189641Ssam 565189641Ssamstatic int 566189630Ssamixp425_activate_resource(device_t dev, device_t child, int type, int rid, 567189630Ssam struct resource *r) 568189630Ssam{ 569189630Ssam struct ixp425_softc *sc = device_get_softc(dev); 570189632Ssam const struct hwvtrans *vtrans; 571189630Ssam 572189630Ssam if (type == SYS_RES_MEMORY) { 573189632Ssam vtrans = gethwvtrans(rman_get_start(r), rman_get_size(r)); 574189641Ssam if (vtrans == NULL) { /* NB: should not happen */ 575189641Ssam device_printf(child, "%s: no mapping for 0x%lx:0x%lx\n", 576189641Ssam __func__, rman_get_start(r), rman_get_size(r)); 577189632Ssam return (ENOENT); 578189641Ssam } 579189632Ssam if (vtrans->isa4x) 580189630Ssam rman_set_bustag(r, &ixp425_a4x_bs_tag); 581189630Ssam else 582189630Ssam rman_set_bustag(r, sc->sc_iot); 583189632Ssam rman_set_bushandle(r, vtrans->vbase); 584189630Ssam } 585189630Ssam return (rman_activate_resource(r)); 586189630Ssam} 587189630Ssam 588189641Ssamstatic int 589189641Ssamixp425_deactivate_resource(device_t bus, device_t child, int type, int rid, 590189641Ssam struct resource *r) 591189641Ssam{ 592189641Ssam /* NB: no private resources, just deactive */ 593189641Ssam return (rman_deactivate_resource(r)); 594189641Ssam} 595189641Ssam 596186352Ssamstatic __inline void 597186352Ssamget_masks(struct resource *res, uint32_t *mask, uint32_t *mask2) 598186352Ssam{ 599186352Ssam int i; 600186352Ssam 601186352Ssam *mask = 0; 602186352Ssam for (i = rman_get_start(res); i < 32 && i <= rman_get_end(res); i++) 603186352Ssam *mask |= 1 << i; 604186352Ssam *mask2 = 0; 605186352Ssam for (; i <= rman_get_end(res); i++) 606186352Ssam *mask2 |= 1 << (i - 32); 607186352Ssam} 608186352Ssam 609186352Ssamstatic __inline void 610186352Ssamupdate_masks(uint32_t mask, uint32_t mask2) 611186352Ssam{ 612186352Ssam 613186352Ssam intr_enabled = mask; 614186352Ssam ixp425_set_intrmask(); 615186352Ssam if (cpu_is_ixp43x()) { 616186352Ssam intr_enabled2 = mask2; 617186352Ssam ixp435_set_intrmask(); 618186352Ssam } 619186352Ssam} 620186352Ssam 621164426Ssamstatic int 622164426Ssamixp425_setup_intr(device_t dev, device_t child, 623186352Ssam struct resource *res, int flags, driver_filter_t *filt, 624166901Spiso driver_intr_t *intr, void *arg, void **cookiep) 625164426Ssam{ 626186352Ssam uint32_t mask, mask2; 627164426Ssam 628186352Ssam BUS_SETUP_INTR(device_get_parent(dev), child, res, flags, filt, intr, 629166901Spiso arg, cookiep); 630164426Ssam 631186352Ssam get_masks(res, &mask, &mask2); 632186352Ssam update_masks(intr_enabled | mask, intr_enabled2 | mask2); 633164426Ssam 634164426Ssam return (0); 635164426Ssam} 636164426Ssam 637164426Ssamstatic int 638164426Ssamixp425_teardown_intr(device_t dev, device_t child, struct resource *res, 639164426Ssam void *cookie) 640164426Ssam{ 641186352Ssam uint32_t mask, mask2; 642164426Ssam 643186352Ssam get_masks(res, &mask, &mask2); 644186352Ssam update_masks(intr_enabled &~ mask, intr_enabled2 &~ mask2); 645164426Ssam 646164426Ssam return (BUS_TEARDOWN_INTR(device_get_parent(dev), child, res, cookie)); 647164426Ssam} 648164426Ssam 649164426Ssamstatic device_method_t ixp425_methods[] = { 650164426Ssam /* Device interface */ 651189641Ssam DEVMETHOD(device_probe, ixp425_probe), 652189641Ssam DEVMETHOD(device_attach, ixp425_attach), 653189641Ssam DEVMETHOD(device_identify, ixp425_identify), 654164426Ssam 655164426Ssam /* Bus interface */ 656189641Ssam DEVMETHOD(bus_add_child, ixp425_add_child), 657189641Ssam DEVMETHOD(bus_hinted_child, ixp425_hinted_child), 658189641Ssam DEVMETHOD(bus_read_ivar, ixp425_read_ivar), 659169952Ssam 660189641Ssam DEVMETHOD(bus_alloc_resource, ixp425_alloc_resource), 661189641Ssam DEVMETHOD(bus_release_resource, ixp425_release_resource), 662189641Ssam DEVMETHOD(bus_activate_resource, ixp425_activate_resource), 663189641Ssam DEVMETHOD(bus_deactivate_resource, ixp425_deactivate_resource), 664189641Ssam DEVMETHOD(bus_setup_intr, ixp425_setup_intr), 665189641Ssam DEVMETHOD(bus_teardown_intr, ixp425_teardown_intr), 666164426Ssam 667164426Ssam {0, 0}, 668164426Ssam}; 669164426Ssam 670164426Ssamstatic driver_t ixp425_driver = { 671164426Ssam "ixp", 672164426Ssam ixp425_methods, 673164426Ssam sizeof(struct ixp425_softc), 674164426Ssam}; 675164426Ssamstatic devclass_t ixp425_devclass; 676164426Ssam 677164426SsamDRIVER_MODULE(ixp, nexus, ixp425_driver, ixp425_devclass, 0, 0); 678