ixp425.c revision 194653
1164426Ssam/* $NetBSD: ixp425.c,v 1.10 2005/12/11 12:16:51 christos Exp $ */ 2164426Ssam 3164426Ssam/* 4164426Ssam * Copyright (c) 2003 5164426Ssam * Ichiro FUKUHARA <ichiro@ichiro.org>. 6164426Ssam * All rights reserved. 7164426Ssam * 8164426Ssam * Redistribution and use in source and binary forms, with or without 9164426Ssam * modification, are permitted provided that the following conditions 10164426Ssam * are met: 11164426Ssam * 1. Redistributions of source code must retain the above copyright 12164426Ssam * notice, this list of conditions and the following disclaimer. 13164426Ssam * 2. Redistributions in binary form must reproduce the above copyright 14164426Ssam * notice, this list of conditions and the following disclaimer in the 15164426Ssam * documentation and/or other materials provided with the distribution. 16164426Ssam * 3. All advertising materials mentioning features or use of this software 17164426Ssam * must display the following acknowledgement: 18164426Ssam * This product includes software developed by Ichiro FUKUHARA. 19164426Ssam * 4. The name of the company nor the name of the author may be used to 20164426Ssam * endorse or promote products derived from this software without specific 21164426Ssam * prior written permission. 22164426Ssam * 23164426Ssam * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR 24164426Ssam * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 25164426Ssam * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26164426Ssam * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR 27164426Ssam * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28164426Ssam * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29164426Ssam * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30164426Ssam * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31164426Ssam * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32164426Ssam * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33164426Ssam * SUCH DAMAGE. 34164426Ssam */ 35164426Ssam 36164426Ssam#include <sys/cdefs.h> 37164426Ssam__FBSDID("$FreeBSD: head/sys/arm/xscale/ixp425/ixp425.c 194653 2009-06-22 20:38:55Z sam $"); 38164426Ssam 39189633Ssam#include "opt_ddb.h" 40189633Ssam 41164426Ssam#define _ARM32_BUS_DMA_PRIVATE 42164426Ssam#include <sys/param.h> 43164426Ssam#include <sys/systm.h> 44164426Ssam#include <sys/bus.h> 45164426Ssam#include <sys/kernel.h> 46164426Ssam#include <sys/module.h> 47164426Ssam#include <sys/malloc.h> 48164426Ssam#include <sys/rman.h> 49164426Ssam#include <machine/bus.h> 50164426Ssam#include <machine/intr.h> 51164426Ssam 52164426Ssam#include <vm/vm.h> 53164426Ssam#include <vm/pmap.h> 54164426Ssam#include <arm/xscale/ixp425/ixp425reg.h> 55164426Ssam#include <arm/xscale/ixp425/ixp425var.h> 56164426Ssam#include <arm/xscale/ixp425/ixp425_intr.h> 57164426Ssam 58164426Ssam#include <dev/pci/pcireg.h> 59164426Ssam 60164426Ssamvolatile uint32_t intr_enabled; 61164426Ssamuint32_t intr_steer = 0; 62164426Ssam 63186352Ssam/* ixp43x et. al have +32 IRQ's */ 64186352Ssamvolatile uint32_t intr_enabled2; 65186352Ssamuint32_t intr_steer2 = 0; 66186352Ssam 67164426Ssamstruct ixp425_softc *ixp425_softc = NULL; 68164426Ssam 69164426Ssamstatic int ixp425_probe(device_t); 70164426Ssamstatic void ixp425_identify(driver_t *, device_t); 71164426Ssamstatic int ixp425_attach(device_t); 72164426Ssam 73186418Ssam/* 74186418Ssam * Return a mask of the "fuse" bits that identify 75186418Ssam * which h/w features are present. 76186418Ssam * NB: assumes the expansion bus is mapped. 77186418Ssam */ 78186418Ssamuint32_t 79186418Ssamixp4xx_read_feature_bits(void) 80186418Ssam{ 81186418Ssam uint32_t bits = ~IXPREG(IXP425_EXP_VBASE + EXP_FCTRL_OFFSET); 82186418Ssam bits &= ~EXP_FCTRL_RESVD; 83186418Ssam if (!cpu_is_ixp46x()) 84186418Ssam bits &= ~EXP_FCTRL_IXP46X_ONLY; 85186418Ssam return bits; 86186418Ssam} 87186418Ssam 88194319Ssamvoid 89194319Ssamixp4xx_write_feature_bits(uint32_t v) 90194319Ssam{ 91194319Ssam IXPREG(IXP425_EXP_VBASE + EXP_FCTRL_OFFSET) = ~v; 92194319Ssam} 93194319Ssam 94164426Ssamstruct arm32_dma_range * 95164426Ssambus_dma_get_range(void) 96164426Ssam{ 97164426Ssam return (NULL); 98164426Ssam} 99164426Ssam 100164426Ssamint 101164426Ssambus_dma_get_range_nb(void) 102164426Ssam{ 103164426Ssam return (0); 104164426Ssam} 105164426Ssam 106189633Ssamstatic const uint8_t int2gpio[32] __attribute__ ((aligned(32))) = { 107189633Ssam 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* INT#0 -> INT#5 */ 108189633Ssam 0x00, 0x01, /* GPIO#0 -> GPIO#1 */ 109189633Ssam 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* INT#8 -> INT#13 */ 110189633Ssam 0xff, 0xff, 0xff, 0xff, 0xff, /* INT#14 -> INT#18 */ 111189633Ssam 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, /* GPIO#2 -> GPIO#7 */ 112189633Ssam 0x08, 0x09, 0x0a, 0x0b, 0x0c, /* GPIO#8 -> GPIO#12 */ 113189633Ssam 0xff, 0xff /* INT#30 -> INT#31 */ 114189633Ssam}; 115189633Ssam 116194648Ssamstatic __inline uint32_t 117164426Ssamixp425_irq2gpio_bit(int irq) 118164426Ssam{ 119189633Ssam return (1U << int2gpio[irq]); 120189633Ssam} 121164426Ssam 122189633Ssam#ifdef DDB 123189633Ssam#include <ddb/ddb.h> 124189633Ssam 125189633SsamDB_SHOW_COMMAND(gpio, db_show_gpio) 126189633Ssam{ 127189633Ssam static const char *itype[8] = { 128189633Ssam [GPIO_TYPE_ACT_HIGH] = "act-high", 129189633Ssam [GPIO_TYPE_ACT_LOW] = "act-low", 130189633Ssam [GPIO_TYPE_EDG_RISING] = "edge-rising", 131189633Ssam [GPIO_TYPE_EDG_FALLING] = "edge-falling", 132189633Ssam [GPIO_TYPE_TRANSITIONAL]= "transitional", 133189633Ssam [5] = "type-5", [6] = "type-6", [7] = "type-7" 134164426Ssam }; 135189633Ssam uint32_t gpoutr = GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPOUTR); 136189633Ssam uint32_t gpoer = GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPOER); 137189633Ssam uint32_t gpinr = GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPINR); 138189633Ssam uint32_t gpit1r = GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPIT1R); 139189633Ssam uint32_t gpit2r = GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPIT2R); 140189633Ssam int i, j; 141164426Ssam 142194649Ssam db_printf("GPOUTR %08x GPINR %08x GPOER %08x GPISR %08x\n", 143194649Ssam gpoutr, gpinr, gpoer, 144189633Ssam GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPISR)); 145189633Ssam db_printf("GPIT1R %08x GPIT2R %08x GPCLKR %08x\n", 146189633Ssam gpit1r, gpit2r, GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPCLKR)); 147189633Ssam for (i = 0; i < 16; i++) { 148189633Ssam db_printf("[%2d] out %u in %u %-3s", i, 149189633Ssam (gpoutr>>i)&1, (gpinr>>i)&1, (gpoer>>i)&1 ? "in" : "out"); 150189633Ssam for (j = 0; j < 32; j++) 151189633Ssam if (int2gpio[j] == i) { 152189633Ssam db_printf(" irq %2u %s", j, itype[ 153189633Ssam (((i & 8) ? gpit2r : gpit1r) >> (3*(i&7))) 154189633Ssam & 7]); 155189633Ssam break; 156189633Ssam } 157189633Ssam db_printf("\n"); 158189633Ssam } 159164426Ssam} 160189633Ssam#endif 161164426Ssam 162194653Ssamvoid 163194653Ssamixp425_set_gpio(struct ixp425_softc *sc, int pin, int type) 164194653Ssam{ 165194653Ssam uint32_t gpiotr = GPIO_CONF_READ_4(sc, GPIO_TYPE_REG(pin)); 166194653Ssam 167194653Ssam /* clear interrupt type */ 168194653Ssam GPIO_CONF_WRITE_4(sc, GPIO_TYPE_REG(pin), 169194653Ssam gpiotr &~ GPIO_TYPE(pin, GPIO_TYPE_MASK)); 170194653Ssam /* clear any pending interrupt */ 171194653Ssam GPIO_CONF_WRITE_4(sc, IXP425_GPIO_GPISR, (1<<pin)); 172194653Ssam /* set new interrupt type */ 173194653Ssam GPIO_CONF_WRITE_4(sc, GPIO_TYPE_REG(pin), 174194653Ssam gpiotr | GPIO_TYPE(pin, type)); 175194653Ssam 176194653Ssam /* configure gpio line as an input */ 177194653Ssam GPIO_CONF_WRITE_4(sc, IXP425_GPIO_GPOER, 178194653Ssam GPIO_CONF_READ_4(sc, IXP425_GPIO_GPOER) | (1<<pin)); 179194653Ssam} 180194653Ssam 181194650Ssamstatic __inline void 182194650Ssamixp425_gpio_ack(int irq) 183194650Ssam{ 184194650Ssam if (irq < 32 && ((1 << irq) & IXP425_INT_GPIOMASK)) 185194650Ssam IXPREG(IXP425_GPIO_VBASE + IXP425_GPIO_GPISR) = 186194650Ssam ixp425_irq2gpio_bit(irq); 187194650Ssam} 188194650Ssam 189164426Ssamvoid 190164426Ssamarm_mask_irq(uintptr_t nb) 191164426Ssam{ 192182946Scognet int i; 193194651Ssam 194182946Scognet i = disable_interrupts(I32_bit); 195186352Ssam if (nb < 32) { 196186352Ssam intr_enabled &= ~(1 << nb); 197186352Ssam ixp425_set_intrmask(); 198186352Ssam } else { 199186352Ssam intr_enabled2 &= ~(1 << (nb - 32)); 200186352Ssam ixp435_set_intrmask(); 201186352Ssam } 202182946Scognet restore_interrupts(i); 203164426Ssam /*XXX; If it's a GPIO interrupt, ACK it know. Can it be a problem ?*/ 204194650Ssam ixp425_gpio_ack(nb); 205164426Ssam} 206164426Ssam 207164426Ssamvoid 208164426Ssamarm_unmask_irq(uintptr_t nb) 209164426Ssam{ 210182946Scognet int i; 211194651Ssam 212182946Scognet i = disable_interrupts(I32_bit); 213186352Ssam if (nb < 32) { 214186352Ssam intr_enabled |= (1 << nb); 215186352Ssam ixp425_set_intrmask(); 216186352Ssam } else { 217186352Ssam intr_enabled2 |= (1 << (nb - 32)); 218186352Ssam ixp435_set_intrmask(); 219186352Ssam } 220182946Scognet restore_interrupts(i); 221164426Ssam} 222164426Ssam 223164426Ssamstatic __inline uint32_t 224164426Ssamixp425_irq_read(void) 225164426Ssam{ 226164426Ssam return IXPREG(IXP425_INT_STATUS) & intr_enabled; 227164426Ssam} 228164426Ssam 229186352Ssamstatic __inline uint32_t 230186352Ssamixp435_irq_read(void) 231186352Ssam{ 232186352Ssam return IXPREG(IXP435_INT_STATUS2) & intr_enabled2; 233186352Ssam} 234186352Ssam 235164426Ssamint 236194652Ssamarm_get_next_irq(int last) 237164426Ssam{ 238194652Ssam uint32_t mask; 239164426Ssam 240194652Ssam last += 1; /* always advance fwd, NB: handles -1 */ 241194652Ssam if (last < 32) { 242194652Ssam mask = ixp425_irq_read() >> last; 243194652Ssam for (; mask != 0; mask >>= 1, last += 1) { 244194652Ssam if (mask & 1) 245194652Ssam return last; 246194652Ssam } 247194652Ssam last = 32; 248194652Ssam } 249194652Ssam if (cpu_is_ixp43x()) { 250194652Ssam mask = ixp435_irq_read() >> (32-last); 251194652Ssam for (; mask != 0; mask >>= 1, last++) { 252194652Ssam if (mask & 1) 253194652Ssam return last; 254194652Ssam } 255194652Ssam } 256194652Ssam return -1; 257164426Ssam} 258164426Ssam 259164426Ssamvoid 260164426Ssamcpu_reset(void) 261164426Ssam{ 262164426Ssam 263164426Ssam bus_space_write_4(&ixp425_bs_tag, IXP425_TIMER_VBASE, 264164426Ssam IXP425_OST_WDOG_KEY, OST_WDOG_KEY_MAJICK); 265164426Ssam bus_space_write_4(&ixp425_bs_tag, IXP425_TIMER_VBASE, 266164426Ssam IXP425_OST_WDOG, 0); 267164426Ssam bus_space_write_4(&ixp425_bs_tag, IXP425_TIMER_VBASE, 268164426Ssam IXP425_OST_WDOG_ENAB, OST_WDOG_ENAB_RST_ENA | 269164426Ssam OST_WDOG_ENAB_CNT_ENA); 270164426Ssam printf("Reset failed!\n"); 271164426Ssam for(;;); 272164426Ssam} 273164426Ssam 274164426Ssamstatic void 275164426Ssamixp425_identify(driver_t *driver, device_t parent) 276164426Ssam{ 277164426Ssam BUS_ADD_CHILD(parent, 0, "ixp", 0); 278164426Ssam} 279164426Ssam 280164426Ssamstatic int 281164426Ssamixp425_probe(device_t dev) 282164426Ssam{ 283186352Ssam device_set_desc(dev, "Intel IXP4XX"); 284164426Ssam return (0); 285164426Ssam} 286164426Ssam 287164426Ssamstatic int 288164426Ssamixp425_attach(device_t dev) 289164426Ssam{ 290164426Ssam struct ixp425_softc *sc; 291164426Ssam 292186418Ssam device_printf(dev, "%b\n", ixp4xx_read_feature_bits(), EXP_FCTRL_BITS); 293186418Ssam 294164426Ssam sc = device_get_softc(dev); 295164426Ssam sc->sc_iot = &ixp425_bs_tag; 296186352Ssam KASSERT(ixp425_softc == NULL, ("%s called twice?", __func__)); 297164426Ssam ixp425_softc = sc; 298164426Ssam 299164426Ssam intr_enabled = 0; 300164426Ssam ixp425_set_intrmask(); 301164426Ssam ixp425_set_intrsteer(); 302186352Ssam if (cpu_is_ixp43x()) { 303186352Ssam intr_enabled2 = 0; 304186352Ssam ixp435_set_intrmask(); 305186352Ssam ixp435_set_intrsteer(); 306186352Ssam } 307164426Ssam 308166064Scognet if (bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT, 309166064Scognet BUS_SPACE_MAXADDR, NULL, NULL, 0xffffffff, 0xff, 0xffffffff, 0, 310166064Scognet NULL, NULL, &sc->sc_dmat)) 311186352Ssam panic("%s: failed to create dma tag", __func__); 312166064Scognet 313164426Ssam sc->sc_irq_rman.rm_type = RMAN_ARRAY; 314186352Ssam sc->sc_irq_rman.rm_descr = "IXP4XX IRQs"; 315164426Ssam if (rman_init(&sc->sc_irq_rman) != 0 || 316186352Ssam rman_manage_region(&sc->sc_irq_rman, 0, cpu_is_ixp43x() ? 63 : 31) != 0) 317186352Ssam panic("%s: failed to set up IRQ rman", __func__); 318164426Ssam 319164426Ssam sc->sc_mem_rman.rm_type = RMAN_ARRAY; 320186352Ssam sc->sc_mem_rman.rm_descr = "IXP4XX Memory"; 321164426Ssam if (rman_init(&sc->sc_mem_rman) != 0 || 322164426Ssam rman_manage_region(&sc->sc_mem_rman, 0, ~0) != 0) 323186352Ssam panic("%s: failed to set up memory rman", __func__); 324164426Ssam 325169952Ssam BUS_ADD_CHILD(dev, 0, "pcib", 0); 326169952Ssam BUS_ADD_CHILD(dev, 0, "ixpclk", 0); 327169952Ssam BUS_ADD_CHILD(dev, 0, "ixpiic", 0); 328169952Ssam /* XXX move to hints? */ 329169952Ssam BUS_ADD_CHILD(dev, 0, "ixpwdog", 0); 330164426Ssam 331169952Ssam /* attach wired devices via hints */ 332169952Ssam bus_enumerate_hinted_children(dev); 333169952Ssam 334164426Ssam if (bus_space_map(sc->sc_iot, IXP425_GPIO_HWBASE, IXP425_GPIO_SIZE, 335164426Ssam 0, &sc->sc_gpio_ioh)) 336186352Ssam panic("%s: unable to map GPIO registers", __func__); 337164426Ssam if (bus_space_map(sc->sc_iot, IXP425_EXP_HWBASE, IXP425_EXP_SIZE, 338164426Ssam 0, &sc->sc_exp_ioh)) 339186352Ssam panic("%s: unable to map Expansion Bus registers", __func__); 340164426Ssam 341164426Ssam bus_generic_probe(dev); 342164426Ssam bus_generic_attach(dev); 343164426Ssam 344164426Ssam return (0); 345164426Ssam} 346164426Ssam 347169952Ssamstatic void 348169952Ssamixp425_hinted_child(device_t bus, const char *dname, int dunit) 349169952Ssam{ 350169952Ssam device_t child; 351169952Ssam struct ixp425_ivar *ivar; 352169952Ssam 353169952Ssam child = BUS_ADD_CHILD(bus, 0, dname, dunit); 354169952Ssam ivar = IXP425_IVAR(child); 355169952Ssam resource_int_value(dname, dunit, "addr", &ivar->addr); 356169952Ssam resource_int_value(dname, dunit, "irq", &ivar->irq); 357169952Ssam} 358169952Ssam 359169952Ssamstatic device_t 360169952Ssamixp425_add_child(device_t dev, int order, const char *name, int unit) 361169952Ssam{ 362169952Ssam device_t child; 363169952Ssam struct ixp425_ivar *ivar; 364169952Ssam 365169952Ssam child = device_add_child_ordered(dev, order, name, unit); 366169952Ssam if (child == NULL) 367169952Ssam return NULL; 368169952Ssam ivar = malloc(sizeof(struct ixp425_ivar), M_DEVBUF, M_NOWAIT); 369169952Ssam if (ivar == NULL) { 370169952Ssam device_delete_child(dev, child); 371169952Ssam return NULL; 372169952Ssam } 373169952Ssam ivar->addr = 0; 374169952Ssam ivar->irq = -1; 375169952Ssam device_set_ivars(child, ivar); 376169952Ssam return child; 377169952Ssam} 378169952Ssam 379169952Ssamstatic int 380194015Savgixp425_read_ivar(device_t bus, device_t child, int which, uintptr_t *result) 381169952Ssam{ 382169952Ssam struct ixp425_ivar *ivar = IXP425_IVAR(child); 383169952Ssam 384169952Ssam switch (which) { 385169952Ssam case IXP425_IVAR_ADDR: 386169952Ssam if (ivar->addr != 0) { 387169952Ssam *(uint32_t *)result = ivar->addr; 388169952Ssam return 0; 389169952Ssam } 390169952Ssam break; 391169952Ssam case IXP425_IVAR_IRQ: 392169952Ssam if (ivar->irq != -1) { 393169952Ssam *(int *)result = ivar->irq; 394169952Ssam return 0; 395169952Ssam } 396169952Ssam break; 397169952Ssam } 398169952Ssam return EINVAL; 399169952Ssam} 400169952Ssam 401186352Ssam/* 402189632Ssam * NB: This table handles P->V translations for regions setup with 403189632Ssam * static mappings in initarm. This is used solely for calls to 404189632Ssam * bus_alloc_resource_any; anything done with bus_space_map is 405189632Ssam * handled elsewhere and does not require an entry here. 406186352Ssam * 407189632Ssam * XXX this table is also used by uart_cpu_getdev via getvbase 408189632Ssam * (hence the public api) 409186352Ssam */ 410189632Ssamstruct hwvtrans { 411186352Ssam uint32_t hwbase; 412186352Ssam uint32_t size; 413186352Ssam uint32_t vbase; 414189632Ssam int isa4x; /* XXX needs special bus space tag */ 415186352Ssam}; 416186352Ssam 417189632Ssamstatic const struct hwvtrans * 418189632Ssamgethwvtrans(uint32_t hwbase, uint32_t size) 419186352Ssam{ 420189632Ssam static const struct hwvtrans hwvtrans[] = { 421189632Ssam /* NB: needed only for uart_cpu_getdev */ 422189632Ssam { .hwbase = IXP425_UART0_HWBASE, 423189632Ssam .size = IXP425_REG_SIZE, 424189632Ssam .vbase = IXP425_UART0_VBASE, 425189632Ssam .isa4x = 1 }, 426189632Ssam { .hwbase = IXP425_UART1_HWBASE, 427189632Ssam .size = IXP425_REG_SIZE, 428189632Ssam .vbase = IXP425_UART1_VBASE, 429189632Ssam .isa4x = 1 }, 430189632Ssam { .hwbase = IXP425_PCI_HWBASE, 431189632Ssam .size = IXP425_PCI_SIZE, 432189632Ssam .vbase = IXP425_PCI_VBASE }, 433189632Ssam { .hwbase = IXP425_PCI_MEM_HWBASE, 434189632Ssam .size = IXP425_PCI_MEM_SIZE, 435189632Ssam .vbase = IXP425_PCI_MEM_VBASE }, 436189632Ssam { .hwbase = IXP425_EXP_BUS_CS0_HWBASE, 437189632Ssam .size = IXP425_EXP_BUS_CS0_SIZE, 438189632Ssam .vbase = IXP425_EXP_BUS_CS0_VBASE }, 439189632Ssam /* NB: needed for ixp435 ehci controllers */ 440189632Ssam { .hwbase = IXP435_USB1_HWBASE, 441189632Ssam .size = IXP435_USB1_SIZE, 442189632Ssam .vbase = IXP435_USB1_VBASE }, 443189632Ssam { .hwbase = IXP435_USB2_HWBASE, 444189632Ssam .size = IXP435_USB2_SIZE, 445189632Ssam .vbase = IXP435_USB2_VBASE }, 446189632Ssam#ifdef CAMBRIA_GPS_VBASE 447189632Ssam { .hwbase = CAMBRIA_GPS_HWBASE, 448189632Ssam .size = CAMBRIA_GPS_SIZE, 449189632Ssam .vbase = CAMBRIA_GPS_VBASE }, 450189632Ssam#endif 451189632Ssam#ifdef CAMBRIA_RS485_VBASE 452189632Ssam { .hwbase = CAMBRIA_RS485_HWBASE, 453189632Ssam .size = CAMBRIA_RS485_SIZE, 454189632Ssam .vbase = CAMBRIA_RS485_VBASE }, 455189632Ssam#endif 456189632Ssam }; 457186352Ssam int i; 458186352Ssam 459186352Ssam for (i = 0; i < sizeof hwvtrans / sizeof *hwvtrans; i++) { 460186352Ssam if (hwbase >= hwvtrans[i].hwbase && 461189632Ssam hwbase + size <= hwvtrans[i].hwbase + hwvtrans[i].size) 462189632Ssam return &hwvtrans[i]; 463186352Ssam } 464189632Ssam return NULL; 465186352Ssam} 466186352Ssam 467189632Ssam/* XXX for uart_cpu_getdev */ 468189632Ssamint 469189632Ssamgetvbase(uint32_t hwbase, uint32_t size, uint32_t *vbase) 470189632Ssam{ 471189632Ssam const struct hwvtrans *hw; 472189632Ssam 473189632Ssam hw = gethwvtrans(hwbase, size); 474189632Ssam if (hw == NULL) 475189632Ssam return (ENOENT); 476189632Ssam *vbase = hwbase - hw->hwbase + hw->vbase; 477189632Ssam return (0); 478189632Ssam} 479189632Ssam 480164426Ssamstatic struct resource * 481164426Ssamixp425_alloc_resource(device_t dev, device_t child, int type, int *rid, 482164426Ssam u_long start, u_long end, u_long count, u_int flags) 483164426Ssam{ 484164426Ssam struct ixp425_softc *sc = device_get_softc(dev); 485189632Ssam const struct hwvtrans *vtrans; 486164426Ssam struct resource *rv; 487189632Ssam uint32_t addr; 488189630Ssam int needactivate = flags & RF_ACTIVE; 489169952Ssam int irq; 490164426Ssam 491189630Ssam flags &= ~RF_ACTIVE; 492164426Ssam switch (type) { 493164426Ssam case SYS_RES_IRQ: 494169952Ssam /* override per hints */ 495169952Ssam if (BUS_READ_IVAR(dev, child, IXP425_IVAR_IRQ, &irq) == 0) 496169952Ssam start = end = irq; 497189641Ssam rv = rman_reserve_resource(&sc->sc_irq_rman, start, end, count, 498189641Ssam flags, child); 499169952Ssam if (rv != NULL) 500169952Ssam rman_set_rid(rv, *rid); 501164426Ssam break; 502164426Ssam 503164426Ssam case SYS_RES_MEMORY: 504169952Ssam /* override per hints */ 505169952Ssam if (BUS_READ_IVAR(dev, child, IXP425_IVAR_ADDR, &addr) == 0) { 506169952Ssam start = addr; 507189632Ssam /* XXX use nominal window to check for mapping */ 508189632Ssam vtrans = gethwvtrans(start, 0x1000); 509189632Ssam if (vtrans != NULL) { 510189632Ssam /* 511189632Ssam * Assign the entire mapped region; this may 512189632Ssam * not be correct but without more info from 513189632Ssam * the caller we cannot tell. 514189632Ssam */ 515189632Ssam end = start + vtrans->size - 516189632Ssam (start - vtrans->hwbase); 517189632Ssam if (bootverbose) 518189632Ssam device_printf(child, 519189632Ssam "%s: assign 0x%lx:0x%lx%s\n", 520189632Ssam __func__, start, end - start, 521189632Ssam vtrans->isa4x ? " A4X" : ""); 522189632Ssam } 523189632Ssam } else 524189632Ssam vtrans = gethwvtrans(start, end - start); 525189632Ssam if (vtrans == NULL) { 526186352Ssam /* likely means above table needs to be updated */ 527189632Ssam device_printf(child, "%s: no mapping for 0x%lx:0x%lx\n", 528189641Ssam __func__, start, end - start); 529169952Ssam return NULL; 530186352Ssam } 531189641Ssam rv = rman_reserve_resource(&sc->sc_mem_rman, start, end, 532189641Ssam end - start, flags, child); 533189641Ssam if (rv == NULL) { 534189641Ssam device_printf(child, "%s: cannot reserve 0x%lx:0x%lx\n", 535189641Ssam __func__, start, end - start); 536189641Ssam return NULL; 537189641Ssam } 538189641Ssam rman_set_rid(rv, *rid); 539164426Ssam break; 540164426Ssam default: 541169952Ssam rv = NULL; 542169952Ssam break; 543164426Ssam } 544189630Ssam if (rv != NULL && needactivate) { 545189630Ssam if (bus_activate_resource(child, type, *rid, rv)) { 546189630Ssam rman_release_resource(rv); 547189630Ssam return (NULL); 548189630Ssam } 549189630Ssam } 550189630Ssam return (rv); 551164426Ssam} 552164426Ssam 553189630Ssamstatic int 554189641Ssamixp425_release_resource(device_t bus, device_t child, int type, int rid, 555189641Ssam struct resource *r) 556189641Ssam{ 557189641Ssam /* NB: no private resources, just release */ 558189641Ssam return rman_release_resource(r); 559189641Ssam} 560189641Ssam 561189641Ssamstatic int 562189630Ssamixp425_activate_resource(device_t dev, device_t child, int type, int rid, 563189630Ssam struct resource *r) 564189630Ssam{ 565189630Ssam struct ixp425_softc *sc = device_get_softc(dev); 566189632Ssam const struct hwvtrans *vtrans; 567189630Ssam 568189630Ssam if (type == SYS_RES_MEMORY) { 569189632Ssam vtrans = gethwvtrans(rman_get_start(r), rman_get_size(r)); 570189641Ssam if (vtrans == NULL) { /* NB: should not happen */ 571189641Ssam device_printf(child, "%s: no mapping for 0x%lx:0x%lx\n", 572189641Ssam __func__, rman_get_start(r), rman_get_size(r)); 573189632Ssam return (ENOENT); 574189641Ssam } 575189632Ssam if (vtrans->isa4x) 576189630Ssam rman_set_bustag(r, &ixp425_a4x_bs_tag); 577189630Ssam else 578189630Ssam rman_set_bustag(r, sc->sc_iot); 579189632Ssam rman_set_bushandle(r, vtrans->vbase); 580189630Ssam } 581189630Ssam return (rman_activate_resource(r)); 582189630Ssam} 583189630Ssam 584189641Ssamstatic int 585189641Ssamixp425_deactivate_resource(device_t bus, device_t child, int type, int rid, 586189641Ssam struct resource *r) 587189641Ssam{ 588189641Ssam /* NB: no private resources, just deactive */ 589189641Ssam return (rman_deactivate_resource(r)); 590189641Ssam} 591189641Ssam 592186352Ssamstatic __inline void 593186352Ssamget_masks(struct resource *res, uint32_t *mask, uint32_t *mask2) 594186352Ssam{ 595186352Ssam int i; 596186352Ssam 597186352Ssam *mask = 0; 598186352Ssam for (i = rman_get_start(res); i < 32 && i <= rman_get_end(res); i++) 599186352Ssam *mask |= 1 << i; 600186352Ssam *mask2 = 0; 601186352Ssam for (; i <= rman_get_end(res); i++) 602186352Ssam *mask2 |= 1 << (i - 32); 603186352Ssam} 604186352Ssam 605186352Ssamstatic __inline void 606186352Ssamupdate_masks(uint32_t mask, uint32_t mask2) 607186352Ssam{ 608186352Ssam 609186352Ssam intr_enabled = mask; 610186352Ssam ixp425_set_intrmask(); 611186352Ssam if (cpu_is_ixp43x()) { 612186352Ssam intr_enabled2 = mask2; 613186352Ssam ixp435_set_intrmask(); 614186352Ssam } 615186352Ssam} 616186352Ssam 617164426Ssamstatic int 618164426Ssamixp425_setup_intr(device_t dev, device_t child, 619186352Ssam struct resource *res, int flags, driver_filter_t *filt, 620166901Spiso driver_intr_t *intr, void *arg, void **cookiep) 621164426Ssam{ 622186352Ssam uint32_t mask, mask2; 623164426Ssam 624186352Ssam BUS_SETUP_INTR(device_get_parent(dev), child, res, flags, filt, intr, 625166901Spiso arg, cookiep); 626164426Ssam 627186352Ssam get_masks(res, &mask, &mask2); 628186352Ssam update_masks(intr_enabled | mask, intr_enabled2 | mask2); 629164426Ssam 630164426Ssam return (0); 631164426Ssam} 632164426Ssam 633164426Ssamstatic int 634164426Ssamixp425_teardown_intr(device_t dev, device_t child, struct resource *res, 635164426Ssam void *cookie) 636164426Ssam{ 637186352Ssam uint32_t mask, mask2; 638164426Ssam 639186352Ssam get_masks(res, &mask, &mask2); 640186352Ssam update_masks(intr_enabled &~ mask, intr_enabled2 &~ mask2); 641164426Ssam 642164426Ssam return (BUS_TEARDOWN_INTR(device_get_parent(dev), child, res, cookie)); 643164426Ssam} 644164426Ssam 645164426Ssamstatic device_method_t ixp425_methods[] = { 646164426Ssam /* Device interface */ 647189641Ssam DEVMETHOD(device_probe, ixp425_probe), 648189641Ssam DEVMETHOD(device_attach, ixp425_attach), 649189641Ssam DEVMETHOD(device_identify, ixp425_identify), 650164426Ssam 651164426Ssam /* Bus interface */ 652189641Ssam DEVMETHOD(bus_add_child, ixp425_add_child), 653189641Ssam DEVMETHOD(bus_hinted_child, ixp425_hinted_child), 654189641Ssam DEVMETHOD(bus_read_ivar, ixp425_read_ivar), 655169952Ssam 656189641Ssam DEVMETHOD(bus_alloc_resource, ixp425_alloc_resource), 657189641Ssam DEVMETHOD(bus_release_resource, ixp425_release_resource), 658189641Ssam DEVMETHOD(bus_activate_resource, ixp425_activate_resource), 659189641Ssam DEVMETHOD(bus_deactivate_resource, ixp425_deactivate_resource), 660189641Ssam DEVMETHOD(bus_setup_intr, ixp425_setup_intr), 661189641Ssam DEVMETHOD(bus_teardown_intr, ixp425_teardown_intr), 662164426Ssam 663164426Ssam {0, 0}, 664164426Ssam}; 665164426Ssam 666164426Ssamstatic driver_t ixp425_driver = { 667164426Ssam "ixp", 668164426Ssam ixp425_methods, 669164426Ssam sizeof(struct ixp425_softc), 670164426Ssam}; 671164426Ssamstatic devclass_t ixp425_devclass; 672164426Ssam 673164426SsamDRIVER_MODULE(ixp, nexus, ixp425_driver, ixp425_devclass, 0, 0); 674