crb_machdep.c revision 258412
1171626Scognet/*	$NetBSD: hpc_machdep.c,v 1.70 2003/09/16 08:18:22 agc Exp $	*/
2171626Scognet
3171626Scognet/*-
4171626Scognet * Copyright (c) 1994-1998 Mark Brinicombe.
5171626Scognet * Copyright (c) 1994 Brini.
6171626Scognet * All rights reserved.
7171626Scognet *
8171626Scognet * This code is derived from software written for Brini by Mark Brinicombe
9171626Scognet *
10171626Scognet * Redistribution and use in source and binary forms, with or without
11171626Scognet * modification, are permitted provided that the following conditions
12171626Scognet * are met:
13171626Scognet * 1. Redistributions of source code must retain the above copyright
14171626Scognet *    notice, this list of conditions and the following disclaimer.
15171626Scognet * 2. Redistributions in binary form must reproduce the above copyright
16171626Scognet *    notice, this list of conditions and the following disclaimer in the
17171626Scognet *    documentation and/or other materials provided with the distribution.
18171626Scognet * 3. All advertising materials mentioning features or use of this software
19171626Scognet *    must display the following acknowledgement:
20171626Scognet *      This product includes software developed by Brini.
21171626Scognet * 4. The name of the company nor the name of the author may be used to
22171626Scognet *    endorse or promote products derived from this software without specific
23171626Scognet *    prior written permission.
24171626Scognet *
25171626Scognet * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
26171626Scognet * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
27171626Scognet * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28171626Scognet * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
29171626Scognet * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
30171626Scognet * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
31171626Scognet * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32171626Scognet * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33171626Scognet * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34171626Scognet * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35171626Scognet * SUCH DAMAGE.
36171626Scognet *
37171626Scognet * RiscBSD kernel project
38171626Scognet *
39171626Scognet * machdep.c
40171626Scognet *
41171626Scognet * Machine dependant functions for kernel setup
42171626Scognet *
43236987Simp * This file needs a lot of work.
44171626Scognet *
45171626Scognet * Created      : 17/09/94
46171626Scognet */
47171626Scognet
48171626Scognet#include <sys/cdefs.h>
49171626Scognet__FBSDID("$FreeBSD: head/sys/arm/xscale/i8134x/crb_machdep.c 258412 2013-11-21 01:08:10Z ian $");
50171626Scognet
51171626Scognet#define _ARM32_BUS_DMA_PRIVATE
52171626Scognet#include <sys/param.h>
53171626Scognet#include <sys/systm.h>
54171626Scognet#include <sys/sysproto.h>
55171626Scognet#include <sys/signalvar.h>
56171626Scognet#include <sys/imgact.h>
57171626Scognet#include <sys/kernel.h>
58171626Scognet#include <sys/ktr.h>
59171626Scognet#include <sys/linker.h>
60171626Scognet#include <sys/lock.h>
61171626Scognet#include <sys/malloc.h>
62171626Scognet#include <sys/mutex.h>
63171626Scognet#include <sys/pcpu.h>
64171626Scognet#include <sys/proc.h>
65171626Scognet#include <sys/ptrace.h>
66171626Scognet#include <sys/cons.h>
67171626Scognet#include <sys/bio.h>
68171626Scognet#include <sys/bus.h>
69171626Scognet#include <sys/buf.h>
70171626Scognet#include <sys/exec.h>
71171626Scognet#include <sys/kdb.h>
72171626Scognet#include <sys/msgbuf.h>
73171626Scognet#include <machine/reg.h>
74171626Scognet#include <machine/cpu.h>
75171626Scognet
76171626Scognet#include <vm/vm.h>
77171626Scognet#include <vm/pmap.h>
78171626Scognet#include <vm/vm_object.h>
79171626Scognet#include <vm/vm_page.h>
80171626Scognet#include <vm/vm_map.h>
81257660Sian#include <machine/devmap.h>
82171626Scognet#include <machine/vmparam.h>
83171626Scognet#include <machine/pcb.h>
84171626Scognet#include <machine/undefined.h>
85171626Scognet#include <machine/machdep.h>
86171626Scognet#include <machine/metadata.h>
87171626Scognet#include <machine/armreg.h>
88171626Scognet#include <machine/bus.h>
89171626Scognet#include <sys/reboot.h>
90171626Scognet
91171626Scognet
92171626Scognet#include <arm/xscale/i80321/i80321var.h> /* For i80321_calibrate_delay() */
93171626Scognet
94171626Scognet#include <arm/xscale/i8134x/i81342reg.h>
95171626Scognet#include <arm/xscale/i8134x/i81342var.h>
96171626Scognet#include <arm/xscale/i8134x/obiovar.h>
97171626Scognet
98171626Scognet
99171626Scognet#define KERNEL_PT_SYS		0	/* Page table for mapping proc0 zero page */
100171626Scognet#define	KERNEL_PT_IOPXS		1
101171626Scognet#define KERNEL_PT_BEFOREKERN	2
102171626Scognet#define KERNEL_PT_AFKERNEL	3	/* L2 table for mapping after kernel */
103171626Scognet#define	KERNEL_PT_AFKERNEL_NUM	9
104171626Scognet
105171626Scognet/* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */
106171626Scognet#define NUM_KERNEL_PTS		(KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM)
107171626Scognet
108171626Scognetextern u_int data_abort_handler_address;
109171626Scognetextern u_int prefetch_abort_handler_address;
110171626Scognetextern u_int undefined_handler_address;
111171626Scognet
112171626Scognetstruct pv_addr kernel_pt_table[NUM_KERNEL_PTS];
113171626Scognet
114171626Scognet/* Physical and virtual addresses for some global pages */
115171626Scognet
116171626Scognetvm_paddr_t phys_avail[10];
117171626Scognetvm_paddr_t dump_avail[4];
118171626Scognet
119171626Scognetstruct pv_addr systempage;
120171626Scognetstruct pv_addr msgbufpv;
121171626Scognetstruct pv_addr irqstack;
122171626Scognetstruct pv_addr undstack;
123171626Scognetstruct pv_addr abtstack;
124171626Scognetstruct pv_addr kernelstack;
125171626Scognet
126171626Scognet/* Static device mappings. */
127257660Sianstatic const struct arm_devmap_entry iq81342_devmap[] = {
128171626Scognet	    {
129171626Scognet		    IOP34X_VADDR,
130171626Scognet		    IOP34X_HWADDR,
131171626Scognet		    IOP34X_SIZE,
132171626Scognet		    VM_PROT_READ|VM_PROT_WRITE,
133171626Scognet		    PTE_NOCACHE,
134171626Scognet	    },
135171626Scognet	    {
136171626Scognet		    /*
137171626Scognet		     * Cheat and map a whole section, this will bring
138171626Scognet		     * both PCI-X and PCI-E outbound I/O
139171626Scognet		     */
140171626Scognet		    IOP34X_PCIX_OIOBAR_VADDR &~ (0x100000 - 1),
141171626Scognet		    IOP34X_PCIX_OIOBAR &~ (0x100000 - 1),
142171626Scognet		    0x100000,
143171626Scognet		    VM_PROT_READ|VM_PROT_WRITE,
144171626Scognet		    PTE_NOCACHE,
145171626Scognet	    },
146172297Scognet	    {
147172297Scognet		    IOP34X_PCE1_VADDR,
148172297Scognet		    IOP34X_PCE1,
149172297Scognet		    IOP34X_PCE1_SIZE,
150172297Scognet		    VM_PROT_READ|VM_PROT_WRITE,
151172297Scognet		    PTE_NOCACHE,
152172297Scognet	    },
153236987Simp	    {
154171626Scognet		    0,
155171626Scognet		    0,
156171626Scognet		    0,
157171626Scognet		    0,
158171626Scognet		    0,
159171626Scognet	    }
160171626Scognet};
161171626Scognet
162171626Scognet#define SDRAM_START 0x00000000
163171626Scognet
164171626Scognetextern vm_offset_t xscale_cache_clean_addr;
165171626Scognet
166171626Scognetvoid *
167236524Simpinitarm(struct arm_boot_params *abp)
168171626Scognet{
169171626Scognet	struct pv_addr  kernel_l1pt;
170194784Sjeff	struct pv_addr  dpcpu;
171177883Simp	int loop, i;
172171626Scognet	u_int l1pagetable;
173171626Scognet	vm_offset_t freemempos;
174171626Scognet	vm_offset_t freemem_pt;
175171626Scognet	vm_offset_t afterkern;
176171626Scognet	vm_offset_t freemem_after;
177171626Scognet	vm_offset_t lastaddr;
178171626Scognet	uint32_t memsize, memstart;
179171626Scognet
180237040Simp	lastaddr = parse_boot_param(abp);
181171626Scognet	set_cpufuncs();
182171626Scognet	pcpu_init(pcpup, 0, sizeof(struct pcpu));
183171626Scognet	PCPU_SET(curthread, &thread0);
184171626Scognet
185220836Spluknet	/* Do basic tuning, hz etc */
186220836Spluknet	init_param1();
187220836Spluknet
188171626Scognet	freemempos = 0x00200000;
189171626Scognet	/* Define a macro to simplify memory allocation */
190171626Scognet#define	valloc_pages(var, np)			\
191171626Scognet	alloc_pages((var).pv_pa, (np));		\
192171626Scognet	(var).pv_va = (var).pv_pa + 0xc0000000;
193171626Scognet
194171626Scognet#define alloc_pages(var, np)			\
195171626Scognet	freemempos -= (np * PAGE_SIZE);		\
196171626Scognet	(var) = freemempos;		\
197171626Scognet	memset((char *)(var), 0, ((np) * PAGE_SIZE));
198171626Scognet
199171626Scognet	while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
200171626Scognet		freemempos -= PAGE_SIZE;
201171626Scognet	valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
202171626Scognet	for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
203171626Scognet		if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
204171626Scognet			valloc_pages(kernel_pt_table[loop],
205171626Scognet			    L2_TABLE_SIZE / PAGE_SIZE);
206171626Scognet		} else {
207171626Scognet			kernel_pt_table[loop].pv_pa = freemempos +
208171626Scognet			    (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) *
209171626Scognet			    L2_TABLE_SIZE_REAL;
210236987Simp			kernel_pt_table[loop].pv_va =
211171626Scognet			    kernel_pt_table[loop].pv_pa + 0xc0000000;
212171626Scognet		}
213171626Scognet	}
214171626Scognet	freemem_pt = freemempos;
215171626Scognet	freemempos = 0x00100000;
216171626Scognet	/*
217171626Scognet	 * Allocate a page for the system page mapped to V0x00000000
218171626Scognet	 * This page will just contain the system vectors and can be
219171626Scognet	 * shared by all processes.
220171626Scognet	 */
221171626Scognet	valloc_pages(systempage, 1);
222171626Scognet
223194784Sjeff	/* Allocate dynamic per-cpu area. */
224194784Sjeff	valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
225194784Sjeff	dpcpu_init((void *)dpcpu.pv_va, 0);
226194784Sjeff
227171626Scognet	/* Allocate stacks for all modes */
228171626Scognet	valloc_pages(irqstack, IRQ_STACK_SIZE);
229171626Scognet	valloc_pages(abtstack, ABT_STACK_SIZE);
230171626Scognet	valloc_pages(undstack, UND_STACK_SIZE);
231171626Scognet	valloc_pages(kernelstack, KSTACK_PAGES);
232217688Spluknet	valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
233171626Scognet#ifdef ARM_USE_SMALL_ALLOC
234171626Scognet	freemempos -= PAGE_SIZE;
235171626Scognet	freemem_pt = trunc_page(freemem_pt);
236171626Scognet	freemem_after = freemempos - ((freemem_pt - 0x00100000) /
237171626Scognet	    PAGE_SIZE) * sizeof(struct arm_small_page);
238171626Scognet	arm_add_smallalloc_pages((void *)(freemem_after + 0xc0000000)
239171626Scognet	    , (void *)0xc0100000, freemem_pt - 0x00100000, 1);
240171626Scognet	freemem_after -= ((freemem_after - 0x00001000) / PAGE_SIZE) *
241171626Scognet	    sizeof(struct arm_small_page);
242171626Scognet#if 0
243171626Scognet	arm_add_smallalloc_pages((void *)(freemem_after + 0xc0000000)
244171626Scognet	, (void *)0xc0001000, trunc_page(freemem_after) - 0x00001000, 0);
245171626Scognet#endif
246171626Scognet	freemempos = trunc_page(freemem_after);
247171626Scognet	freemempos -= PAGE_SIZE;
248171626Scognet#endif
249171626Scognet	/*
250171626Scognet	 * Now we start construction of the L1 page table
251171626Scognet	 * We start by mapping the L2 page tables into the L1.
252171626Scognet	 * This means that we can replace L1 mappings later on if necessary
253171626Scognet	 */
254171626Scognet	l1pagetable = kernel_l1pt.pv_va;
255171626Scognet
256171626Scognet	/* Map the L2 pages tables in the L1 page table */
257171626Scognet	pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00100000 - 1),
258171626Scognet	    &kernel_pt_table[KERNEL_PT_SYS]);
259171626Scognet	pmap_map_chunk(l1pagetable, KERNBASE, SDRAM_START, 0x100000,
260171626Scognet	    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
261171626Scognet
262171626Scognet	pmap_map_chunk(l1pagetable, KERNBASE + 0x100000, SDRAM_START + 0x100000,
263171626Scognet	    0x100000, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
264171626Scognet
265171626Scognet	pmap_map_chunk(l1pagetable, KERNBASE + 0x200000, SDRAM_START + 0x200000,
266171626Scognet	   (((uint32_t)(lastaddr) - KERNBASE - 0x200000) + L1_S_SIZE) & ~(L1_S_SIZE - 1),
267171626Scognet	    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
268171626Scognet	freemem_after = ((int)lastaddr + PAGE_SIZE) & ~(PAGE_SIZE - 1);
269236987Simp	afterkern = round_page(((vm_offset_t)lastaddr + L1_S_SIZE) & ~(L1_S_SIZE
270171626Scognet	    - 1));
271171626Scognet	for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) {
272171626Scognet		pmap_link_l2pt(l1pagetable, afterkern + i * 0x00100000,
273171626Scognet		    &kernel_pt_table[KERNEL_PT_AFKERNEL + i]);
274171626Scognet	}
275171626Scognet
276171626Scognet
277171626Scognet#ifdef ARM_USE_SMALL_ALLOC
278171626Scognet	if ((freemem_after + 2 * PAGE_SIZE) <= afterkern) {
279171626Scognet		arm_add_smallalloc_pages((void *)(freemem_after),
280171626Scognet		    (void*)(freemem_after + PAGE_SIZE),
281171626Scognet		    afterkern - (freemem_after + PAGE_SIZE), 0);
282236987Simp
283171626Scognet	}
284171626Scognet#endif
285171626Scognet
286171626Scognet	/* Map the vector page. */
287171626Scognet	pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
288171626Scognet	    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
289257660Sian	arm_devmap_bootstrap(l1pagetable, iq81342_devmap);
290171626Scognet	/*
291171626Scognet	 * Give the XScale global cache clean code an appropriately
292171626Scognet	 * sized chunk of unmapped VA space starting at 0xff000000
293171626Scognet	 * (our device mappings end before this address).
294171626Scognet	 */
295171626Scognet	xscale_cache_clean_addr = 0xff000000U;
296171626Scognet
297171626Scognet	cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
298171626Scognet	setttb(kernel_l1pt.pv_pa);
299171626Scognet	cpu_tlb_flushID();
300171626Scognet	cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
301171626Scognet	/*
302171626Scognet	 * Pages were allocated during the secondary bootstrap for the
303171626Scognet	 * stacks for different CPU modes.
304171626Scognet	 * We must now set the r13 registers in the different CPU modes to
305171626Scognet	 * point to these stacks.
306171626Scognet	 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
307171626Scognet	 * of the stack memory.
308171626Scognet	 */
309171626Scognet
310240802Sandrew	set_stackptrs(0);
311171626Scognet
312171626Scognet	/*
313171626Scognet	 * We must now clean the cache again....
314171626Scognet	 * Cleaning may be done by reading new data to displace any
315171626Scognet	 * dirty data in the cache. This will have happened in setttb()
316171626Scognet	 * but since we are boot strapping the addresses used for the read
317171626Scognet	 * may have just been remapped and thus the cache could be out
318171626Scognet	 * of sync. A re-clean after the switch will cure this.
319185513Sstas	 * After booting there are no gross relocations of the kernel thus
320171626Scognet	 * this problem will not occur after initarm().
321171626Scognet	 */
322171626Scognet	cpu_idcache_wbinv_all();
323258412Sian	cpu_setup("");
324258412Sian
325171626Scognet	i80321_calibrate_delay();
326171626Scognet	i81342_sdram_bounds(&obio_bs_tag, IOP34X_VADDR, &memstart, &memsize);
327171626Scognet	physmem = memsize / PAGE_SIZE;
328171626Scognet	cninit();
329171626Scognet	/* Set stack for exception handlers */
330171626Scognet
331171626Scognet	data_abort_handler_address = (u_int)data_abort_handler;
332171626Scognet	prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
333171626Scognet	undefined_handler_address = (u_int)undefinedinstruction_bounce;
334171626Scognet	undefined_init();
335171626Scognet
336236828Sandrew	init_proc0(kernelstack.pv_va);
337171626Scognet
338171626Scognet	arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
339171626Scognet
340171626Scognet	pmap_curmaxkvaddr = afterkern + PAGE_SIZE;
341171626Scognet	/*
342171626Scognet	 * ARM_USE_SMALL_ALLOC uses dump_avail, so it must be filled before
343171626Scognet	 * calling pmap_bootstrap.
344171626Scognet	 */
345171626Scognet	dump_avail[0] = 0x00000000;
346171626Scognet	dump_avail[1] = 0x00000000 + memsize;
347171626Scognet	dump_avail[2] = 0;
348171626Scognet	dump_avail[3] = 0;
349171626Scognet
350256712Scognet	vm_max_kernel_address = 0xe0000000;
351247046Salc	pmap_bootstrap(pmap_curmaxkvaddr, &kernel_l1pt);
352171626Scognet	msgbufp = (void*)msgbufpv.pv_va;
353217688Spluknet	msgbufinit(msgbufp, msgbufsize);
354171626Scognet	mutex_init();
355171626Scognet
356171626Scognet	i = 0;
357171626Scognet#ifdef ARM_USE_SMALL_ALLOC
358232295Scognet	phys_avail[i++] = 0x00001000;
359232295Scognet	phys_avail[i++] = 0x00002000; 	/*
360171626Scognet					 *XXX: Gross hack to get our
361171626Scognet					 * pages in the vm_page_array
362171626Scognet					 . */
363171626Scognet#endif
364171626Scognet	phys_avail[i++] = round_page(virtual_avail - KERNBASE + SDRAM_START);
365171626Scognet	phys_avail[i++] = trunc_page(0x00000000 + memsize - 1);
366171626Scognet	phys_avail[i++] = 0;
367171626Scognet	phys_avail[i] = 0;
368171626Scognet
369171626Scognet	init_param2(physmem);
370171626Scognet	kdb_init();
371171626Scognet	return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
372171626Scognet	    sizeof(struct pcb)));
373171626Scognet}
374