crb_machdep.c revision 177883
1171626Scognet/* $NetBSD: hpc_machdep.c,v 1.70 2003/09/16 08:18:22 agc Exp $ */ 2171626Scognet 3171626Scognet/*- 4171626Scognet * Copyright (c) 1994-1998 Mark Brinicombe. 5171626Scognet * Copyright (c) 1994 Brini. 6171626Scognet * All rights reserved. 7171626Scognet * 8171626Scognet * This code is derived from software written for Brini by Mark Brinicombe 9171626Scognet * 10171626Scognet * Redistribution and use in source and binary forms, with or without 11171626Scognet * modification, are permitted provided that the following conditions 12171626Scognet * are met: 13171626Scognet * 1. Redistributions of source code must retain the above copyright 14171626Scognet * notice, this list of conditions and the following disclaimer. 15171626Scognet * 2. Redistributions in binary form must reproduce the above copyright 16171626Scognet * notice, this list of conditions and the following disclaimer in the 17171626Scognet * documentation and/or other materials provided with the distribution. 18171626Scognet * 3. All advertising materials mentioning features or use of this software 19171626Scognet * must display the following acknowledgement: 20171626Scognet * This product includes software developed by Brini. 21171626Scognet * 4. The name of the company nor the name of the author may be used to 22171626Scognet * endorse or promote products derived from this software without specific 23171626Scognet * prior written permission. 24171626Scognet * 25171626Scognet * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 26171626Scognet * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 27171626Scognet * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28171626Scognet * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 29171626Scognet * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 30171626Scognet * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31171626Scognet * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32171626Scognet * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33171626Scognet * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34171626Scognet * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35171626Scognet * SUCH DAMAGE. 36171626Scognet * 37171626Scognet * RiscBSD kernel project 38171626Scognet * 39171626Scognet * machdep.c 40171626Scognet * 41171626Scognet * Machine dependant functions for kernel setup 42171626Scognet * 43171626Scognet * This file needs a lot of work. 44171626Scognet * 45171626Scognet * Created : 17/09/94 46171626Scognet */ 47171626Scognet 48171626Scognet#include "opt_msgbuf.h" 49171626Scognet 50171626Scognet#include <sys/cdefs.h> 51171626Scognet__FBSDID("$FreeBSD: head/sys/arm/xscale/i8134x/crb_machdep.c 177883 2008-04-03 16:44:50Z imp $"); 52171626Scognet 53171626Scognet#define _ARM32_BUS_DMA_PRIVATE 54171626Scognet#include <sys/param.h> 55171626Scognet#include <sys/systm.h> 56171626Scognet#include <sys/sysproto.h> 57171626Scognet#include <sys/signalvar.h> 58171626Scognet#include <sys/imgact.h> 59171626Scognet#include <sys/kernel.h> 60171626Scognet#include <sys/ktr.h> 61171626Scognet#include <sys/linker.h> 62171626Scognet#include <sys/lock.h> 63171626Scognet#include <sys/malloc.h> 64171626Scognet#include <sys/mutex.h> 65171626Scognet#include <sys/pcpu.h> 66171626Scognet#include <sys/proc.h> 67171626Scognet#include <sys/ptrace.h> 68171626Scognet#include <sys/cons.h> 69171626Scognet#include <sys/bio.h> 70171626Scognet#include <sys/bus.h> 71171626Scognet#include <sys/buf.h> 72171626Scognet#include <sys/exec.h> 73171626Scognet#include <sys/kdb.h> 74171626Scognet#include <sys/msgbuf.h> 75171626Scognet#include <machine/reg.h> 76171626Scognet#include <machine/cpu.h> 77171626Scognet 78171626Scognet#include <vm/vm.h> 79171626Scognet#include <vm/pmap.h> 80171626Scognet#include <vm/vm.h> 81171626Scognet#include <vm/vm_object.h> 82171626Scognet#include <vm/vm_page.h> 83171626Scognet#include <vm/vm_pager.h> 84171626Scognet#include <vm/vm_map.h> 85171626Scognet#include <vm/vnode_pager.h> 86171626Scognet#include <machine/pmap.h> 87171626Scognet#include <machine/vmparam.h> 88171626Scognet#include <machine/pcb.h> 89171626Scognet#include <machine/undefined.h> 90171626Scognet#include <machine/machdep.h> 91171626Scognet#include <machine/metadata.h> 92171626Scognet#include <machine/armreg.h> 93171626Scognet#include <machine/bus.h> 94171626Scognet#include <sys/reboot.h> 95171626Scognet 96171626Scognet 97171626Scognet#include <arm/xscale/i80321/i80321var.h> /* For i80321_calibrate_delay() */ 98171626Scognet 99171626Scognet#include <arm/xscale/i8134x/i81342reg.h> 100171626Scognet#include <arm/xscale/i8134x/i81342var.h> 101171626Scognet#include <arm/xscale/i8134x/obiovar.h> 102171626Scognet 103171626Scognet 104171626Scognet#define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */ 105171626Scognet#define KERNEL_PT_IOPXS 1 106171626Scognet#define KERNEL_PT_BEFOREKERN 2 107171626Scognet#define KERNEL_PT_AFKERNEL 3 /* L2 table for mapping after kernel */ 108171626Scognet#define KERNEL_PT_AFKERNEL_NUM 9 109171626Scognet 110171626Scognet/* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */ 111171626Scognet#define NUM_KERNEL_PTS (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM) 112171626Scognet 113171626Scognet/* Define various stack sizes in pages */ 114171626Scognet#define IRQ_STACK_SIZE 1 115171626Scognet#define ABT_STACK_SIZE 1 116171626Scognet#ifdef IPKDB 117171626Scognet#define UND_STACK_SIZE 2 118171626Scognet#else 119171626Scognet#define UND_STACK_SIZE 1 120171626Scognet#endif 121171626Scognet 122171626Scognetextern u_int data_abort_handler_address; 123171626Scognetextern u_int prefetch_abort_handler_address; 124171626Scognetextern u_int undefined_handler_address; 125171626Scognet 126171626Scognetstruct pv_addr kernel_pt_table[NUM_KERNEL_PTS]; 127171626Scognetextern vm_offset_t sa1_cache_clean_addr; 128171626Scognetextern int *end; 129171626Scognet 130171626Scognetstruct pcpu __pcpu; 131171626Scognetstruct pcpu *pcpup = &__pcpu; 132171626Scognet 133171626Scognet/* Physical and virtual addresses for some global pages */ 134171626Scognet 135171626Scognetvm_paddr_t phys_avail[10]; 136171626Scognetvm_paddr_t dump_avail[4]; 137171626Scognetvm_offset_t physical_pages; 138171626Scognetvm_offset_t clean_sva, clean_eva; 139171626Scognet 140171626Scognetstruct pv_addr systempage; 141171626Scognetstruct pv_addr msgbufpv; 142171626Scognetstruct pv_addr irqstack; 143171626Scognetstruct pv_addr undstack; 144171626Scognetstruct pv_addr abtstack; 145171626Scognetstruct pv_addr kernelstack; 146171626Scognet 147171626Scognetstatic struct trapframe proc0_tf; 148171626Scognet 149171626Scognet/* Static device mappings. */ 150171626Scognetstatic const struct pmap_devmap iq81342_devmap[] = { 151171626Scognet { 152171626Scognet IOP34X_VADDR, 153171626Scognet IOP34X_HWADDR, 154171626Scognet IOP34X_SIZE, 155171626Scognet VM_PROT_READ|VM_PROT_WRITE, 156171626Scognet PTE_NOCACHE, 157171626Scognet }, 158171626Scognet { 159171626Scognet /* 160171626Scognet * Cheat and map a whole section, this will bring 161171626Scognet * both PCI-X and PCI-E outbound I/O 162171626Scognet */ 163171626Scognet IOP34X_PCIX_OIOBAR_VADDR &~ (0x100000 - 1), 164171626Scognet IOP34X_PCIX_OIOBAR &~ (0x100000 - 1), 165171626Scognet 0x100000, 166171626Scognet VM_PROT_READ|VM_PROT_WRITE, 167171626Scognet PTE_NOCACHE, 168171626Scognet }, 169172297Scognet { 170172297Scognet IOP34X_PCE1_VADDR, 171172297Scognet IOP34X_PCE1, 172172297Scognet IOP34X_PCE1_SIZE, 173172297Scognet VM_PROT_READ|VM_PROT_WRITE, 174172297Scognet PTE_NOCACHE, 175172297Scognet }, 176171626Scognet { 177171626Scognet 0, 178171626Scognet 0, 179171626Scognet 0, 180171626Scognet 0, 181171626Scognet 0, 182171626Scognet } 183171626Scognet}; 184171626Scognet 185171626Scognet#define SDRAM_START 0x00000000 186171626Scognet 187171626Scognetextern vm_offset_t xscale_cache_clean_addr; 188171626Scognet 189171626Scognetvoid * 190171626Scognetinitarm(void *arg, void *arg2) 191171626Scognet{ 192171626Scognet struct pv_addr kernel_l1pt; 193177883Simp int loop, i; 194171626Scognet u_int l1pagetable; 195171626Scognet vm_offset_t freemempos; 196171626Scognet vm_offset_t freemem_pt; 197171626Scognet vm_offset_t afterkern; 198171626Scognet vm_offset_t freemem_after; 199171626Scognet vm_offset_t lastaddr; 200171626Scognet uint32_t memsize, memstart; 201171626Scognet 202171626Scognet set_cpufuncs(); 203177883Simp lastaddr = fake_preload_metadata(); 204171626Scognet pcpu_init(pcpup, 0, sizeof(struct pcpu)); 205171626Scognet PCPU_SET(curthread, &thread0); 206171626Scognet 207171626Scognet freemempos = 0x00200000; 208171626Scognet /* Define a macro to simplify memory allocation */ 209171626Scognet#define valloc_pages(var, np) \ 210171626Scognet alloc_pages((var).pv_pa, (np)); \ 211171626Scognet (var).pv_va = (var).pv_pa + 0xc0000000; 212171626Scognet 213171626Scognet#define alloc_pages(var, np) \ 214171626Scognet freemempos -= (np * PAGE_SIZE); \ 215171626Scognet (var) = freemempos; \ 216171626Scognet memset((char *)(var), 0, ((np) * PAGE_SIZE)); 217171626Scognet 218171626Scognet while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0) 219171626Scognet freemempos -= PAGE_SIZE; 220171626Scognet valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 221171626Scognet for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 222171626Scognet if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) { 223171626Scognet valloc_pages(kernel_pt_table[loop], 224171626Scognet L2_TABLE_SIZE / PAGE_SIZE); 225171626Scognet } else { 226171626Scognet kernel_pt_table[loop].pv_pa = freemempos + 227171626Scognet (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) * 228171626Scognet L2_TABLE_SIZE_REAL; 229171626Scognet kernel_pt_table[loop].pv_va = 230171626Scognet kernel_pt_table[loop].pv_pa + 0xc0000000; 231171626Scognet } 232171626Scognet } 233171626Scognet freemem_pt = freemempos; 234171626Scognet freemempos = 0x00100000; 235171626Scognet /* 236171626Scognet * Allocate a page for the system page mapped to V0x00000000 237171626Scognet * This page will just contain the system vectors and can be 238171626Scognet * shared by all processes. 239171626Scognet */ 240171626Scognet valloc_pages(systempage, 1); 241171626Scognet 242171626Scognet /* Allocate stacks for all modes */ 243171626Scognet valloc_pages(irqstack, IRQ_STACK_SIZE); 244171626Scognet valloc_pages(abtstack, ABT_STACK_SIZE); 245171626Scognet valloc_pages(undstack, UND_STACK_SIZE); 246171626Scognet valloc_pages(kernelstack, KSTACK_PAGES); 247171626Scognet valloc_pages(msgbufpv, round_page(MSGBUF_SIZE) / PAGE_SIZE); 248171626Scognet#ifdef ARM_USE_SMALL_ALLOC 249171626Scognet freemempos -= PAGE_SIZE; 250171626Scognet freemem_pt = trunc_page(freemem_pt); 251171626Scognet freemem_after = freemempos - ((freemem_pt - 0x00100000) / 252171626Scognet PAGE_SIZE) * sizeof(struct arm_small_page); 253171626Scognet arm_add_smallalloc_pages((void *)(freemem_after + 0xc0000000) 254171626Scognet , (void *)0xc0100000, freemem_pt - 0x00100000, 1); 255171626Scognet freemem_after -= ((freemem_after - 0x00001000) / PAGE_SIZE) * 256171626Scognet sizeof(struct arm_small_page); 257171626Scognet#if 0 258171626Scognet arm_add_smallalloc_pages((void *)(freemem_after + 0xc0000000) 259171626Scognet , (void *)0xc0001000, trunc_page(freemem_after) - 0x00001000, 0); 260171626Scognet#endif 261171626Scognet freemempos = trunc_page(freemem_after); 262171626Scognet freemempos -= PAGE_SIZE; 263171626Scognet#endif 264171626Scognet /* 265171626Scognet * Now we start construction of the L1 page table 266171626Scognet * We start by mapping the L2 page tables into the L1. 267171626Scognet * This means that we can replace L1 mappings later on if necessary 268171626Scognet */ 269171626Scognet l1pagetable = kernel_l1pt.pv_va; 270171626Scognet 271171626Scognet /* Map the L2 pages tables in the L1 page table */ 272171626Scognet pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00100000 - 1), 273171626Scognet &kernel_pt_table[KERNEL_PT_SYS]); 274171626Scognet pmap_map_chunk(l1pagetable, KERNBASE, SDRAM_START, 0x100000, 275171626Scognet VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 276171626Scognet 277171626Scognet pmap_map_chunk(l1pagetable, KERNBASE + 0x100000, SDRAM_START + 0x100000, 278171626Scognet 0x100000, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 279171626Scognet 280171626Scognet pmap_map_chunk(l1pagetable, KERNBASE + 0x200000, SDRAM_START + 0x200000, 281171626Scognet (((uint32_t)(lastaddr) - KERNBASE - 0x200000) + L1_S_SIZE) & ~(L1_S_SIZE - 1), 282171626Scognet VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 283171626Scognet freemem_after = ((int)lastaddr + PAGE_SIZE) & ~(PAGE_SIZE - 1); 284171626Scognet afterkern = round_page(((vm_offset_t)lastaddr + L1_S_SIZE) & ~(L1_S_SIZE 285171626Scognet - 1)); 286171626Scognet for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) { 287171626Scognet pmap_link_l2pt(l1pagetable, afterkern + i * 0x00100000, 288171626Scognet &kernel_pt_table[KERNEL_PT_AFKERNEL + i]); 289171626Scognet } 290171626Scognet 291171626Scognet 292171626Scognet#ifdef ARM_USE_SMALL_ALLOC 293171626Scognet if ((freemem_after + 2 * PAGE_SIZE) <= afterkern) { 294171626Scognet arm_add_smallalloc_pages((void *)(freemem_after), 295171626Scognet (void*)(freemem_after + PAGE_SIZE), 296171626Scognet afterkern - (freemem_after + PAGE_SIZE), 0); 297171626Scognet 298171626Scognet } 299171626Scognet#endif 300171626Scognet 301171626Scognet /* Map the vector page. */ 302171626Scognet pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa, 303171626Scognet VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 304171626Scognet pmap_devmap_bootstrap(l1pagetable, iq81342_devmap); 305171626Scognet /* 306171626Scognet * Give the XScale global cache clean code an appropriately 307171626Scognet * sized chunk of unmapped VA space starting at 0xff000000 308171626Scognet * (our device mappings end before this address). 309171626Scognet */ 310171626Scognet xscale_cache_clean_addr = 0xff000000U; 311171626Scognet 312171626Scognet cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 313171626Scognet setttb(kernel_l1pt.pv_pa); 314171626Scognet cpu_tlb_flushID(); 315171626Scognet cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)); 316171626Scognet /* 317171626Scognet * Pages were allocated during the secondary bootstrap for the 318171626Scognet * stacks for different CPU modes. 319171626Scognet * We must now set the r13 registers in the different CPU modes to 320171626Scognet * point to these stacks. 321171626Scognet * Since the ARM stacks use STMFD etc. we must set r13 to the top end 322171626Scognet * of the stack memory. 323171626Scognet */ 324171626Scognet 325171626Scognet 326171626Scognet set_stackptr(PSR_IRQ32_MODE, 327171626Scognet irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); 328171626Scognet set_stackptr(PSR_ABT32_MODE, 329171626Scognet abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); 330171626Scognet set_stackptr(PSR_UND32_MODE, 331171626Scognet undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); 332171626Scognet 333171626Scognet 334171626Scognet 335171626Scognet /* 336171626Scognet * We must now clean the cache again.... 337171626Scognet * Cleaning may be done by reading new data to displace any 338171626Scognet * dirty data in the cache. This will have happened in setttb() 339171626Scognet * but since we are boot strapping the addresses used for the read 340171626Scognet * may have just been remapped and thus the cache could be out 341171626Scognet * of sync. A re-clean after the switch will cure this. 342171626Scognet * After booting there are no gross reloations of the kernel thus 343171626Scognet * this problem will not occur after initarm(). 344171626Scognet */ 345171626Scognet cpu_idcache_wbinv_all(); 346171626Scognet i80321_calibrate_delay(); 347171626Scognet i81342_sdram_bounds(&obio_bs_tag, IOP34X_VADDR, &memstart, &memsize); 348171626Scognet physmem = memsize / PAGE_SIZE; 349171626Scognet cninit(); 350171626Scognet /* Set stack for exception handlers */ 351171626Scognet 352171626Scognet data_abort_handler_address = (u_int)data_abort_handler; 353171626Scognet prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 354171626Scognet undefined_handler_address = (u_int)undefinedinstruction_bounce; 355171626Scognet undefined_init(); 356171626Scognet 357173361Skib proc_linkup0(&proc0, &thread0); 358171626Scognet thread0.td_kstack = kernelstack.pv_va; 359171626Scognet thread0.td_pcb = (struct pcb *) 360171626Scognet (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 361171626Scognet thread0.td_pcb->pcb_flags = 0; 362171626Scognet thread0.td_frame = &proc0_tf; 363171626Scognet pcpup->pc_curpcb = thread0.td_pcb; 364171626Scognet 365171626Scognet arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 366171626Scognet 367171626Scognet pmap_curmaxkvaddr = afterkern + PAGE_SIZE; 368171626Scognet /* 369171626Scognet * ARM_USE_SMALL_ALLOC uses dump_avail, so it must be filled before 370171626Scognet * calling pmap_bootstrap. 371171626Scognet */ 372171626Scognet dump_avail[0] = 0x00000000; 373171626Scognet dump_avail[1] = 0x00000000 + memsize; 374171626Scognet dump_avail[2] = 0; 375171626Scognet dump_avail[3] = 0; 376171626Scognet 377171626Scognet pmap_bootstrap(pmap_curmaxkvaddr, 378171626Scognet 0xd0000000, &kernel_l1pt); 379171626Scognet msgbufp = (void*)msgbufpv.pv_va; 380171626Scognet msgbufinit(msgbufp, MSGBUF_SIZE); 381171626Scognet mutex_init(); 382171626Scognet 383171626Scognet i = 0; 384171626Scognet#ifdef ARM_USE_SMALL_ALLOC 385171626Scognet phys_avail[i++] = 0x00000000; 386171626Scognet phys_avail[i++] = 0x00001000; /* 387171626Scognet *XXX: Gross hack to get our 388171626Scognet * pages in the vm_page_array 389171626Scognet . */ 390171626Scognet#endif 391171626Scognet phys_avail[i++] = round_page(virtual_avail - KERNBASE + SDRAM_START); 392171626Scognet phys_avail[i++] = trunc_page(0x00000000 + memsize - 1); 393171626Scognet phys_avail[i++] = 0; 394171626Scognet phys_avail[i] = 0; 395171626Scognet 396171626Scognet /* Do basic tuning, hz etc */ 397171626Scognet init_param1(); 398171626Scognet init_param2(physmem); 399171626Scognet kdb_init(); 400171626Scognet return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP - 401171626Scognet sizeof(struct pcb))); 402171626Scognet} 403