1239281Sgonzo/*- 2239281Sgonzo * Copyright (c) 2012 Damjan Marion <dmarion@Freebsd.org> 3239281Sgonzo * All rights reserved. 4239281Sgonzo * 5239281Sgonzo * Redistribution and use in source and binary forms, with or without 6239281Sgonzo * modification, are permitted provided that the following conditions 7239281Sgonzo * are met: 8239281Sgonzo * 1. Redistributions of source code must retain the above copyright 9239281Sgonzo * notice, this list of conditions and the following disclaimer. 10239281Sgonzo * 2. Redistributions in binary form must reproduce the above copyright 11239281Sgonzo * notice, this list of conditions and the following disclaimer in the 12239281Sgonzo * documentation and/or other materials provided with the distribution. 13239281Sgonzo * 14239281Sgonzo * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15239281Sgonzo * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16239281Sgonzo * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17239281Sgonzo * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18239281Sgonzo * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19239281Sgonzo * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20239281Sgonzo * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21239281Sgonzo * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22239281Sgonzo * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23239281Sgonzo * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24239281Sgonzo * SUCH DAMAGE. 25239281Sgonzo * 26239281Sgonzo * $FreeBSD: stable/11/sys/arm/ti/cpsw/if_cpswvar.h 312762 2017-01-25 16:18:40Z loos $ 27239281Sgonzo */ 28239281Sgonzo 29239281Sgonzo#ifndef _IF_CPSWVAR_H 30239281Sgonzo#define _IF_CPSWVAR_H 31239281Sgonzo 32296993Sloos#define CPSW_PORTS 2 33296980Sloos#define CPSW_INTR_COUNT 4 34239281Sgonzo 35239281Sgonzo/* MII BUS */ 36310882Sloos#define CPSW_MIIBUS_RETRIES 20 37310882Sloos#define CPSW_MIIBUS_DELAY 100 38239281Sgonzo 39296980Sloos#define CPSW_MAX_ALE_ENTRIES 1024 40239281Sgonzo 41296980Sloos#define CPSW_SYSCTL_COUNT 34 42246276Skientzle 43310881Sloos#ifdef CPSW_ETHERSWITCH 44310881Sloos#define CPSW_CPU_PORT 0 45310881Sloos#define CPSW_PORTS_MASK 0x7 46310881Sloos#define CPSW_VLANS 128 /* Arbitrary number. */ 47310881Sloos 48310881Sloosstruct cpsw_vlangroups { 49310881Sloos int vid; 50310881Sloos}; 51310881Sloos#endif 52310881Sloos 53244939Skientzlestruct cpsw_slot { 54246276Skientzle uint32_t bd_offset; /* Offset of corresponding BD within CPPI RAM. */ 55244939Skientzle bus_dmamap_t dmamap; 56297043Sloos struct ifnet *ifp; 57244939Skientzle struct mbuf *mbuf; 58244939Skientzle STAILQ_ENTRY(cpsw_slot) next; 59244939Skientzle}; 60246276SkientzleSTAILQ_HEAD(cpsw_slots, cpsw_slot); 61244939Skientzle 62246276Skientzlestruct cpsw_queue { 63246276Skientzle struct mtx lock; 64246276Skientzle int running; 65310860Sloos int teardown; 66246276Skientzle struct cpsw_slots active; 67246276Skientzle struct cpsw_slots avail; 68246276Skientzle uint32_t queue_adds; /* total bufs added */ 69246276Skientzle uint32_t queue_removes; /* total bufs removed */ 70246276Skientzle uint32_t queue_removes_at_last_tick; /* Used by watchdog */ 71310860Sloos uint32_t queue_restart; 72246276Skientzle int queue_slots; 73246276Skientzle int active_queue_len; 74246276Skientzle int max_active_queue_len; 75246276Skientzle int avail_queue_len; 76246276Skientzle int max_avail_queue_len; 77246276Skientzle int longest_chain; /* Largest # segments in a single packet. */ 78246276Skientzle int hdp_offset; 79246276Skientzle}; 80246276Skientzle 81296993Sloosstruct cpsw_port { 82296993Sloos device_t dev; 83296993Sloos int phy; 84296993Sloos int vlan; 85296993Sloos}; 86296993Sloos 87239281Sgonzostruct cpsw_softc { 88296993Sloos device_t dev; 89296993Sloos int active_slave; 90296993Sloos int debug; 91296993Sloos int dualemac; 92239281Sgonzo phandle_t node; 93246276Skientzle struct bintime attach_uptime; /* system uptime when attach happened. */ 94296993Sloos struct cpsw_port port[2]; 95310857Sloos unsigned coal_us; 96246276Skientzle 97296993Sloos /* RX and TX buffer tracking */ 98296993Sloos struct cpsw_queue rx, tx; 99246276Skientzle 100246276Skientzle /* We expect 1 memory resource and 4 interrupts from the device tree. */ 101296993Sloos int mem_rid; 102283276Sgonzo struct resource *mem_res; 103283276Sgonzo struct resource *irq_res[CPSW_INTR_COUNT]; 104296993Sloos void *ih_cookie[CPSW_INTR_COUNT]; 105239281Sgonzo 106312762Sloos /* A buffer full of nulls for TX padding. */ 107312762Sloos void *nullpad; 108246276Skientzle 109296993Sloos bus_dma_tag_t mbuf_dtag; 110239281Sgonzo 111246276Skientzle struct { 112246276Skientzle int resets; 113246276Skientzle int timer; 114296993Sloos struct callout callout; 115246276Skientzle } watchdog; 116239281Sgonzo 117246276Skientzle /* 64-bit versions of 32-bit hardware statistics counters */ 118246276Skientzle uint64_t shadow_stats[CPSW_SYSCTL_COUNT]; 119239281Sgonzo 120246276Skientzle /* CPPI STATERAM has 512 slots for building TX/RX queues. */ 121246276Skientzle /* TODO: Size here supposedly varies with different versions 122246276Skientzle of the controller. Check DaVinci specs and find a good 123246276Skientzle way to adjust this. One option is to have a separate 124246276Skientzle Device Tree parameter for number slots; another option 125246276Skientzle is to calculate it from the memory size in the device tree. */ 126246276Skientzle struct cpsw_slot _slots[CPSW_CPPI_RAM_SIZE / sizeof(struct cpsw_cpdma_bd)]; 127246276Skientzle struct cpsw_slots avail; 128239281Sgonzo}; 129239281Sgonzo 130296993Sloosstruct cpswp_softc { 131296993Sloos device_t dev; 132296993Sloos device_t miibus; 133296993Sloos device_t pdev; 134296993Sloos int media_status; 135296993Sloos int unit; 136296993Sloos int vlan; 137296993Sloos struct bintime init_uptime; /* system uptime when init happened. */ 138296993Sloos struct callout mii_callout; 139296993Sloos struct cpsw_softc *swsc; 140296993Sloos struct ifnet *ifp; 141296993Sloos struct mii_data *mii; 142296993Sloos struct mtx lock; 143296993Sloos uint32_t if_flags; 144296993Sloos uint32_t phy; 145296993Sloos uint32_t phyaccess; 146296993Sloos uint32_t physel; 147296993Sloos}; 148296993Sloos 149239281Sgonzo#endif /*_IF_CPSWVAR_H */ 150